From 2220c58f51d74cfd82d065376ea856a3c5e543cf Mon Sep 17 00:00:00 2001 From: acqn Date: Fri, 3 Jan 2020 08:20:28 +0800 Subject: [PATCH] If the previous insn may be skipped, we cannot simply predict the output values of the registers. --- src/cc65/codeseg.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/src/cc65/codeseg.c b/src/cc65/codeseg.c index 58586affd..f2e0faf15 100644 --- a/src/cc65/codeseg.c +++ b/src/cc65/codeseg.c @@ -1560,9 +1560,9 @@ void CS_GenRegInfo (CodeSeg* S) /* If this insn is a branch on zero flag, we may have more info on ** register contents for one of both flow directions, but only if - ** there is a previous instruction. + ** we've gone through a previous instruction. */ - if ((E->Info & OF_ZBRA) != 0 && (P = CS_GetPrevEntry (S, I)) != 0) { + if (LabelCount == 0 && (E->Info & OF_ZBRA) != 0 && (P = CS_GetPrevEntry (S, I)) != 0) { /* Get the branch condition */ bc_t BC = GetBranchCond (E->OPC);