diff --git a/cfg/c65-asm.cfg b/cfg/c65-asm.cfg new file mode 100644 index 000000000..40904ef70 --- /dev/null +++ b/cfg/c65-asm.cfg @@ -0,0 +1,20 @@ +FEATURES { + STARTADDRESS: default = $2001; +} +SYMBOLS { + __LOADADDR__: type = import; +} +MEMORY { + ZP: file = "", start = $0002, size = $00FE, define = yes; + LOADADDR: file = %O, start = %S - 2, size = $0002; + MAIN: file = %O, start = %S, size = $D000 - %S; +} +SEGMENTS { + ZEROPAGE: load = ZP, type = zp, optional = yes; + LOADADDR: load = LOADADDR, type = ro; + EXEHDR: load = MAIN, type = ro, optional = yes; + CODE: load = MAIN, type = rw; + RODATA: load = MAIN, type = ro, optional = yes; + DATA: load = MAIN, type = rw, optional = yes; + BSS: load = MAIN, type = bss, optional = yes, define = yes; +} diff --git a/cfg/mega65-asm.cfg b/cfg/mega65-asm.cfg new file mode 100644 index 000000000..40904ef70 --- /dev/null +++ b/cfg/mega65-asm.cfg @@ -0,0 +1,20 @@ +FEATURES { + STARTADDRESS: default = $2001; +} +SYMBOLS { + __LOADADDR__: type = import; +} +MEMORY { + ZP: file = "", start = $0002, size = $00FE, define = yes; + LOADADDR: file = %O, start = %S - 2, size = $0002; + MAIN: file = %O, start = %S, size = $D000 - %S; +} +SEGMENTS { + ZEROPAGE: load = ZP, type = zp, optional = yes; + LOADADDR: load = LOADADDR, type = ro; + EXEHDR: load = MAIN, type = ro, optional = yes; + CODE: load = MAIN, type = rw; + RODATA: load = MAIN, type = ro, optional = yes; + DATA: load = MAIN, type = rw, optional = yes; + BSS: load = MAIN, type = bss, optional = yes, define = yes; +} diff --git a/doc/ca65.sgml b/doc/ca65.sgml index 1503b2f39..d2506d958 100644 --- a/doc/ca65.sgml +++ b/doc/ca65.sgml @@ -313,7 +313,7 @@ Here is a description of all the command line options: character constants into the character set of the target platform. The default for the target system is "none", which means that no translation will take place. The assembler supports the same target systems as the - compiler, see there for a list. + compiler, see . Depending on the target, the default CPU type is also set. This can be overridden by using the / option. diff --git a/doc/cc65.sgml b/doc/cc65.sgml index 383a6dd6a..166c0fad4 100644 --- a/doc/cc65.sgml +++ b/doc/cc65.sgml @@ -610,27 +610,42 @@ Here is a description of all the command line options: none + agat (a russian apple2 like computer) apple2 apple2enh atari + atari2600 + atari5200 + atari7800 atarixl atmos + bbc c16 (works also for the c116 with memory up to 32K) c64 + c65 c128 cbm510 (CBM-II series with 40 column video) cbm610 (all CBM-II II computers with 80 column video) + creativision + cx16 + gamate geos-apple geos-cbm + geos (alias for geos-cbm) + kim1 lunix lynx + mega65 nes osic1p + pce (PC engine) pet (all CBM PET systems except the 2001) plus4 + p6502 sim6502 sim65c02 supervision + sym1 telestrat vic20 diff --git a/libsrc/Makefile b/libsrc/Makefile index 1ec0bcfea..9bbb0aadb 100644 --- a/libsrc/Makefile +++ b/libsrc/Makefile @@ -21,6 +21,7 @@ CBMS = c128 \ GEOS = geos-apple \ geos-cbm +# FIXME: c65 (and perhaps mega65?) should be moved up to CBMS maybe TARGETS = agat \ apple2 \ apple2enh \ @@ -30,6 +31,7 @@ TARGETS = agat \ atari5200 \ atari7800 \ atmos \ + c65 \ creativision \ $(CBMS) \ $(GEOS) \ @@ -45,7 +47,8 @@ TARGETS = agat \ sim65c02 \ supervision \ sym1 \ - telestrat + telestrat \ + mega65 TARGETTEST = none \ sim6502 \ @@ -193,6 +196,11 @@ ifeq ($(TARGET),$(filter $(TARGET),$(GEOS))) SRCDIRS += $(addprefix geos-common/,$(GEOSDIRS)) endif +ifeq ($(TARGET),c65) +# FIXME: this does not work because of the SP vs C_SP clash +else ifeq ($(TARGET),mega65) +# FIXME: this does not work because of the SP vs C_SP clash +else SRCDIRS += common \ conio \ dbg \ @@ -203,6 +211,7 @@ SRCDIRS += common \ serial \ tgi \ zlib +endif vpath %.s $(SRCDIRS) vpath %.c $(SRCDIRS) diff --git a/libsrc/c65/exehdr.s b/libsrc/c65/exehdr.s new file mode 100644 index 000000000..645fc12e7 --- /dev/null +++ b/libsrc/c65/exehdr.s @@ -0,0 +1,32 @@ +; +; Ullrich von Bassewitz, 2010-11-14 +; +; This module supplies a small BASIC stub program that jumps to the machine +; language code that follows it using SYS. +; + + ; The following symbol is used by linker config to force the module + ; to get included into the output file + .export __EXEHDR__: absolute = 1 + +.segment "EXEHDR" + + .addr Next + .word .version ; Line number + .byte $fe, $02, "0:" ; BANK 0 + .byte $9e ; SYS +; .byte <(((Start / 10000) .mod 10) + '0') + .byte <(((Start / 1000) .mod 10) + '0') + .byte <(((Start / 100) .mod 10) + '0') + .byte <(((Start / 10) .mod 10) + '0') + .byte <(((Start / 1) .mod 10) + '0') + .byte $00 ; End of BASIC line +Next: .word 0 ; BASIC end marker +Start: + +; If the start address is larger than 4 digits, the header generated above +; will not contain the highest digit. Instead of wasting one more digit that +; is almost never used, check it at link time and generate an error so the +; user knows something is wrong. + +.assert (Start < 10000), error, "Start address too large for generated BASIC stub" diff --git a/libsrc/c65/loadaddr.s b/libsrc/c65/loadaddr.s new file mode 100644 index 000000000..0675dd67d --- /dev/null +++ b/libsrc/c65/loadaddr.s @@ -0,0 +1,16 @@ +; +; Ullrich von Bassewitz, 2010-11-13 +; +; This module supplies the load address that is expected by Commodore +; machines in the first two bytes of an excutable disk file. +; + + + ; The following symbol is used by linker config to force the module + ; to get included into the output file + .export __LOADADDR__: absolute = 1 + +.segment "LOADADDR" + + .addr *+2 + diff --git a/libsrc/mega65/exehdr.s b/libsrc/mega65/exehdr.s new file mode 100644 index 000000000..645fc12e7 --- /dev/null +++ b/libsrc/mega65/exehdr.s @@ -0,0 +1,32 @@ +; +; Ullrich von Bassewitz, 2010-11-14 +; +; This module supplies a small BASIC stub program that jumps to the machine +; language code that follows it using SYS. +; + + ; The following symbol is used by linker config to force the module + ; to get included into the output file + .export __EXEHDR__: absolute = 1 + +.segment "EXEHDR" + + .addr Next + .word .version ; Line number + .byte $fe, $02, "0:" ; BANK 0 + .byte $9e ; SYS +; .byte <(((Start / 10000) .mod 10) + '0') + .byte <(((Start / 1000) .mod 10) + '0') + .byte <(((Start / 100) .mod 10) + '0') + .byte <(((Start / 10) .mod 10) + '0') + .byte <(((Start / 1) .mod 10) + '0') + .byte $00 ; End of BASIC line +Next: .word 0 ; BASIC end marker +Start: + +; If the start address is larger than 4 digits, the header generated above +; will not contain the highest digit. Instead of wasting one more digit that +; is almost never used, check it at link time and generate an error so the +; user knows something is wrong. + +.assert (Start < 10000), error, "Start address too large for generated BASIC stub" diff --git a/libsrc/mega65/loadaddr.s b/libsrc/mega65/loadaddr.s new file mode 100644 index 000000000..0675dd67d --- /dev/null +++ b/libsrc/mega65/loadaddr.s @@ -0,0 +1,16 @@ +; +; Ullrich von Bassewitz, 2010-11-13 +; +; This module supplies the load address that is expected by Commodore +; machines in the first two bytes of an excutable disk file. +; + + + ; The following symbol is used by linker config to force the module + ; to get included into the output file + .export __LOADADDR__: absolute = 1 + +.segment "LOADADDR" + + .addr *+2 + diff --git a/src/ca65/main.c b/src/ca65/main.c index 682e9be7f..f113bc812 100644 --- a/src/ca65/main.c +++ b/src/ca65/main.c @@ -342,6 +342,10 @@ static void SetSys (const char* Sys) NewSymbol ("__SYM1__", 1); break; + case TGT_MEGA65: + CBMSystem ("__MEGA65__"); + break; + case TGT_KIM1: NewSymbol ("__KIM1__", 1); break; diff --git a/src/cc65/codegen.c b/src/cc65/codegen.c index e55a318d6..17618e5ff 100644 --- a/src/cc65/codegen.c +++ b/src/cc65/codegen.c @@ -202,6 +202,8 @@ void g_preamble (void) case CPU_65C02: AddTextLine ("\t.setcpu\t\t\"65C02\""); break; case CPU_65816: AddTextLine ("\t.setcpu\t\t\"65816\""); break; case CPU_HUC6280: AddTextLine ("\t.setcpu\t\t\"HUC6280\""); break; + case CPU_4510: AddTextLine ("\t.setcpu\t\t\"4510\""); break; + case CPU_45GS02: AddTextLine ("\t.setcpu\t\t\"45GS02\""); break; default: Internal ("Unknown CPU: %d", CPU); } diff --git a/src/cc65/main.c b/src/cc65/main.c index 5b951dc56..648c603cd 100644 --- a/src/cc65/main.c +++ b/src/cc65/main.c @@ -301,6 +301,14 @@ static void SetSys (const char* Sys) DefineNumericMacro ("__SYM1__", 1); break; + case TGT_C65: + cbmsys ("__C65__"); + break; + + case TGT_MEGA65: + cbmsys ("__MEGA65__"); + break; + case TGT_KIM1: DefineNumericMacro ("__KIM1__", 1); break; @@ -340,7 +348,6 @@ static void DefineCpuMacros (void) case CPU_NONE: case CPU_SWEET16: case CPU_M740: - case CPU_4510: case CPU_UNKNOWN: CPUName = (CPU == CPU_UNKNOWN)? "unknown" : CPUNames[CPU]; Internal ("Invalid CPU \"%s\"", CPUName); @@ -374,6 +381,14 @@ static void DefineCpuMacros (void) DefineNumericMacro ("__CPU_HUC6280__", 1); break; + case CPU_4510: + DefineNumericMacro ("__CPU_4510__", 1); + break; + + case CPU_45GS02: + DefineNumericMacro ("__CPU_45GS02__", 1); + break; + default: FAIL ("Unexpected value in switch"); break; @@ -389,6 +404,8 @@ static void DefineCpuMacros (void) DefineNumericMacro ("__CPU_ISET_65C02__", CPU_ISET_65C02); DefineNumericMacro ("__CPU_ISET_65816__", CPU_ISET_65816); DefineNumericMacro ("__CPU_ISET_HUC6280__", CPU_ISET_HUC6280); + DefineNumericMacro ("__CPU_ISET_4510__", CPU_ISET_4510); + DefineNumericMacro ("__CPU_ISET_45GS02__", CPU_ISET_45GS02); /* Now define the macro that contains the bit set with the available ** cpu instructions. diff --git a/src/common/target.c b/src/common/target.c index 1544c215b..51e015adc 100644 --- a/src/common/target.c +++ b/src/common/target.c @@ -187,6 +187,7 @@ static const TargetEntry TargetMap[] = { { "kim1", TGT_KIM1 }, { "lunix", TGT_LUNIX }, { "lynx", TGT_LYNX }, + { "mega65", TGT_MEGA65, }, { "module", TGT_MODULE }, { "nes", TGT_NES }, { "none", TGT_NONE }, @@ -243,6 +244,7 @@ static const TargetProperties PropertyTable[TGT_COUNT] = { { "c65", CPU_4510, BINFMT_BINARY, CTPET }, { "cx16", CPU_65C02, BINFMT_BINARY, CTPET }, { "sym1", CPU_6502, BINFMT_BINARY, CTNone }, + { "mega65", CPU_45GS02, BINFMT_BINARY, CTPET }, { "kim1", CPU_6502, BINFMT_BINARY, CTNone }, { "rp6502", CPU_65C02, BINFMT_BINARY, CTNone }, { "agat", CPU_6502, BINFMT_BINARY, CTAgat }, diff --git a/src/common/target.h b/src/common/target.h index d6c9fc35b..c5c8455a0 100644 --- a/src/common/target.h +++ b/src/common/target.h @@ -87,6 +87,7 @@ typedef enum { TGT_C65, TGT_CX16, TGT_SYM1, + TGT_MEGA65, TGT_KIM1, TGT_RP6502, TGT_AGAT,