From 70b54bdbe393cef27e2919401e19c669656c6dc9 Mon Sep 17 00:00:00 2001 From: mrdudz Date: Fri, 4 Jul 2025 23:59:57 +0200 Subject: [PATCH 1/3] some missing target defines --- doc/cc65.sgml | 46 +++++++++++++++++++++++++++++++++++++++++++--- 1 file changed, 43 insertions(+), 3 deletions(-) diff --git a/doc/cc65.sgml b/doc/cc65.sgml index 734e4eaf4..6306bf512 100644 --- a/doc/cc65.sgml +++ b/doc/cc65.sgml @@ -641,7 +641,7 @@ Here is a description of all the command line options: pce (PC engine) pet (all CBM PET systems except the 2001) plus4 - p6502 + rp6502 sim6502 sim65c02 supervision @@ -1112,6 +1112,10 @@ This cc65 version has some extensions to the ISO C standard. The compiler defines several macros at startup: + __AGAT__ + + This macro is defined if the target is the Agat (-t agat). + __APPLE2__ This macro is defined if the target is the Apple ][ (-t apple2) or the enhanced Apple //e (-t apple2enh). @@ -1122,11 +1126,15 @@ The compiler defines several macros at startup: __ATARI2600__ - This macro is defined if the target is the Atari 2600 game console. + This macro is defined if the target is the Atari 2600 game console (-t atari2600). __ATARI5200__ - This macro is defined if the target is the Atari 5200 game console. + This macro is defined if the target is the Atari 5200 game console (-t atari5200). + + __ATARI7800__ + + This macro is defined if the target is the Atari 7800 game console (-t atari7800). __ATARI__ @@ -1140,6 +1148,10 @@ The compiler defines several macros at startup: This macro is defined if the target is the Oric Atmos (-t atmos). + __BBC__ + + This macro is defined if the target is the BBC (-t bbc). + __C128__ This macro is defined if the target is the Commodore 128 (-t c128). @@ -1152,6 +1164,10 @@ The compiler defines several macros at startup: This macro is defined if the target is the Commodore 64 (-t c64). + __C65__ + + This macro is defined if the target is the Commodore 65 (-t c65). + __CBM__ This macro is defined if the target system is one of the CBM targets. @@ -1321,6 +1337,10 @@ The compiler defines several macros at startup: / macro for the instruction set of the W65C02 CPU. + __CREATIVISION__ + + This macro is defined if the target is the VTech Creativision game console (-t creativision). + __CX16__ This macro is defined if the target is the Commander X16 (-t cx16). @@ -1339,6 +1359,10 @@ The compiler defines several macros at startup: This macro expands to a string containing the name of the C source file. + __GAMATE__ + + This macro is defined if the target is the Gamate handheld (-t gamate). + __GEOS__ This macro is defined if you are compiling for one of the GEOS systems. @@ -1351,6 +1375,10 @@ The compiler defines several macros at startup: This macro is defined if you are compiling for the GEOS 64/128 system (-t geos-cbm). + __KIM1__ + + This macro is defined if the target is the KIM-1 (-t kmi1). + __LINE__ This macro expands to the current line number. @@ -1363,6 +1391,10 @@ The compiler defines several macros at startup: This macro is defined if the target is the Atari Lynx (-t lynx). + __MEGA65__ + + This macro is defined if the target is the Mega 65 (-t mega65). + __NES__ This macro is defined if the target is the Nintendo Entertainment System (-t nes). @@ -1388,6 +1420,10 @@ The compiler defines several macros at startup: This macro is defined if the target is the Ohio Scientific Challenger 1P (-t osic1p). + __PCE__ + + This macro is defined if the target is the PC Engine game console (-t pce). + __PET__ This macro is defined if the target is the PET family of computers (-t pet). @@ -1396,6 +1432,10 @@ The compiler defines several macros at startup: This macro is defined if the target is the Commodore Plus/4 (-t plus4). + __RP6502__ + + This macro is defined if the target is the Picocomputer 6502 (-t rp6502). + __SIM6502__ This macro is defined if the target is sim65 in 6502 mode (-t sim6502). From 1cc7d01c997dbfb76e7fa0dc304f66d5fc98d128 Mon Sep 17 00:00:00 2001 From: mrdudz Date: Sat, 5 Jul 2025 21:53:10 +0200 Subject: [PATCH 2/3] added missing predefined constants --- doc/ca65.sgml | 10 +++++++++- 1 file changed, 9 insertions(+), 1 deletion(-) diff --git a/doc/ca65.sgml b/doc/ca65.sgml index 63a1be7e9..a7d3b2ffb 100644 --- a/doc/ca65.sgml +++ b/doc/ca65.sgml @@ -3803,7 +3803,6 @@ See: , atari Defines the scrcode macro. cbm Defines the scrcode macro. - cpu Defines constants for the .CPU variable. generic Defines generic macros like add, sub, and blt. longbranch Defines conditional long-jump macros. @@ -5117,6 +5116,7 @@ For better orthogonality, the assembler defines similar symbols as the compiler, depending on the target system selected: + From cf89172cf7a7594adf7dc2f370ed0aacf8ffc0a7 Mon Sep 17 00:00:00 2001 From: mrdudz Date: Sat, 5 Jul 2025 23:27:06 +0200 Subject: [PATCH 3/3] attempt to explain the ISET* dilemma --- doc/ca65.sgml | 69 +++++++++++++++++++++++++++------------------------ doc/cc65.sgml | 13 +++++++--- 2 files changed, 45 insertions(+), 37 deletions(-) diff --git a/doc/ca65.sgml b/doc/ca65.sgml index a7d3b2ffb..bd55b178c 100644 --- a/doc/ca65.sgml +++ b/doc/ca65.sgml @@ -1433,38 +1433,6 @@ constant is defined: CPU_ISET_M740 - - and following. .endif - See also: +The dilemma: +The original design of this feature was made under the assumption, that any +"higher" CPU will support the entire instruction set of the "lower" CPU. For +example: the WDC W65C02 supports all instructions of the 65C02, which again +support all instructions of the 65SC02. Unfortunately this is not true for all +CMOS CPUs - when the 65CE02 was made, some instructions were changed, and a new +addressingmode was added. As a result all CPUS after (and including) 65CE02 +are no more (source code) compatible with all instructions originally introduced +by the 65SC02. + +Because of this, the .CPU function and the ISET* macros were repurposed to +indicate groups of instructions only, ie only the set of instructions +that was added by that particular CPU. In the value returned by .CPU only the +bits will be set, that refer to the groups of instructions that are completely +supported by that CPU. + +The advantage of this is, that the mechanism keeps working for all new CPUs +added. The inevitable disadvantage is that you now have to know exactly which +CPU added which instructions (look for reference). + + + .if (.cpu .bitand CPU_ISET_65SC02) + ; This will be assembled for the W65C02, 65C02, 65SC02, 65816, HUC6820 + lda (c_sp) + .elseif (.cpu .bitand CPU_ISET_65CE02) + ; This will be assembled for the 65CE02, 4510, 45GS02 + ldz #$00 + lda (c_sp),z + .else + ldy #$00 + lda (c_sp),y + .endif + + + See also: , which is a similar mechanism, + but without the problem outlined above. .ISIZE