From 76aa7cbc40ef8e2cde5aa18c2dfcc360f99d00d7 Mon Sep 17 00:00:00 2001 From: mrdudz Date: Fri, 27 Jun 2025 19:40:41 +0200 Subject: [PATCH 01/32] add names and bit(field)s for WDC65C02 and 65CE02 --- asminc/cpu.mac | 4 ++++ src/common/cpu.c | 12 ++++++++---- src/common/cpu.h | 10 +++++++--- 3 files changed, 19 insertions(+), 7 deletions(-) diff --git a/asminc/cpu.mac b/asminc/cpu.mac index c66641078..728c99262 100644 --- a/asminc/cpu.mac +++ b/asminc/cpu.mac @@ -12,6 +12,8 @@ CPU_ISET_HUC6280 = $0100 CPU_ISET_M740 = $0200 CPU_ISET_4510 = $0400 CPU_ISET_45GS02 = $0800 +CPU_ISET_W65C02 = $1000 +CPU_ISET_65CE02 = $2000 ; CPU capabilities ; make sure to only combine the instruction sets that are 100% compatible @@ -31,3 +33,5 @@ CPU_HUC6280 = CPU_ISET_HUC6280 | CPU_ISET_6502 | CPU_ISET_65C02 CPU_4510 = CPU_ISET_4510 | CPU_ISET_6502 | CPU_ISET_65C02 CPU_45GS02 = CPU_ISET_45GS02 | CPU_ISET_6502 | CPU_ISET_65C02 | CPU_ISET_4510 CPU_M740 = CPU_ISET_M740 | CPU_ISET_6502 +CPU_W65C02 = CPU_ISET_W65C02 | CPU_ISET_6502 | CPU_ISET_65SC02 | CPU_ISET_65C02 +CPU_65CE02 = CPU_ISET_65CE02 | CPU_ISET_6502 | CPU_ISET_65SC02 | CPU_ISET_65C02 diff --git a/src/common/cpu.c b/src/common/cpu.c index 54bb8a3fb..31fa8d7bf 100644 --- a/src/common/cpu.c +++ b/src/common/cpu.c @@ -56,14 +56,16 @@ const char* CPUNames[CPU_COUNT] = { "6502", "6502X", "6502DTV", - "65SC02", - "65C02", + "65SC02", /* the original CMOS instruction set */ + "65C02", /* CMOS with Rockwell extensions */ "65816", "sweet16", "huc6280", "m740", "4510", "45GS02" + "W65C02", /* CMOS with WDC extensions */ + "65CE02", /* CMOS with GTE extensions */ }; /* Tables with CPU instruction sets @@ -84,8 +86,10 @@ const unsigned CPUIsets[CPU_COUNT] = { CPU_ISET_M740 | CPU_ISET_6502, /* 4510 does NOT have indirect-zp (without z), so we can not use 65SC02 */ /* FIXME: 4510 does not have wai/stp */ - CPU_ISET_4510 | CPU_ISET_6502 | CPU_ISET_65C02, - CPU_ISET_45GS02 | CPU_ISET_6502 | CPU_ISET_65C02 | CPU_ISET_4510, + CPU_ISET_4510 | CPU_ISET_6502 | CPU_ISET_65C02, + CPU_ISET_45GS02 | CPU_ISET_6502 | CPU_ISET_65C02 | CPU_ISET_4510, + CPU_ISET_W65C02 | CPU_ISET_6502 | CPU_ISET_65SC02 | CPU_ISET_65C02, + CPU_ISET_65CE02 | CPU_ISET_6502 | CPU_ISET_65SC02 | CPU_ISET_65C02, }; diff --git a/src/common/cpu.h b/src/common/cpu.h index 81795e146..0784600f7 100644 --- a/src/common/cpu.h +++ b/src/common/cpu.h @@ -51,14 +51,16 @@ typedef enum { CPU_6502, CPU_6502X, /* "Extended", that is: with illegal opcodes */ CPU_6502DTV, /* CPU_6502 + DTV extra and illegal opcodes */ - CPU_65SC02, - CPU_65C02, + CPU_65SC02, /* the original CMOS instruction set */ + CPU_65C02, /* CMOS with Rockwell extensions */ CPU_65816, CPU_SWEET16, CPU_HUC6280, /* Used in PC engine */ CPU_M740, /* Mitsubishi 740 series MCUs */ CPU_4510, /* CPU of C65 */ CPU_45GS02, /* CPU of MEGA65 */ + CPU_W65C02, /* CMOS with WDC extensions */ + CPU_65CE02, /* CMOS with GTE extensions */ CPU_COUNT /* Number of different CPUs */ } cpu_t; @@ -75,7 +77,9 @@ enum { CPU_ISET_HUC6280 = 1 << CPU_HUC6280, CPU_ISET_M740 = 1 << CPU_M740, CPU_ISET_4510 = 1 << CPU_4510, - CPU_ISET_45GS02 = 1 << CPU_45GS02 + CPU_ISET_45GS02 = 1 << CPU_45GS02, + CPU_ISET_W65C02 = 1 << CPU_W65C02, + CPU_ISET_65CE02 = 1 << CPU_65CE02 }; /* CPU used */ From e93356e3bbd0a81392a43649cb32cca2dbab474c Mon Sep 17 00:00:00 2001 From: mrdudz Date: Sat, 28 Jun 2025 00:38:16 +0200 Subject: [PATCH 02/32] add 65CE02 table --- src/ca65/instr.c | 269 +++++++++++++++++++++++++++++++++++++++++++++-- 1 file changed, 263 insertions(+), 6 deletions(-) diff --git a/src/ca65/instr.c b/src/ca65/instr.c index c19be11b2..b920755d3 100644 --- a/src/ca65/instr.c +++ b/src/ca65/instr.c @@ -426,7 +426,7 @@ static const struct { } }; -/* Instruction table for the 65SC02 */ +/* Instruction table for the 65SC02 (original CMOS) */ static const struct { unsigned Count; InsDesc Ins[66]; @@ -505,14 +505,125 @@ static const struct { } }; -/* Instruction table for the 65C02 */ +/* Instruction table for the 65C02 (CMOS with Rockwell extensions) */ static const struct { unsigned Count; - InsDesc Ins[100]; + InsDesc Ins[98]; } InsTab65C02 = { /* CAUTION: table must be sorted for bsearch */ sizeof (InsTab65C02.Ins) / sizeof (InsTab65C02.Ins[0]), { +/* BEGIN SORTED.SH */ + { "ADC", 0x080A66C, 0x60, 0, PutAll }, + { "AND", 0x080A66C, 0x20, 0, PutAll }, + { "ASL", 0x000006e, 0x02, 1, PutAll }, + { "BBR0", 0x0000000, 0x0F, 0, PutBitBranch }, + { "BBR1", 0x0000000, 0x1F, 0, PutBitBranch }, + { "BBR2", 0x0000000, 0x2F, 0, PutBitBranch }, + { "BBR3", 0x0000000, 0x3F, 0, PutBitBranch }, + { "BBR4", 0x0000000, 0x4F, 0, PutBitBranch }, + { "BBR5", 0x0000000, 0x5F, 0, PutBitBranch }, + { "BBR6", 0x0000000, 0x6F, 0, PutBitBranch }, + { "BBR7", 0x0000000, 0x7F, 0, PutBitBranch }, + { "BBS0", 0x0000000, 0x8F, 0, PutBitBranch }, + { "BBS1", 0x0000000, 0x9F, 0, PutBitBranch }, + { "BBS2", 0x0000000, 0xAF, 0, PutBitBranch }, + { "BBS3", 0x0000000, 0xBF, 0, PutBitBranch }, + { "BBS4", 0x0000000, 0xCF, 0, PutBitBranch }, + { "BBS5", 0x0000000, 0xDF, 0, PutBitBranch }, + { "BBS6", 0x0000000, 0xEF, 0, PutBitBranch }, + { "BBS7", 0x0000000, 0xFF, 0, PutBitBranch }, + { "BCC", 0x0020000, 0x90, 0, PutPCRel8 }, + { "BCS", 0x0020000, 0xb0, 0, PutPCRel8 }, + { "BEQ", 0x0020000, 0xf0, 0, PutPCRel8 }, + { "BIT", 0x0A0006C, 0x00, 2, PutAll }, + { "BMI", 0x0020000, 0x30, 0, PutPCRel8 }, + { "BNE", 0x0020000, 0xd0, 0, PutPCRel8 }, + { "BPL", 0x0020000, 0x10, 0, PutPCRel8 }, + { "BRA", 0x0020000, 0x80, 0, PutPCRel8 }, + { "BRK", 0x0800005, 0x00, 6, PutAll }, + { "BVC", 0x0020000, 0x50, 0, PutPCRel8 }, + { "BVS", 0x0020000, 0x70, 0, PutPCRel8 }, + { "CLC", 0x0000001, 0x18, 0, PutAll }, + { "CLD", 0x0000001, 0xd8, 0, PutAll }, + { "CLI", 0x0000001, 0x58, 0, PutAll }, + { "CLV", 0x0000001, 0xb8, 0, PutAll }, + { "CMP", 0x080A66C, 0xc0, 0, PutAll }, + { "CPX", 0x080000C, 0xe0, 1, PutAll }, + { "CPY", 0x080000C, 0xc0, 1, PutAll }, + { "DEA", 0x0000001, 0x00, 3, PutAll }, /* == DEC */ + { "DEC", 0x000006F, 0x00, 3, PutAll }, + { "DEX", 0x0000001, 0xca, 0, PutAll }, + { "DEY", 0x0000001, 0x88, 0, PutAll }, + { "EOR", 0x080A66C, 0x40, 0, PutAll }, + { "INA", 0x0000001, 0x00, 4, PutAll }, /* == INC */ + { "INC", 0x000006f, 0x00, 4, PutAll }, + { "INX", 0x0000001, 0xe8, 0, PutAll }, + { "INY", 0x0000001, 0xc8, 0, PutAll }, + { "JMP", 0x0010808, 0x4c, 6, PutAll }, + { "JSR", 0x0000008, 0x20, 7, PutAll }, + { "LDA", 0x080A66C, 0xa0, 0, PutAll }, + { "LDX", 0x080030C, 0xa2, 1, PutAll }, + { "LDY", 0x080006C, 0xa0, 1, PutAll }, + { "LSR", 0x000006F, 0x42, 1, PutAll }, + { "NOP", 0x0000001, 0xea, 0, PutAll }, + { "ORA", 0x080A66C, 0x00, 0, PutAll }, + { "PHA", 0x0000001, 0x48, 0, PutAll }, + { "PHP", 0x0000001, 0x08, 0, PutAll }, + { "PHX", 0x0000001, 0xda, 0, PutAll }, + { "PHY", 0x0000001, 0x5a, 0, PutAll }, + { "PLA", 0x0000001, 0x68, 0, PutAll }, + { "PLP", 0x0000001, 0x28, 0, PutAll }, + { "PLX", 0x0000001, 0xfa, 0, PutAll }, + { "PLY", 0x0000001, 0x7a, 0, PutAll }, + { "RMB0", 0x0000004, 0x07, 1, PutAll }, + { "RMB1", 0x0000004, 0x17, 1, PutAll }, + { "RMB2", 0x0000004, 0x27, 1, PutAll }, + { "RMB3", 0x0000004, 0x37, 1, PutAll }, + { "RMB4", 0x0000004, 0x47, 1, PutAll }, + { "RMB5", 0x0000004, 0x57, 1, PutAll }, + { "RMB6", 0x0000004, 0x67, 1, PutAll }, + { "RMB7", 0x0000004, 0x77, 1, PutAll }, + { "ROL", 0x000006F, 0x22, 1, PutAll }, + { "ROR", 0x000006F, 0x62, 1, PutAll }, + { "RTI", 0x0000001, 0x40, 0, PutAll }, + { "RTS", 0x0000001, 0x60, 0, PutAll }, + { "SBC", 0x080A66C, 0xe0, 0, PutAll }, + { "SEC", 0x0000001, 0x38, 0, PutAll }, + { "SED", 0x0000001, 0xf8, 0, PutAll }, + { "SEI", 0x0000001, 0x78, 0, PutAll }, + { "SMB0", 0x0000004, 0x87, 1, PutAll }, + { "SMB1", 0x0000004, 0x97, 1, PutAll }, + { "SMB2", 0x0000004, 0xA7, 1, PutAll }, + { "SMB3", 0x0000004, 0xB7, 1, PutAll }, + { "SMB4", 0x0000004, 0xC7, 1, PutAll }, + { "SMB5", 0x0000004, 0xD7, 1, PutAll }, + { "SMB6", 0x0000004, 0xE7, 1, PutAll }, + { "SMB7", 0x0000004, 0xF7, 1, PutAll }, + { "STA", 0x000A66C, 0x80, 0, PutAll }, + { "STX", 0x000010c, 0x82, 1, PutAll }, + { "STY", 0x000002c, 0x80, 1, PutAll }, + { "STZ", 0x000006c, 0x04, 5, PutAll }, + { "TAX", 0x0000001, 0xaa, 0, PutAll }, + { "TAY", 0x0000001, 0xa8, 0, PutAll }, + { "TRB", 0x000000c, 0x10, 1, PutAll }, + { "TSB", 0x000000c, 0x00, 1, PutAll }, + { "TSX", 0x0000001, 0xba, 0, PutAll }, + { "TXA", 0x0000001, 0x8a, 0, PutAll }, + { "TXS", 0x0000001, 0x9a, 0, PutAll }, + { "TYA", 0x0000001, 0x98, 0, PutAll }, +/* END SORTED.SH */ + } +}; + +/* Instruction table for the W65C02 (CMOS with WDC extensions) */ +static const struct { + unsigned Count; + InsDesc Ins[100]; +} InsTabW65C02 = { + /* CAUTION: table must be sorted for bsearch */ + sizeof (InsTabW65C02.Ins) / sizeof (InsTabW65C02.Ins[0]), + { /* BEGIN SORTED.SH */ { "ADC", 0x080A66C, 0x60, 0, PutAll }, { "AND", 0x080A66C, 0x20, 0, PutAll }, @@ -618,6 +729,150 @@ static const struct { } }; +/* Instruction table for the 65CE02 */ +static const struct { + unsigned Count; + InsDesc Ins[131]; +} InsTab65CE02 = { + /* CAUTION: table must be sorted for bsearch */ + sizeof (InsTab65CE02.Ins) / sizeof (InsTab65CE02.Ins[0]), + { +/* BEGIN SORTED.SH */ + { "ADC", 0x080A66C, 0x60, 0, PutAll }, + { "AND", 0x080A66C, 0x20, 0, PutAll }, + { "ASL", 0x000006e, 0x02, 1, PutAll }, + { "ASR", 0x0000026, 0x43, 0, Put4510 }, + { "BBR0", 0x0000000, 0x0F, 0, PutBitBranch }, + { "BBR1", 0x0000000, 0x1F, 0, PutBitBranch }, + { "BBR2", 0x0000000, 0x2F, 0, PutBitBranch }, + { "BBR3", 0x0000000, 0x3F, 0, PutBitBranch }, + { "BBR4", 0x0000000, 0x4F, 0, PutBitBranch }, + { "BBR5", 0x0000000, 0x5F, 0, PutBitBranch }, + { "BBR6", 0x0000000, 0x6F, 0, PutBitBranch }, + { "BBR7", 0x0000000, 0x7F, 0, PutBitBranch }, + { "BBS0", 0x0000000, 0x8F, 0, PutBitBranch }, + { "BBS1", 0x0000000, 0x9F, 0, PutBitBranch }, + { "BBS2", 0x0000000, 0xAF, 0, PutBitBranch }, + { "BBS3", 0x0000000, 0xBF, 0, PutBitBranch }, + { "BBS4", 0x0000000, 0xCF, 0, PutBitBranch }, + { "BBS5", 0x0000000, 0xDF, 0, PutBitBranch }, + { "BBS6", 0x0000000, 0xEF, 0, PutBitBranch }, + { "BBS7", 0x0000000, 0xFF, 0, PutBitBranch }, + { "BCC", 0x0020000, 0x90, 0, PutPCRel8 }, + { "BCS", 0x0020000, 0xb0, 0, PutPCRel8 }, + { "BEQ", 0x0020000, 0xf0, 0, PutPCRel8 }, + { "BIT", 0x0A0006C, 0x00, 2, PutAll }, + { "BMI", 0x0020000, 0x30, 0, PutPCRel8 }, + { "BNE", 0x0020000, 0xd0, 0, PutPCRel8 }, + { "BPL", 0x0020000, 0x10, 0, PutPCRel8 }, + { "BRA", 0x0020000, 0x80, 0, PutPCRel8 }, + { "BRK", 0x0800005, 0x00, 6, PutAll }, + { "BSR", 0x0040000, 0x63, 0, PutPCRel4510 }, + { "BVC", 0x0020000, 0x50, 0, PutPCRel8 }, + { "BVS", 0x0020000, 0x70, 0, PutPCRel8 }, + { "CLC", 0x0000001, 0x18, 0, PutAll }, + { "CLD", 0x0000001, 0xd8, 0, PutAll }, + { "CLE", 0x0000001, 0x02, 0, PutAll }, + { "CLI", 0x0000001, 0x58, 0, PutAll }, + { "CLV", 0x0000001, 0xb8, 0, PutAll }, + { "CMP", 0x080A66C, 0xc0, 0, PutAll }, + { "CPX", 0x080000C, 0xe0, 1, PutAll }, + { "CPY", 0x080000C, 0xc0, 1, PutAll }, + { "CPZ", 0x080000C, 0xd0, 1, Put4510 }, + { "DEA", 0x0000001, 0x00, 3, PutAll }, /* == DEC */ + { "DEC", 0x000006F, 0x00, 3, PutAll }, + { "DEW", 0x0000004, 0xc3, 9, PutAll }, + { "DEX", 0x0000001, 0xca, 0, PutAll }, + { "DEY", 0x0000001, 0x88, 0, PutAll }, + { "DEZ", 0x0000001, 0x3B, 0, PutAll }, + { "EOM", 0x0000001, 0xea, 0, PutAll }, + { "EOR", 0x080A66C, 0x40, 0, PutAll }, + { "INA", 0x0000001, 0x00, 4, PutAll }, /* == INC */ + { "INC", 0x000006f, 0x00, 4, PutAll }, + { "INW", 0x0000004, 0xe3, 9, PutAll }, + { "INX", 0x0000001, 0xe8, 0, PutAll }, + { "INY", 0x0000001, 0xc8, 0, PutAll }, + { "INZ", 0x0000001, 0x1B, 0, PutAll }, + { "JMP", 0x0010808, 0x4c, 6, PutAll }, + { "JSR", 0x0010808, 0x20, 7, Put4510 }, + { "LBCC", 0x0040000, 0x93, 0, PutPCRel4510 }, + { "LBCS", 0x0040000, 0xb3, 0, PutPCRel4510 }, + { "LBEQ", 0x0040000, 0xf3, 0, PutPCRel4510 }, + { "LBMI", 0x0040000, 0x33, 0, PutPCRel4510 }, + { "LBNE", 0x0040000, 0xd3, 0, PutPCRel4510 }, + { "LBPL", 0x0040000, 0x13, 0, PutPCRel4510 }, + { "LBRA", 0x0040000, 0x83, 0, PutPCRel4510 }, + { "LBVC", 0x0040000, 0x53, 0, PutPCRel4510 }, + { "LBVS", 0x0040000, 0x73, 0, PutPCRel4510 }, + { "LDA", 0x090A66C, 0xa0, 0, Put4510 }, + { "LDX", 0x080030C, 0xa2, 1, PutAll }, + { "LDY", 0x080006C, 0xa0, 1, PutAll }, + { "LDZ", 0x0800048, 0xa3, 1, Put4510 }, + { "LSR", 0x000006F, 0x42, 1, PutAll }, + { "AUG", 0x0000001, 0x5C, 0, PutAll }, + { "NEG", 0x0000001, 0x42, 0, PutAll }, + { "NOP", 0x0000001, 0xea, 0, PutAll }, /* == EOM */ + { "ORA", 0x080A66C, 0x00, 0, PutAll }, + { "PHA", 0x0000001, 0x48, 0, PutAll }, + { "PHD", 0x8000008, 0xf4, 1, PutAll }, /* == PHW */ + { "PHP", 0x0000001, 0x08, 0, PutAll }, + { "PHW", 0x8000008, 0xf4, 1, PutAll }, + { "PHX", 0x0000001, 0xda, 0, PutAll }, + { "PHY", 0x0000001, 0x5a, 0, PutAll }, + { "PLA", 0x0000001, 0x68, 0, PutAll }, + { "PLP", 0x0000001, 0x28, 0, PutAll }, + { "PLX", 0x0000001, 0xfa, 0, PutAll }, + { "PLY", 0x0000001, 0x7a, 0, PutAll }, + { "PLZ", 0x0000001, 0xfb, 0, PutAll }, + { "RMB0", 0x0000004, 0x07, 1, PutAll }, + { "RMB1", 0x0000004, 0x17, 1, PutAll }, + { "RMB2", 0x0000004, 0x27, 1, PutAll }, + { "RMB3", 0x0000004, 0x37, 1, PutAll }, + { "RMB4", 0x0000004, 0x47, 1, PutAll }, + { "RMB5", 0x0000004, 0x57, 1, PutAll }, + { "RMB6", 0x0000004, 0x67, 1, PutAll }, + { "RMB7", 0x0000004, 0x77, 1, PutAll }, + { "ROL", 0x000006F, 0x22, 1, PutAll }, + { "ROR", 0x000006F, 0x62, 1, PutAll }, + { "ROW", 0x0000008, 0xeb, 6, PutAll }, + { "RTI", 0x0000001, 0x40, 0, PutAll }, + { "RTN", 0x0800000, 0x62, 1, PutAll }, + { "RTS", 0x0000001, 0x60, 0, PutAll }, + { "SBC", 0x080A66C, 0xe0, 0, PutAll }, + { "SEC", 0x0000001, 0x38, 0, PutAll }, + { "SED", 0x0000001, 0xf8, 0, PutAll }, + { "SEE", 0x0000001, 0x03, 0, PutAll }, + { "SEI", 0x0000001, 0x78, 0, PutAll }, + { "SMB0", 0x0000004, 0x87, 1, PutAll }, + { "SMB1", 0x0000004, 0x97, 1, PutAll }, + { "SMB2", 0x0000004, 0xA7, 1, PutAll }, + { "SMB3", 0x0000004, 0xB7, 1, PutAll }, + { "SMB4", 0x0000004, 0xC7, 1, PutAll }, + { "SMB5", 0x0000004, 0xD7, 1, PutAll }, + { "SMB6", 0x0000004, 0xE7, 1, PutAll }, + { "SMB7", 0x0000004, 0xF7, 1, PutAll }, + { "STA", 0x010A66C, 0x80, 0, Put4510 }, + { "STX", 0x000030c, 0x82, 1, Put4510 }, + { "STY", 0x000006c, 0x80, 1, Put4510 }, + { "STZ", 0x000006c, 0x04, 5, PutAll }, + { "TAB", 0x0000001, 0x5b, 0, PutAll }, + { "TAX", 0x0000001, 0xaa, 0, PutAll }, + { "TAY", 0x0000001, 0xa8, 0, PutAll }, + { "TAZ", 0x0000001, 0x4b, 0, PutAll }, + { "TBA", 0x0000001, 0x7b, 0, PutAll }, + { "TRB", 0x000000c, 0x10, 1, PutAll }, + { "TSB", 0x000000c, 0x00, 1, PutAll }, + { "TSX", 0x0000001, 0xba, 0, PutAll }, + { "TSY", 0x0000001, 0x0b, 0, PutAll }, + { "TXA", 0x0000001, 0x8a, 0, PutAll }, + { "TXS", 0x0000001, 0x9a, 0, PutAll }, + { "TYA", 0x0000001, 0x98, 0, PutAll }, + { "TYS", 0x0000001, 0x2b, 0, PutAll }, + { "TZA", 0x0000001, 0x6b, 0, PutAll }, +/* END SORTED.SH */ + } +}; + /* Instruction table for the 4510 */ static const struct { unsigned Count; @@ -1355,14 +1610,16 @@ static const InsTable* InsTabs[CPU_COUNT] = { (const InsTable*) &InsTab6502, (const InsTable*) &InsTab6502X, (const InsTable*) &InsTab6502DTV, - (const InsTable*) &InsTab65SC02, - (const InsTable*) &InsTab65C02, + (const InsTable*) &InsTab65SC02, /* original CMOS */ + (const InsTable*) &InsTab65C02, /* CMOS with Rockwell extensions */ (const InsTable*) &InsTab65816, (const InsTable*) &InsTabSweet16, (const InsTable*) &InsTabHuC6280, - (const InsTable*) &InsTabm740, /* Mitsubishi 740 */ + (const InsTable*) &InsTabm740, /* Mitsubishi 740 */ (const InsTable*) &InsTab4510, (const InsTable*) &InsTab45GS02, + (const InsTable*) &InsTabW65C02, /* CMOS with WDC extensions */ + (const InsTable*) &InsTab65CE02, /* CMOS with GTE extensions */ }; const InsTable* InsTab = (const InsTable*) &InsTab6502; From e3140349b086f1062676c26f558d4b9bff636987 Mon Sep 17 00:00:00 2001 From: mrdudz Date: Sat, 28 Jun 2025 00:54:13 +0200 Subject: [PATCH 03/32] add 65CE02 and W65C02 to disassembler --- src/da65/opc65c02.c | 4 +- src/da65/opc65ce02.c | 306 +++++++++++++++++++++++++++++++++++++++++++ src/da65/opc65ce02.h | 58 ++++++++ src/da65/opctable.c | 4 + src/da65/opcw65c02.c | 306 +++++++++++++++++++++++++++++++++++++++++++ src/da65/opcw65c02.h | 58 ++++++++ 6 files changed, 734 insertions(+), 2 deletions(-) create mode 100644 src/da65/opc65ce02.c create mode 100644 src/da65/opc65ce02.h create mode 100644 src/da65/opcw65c02.c create mode 100644 src/da65/opcw65c02.h diff --git a/src/da65/opc65c02.c b/src/da65/opc65c02.c index b69558f2a..88c8c8dec 100644 --- a/src/da65/opc65c02.c +++ b/src/da65/opc65c02.c @@ -250,7 +250,7 @@ const OpcDesc OpcTable_65C02[256] = { { "iny", 1, flNone, OH_Implicit }, /* $c8 */ { "cmp", 2, flNone, OH_Immediate }, /* $c9 */ { "dex", 1, flNone, OH_Implicit }, /* $ca */ - { "wai", 1, flNone, OH_Implicit }, /* $cb */ + { "", 1, flIllegal, OH_Illegal, }, /* $cb */ { "cpy", 3, flUseLabel|flAbsOverride, OH_Absolute }, /* $cc */ { "cmp", 3, flUseLabel|flAbsOverride, OH_Absolute }, /* $cd */ { "dec", 3, flUseLabel|flAbsOverride, OH_Absolute }, /* $ce */ @@ -266,7 +266,7 @@ const OpcDesc OpcTable_65C02[256] = { { "cld", 1, flNone, OH_Implicit }, /* $d8 */ { "cmp", 3, flUseLabel, OH_AbsoluteY }, /* $d9 */ { "phx", 1, flNone, OH_Implicit }, /* $da */ - { "stp", 1, flNone, OH_Implicit }, /* $db */ + { "", 1, flIllegal, OH_Illegal, }, /* $db */ { "", 1, flIllegal, OH_Illegal, }, /* $dc */ { "cmp", 3, flUseLabel|flAbsOverride, OH_AbsoluteX }, /* $dd */ { "dec", 3, flUseLabel|flAbsOverride, OH_AbsoluteX }, /* $de */ diff --git a/src/da65/opc65ce02.c b/src/da65/opc65ce02.c new file mode 100644 index 000000000..093e79a9e --- /dev/null +++ b/src/da65/opc65ce02.c @@ -0,0 +1,306 @@ +/*****************************************************************************/ +/* */ +/* opc65CE02.c */ +/* */ +/* 65CE02 opcode description table */ +/* */ +/* */ +/* */ +/* (C) 2003-2011, Ullrich von Bassewitz */ +/* Roemerstrasse 52 */ +/* D-70794 Filderstadt */ +/* EMail: uz@cc65.org */ +/* */ +/* */ +/* This software is provided 'as-is', without any expressed or implied */ +/* warranty. In no event will the authors be held liable for any damages */ +/* arising from the use of this software. */ +/* */ +/* Permission is granted to anyone to use this software for any purpose, */ +/* including commercial applications, and to alter it and redistribute it */ +/* freely, subject to the following restrictions: */ +/* */ +/* 1. The origin of this software must not be misrepresented; you must not */ +/* claim that you wrote the original software. If you use this software */ +/* in a product, an acknowledgment in the product documentation would be */ +/* appreciated but is not required. */ +/* 2. Altered source versions must be plainly marked as such, and must not */ +/* be misrepresented as being the original software. */ +/* 3. This notice may not be removed or altered from any source */ +/* distribution. */ +/* */ +/*****************************************************************************/ + + + +/* da65 */ +#include "handler.h" +#include "opc65ce02.h" + + + +/*****************************************************************************/ +/* Data */ +/*****************************************************************************/ + + + +/* Descriptions for all opcodes */ +const OpcDesc OpcTable_65CE02[256] = { + { "brk", 1, flNone, OH_Implicit }, /* $00 */ + { "ora", 2, flUseLabel, OH_DirectXIndirect }, /* $01 */ + { "cle", 1, flNone, OH_Implicit }, /* $02 */ + { "see", 1, flNone, OH_Implicit }, /* $03 */ + { "tsb", 2, flUseLabel, OH_Direct }, /* $04 */ + { "ora", 2, flUseLabel, OH_Direct }, /* $05 */ + { "asl", 2, flUseLabel, OH_Direct }, /* $06 */ + { "rmb0", 2, flUseLabel, OH_Direct }, /* $07 */ + { "php", 1, flNone, OH_Implicit }, /* $08 */ + { "ora", 2, flNone, OH_Immediate }, /* $09 */ + { "asl", 1, flNone, OH_Accumulator }, /* $0a */ + { "tsy", 1, flNone, OH_Implicit }, /* $0b */ + { "tsb", 3, flUseLabel|flAbsOverride, OH_Absolute }, /* $0c */ + { "ora", 3, flUseLabel|flAbsOverride, OH_Absolute }, /* $0d */ + { "asl", 3, flUseLabel|flAbsOverride, OH_Absolute }, /* $0e */ + { "bbr0", 3, flUseLabel, OH_BitBranch }, /* $0f */ + { "bpl", 2, flLabel, OH_Relative }, /* $10 */ + { "ora", 2, flUseLabel, OH_DirectIndirectY }, /* $11 */ + { "ora", 2, flUseLabel, OH_DirectIndirectZ }, /* $12 */ + { "lbpl", 3, flLabel, OH_RelativeLong4510 }, /* $13 */ + { "trb", 2, flUseLabel, OH_Direct }, /* $14 */ + { "ora", 2, flUseLabel, OH_DirectX }, /* $15 */ + { "asl", 2, flUseLabel, OH_DirectX }, /* $16 */ + { "rmb1", 2, flUseLabel, OH_Direct }, /* $17 */ + { "clc", 1, flNone, OH_Implicit }, /* $18 */ + { "ora", 3, flUseLabel, OH_AbsoluteY }, /* $19 */ + { "inc", 1, flNone, OH_Accumulator }, /* $1a */ + { "inz", 1, flNone, OH_Implicit }, /* $1b */ + { "trb", 3, flUseLabel|flAbsOverride, OH_Absolute }, /* $1c */ + { "ora", 3, flUseLabel|flAbsOverride, OH_AbsoluteX }, /* $1d */ + { "asl", 3, flUseLabel|flAbsOverride, OH_AbsoluteX }, /* $1e */ + { "bbr1", 3, flUseLabel, OH_BitBranch }, /* $1f */ + { "jsr", 3, flLabel, OH_Absolute }, /* $20 */ + { "and", 2, flUseLabel, OH_DirectXIndirect }, /* $21 */ + { "jsr", 3, flLabel, OH_JmpAbsoluteIndirect }, /* $22 */ + { "jsr", 3, flLabel, OH_JmpAbsoluteXIndirect }, /* $23 */ + { "bit", 2, flUseLabel, OH_Direct }, /* $24 */ + { "and", 2, flUseLabel, OH_Direct }, /* $25 */ + { "rol", 2, flUseLabel, OH_Direct }, /* $26 */ + { "rmb2", 2, flUseLabel, OH_Direct }, /* $27 */ + { "plp", 1, flNone, OH_Implicit }, /* $28 */ + { "and", 2, flNone, OH_Immediate }, /* $29 */ + { "rol", 1, flNone, OH_Accumulator }, /* $2a */ + { "tys", 1, flNone, OH_Implicit }, /* $2b */ + { "bit", 3, flUseLabel|flAbsOverride, OH_Absolute }, /* $2c */ + { "and", 3, flUseLabel|flAbsOverride, OH_Absolute }, /* $2d */ + { "rol", 3, flUseLabel|flAbsOverride, OH_Absolute }, /* $2e */ + { "bbr2", 3, flUseLabel, OH_BitBranch }, /* $2f */ + { "bmi", 2, flLabel, OH_Relative }, /* $30 */ + { "and", 2, flUseLabel, OH_DirectIndirectY }, /* $31 */ + { "and", 2, flUseLabel, OH_DirectIndirectZ }, /* $32 */ + { "lbmi", 3, flLabel, OH_RelativeLong4510 }, /* $33 */ + { "bit", 2, flUseLabel, OH_DirectX }, /* $34 */ + { "and", 2, flUseLabel, OH_DirectX }, /* $35 */ + { "rol", 2, flUseLabel, OH_DirectX }, /* $36 */ + { "rmb3", 2, flUseLabel, OH_Direct }, /* $37 */ + { "sec", 1, flNone, OH_Implicit }, /* $38 */ + { "and", 3, flUseLabel, OH_AbsoluteY }, /* $39 */ + { "dec", 1, flNone, OH_Accumulator }, /* $3a */ + { "dez", 1, flNone, OH_Implicit }, /* $3b */ + { "bit", 3, flUseLabel, OH_AbsoluteX }, /* $3c */ + { "and", 3, flUseLabel|flAbsOverride, OH_AbsoluteX }, /* $3d */ + { "rol", 3, flUseLabel|flAbsOverride, OH_AbsoluteX }, /* $3e */ + { "bbr3", 3, flUseLabel, OH_BitBranch }, /* $3f */ + { "rti", 1, flNone, OH_Rts }, /* $40 */ + { "eor", 2, flUseLabel, OH_DirectXIndirect }, /* $41 */ + { "neg", 1, flNone, OH_Implicit }, /* $42 */ + { "asr", 1, flNone, OH_Accumulator }, /* $43 */ + { "asr", 2, flUseLabel, OH_Direct }, /* $44 */ + { "eor", 2, flUseLabel, OH_Direct }, /* $45 */ + { "lsr", 2, flUseLabel, OH_Direct }, /* $46 */ + { "rmb4", 2, flUseLabel, OH_Direct }, /* $47 */ + { "pha", 1, flNone, OH_Implicit }, /* $48 */ + { "eor", 2, flNone, OH_Immediate }, /* $49 */ + { "lsr", 1, flNone, OH_Accumulator }, /* $4a */ + { "taz", 1, flNone, OH_Implicit }, /* $4b */ + { "jmp", 3, flLabel, OH_JmpAbsolute }, /* $4c */ + { "eor", 3, flUseLabel|flAbsOverride, OH_Absolute }, /* $4d */ + { "lsr", 3, flUseLabel|flAbsOverride, OH_Absolute }, /* $4e */ + { "bbr4", 3, flUseLabel, OH_BitBranch }, /* $4f */ + { "bvc", 2, flLabel, OH_Relative }, /* $50 */ + { "eor", 2, flUseLabel, OH_DirectIndirectY }, /* $51 */ + { "eor", 2, flUseLabel, OH_DirectIndirectZ }, /* $52 */ + { "lbvc", 3, flLabel, OH_RelativeLong4510 }, /* $53 */ + { "asr", 2, flUseLabel, OH_DirectX }, /* $54 */ + { "eor", 2, flUseLabel, OH_DirectX }, /* $55 */ + { "lsr", 2, flUseLabel, OH_DirectX }, /* $56 */ + { "rmb5", 2, flUseLabel, OH_Direct }, /* $57 */ + { "cli", 1, flNone, OH_Implicit }, /* $58 */ + { "eor", 3, flUseLabel, OH_AbsoluteY }, /* $59 */ + { "phy", 1, flNone, OH_Implicit }, /* $5a */ + { "tab", 1, flNone, OH_Implicit }, /* $5b */ + { "aug", 1, flNone, OH_Implicit }, /* $5c */ + { "eor", 3, flUseLabel|flAbsOverride, OH_AbsoluteX }, /* $5d */ + { "lsr", 3, flUseLabel|flAbsOverride, OH_AbsoluteX }, /* $5e */ + { "bbr5", 3, flUseLabel, OH_BitBranch }, /* $5f */ + { "rts", 1, flNone, OH_Rts }, /* $60 */ + { "adc", 2, flUseLabel, OH_DirectXIndirect }, /* $61 */ + { "rtn", 2, flNone, OH_Immediate }, /* $62 */ + { "bsr", 3, flLabel, OH_RelativeLong4510 }, /* $63 */ + { "stz", 2, flUseLabel, OH_Direct }, /* $64 */ + { "adc", 2, flUseLabel, OH_Direct }, /* $65 */ + { "ror", 2, flUseLabel, OH_Direct }, /* $66 */ + { "rmb6", 2, flUseLabel, OH_Direct, }, /* $67 */ + { "pla", 1, flNone, OH_Implicit }, /* $68 */ + { "adc", 2, flNone, OH_Immediate }, /* $69 */ + { "ror", 1, flNone, OH_Accumulator }, /* $6a */ + { "tza", 1, flNone, OH_Implicit }, /* $6b */ + { "jmp", 3, flLabel, OH_JmpAbsoluteIndirect }, /* $6c */ + { "adc", 3, flUseLabel|flAbsOverride, OH_Absolute }, /* $6d */ + { "ror", 3, flUseLabel, OH_Absolute }, /* $6e */ + { "bbr6", 3, flUseLabel, OH_BitBranch }, /* $6f */ + { "bvs", 2, flLabel, OH_Relative }, /* $70 */ + { "adc", 2, flUseLabel, OH_DirectIndirectY }, /* $71 */ + { "adc", 2, flUseLabel, OH_DirectIndirectZ }, /* $72 */ + { "lbvs", 3, flLabel, OH_RelativeLong4510 }, /* $73 */ + { "stz", 2, flUseLabel, OH_DirectX }, /* $74 */ + { "adc", 2, flUseLabel, OH_DirectX }, /* $75 */ + { "ror", 2, flUseLabel, OH_DirectX }, /* $76 */ + { "rmb7", 2, flUseLabel, OH_Direct }, /* $77 */ + { "sei", 1, flNone, OH_Implicit }, /* $78 */ + { "adc", 3, flUseLabel, OH_AbsoluteY }, /* $79 */ + { "ply", 1, flNone, OH_Implicit }, /* $7a */ + { "tba", 1, flNone, OH_Implicit }, /* $7b */ + { "jmp", 3, flLabel, OH_AbsoluteXIndirect }, /* $7c */ + { "adc", 3, flUseLabel|flAbsOverride, OH_AbsoluteX }, /* $7d */ + { "ror", 3, flUseLabel|flAbsOverride, OH_AbsoluteX }, /* $7e */ + { "bbr7", 3, flUseLabel, OH_BitBranch }, /* $7f */ + { "bra", 2, flLabel, OH_Relative }, /* $80 */ + { "sta", 2, flUseLabel, OH_DirectXIndirect }, /* $81 */ + { "sta", 2, flNone, OH_StackRelativeIndirectY4510}, /* $82 */ + { "lbra", 3, flLabel, OH_RelativeLong4510 }, /* $83 */ + { "sty", 2, flUseLabel, OH_Direct }, /* $84 */ + { "sta", 2, flUseLabel, OH_Direct }, /* $85 */ + { "stx", 2, flUseLabel, OH_Direct }, /* $86 */ + { "smb0", 2, flUseLabel, OH_Direct }, /* $87 */ + { "dey", 1, flNone, OH_Implicit }, /* $88 */ + { "bit", 2, flNone, OH_Immediate }, /* $89 */ + { "txa", 1, flNone, OH_Implicit }, /* $8a */ + { "sty", 3, flUseLabel|flAbsOverride, OH_AbsoluteX }, /* $8b */ + { "sty", 3, flUseLabel|flAbsOverride, OH_Absolute }, /* $8c */ + { "sta", 3, flUseLabel|flAbsOverride, OH_Absolute }, /* $8d */ + { "stx", 3, flUseLabel|flAbsOverride, OH_Absolute }, /* $8e */ + { "bbs0", 3, flUseLabel, OH_BitBranch }, /* $8f */ + { "bcc", 2, flLabel, OH_Relative }, /* $90 */ + { "sta", 2, flUseLabel, OH_DirectIndirectY }, /* $91 */ + { "sta", 2, flUseLabel, OH_DirectIndirectZ }, /* $92 */ + { "lbcc", 3, flLabel, OH_RelativeLong4510 }, /* $93 */ + { "sty", 2, flUseLabel, OH_DirectX }, /* $94 */ + { "sta", 2, flUseLabel, OH_DirectX }, /* $95 */ + { "stx", 2, flUseLabel, OH_DirectY }, /* $96 */ + { "smb1", 2, flUseLabel, OH_Direct }, /* $97 */ + { "tya", 1, flNone, OH_Implicit }, /* $98 */ + { "sta", 3, flUseLabel, OH_AbsoluteY }, /* $99 */ + { "txs", 1, flNone, OH_Implicit }, /* $9a */ + { "stx", 3, flUseLabel|flAbsOverride, OH_AbsoluteY }, /* $9b */ + { "stz", 3, flUseLabel|flAbsOverride, OH_Absolute }, /* $9c */ + { "sta", 3, flUseLabel|flAbsOverride, OH_AbsoluteX }, /* $9d */ + { "stz", 3, flUseLabel|flAbsOverride, OH_AbsoluteX }, /* $9e */ + { "bbs1", 3, flUseLabel, OH_BitBranch }, /* $9f */ + { "ldy", 2, flNone, OH_Immediate }, /* $a0 */ + { "lda", 2, flUseLabel, OH_DirectXIndirect }, /* $a1 */ + { "ldx", 2, flNone, OH_Immediate }, /* $a2 */ + { "ldz", 2, flNone, OH_Immediate }, /* $a3 */ + { "ldy", 2, flUseLabel, OH_Direct }, /* $a4 */ + { "lda", 2, flUseLabel, OH_Direct }, /* $a5 */ + { "ldx", 2, flUseLabel, OH_Direct }, /* $a6 */ + { "smb2", 2, flUseLabel, OH_Direct }, /* $a7 */ + { "tay", 1, flNone, OH_Implicit }, /* $a8 */ + { "lda", 2, flNone, OH_Immediate }, /* $a9 */ + { "tax", 1, flNone, OH_Implicit }, /* $aa */ + { "ldz", 3, flUseLabel|flAbsOverride, OH_Absolute }, /* $ab */ + { "ldy", 3, flUseLabel|flAbsOverride, OH_Absolute }, /* $ac */ + { "lda", 3, flUseLabel|flAbsOverride, OH_Absolute }, /* $ad */ + { "ldx", 3, flUseLabel|flAbsOverride, OH_Absolute }, /* $ae */ + { "bbs2", 3, flUseLabel, OH_BitBranch }, /* $af */ + { "bcs", 2, flLabel, OH_Relative }, /* $b0 */ + { "lda", 2, flUseLabel, OH_DirectIndirectY }, /* $b1 */ + { "lda", 2, flUseLabel, OH_DirectIndirectZ }, /* $b2 */ + { "lbcs", 3, flLabel, OH_RelativeLong4510 }, /* $b3 */ + { "ldy", 2, flUseLabel, OH_DirectX }, /* $b4 */ + { "lda", 2, flUseLabel, OH_DirectX }, /* $b5 */ + { "ldx", 2, flUseLabel, OH_DirectY }, /* $b6 */ + { "smb3", 2, flUseLabel, OH_Direct }, /* $b7 */ + { "clv", 1, flNone, OH_Implicit }, /* $b8 */ + { "lda", 3, flUseLabel, OH_AbsoluteY }, /* $b9 */ + { "tsx", 1, flNone, OH_Implicit }, /* $ba */ + { "ldz", 3, flUseLabel|flAbsOverride, OH_AbsoluteX }, /* $bb */ + { "ldy", 3, flUseLabel|flAbsOverride, OH_AbsoluteX }, /* $bc */ + { "lda", 3, flUseLabel|flAbsOverride, OH_AbsoluteX }, /* $bd */ + { "ldx", 3, flUseLabel|flAbsOverride, OH_AbsoluteY }, /* $be */ + { "bbs3", 3, flUseLabel, OH_BitBranch }, /* $bf */ + { "cpy", 2, flNone, OH_Immediate }, /* $c0 */ + { "cmp", 2, flUseLabel, OH_DirectXIndirect }, /* $c1 */ + { "cpz", 2, flNone, OH_Immediate }, /* $c2 */ + { "dew", 2, flUseLabel, OH_Direct }, /* $c3 */ + { "cpy", 2, flUseLabel, OH_Direct }, /* $c4 */ + { "cmp", 2, flUseLabel, OH_Direct }, /* $c5 */ + { "dec", 2, flUseLabel, OH_Direct }, /* $c6 */ + { "smb4", 2, flUseLabel, OH_Direct }, /* $c7 */ + { "iny", 1, flNone, OH_Implicit }, /* $c8 */ + { "cmp", 2, flNone, OH_Immediate }, /* $c9 */ + { "dex", 1, flNone, OH_Implicit }, /* $ca */ + { "asw", 3, flUseLabel|flAbsOverride, OH_Absolute }, /* $cb */ + { "cpy", 3, flUseLabel|flAbsOverride, OH_Absolute }, /* $cc */ + { "cmp", 3, flUseLabel|flAbsOverride, OH_Absolute }, /* $cd */ + { "dec", 3, flUseLabel|flAbsOverride, OH_Absolute }, /* $ce */ + { "bbs4", 3, flUseLabel, OH_BitBranch }, /* $cf */ + { "bne", 2, flLabel, OH_Relative }, /* $d0 */ + { "cmp", 2, flUseLabel, OH_DirectIndirectY }, /* $d1 */ + { "cmp", 2, flUseLabel, OH_DirectIndirectZ }, /* $d2 */ + { "lbne", 3, flLabel, OH_RelativeLong4510 }, /* $d3 */ + { "cpz", 2, flUseLabel, OH_Direct }, /* $d4 */ + { "cmp", 2, flUseLabel, OH_DirectX }, /* $d5 */ + { "dec", 2, flUseLabel, OH_DirectX }, /* $d6 */ + { "smb5", 2, flUseLabel, OH_Direct }, /* $d7 */ + { "cld", 1, flNone, OH_Implicit }, /* $d8 */ + { "cmp", 3, flUseLabel, OH_AbsoluteY }, /* $d9 */ + { "phx", 1, flNone, OH_Implicit }, /* $da */ + { "phz", 1, flNone, OH_Implicit }, /* $db */ + { "cpz", 3, flUseLabel|flAbsOverride, OH_Absolute }, /* $dc */ + { "cmp", 3, flUseLabel|flAbsOverride, OH_AbsoluteX }, /* $dd */ + { "dec", 3, flUseLabel|flAbsOverride, OH_AbsoluteX }, /* $de */ + { "bbs5", 3, flUseLabel, OH_BitBranch }, /* $df */ + { "cpx", 2, flNone, OH_Immediate }, /* $e0 */ + { "sbc", 2, flUseLabel, OH_DirectXIndirect }, /* $e1 */ + { "lda", 2, flNone, OH_StackRelativeIndirectY4510}, /* $e2 */ + { "inw", 2, flUseLabel, OH_Direct }, /* $e3 */ + { "cpx", 2, flUseLabel, OH_Direct }, /* $e4 */ + { "sbc", 2, flUseLabel, OH_Direct }, /* $e5 */ + { "inc", 2, flUseLabel, OH_Direct }, /* $e6 */ + { "smb6", 2, flUseLabel, OH_Direct }, /* $e7 */ + { "inx", 1, flNone, OH_Implicit }, /* $e8 */ + { "sbc", 2, flNone, OH_Immediate }, /* $e9 */ + { "eom", 1, flNone, OH_Implicit }, /* $ea */ + { "row", 3, flUseLabel|flAbsOverride, OH_Absolute }, /* $eb */ + { "cpx", 3, flUseLabel|flAbsOverride, OH_Absolute }, /* $ec */ + { "sbc", 3, flUseLabel|flAbsOverride, OH_Absolute }, /* $ed */ + { "inc", 3, flUseLabel|flAbsOverride, OH_Absolute }, /* $ee */ + { "bbs6", 3, flUseLabel, OH_BitBranch }, /* $ef */ + { "beq", 2, flLabel, OH_Relative }, /* $f0 */ + { "sbc", 2, flUseLabel, OH_DirectIndirectY }, /* $f1 */ + { "sbc", 2, flUseLabel, OH_DirectIndirectZ }, /* $f2 */ + { "lbeq", 3, flLabel, OH_RelativeLong4510 }, /* $f3 */ + { "phw", 3, flNone, OH_ImmediateWord }, /* $f4 */ + { "sbc", 2, flUseLabel, OH_DirectX }, /* $f5 */ + { "inc", 2, flUseLabel, OH_DirectX }, /* $f6 */ + { "smb7", 2, flUseLabel, OH_Direct }, /* $f7 */ + { "sed", 1, flNone, OH_Implicit }, /* $f8 */ + { "sbc", 3, flUseLabel, OH_AbsoluteY }, /* $f9 */ + { "plx", 1, flNone, OH_Implicit }, /* $fa */ + { "plz", 1, flNone, OH_Implicit }, /* $fb */ + { "phw", 3, flUseLabel|flAbsOverride, OH_Absolute }, /* $fc */ + { "sbc", 3, flUseLabel|flAbsOverride, OH_AbsoluteX }, /* $fd */ + { "inc", 3, flUseLabel|flAbsOverride, OH_AbsoluteX }, /* $fe */ + { "bbs7", 3, flUseLabel, OH_BitBranch }, /* $ff */ +}; diff --git a/src/da65/opc65ce02.h b/src/da65/opc65ce02.h new file mode 100644 index 000000000..e3987dbcd --- /dev/null +++ b/src/da65/opc65ce02.h @@ -0,0 +1,58 @@ +/*****************************************************************************/ +/* */ +/* opc65CE02.h */ +/* */ +/* 65CE02 opcode description table */ +/* */ +/* */ +/* */ +/* (C) 2003 Ullrich von Bassewitz */ +/* Roemerstrasse 52 */ +/* D-70794 Filderstadt */ +/* EMail: uz@cc65.org */ +/* */ +/* */ +/* This software is provided 'as-is', without any expressed or implied */ +/* warranty. In no event will the authors be held liable for any damages */ +/* arising from the use of this software. */ +/* */ +/* Permission is granted to anyone to use this software for any purpose, */ +/* including commercial applications, and to alter it and redistribute it */ +/* freely, subject to the following restrictions: */ +/* */ +/* 1. The origin of this software must not be misrepresented; you must not */ +/* claim that you wrote the original software. If you use this software */ +/* in a product, an acknowledgment in the product documentation would be */ +/* appreciated but is not required. */ +/* 2. Altered source versions must be plainly marked as such, and must not */ +/* be misrepresented as being the original software. */ +/* 3. This notice may not be removed or altered from any source */ +/* distribution. */ +/* */ +/*****************************************************************************/ + + + +#ifndef OPC65CE02_H +#define OPC65CE02_H + + + +#include "opcdesc.h" + + + +/*****************************************************************************/ +/* Data */ +/*****************************************************************************/ + + + +/* Descriptions for all opcodes */ +extern const OpcDesc OpcTable_65CE02[256]; + + + +/* End of opc65CE02.h */ + +#endif diff --git a/src/da65/opctable.c b/src/da65/opctable.c index 445f8880c..de90dd83a 100644 --- a/src/da65/opctable.c +++ b/src/da65/opctable.c @@ -43,6 +43,8 @@ #include "opc65816.h" #include "opc65c02.h" #include "opc65sc02.h" +#include "opcw65c02.h" +#include "opc65ce02.h" #include "opchuc6280.h" #include "opcm740.h" #include "opctable.h" @@ -75,6 +77,8 @@ void SetOpcTable (cpu_t CPU) case CPU_6502DTV: OpcTable = OpcTable_6502DTV; break; case CPU_65SC02: OpcTable = OpcTable_65SC02; break; case CPU_65C02: OpcTable = OpcTable_65C02; break; + case CPU_W65C02: OpcTable = OpcTable_W65C02; break; + case CPU_65CE02: OpcTable = OpcTable_65CE02; break; case CPU_65816: OpcTable = OpcTable_65816; break; case CPU_HUC6280: OpcTable = OpcTable_HuC6280; break; case CPU_M740: OpcTable = OpcTable_M740; break; diff --git a/src/da65/opcw65c02.c b/src/da65/opcw65c02.c new file mode 100644 index 000000000..2c48e1019 --- /dev/null +++ b/src/da65/opcw65c02.c @@ -0,0 +1,306 @@ +/*****************************************************************************/ +/* */ +/* opcw65c02.c */ +/* */ +/* W65C02 opcode description table */ +/* */ +/* */ +/* */ +/* (C) 2003-2011, Ullrich von Bassewitz */ +/* Roemerstrasse 52 */ +/* D-70794 Filderstadt */ +/* EMail: uz@cc65.org */ +/* */ +/* */ +/* This software is provided 'as-is', without any expressed or implied */ +/* warranty. In no event will the authors be held liable for any damages */ +/* arising from the use of this software. */ +/* */ +/* Permission is granted to anyone to use this software for any purpose, */ +/* including commercial applications, and to alter it and redistribute it */ +/* freely, subject to the following restrictions: */ +/* */ +/* 1. The origin of this software must not be misrepresented; you must not */ +/* claim that you wrote the original software. If you use this software */ +/* in a product, an acknowledgment in the product documentation would be */ +/* appreciated but is not required. */ +/* 2. Altered source versions must be plainly marked as such, and must not */ +/* be misrepresented as being the original software. */ +/* 3. This notice may not be removed or altered from any source */ +/* distribution. */ +/* */ +/*****************************************************************************/ + + + +/* da65 */ +#include "handler.h" +#include "opcw65c02.h" + + + +/*****************************************************************************/ +/* Data */ +/*****************************************************************************/ + + + +/* Descriptions for all opcodes */ +const OpcDesc OpcTable_W65C02[256] = { + { "brk", 1, flNone, OH_Implicit }, /* $00 */ + { "ora", 2, flUseLabel, OH_DirectXIndirect }, /* $01 */ + { "", 1, flIllegal, OH_Illegal, }, /* $02 */ + { "", 1, flIllegal, OH_Illegal, }, /* $03 */ + { "tsb", 2, flUseLabel, OH_Direct }, /* $04 */ + { "ora", 2, flUseLabel, OH_Direct }, /* $05 */ + { "asl", 2, flUseLabel, OH_Direct }, /* $06 */ + { "rmb0", 2, flUseLabel, OH_Direct, }, /* $07 */ + { "php", 1, flNone, OH_Implicit }, /* $08 */ + { "ora", 2, flNone, OH_Immediate }, /* $09 */ + { "asl", 1, flNone, OH_Accumulator }, /* $0a */ + { "", 1, flIllegal, OH_Illegal, }, /* $0b */ + { "tsb", 3, flUseLabel|flAbsOverride, OH_Absolute }, /* $0c */ + { "ora", 3, flUseLabel|flAbsOverride, OH_Absolute }, /* $0d */ + { "asl", 3, flUseLabel|flAbsOverride, OH_Absolute }, /* $0e */ + { "bbr0", 3, flUseLabel, OH_BitBranch }, /* $0f */ + { "bpl", 2, flLabel, OH_Relative }, /* $10 */ + { "ora", 2, flUseLabel, OH_DirectIndirectY }, /* $11 */ + { "ora", 2, flUseLabel, OH_DirectIndirect }, /* $12 */ + { "", 1, flIllegal, OH_Illegal, }, /* $13 */ + { "trb", 2, flUseLabel, OH_Direct }, /* $14 */ + { "ora", 2, flUseLabel, OH_DirectX }, /* $15 */ + { "asl", 2, flUseLabel, OH_DirectX }, /* $16 */ + { "rmb1", 2, flUseLabel, OH_Direct, }, /* $17 */ + { "clc", 1, flNone, OH_Implicit }, /* $18 */ + { "ora", 3, flUseLabel, OH_AbsoluteY }, /* $19 */ + { "inc", 1, flNone, OH_Accumulator }, /* $1a */ + { "", 1, flIllegal, OH_Illegal, }, /* $1b */ + { "trb", 3, flUseLabel|flAbsOverride, OH_Absolute }, /* $1c */ + { "ora", 3, flUseLabel|flAbsOverride, OH_AbsoluteX }, /* $1d */ + { "asl", 3, flUseLabel|flAbsOverride, OH_AbsoluteX }, /* $1e */ + { "bbr1", 3, flUseLabel, OH_BitBranch }, /* $1f */ + { "jsr", 3, flLabel, OH_JsrAbsolute }, /* $20 */ + { "and", 2, flUseLabel, OH_DirectXIndirect }, /* $21 */ + { "", 1, flIllegal, OH_Illegal, }, /* $22 */ + { "", 1, flIllegal, OH_Illegal, }, /* $23 */ + { "bit", 2, flUseLabel, OH_Direct }, /* $24 */ + { "and", 2, flUseLabel, OH_Direct }, /* $25 */ + { "rol", 2, flUseLabel, OH_Direct }, /* $26 */ + { "rmb2", 2, flUseLabel, OH_Direct, }, /* $27 */ + { "plp", 1, flNone, OH_Implicit }, /* $28 */ + { "and", 2, flNone, OH_Immediate }, /* $29 */ + { "rol", 1, flNone, OH_Accumulator }, /* $2a */ + { "", 1, flIllegal, OH_Illegal, }, /* $2b */ + { "bit", 3, flUseLabel|flAbsOverride, OH_Absolute }, /* $2c */ + { "and", 3, flUseLabel|flAbsOverride, OH_Absolute }, /* $2d */ + { "rol", 3, flUseLabel|flAbsOverride, OH_Absolute }, /* $2e */ + { "bbr2", 3, flUseLabel, OH_BitBranch }, /* $2f */ + { "bmi", 2, flLabel, OH_Relative }, /* $30 */ + { "and", 2, flUseLabel, OH_DirectIndirectY }, /* $31 */ + { "and", 2, flUseLabel, OH_DirectIndirect, }, /* $32 */ + { "", 1, flIllegal, OH_Illegal, }, /* $33 */ + { "bit", 2, flUseLabel, OH_DirectX }, /* $34 */ + { "and", 2, flUseLabel, OH_DirectX }, /* $35 */ + { "rol", 2, flUseLabel, OH_DirectX }, /* $36 */ + { "rmb3", 2, flUseLabel, OH_Direct, }, /* $37 */ + { "sec", 1, flNone, OH_Implicit }, /* $38 */ + { "and", 3, flUseLabel, OH_AbsoluteY }, /* $39 */ + { "dec", 1, flNone, OH_Accumulator }, /* $3a */ + { "", 1, flIllegal, OH_Illegal, }, /* $3b */ + { "bit", 3, flUseLabel, OH_AbsoluteX }, /* $3c */ + { "and", 3, flUseLabel|flAbsOverride, OH_AbsoluteX }, /* $3d */ + { "rol", 3, flUseLabel|flAbsOverride, OH_AbsoluteX }, /* $3e */ + { "bbr3", 3, flUseLabel, OH_BitBranch }, /* $3f */ + { "rti", 1, flNone, OH_Rts }, /* $40 */ + { "eor", 2, flUseLabel, OH_DirectXIndirect }, /* $41 */ + { "", 1, flIllegal, OH_Illegal, }, /* $42 */ + { "", 1, flIllegal, OH_Illegal, }, /* $43 */ + { "", 1, flIllegal, OH_Illegal, }, /* $44 */ + { "eor", 2, flUseLabel, OH_Direct }, /* $45 */ + { "lsr", 2, flUseLabel, OH_Direct }, /* $46 */ + { "rmb4", 2, flUseLabel, OH_Direct, }, /* $47 */ + { "pha", 1, flNone, OH_Implicit }, /* $48 */ + { "eor", 2, flNone, OH_Immediate }, /* $49 */ + { "lsr", 1, flNone, OH_Accumulator }, /* $4a */ + { "", 1, flIllegal, OH_Illegal, }, /* $4b */ + { "jmp", 3, flLabel, OH_JmpAbsolute }, /* $4c */ + { "eor", 3, flUseLabel|flAbsOverride, OH_Absolute }, /* $4d */ + { "lsr", 3, flUseLabel|flAbsOverride, OH_Absolute }, /* $4e */ + { "bbr4", 3, flUseLabel, OH_BitBranch }, /* $4f */ + { "bvc", 2, flLabel, OH_Relative }, /* $50 */ + { "eor", 2, flUseLabel, OH_DirectIndirectY }, /* $51 */ + { "eor", 2, flUseLabel, OH_DirectIndirect }, /* $52 */ + { "", 1, flIllegal, OH_Illegal, }, /* $53 */ + { "", 1, flIllegal, OH_Illegal, }, /* $54 */ + { "eor", 2, flUseLabel, OH_DirectX }, /* $55 */ + { "lsr", 2, flUseLabel, OH_DirectX }, /* $56 */ + { "rmb5", 2, flUseLabel, OH_Direct, }, /* $57 */ + { "cli", 1, flNone, OH_Implicit }, /* $58 */ + { "eor", 3, flUseLabel, OH_AbsoluteY }, /* $59 */ + { "phy", 1, flNone, OH_Implicit }, /* $5a */ + { "", 1, flIllegal, OH_Illegal, }, /* $5b */ + { "", 1, flIllegal, OH_Illegal, }, /* $5c */ + { "eor", 3, flUseLabel|flAbsOverride, OH_AbsoluteX }, /* $5d */ + { "lsr", 3, flUseLabel|flAbsOverride, OH_AbsoluteX }, /* $5e */ + { "bbr5", 3, flUseLabel, OH_BitBranch }, /* $5f */ + { "rts", 1, flNone, OH_Rts }, /* $60 */ + { "adc", 2, flUseLabel, OH_DirectXIndirect }, /* $61 */ + { "", 1, flIllegal, OH_Illegal, }, /* $62 */ + { "", 1, flIllegal, OH_Illegal, }, /* $63 */ + { "stz", 2, flUseLabel, OH_Direct }, /* $64 */ + { "adc", 2, flUseLabel, OH_Direct }, /* $65 */ + { "ror", 2, flUseLabel, OH_Direct }, /* $66 */ + { "rmb6", 2, flUseLabel, OH_Direct, }, /* $67 */ + { "pla", 1, flNone, OH_Implicit }, /* $68 */ + { "adc", 2, flNone, OH_Immediate }, /* $69 */ + { "ror", 1, flNone, OH_Accumulator }, /* $6a */ + { "", 1, flIllegal, OH_Illegal, }, /* $6b */ + { "jmp", 3, flLabel, OH_JmpAbsoluteIndirect }, /* $6c */ + { "adc", 3, flUseLabel|flAbsOverride, OH_Absolute }, /* $6d */ + { "ror", 3, flUseLabel|flAbsOverride, OH_Absolute }, /* $6e */ + { "bbr6", 3, flUseLabel, OH_BitBranch }, /* $6f */ + { "bvs", 2, flLabel, OH_Relative }, /* $70 */ + { "adc", 2, flUseLabel, OH_DirectIndirectY }, /* $71 */ + { "adc", 2, flUseLabel, OH_DirectIndirect, }, /* $72 */ + { "", 1, flIllegal, OH_Illegal, }, /* $73 */ + { "stz", 2, flUseLabel, OH_DirectX }, /* $74 */ + { "adc", 2, flUseLabel, OH_DirectX }, /* $75 */ + { "ror", 2, flUseLabel, OH_DirectX }, /* $76 */ + { "rmb7", 2, flUseLabel, OH_Direct, }, /* $77 */ + { "sei", 1, flNone, OH_Implicit }, /* $78 */ + { "adc", 3, flUseLabel, OH_AbsoluteY }, /* $79 */ + { "ply", 1, flNone, OH_Implicit }, /* $7a */ + { "", 1, flIllegal, OH_Illegal, }, /* $7b */ + { "jmp", 3, flLabel, OH_AbsoluteXIndirect }, /* $7c */ + { "adc", 3, flUseLabel|flAbsOverride, OH_AbsoluteX }, /* $7d */ + { "ror", 3, flUseLabel|flAbsOverride, OH_AbsoluteX }, /* $7e */ + { "bbr7", 3, flUseLabel, OH_BitBranch }, /* $7f */ + { "bra", 2, flLabel, OH_Relative }, /* $80 */ + { "sta", 2, flUseLabel, OH_DirectXIndirect }, /* $81 */ + { "", 1, flIllegal, OH_Illegal, }, /* $82 */ + { "", 1, flIllegal, OH_Illegal, }, /* $83 */ + { "sty", 2, flUseLabel, OH_Direct }, /* $84 */ + { "sta", 2, flUseLabel, OH_Direct }, /* $85 */ + { "stx", 2, flUseLabel, OH_Direct }, /* $86 */ + { "smb0", 2, flUseLabel, OH_Direct, }, /* $87 */ + { "dey", 1, flNone, OH_Implicit }, /* $88 */ + { "bit", 2, flNone, OH_Immediate }, /* $89 */ + { "txa", 1, flNone, OH_Implicit }, /* $8a */ + { "", 1, flIllegal, OH_Illegal, }, /* $8b */ + { "sty", 3, flUseLabel|flAbsOverride, OH_Absolute }, /* $8c */ + { "sta", 3, flUseLabel|flAbsOverride, OH_Absolute }, /* $8d */ + { "stx", 3, flUseLabel|flAbsOverride, OH_Absolute }, /* $8e */ + { "bbs0", 3, flUseLabel, OH_BitBranch }, /* $8f */ + { "bcc", 2, flLabel, OH_Relative }, /* $90 */ + { "sta", 2, flUseLabel, OH_DirectIndirectY }, /* $91 */ + { "sta", 2, flUseLabel, OH_DirectIndirect }, /* $92 */ + { "", 1, flIllegal, OH_Illegal, }, /* $93 */ + { "sty", 2, flUseLabel, OH_DirectX }, /* $94 */ + { "sta", 2, flUseLabel, OH_DirectX }, /* $95 */ + { "stx", 2, flUseLabel, OH_DirectY }, /* $96 */ + { "smb1", 2, flUseLabel, OH_Direct, }, /* $97 */ + { "tya", 1, flNone, OH_Implicit }, /* $98 */ + { "sta", 3, flUseLabel, OH_AbsoluteY }, /* $99 */ + { "txs", 1, flNone, OH_Implicit }, /* $9a */ + { "", 1, flIllegal, OH_Illegal, }, /* $9b */ + { "stz", 3, flUseLabel|flAbsOverride, OH_Absolute }, /* $9c */ + { "sta", 3, flUseLabel|flAbsOverride, OH_AbsoluteX }, /* $9d */ + { "stz", 3, flUseLabel|flAbsOverride, OH_AbsoluteX }, /* $9e */ + { "bbs1", 3, flUseLabel, OH_BitBranch }, /* $9f */ + { "ldy", 2, flNone, OH_Immediate }, /* $a0 */ + { "lda", 2, flUseLabel, OH_DirectXIndirect }, /* $a1 */ + { "ldx", 2, flNone, OH_Immediate }, /* $a2 */ + { "", 1, flIllegal, OH_Illegal, }, /* $a3 */ + { "ldy", 2, flUseLabel, OH_Direct }, /* $a4 */ + { "lda", 2, flUseLabel, OH_Direct }, /* $a5 */ + { "ldx", 2, flUseLabel, OH_Direct }, /* $a6 */ + { "smb2", 2, flUseLabel, OH_Direct, }, /* $a7 */ + { "tay", 1, flNone, OH_Implicit }, /* $a8 */ + { "lda", 2, flNone, OH_Immediate }, /* $a9 */ + { "tax", 1, flNone, OH_Implicit }, /* $aa */ + { "", 1, flIllegal, OH_Illegal, }, /* $ab */ + { "ldy", 3, flUseLabel|flAbsOverride, OH_Absolute }, /* $ac */ + { "lda", 3, flUseLabel|flAbsOverride, OH_Absolute }, /* $ad */ + { "ldx", 3, flUseLabel|flAbsOverride, OH_Absolute }, /* $ae */ + { "bbs2", 3, flUseLabel, OH_BitBranch }, /* $af */ + { "bcs", 2, flLabel, OH_Relative }, /* $b0 */ + { "lda", 2, flUseLabel, OH_DirectIndirectY }, /* $b1 */ + { "lda", 2, flUseLabel, OH_DirectIndirect }, /* $b2 */ + { "", 1, flIllegal, OH_Illegal, }, /* $b3 */ + { "ldy", 2, flUseLabel, OH_DirectX }, /* $b4 */ + { "lda", 2, flUseLabel, OH_DirectX }, /* $b5 */ + { "ldx", 2, flUseLabel, OH_DirectY }, /* $b6 */ + { "smb3", 2, flUseLabel, OH_Direct, }, /* $b7 */ + { "clv", 1, flNone, OH_Implicit }, /* $b8 */ + { "lda", 3, flUseLabel, OH_AbsoluteY }, /* $b9 */ + { "tsx", 1, flNone, OH_Implicit }, /* $ba */ + { "", 1, flIllegal, OH_Illegal, }, /* $bb */ + { "ldy", 3, flUseLabel|flAbsOverride, OH_AbsoluteX }, /* $bc */ + { "lda", 3, flUseLabel|flAbsOverride, OH_AbsoluteX }, /* $bd */ + { "ldx", 3, flUseLabel|flAbsOverride, OH_AbsoluteY }, /* $be */ + { "bbs3", 3, flUseLabel, OH_BitBranch }, /* $bf */ + { "cpy", 2, flNone, OH_Immediate }, /* $c0 */ + { "cmp", 2, flUseLabel, OH_DirectXIndirect }, /* $c1 */ + { "", 1, flIllegal, OH_Illegal, }, /* $c2 */ + { "", 1, flIllegal, OH_Illegal, }, /* $c3 */ + { "cpy", 2, flUseLabel, OH_Direct }, /* $c4 */ + { "cmp", 2, flUseLabel, OH_Direct }, /* $c5 */ + { "dec", 2, flUseLabel, OH_Direct }, /* $c6 */ + { "smb4", 2, flUseLabel, OH_Direct, }, /* $c7 */ + { "iny", 1, flNone, OH_Implicit }, /* $c8 */ + { "cmp", 2, flNone, OH_Immediate }, /* $c9 */ + { "dex", 1, flNone, OH_Implicit }, /* $ca */ + { "wai", 1, flNone, OH_Implicit }, /* $cb */ + { "cpy", 3, flUseLabel|flAbsOverride, OH_Absolute }, /* $cc */ + { "cmp", 3, flUseLabel|flAbsOverride, OH_Absolute }, /* $cd */ + { "dec", 3, flUseLabel|flAbsOverride, OH_Absolute }, /* $ce */ + { "bbs4", 3, flUseLabel, OH_BitBranch }, /* $cf */ + { "bne", 2, flLabel, OH_Relative }, /* $d0 */ + { "cmp", 2, flUseLabel, OH_DirectIndirectY }, /* $d1 */ + { "cmp", 2, flUseLabel, OH_DirectIndirect }, /* $d2 */ + { "", 1, flIllegal, OH_Illegal, }, /* $d3 */ + { "", 1, flIllegal, OH_Illegal, }, /* $d4 */ + { "cmp", 2, flUseLabel, OH_DirectX }, /* $d5 */ + { "dec", 2, flUseLabel, OH_DirectX }, /* $d6 */ + { "smb5", 2, flUseLabel, OH_Direct, }, /* $d7 */ + { "cld", 1, flNone, OH_Implicit }, /* $d8 */ + { "cmp", 3, flUseLabel, OH_AbsoluteY }, /* $d9 */ + { "phx", 1, flNone, OH_Implicit }, /* $da */ + { "stp", 1, flNone, OH_Implicit }, /* $db */ + { "", 1, flIllegal, OH_Illegal, }, /* $dc */ + { "cmp", 3, flUseLabel|flAbsOverride, OH_AbsoluteX }, /* $dd */ + { "dec", 3, flUseLabel|flAbsOverride, OH_AbsoluteX }, /* $de */ + { "bbs5", 3, flUseLabel, OH_BitBranch }, /* $df */ + { "cpx", 2, flNone, OH_Immediate }, /* $e0 */ + { "sbc", 2, flUseLabel, OH_DirectXIndirect }, /* $e1 */ + { "", 1, flIllegal, OH_Illegal, }, /* $e2 */ + { "", 1, flIllegal, OH_Illegal, }, /* $e3 */ + { "cpx", 2, flUseLabel, OH_Direct }, /* $e4 */ + { "sbc", 2, flUseLabel, OH_Direct }, /* $e5 */ + { "inc", 2, flUseLabel, OH_Direct }, /* $e6 */ + { "smb6", 2, flUseLabel, OH_Direct, }, /* $e7 */ + { "inx", 1, flNone, OH_Implicit }, /* $e8 */ + { "sbc", 2, flNone, OH_Immediate }, /* $e9 */ + { "nop", 1, flNone, OH_Implicit }, /* $ea */ + { "", 1, flIllegal, OH_Illegal, }, /* $eb */ + { "cpx", 3, flUseLabel|flAbsOverride, OH_Absolute }, /* $ec */ + { "sbc", 3, flUseLabel|flAbsOverride, OH_Absolute }, /* $ed */ + { "inc", 3, flUseLabel|flAbsOverride, OH_Absolute }, /* $ee */ + { "bbs6", 3, flUseLabel, OH_BitBranch }, /* $ef */ + { "beq", 2, flLabel, OH_Relative }, /* $f0 */ + { "sbc", 2, flUseLabel, OH_DirectIndirectY }, /* $f1 */ + { "sbc", 2, flUseLabel, OH_DirectIndirect }, /* $f2 */ + { "", 1, flIllegal, OH_Illegal, }, /* $f3 */ + { "", 1, flIllegal, OH_Illegal, }, /* $f4 */ + { "sbc", 2, flUseLabel, OH_DirectX }, /* $f5 */ + { "inc", 2, flUseLabel, OH_DirectX }, /* $f6 */ + { "smb7", 2, flUseLabel, OH_Direct, }, /* $f7 */ + { "sed", 1, flNone, OH_Implicit }, /* $f8 */ + { "sbc", 3, flUseLabel, OH_AbsoluteY }, /* $f9 */ + { "plx", 1, flNone, OH_Implicit }, /* $fa */ + { "", 1, flIllegal, OH_Illegal, }, /* $fb */ + { "", 1, flIllegal, OH_Illegal, }, /* $fc */ + { "sbc", 3, flUseLabel|flAbsOverride, OH_AbsoluteX }, /* $fd */ + { "inc", 3, flUseLabel|flAbsOverride, OH_AbsoluteX }, /* $fe */ + { "bbs7", 3, flUseLabel, OH_BitBranch }, /* $ff */ +}; diff --git a/src/da65/opcw65c02.h b/src/da65/opcw65c02.h new file mode 100644 index 000000000..0805ce5dd --- /dev/null +++ b/src/da65/opcw65c02.h @@ -0,0 +1,58 @@ +/*****************************************************************************/ +/* */ +/* opcw65c02.h */ +/* */ +/* W65C02 opcode description table */ +/* */ +/* */ +/* */ +/* (C) 2003 Ullrich von Bassewitz */ +/* Roemerstrasse 52 */ +/* D-70794 Filderstadt */ +/* EMail: uz@cc65.org */ +/* */ +/* */ +/* This software is provided 'as-is', without any expressed or implied */ +/* warranty. In no event will the authors be held liable for any damages */ +/* arising from the use of this software. */ +/* */ +/* Permission is granted to anyone to use this software for any purpose, */ +/* including commercial applications, and to alter it and redistribute it */ +/* freely, subject to the following restrictions: */ +/* */ +/* 1. The origin of this software must not be misrepresented; you must not */ +/* claim that you wrote the original software. If you use this software */ +/* in a product, an acknowledgment in the product documentation would be */ +/* appreciated but is not required. */ +/* 2. Altered source versions must be plainly marked as such, and must not */ +/* be misrepresented as being the original software. */ +/* 3. This notice may not be removed or altered from any source */ +/* distribution. */ +/* */ +/*****************************************************************************/ + + + +#ifndef OPCW65C02_H +#define OPCW65C02_H + + + +#include "opcdesc.h" + + + +/*****************************************************************************/ +/* Data */ +/*****************************************************************************/ + + + +/* Descriptions for all opcodes */ +extern const OpcDesc OpcTable_W65C02[256]; + + + +/* End of opcw65c02.h */ + +#endif From b38422ef9f40cf5b5240d3164ea599153a2fc853 Mon Sep 17 00:00:00 2001 From: mrdudz Date: Sat, 28 Jun 2025 00:55:41 +0200 Subject: [PATCH 04/32] 65CE02 has phz and asw --- src/ca65/instr.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/src/ca65/instr.c b/src/ca65/instr.c index b920755d3..aed6966bf 100644 --- a/src/ca65/instr.c +++ b/src/ca65/instr.c @@ -732,7 +732,7 @@ static const struct { /* Instruction table for the 65CE02 */ static const struct { unsigned Count; - InsDesc Ins[131]; + InsDesc Ins[133]; } InsTab65CE02 = { /* CAUTION: table must be sorted for bsearch */ sizeof (InsTab65CE02.Ins) / sizeof (InsTab65CE02.Ins[0]), @@ -742,6 +742,7 @@ static const struct { { "AND", 0x080A66C, 0x20, 0, PutAll }, { "ASL", 0x000006e, 0x02, 1, PutAll }, { "ASR", 0x0000026, 0x43, 0, Put4510 }, + { "ASW", 0x0000008, 0xcb, 6, PutAll }, { "BBR0", 0x0000000, 0x0F, 0, PutBitBranch }, { "BBR1", 0x0000000, 0x1F, 0, PutBitBranch }, { "BBR2", 0x0000000, 0x2F, 0, PutBitBranch }, @@ -819,6 +820,7 @@ static const struct { { "PHW", 0x8000008, 0xf4, 1, PutAll }, { "PHX", 0x0000001, 0xda, 0, PutAll }, { "PHY", 0x0000001, 0x5a, 0, PutAll }, + { "PHZ", 0x0000001, 0xdb, 0, PutAll }, { "PLA", 0x0000001, 0x68, 0, PutAll }, { "PLP", 0x0000001, 0x28, 0, PutAll }, { "PLX", 0x0000001, 0xfa, 0, PutAll }, From f09aaeb085de461918a9792c833ce9cb1b7d4fca Mon Sep 17 00:00:00 2001 From: mrdudz Date: Sat, 28 Jun 2025 00:58:44 +0200 Subject: [PATCH 05/32] update docs a bit, create a seperate CPU page --- doc/ca65.sgml | 99 ++------------- doc/cpus.sgml | 342 ++++++++++++++++++++++++++++++++++++++++++++++++++ doc/da65.sgml | 12 +- 3 files changed, 364 insertions(+), 89 deletions(-) create mode 100644 doc/cpus.sgml diff --git a/doc/ca65.sgml b/doc/ca65.sgml index 7b36abec5..6886e48bd 100644 --- a/doc/ca65.sgml +++ b/doc/ca65.sgml @@ -459,6 +459,8 @@ The assembler accepts command was given). +for more details on the various CPUs, see . + On 6502-derived platforms the 65SC02 mode