diff --git a/.github/checks/Makefile b/.github/checks/Makefile index 93eeddd19..7fc51d8d4 100644 --- a/.github/checks/Makefile +++ b/.github/checks/Makefile @@ -5,14 +5,18 @@ endif ifdef CMD_EXE -.PHONY: checkstyle +.PHONY: checkstyle sorted checkstyle: $(info INFO: style checks require bash.) +sorted: + $(info INFO: table checks require bash.) else -.PHONY: checkstyle lineendings tabs lastline spaces noexec +.PHONY: checkstyle lineendings tabs lastline spaces noexec sorted + +all: checkstyle sorted checkstyle: lineendings tabs lastline spaces noexec @@ -31,4 +35,12 @@ spaces: spaces.sh noexec: noexec.sh @./noexec.sh +sorted: sorted.sh sorted_codeopt.sh sorted_opcodes.sh + @./sorted.sh + @./sorted_codeopt.sh + @./sorted_opcodes.sh + +checksp: checksp.sh + @./checksp.sh + endif diff --git a/.github/checks/checksp.sh b/.github/checks/checksp.sh new file mode 100755 index 000000000..f70d92e25 --- /dev/null +++ b/.github/checks/checksp.sh @@ -0,0 +1,22 @@ +#! /bin/bash +OD65_EXE=../bin/od65 +CHECK_PATH=../../libwrk + +cd "${CHECK_PATH}" || { + echo "error: Directory ${CHECK_PATH} doesn't seem to exist" >&2 + exit 1 +} + +[ -x "${OD65_EXE}" ] || { + echo "error: This check requires the od65 executable to be built" >&2 + exit 1 +} + +EXITCODE=0 +find . -name \*.o -print | while read OBJ; do + "${OD65_EXE}" --dump-imports "${OBJ}" | grep -q "\"sp\"" && { + echo "error: Usage of symbol 'sp' found in module ${OBJ}" >&2 + EXITCODE=1 + } +done +exit ${EXITCODE} diff --git a/.github/checks/lastline.sh b/.github/checks/lastline.sh index d243a01e1..6bb6e0dc5 100755 --- a/.github/checks/lastline.sh +++ b/.github/checks/lastline.sh @@ -23,3 +23,4 @@ if [ x"$FILES"x != xx ]; then done exit -1 fi +exit 0 diff --git a/.github/checks/lineendings.sh b/.github/checks/lineendings.sh index 5b445522f..5baac514e 100755 --- a/.github/checks/lineendings.sh +++ b/.github/checks/lineendings.sh @@ -16,3 +16,4 @@ if [ x"$FILES"x != xx ]; then done exit -1 fi +exit 0 diff --git a/.github/checks/noexec.sh b/.github/checks/noexec.sh index c76ae481d..5e53fe869 100755 --- a/.github/checks/noexec.sh +++ b/.github/checks/noexec.sh @@ -16,3 +16,4 @@ if [ x"$FILES"x != xx ]; then done exit -1 fi +exit 0 diff --git a/.github/checks/sorted.sh b/.github/checks/sorted.sh new file mode 100755 index 000000000..b5451a21f --- /dev/null +++ b/.github/checks/sorted.sh @@ -0,0 +1,39 @@ +#! /bin/bash +OLDCWD=`pwd` +SCRIPT_PATH=`dirname $0` + +CHECK_DIR=../../src + +SORT_OPT="-u -c" + +# $1: filename +function checkarray_quoted_name +{ + CHECK_FILE="$1" + START="\\/\\* BEGIN SORTED.SH \\*\\/" + END="\\/\\* END SORTED.SH \\*\\/" + + awk '/'"$START"'/{flag=1; count++; next} /'"$END"'/{flag=0;} flag {printf("%04d##%s\n", count, $0)}' "$CHECK_FILE" | \ + sed -e 's:\(.*\)##.*\"\(.*\)\".*:\1##\2:g' > .a.tmp + + if [[ -z $(grep '[^[:space:]]' .a.tmp) ]] ; then + echo "error: "$1" table is empty" + rm -rf .a.tmp + exit -1 + fi + + if `LC_COLLATE=C sort $SORT_OPT .a.tmp`; then + echo ""$1" tables OK" + else + echo "error: "$1" tables are not sorted." + rm -rf .a.tmp + exit -1 + fi + rm -rf .a.tmp +} + + +for N in `grep -rl "BEGIN SORTED.SH" "$CHECK_DIR"`; do + checkarray_quoted_name $N +done +exit 0 diff --git a/.github/checks/sorted_codeopt.sh b/.github/checks/sorted_codeopt.sh new file mode 100755 index 000000000..cfca028dd --- /dev/null +++ b/.github/checks/sorted_codeopt.sh @@ -0,0 +1,69 @@ +#! /bin/bash +OLDCWD=`pwd` +SCRIPT_PATH=`dirname $0` + +CHECK_DIR=../../src + +SORT_OPT="-u -c" + +# $1: filename +function checkarray +{ + CHECK_FILE="$1" + START="\\/\\* BEGIN DECL SORTED_CODEOPT.SH \\*\\/" + END="\\/\\* END DECL SORTED_CODEOPT.SH \\*\\/" + + awk '/'"$START"'/{flag=1; count++; next} /'"$END"'/{flag=0;} flag {printf("%04d##%s\n", count, $0)}' "$CHECK_FILE" | \ + sed -e 's:\(.*##\).*"\(.*\)",.*:\1\2:g' > .a.tmp + + if [[ -z $(grep '[^[:space:]]' .a.tmp) ]] ; then + echo "error: "$1" table is empty" + rm -rf .a.tmp + exit -1 + fi + + if `LC_COLLATE=C sort $SORT_OPT .a.tmp`; then + echo ""$1" decls sorted." + else + echo "error: "$1" decls are not sorted." + rm -rf .a.tmp + exit -1 + fi + + START="\\/\\* BEGIN SORTED_CODEOPT.SH \\*\\/" + END="\\/\\* END SORTED_CODEOPT.SH \\*\\/" + + awk '/'"$START"'/{flag=1; count++; next} /'"$END"'/{flag=0;} flag {printf("%04d##%s\n", count, $0)}' "$CHECK_FILE" | \ + sed -e 's:\(.*##\).*&D\(.*\),.*:\1\2:g' > .b.tmp + + if [[ -z $(grep '[^[:space:]]' .b.tmp) ]] ; then + echo "error: "$1" table is empty" + rm -rf .a.tmp .b.tmp + exit -1 + fi + + if `LC_COLLATE=C sort $SORT_OPT .b.tmp`; then + echo ""$1" tables sorted." + else + echo "error: "$1" tables are not sorted." + rm -rf .a.tmp .b.tmp + exit -1 + fi + + if cmp --silent -- .a.tmp .b.tmp; then + echo ""$1" tables OK" + else + echo "error: "$1" tables are different." + diff -y .a.tmp .b.tmp + rm -rf .a.tmp .b.tmp + exit -1 + fi + + rm -rf .a.tmp .b.tmp +} + + +find "$CHECK_DIR" -name \*.\[ch\] -print | while read N; do + grep -q "BEGIN DECL SORTED_CODEOPT.SH" "$N" && checkarray $N +done +exit 0 diff --git a/.github/checks/sorted_opcodes.sh b/.github/checks/sorted_opcodes.sh new file mode 100755 index 000000000..34156bde6 --- /dev/null +++ b/.github/checks/sorted_opcodes.sh @@ -0,0 +1,40 @@ +#! /bin/bash +OLDCWD=`pwd` +SCRIPT_PATH=`dirname $0` + +CHECK_DIR=../../src + +SORT_OPT="-u -c" + +# $1: filename +function checkarray_quoted_name +{ + CHECK_FILE="$1" + START="\\/\\* BEGIN SORTED_OPCODES.SH \\*\\/" + END="\\/\\* END SORTED_OPCODES.SH \\*\\/" + + awk '/'"$START"'/{flag=1; count++; next} /'"$END"'/{flag=0;} flag {printf("%04d##%s\n", count, $0)}' "$CHECK_FILE" | \ + sed 's:/\*.*::g' | \ + grep '".*",' | \ + sed -e 's:\(.*\)##.*\"\(.*\)\".*:\1##\2:g' > .a.tmp + + if [[ -z $(grep '[^[:space:]]' .a.tmp) ]] ; then + echo "error: "$1" table is empty" + rm -rf .a.tmp + exit -1 + fi + + if `LC_COLLATE=C sort $SORT_OPT .a.tmp`; then + echo ""$1" tables OK" + else + echo "error: "$1" tables are not sorted." + rm -rf .a.tmp + exit -1 + fi + rm -rf .a.tmp +} + +for N in `grep -rl "BEGIN SORTED_OPCODES.SH" "$CHECK_DIR"`; do + checkarray_quoted_name $N +done +exit 0 diff --git a/.github/checks/spaces.sh b/.github/checks/spaces.sh index e231f6c2d..f2eea6f3f 100755 --- a/.github/checks/spaces.sh +++ b/.github/checks/spaces.sh @@ -16,3 +16,4 @@ if [ x"$FILES"x != xx ]; then done exit -1 fi +exit 0 diff --git a/.github/checks/tabs.sh b/.github/checks/tabs.sh index 80dac3f2d..ed8d45bac 100755 --- a/.github/checks/tabs.sh +++ b/.github/checks/tabs.sh @@ -16,3 +16,4 @@ if [ x"$FILES"x != xx ]; then done exit -1 fi +exit 0 diff --git a/.github/workflows/build-on-pull-request.yml b/.github/workflows/build-on-pull-request.yml index 7b762844b..f5aacca31 100644 --- a/.github/workflows/build-on-pull-request.yml +++ b/.github/workflows/build-on-pull-request.yml @@ -24,25 +24,34 @@ jobs: - name: Do some simple style checks shell: bash run: make -j2 checkstyle + - name: Check bsearch tables + shell: bash + run: make -j2 sorted - name: Build the tools. shell: bash - run: make -j2 bin USER_CFLAGS=-Werror + run: make -j2 bin USER_CFLAGS=-Werror QUIET=1 + - name: Build the dbginfo example + shell: bash + run: make -j2 -C src test QUIET=1 - name: Build the utilities. shell: bash - run: make -j2 util + run: make -j2 util QUIET=1 - name: Build the platform libraries. shell: bash run: make -j2 lib QUIET=1 + - name: check test that no modules use sp + shell: bash + run: make -j2 checksp QUIET=1 - name: Run the regression tests. shell: bash run: make -j2 test QUIET=1 - name: Test that the samples can be built. - run: make -C samples platforms + run: make -C samples platforms QUIET=1 - name: Test that the targettest programs can be built. - run: make -C targettest platforms + run: make -C targettest platforms QUIET=1 - name: Build the document files. shell: bash - run: make -j2 doc + run: make -j2 doc QUIET=1 - name: Upload a documents snapshot. uses: actions/upload-artifact@v4 with: @@ -50,8 +59,8 @@ jobs: path: ./html - name: Build 64-bit Windows versions of the tools. run: | - make -C src clean - make -j2 bin USER_CFLAGS=-Werror CROSS_COMPILE=x86_64-w64-mingw32- + make -C src clean QUIET=1 + make -j2 bin QUIET=1 USER_CFLAGS=-Werror CROSS_COMPILE=x86_64-w64-mingw32- build_windows: name: Build and Test (Windows) @@ -81,7 +90,7 @@ jobs: - name: Build utils (MinGW) shell: cmd - run: make -j2 util SHELL=cmd + run: make -j2 util QUIET=1 SHELL=cmd - name: Build the platform libraries (make lib) shell: cmd diff --git a/.github/workflows/snapshot-on-push-master.yml b/.github/workflows/snapshot-on-push-master.yml index 42794f10b..591b221be 100644 --- a/.github/workflows/snapshot-on-push-master.yml +++ b/.github/workflows/snapshot-on-push-master.yml @@ -49,11 +49,14 @@ jobs: - name: Do some simple style checks shell: bash run: make -j2 checkstyle + - name: Check bsearch tables + shell: bash + run: make -j2 sorted - name: Build the tools. shell: bash run: | - make -j2 bin USER_CFLAGS=-Werror - make -j2 util + make -j2 bin USER_CFLAGS=-Werror QUIET=1 + make -j2 util QUIET=1 - name: Build the platform libraries. shell: bash run: make -j2 lib QUIET=1 @@ -62,26 +65,26 @@ jobs: run: make -j2 test QUIET=1 - name: Test that the samples can be built. shell: bash - run: make -j2 samples + run: make -j2 samples QUIET=1 - name: Remove the output from the samples tests. shell: bash - run: make -C samples clean + run: make -C samples clean QUIET=1 - name: Remove programs in util directory shell: bash - run: make -C util clean + run: make -C util clean QUIET=1 - name: Build the document files. shell: bash - run: make -j2 doc + run: make -j2 doc QUIET=1 - name: Build and package 64-bit Windows versions of the tools. run: | - make -C src clean - make -j2 bin USER_CFLAGS=-Werror CROSS_COMPILE=x86_64-w64-mingw32- + make -C src clean QUIET=1 + make -j2 bin QUIET=1 USER_CFLAGS=-Werror CROSS_COMPILE=x86_64-w64-mingw32- make zip mv cc65.zip cc65-snapshot-win64.zip - name: Build and package 32-bit Windows versions of the tools. run: | - make -C src clean - make -j2 bin USER_CFLAGS=-Werror CROSS_COMPILE=i686-w64-mingw32- + make -C src clean QUIET=1 + make -j2 bin USER_CFLAGS=-Werror QUIET=1 CROSS_COMPILE=i686-w64-mingw32- make zip mv cc65.zip cc65-snapshot-win32.zip diff --git a/.github/workflows/windows-test-scheduled.yml b/.github/workflows/windows-test-scheduled.yml index fa22473f4..2e24e1d01 100644 --- a/.github/workflows/windows-test-scheduled.yml +++ b/.github/workflows/windows-test-scheduled.yml @@ -60,19 +60,19 @@ jobs: - name: Build utils (MinGW) if: steps.check-sha.outputs.cache-hit != 'true' shell: cmd - run: make -j2 util SHELL=cmd + run: make -j2 util SHELL=cmd QUIET=1 - name: Build the platform libraries (make lib) if: steps.check-sha.outputs.cache-hit != 'true' shell: cmd - run: make -j2 lib QUIET=1 SHELL=cmd + run: make -j2 lib QUIET=1 SHELL=cmd QUIET=1 - name: Run the regression tests (make test) if: steps.check-sha.outputs.cache-hit != 'true' shell: cmd - run: make -j2 test QUIET=1 SHELL=cmd + run: make -j2 test QUIET=1 SHELL=cmd QUIET=1 - name: Test that the samples can be built (make samples) if: steps.check-sha.outputs.cache-hit != 'true' shell: cmd - run: make -j2 samples SHELL=cmd + run: make -j2 samples SHELL=cmd QUIET=1 diff --git a/Makefile b/Makefile index 29fcbbf96..1f7af1087 100644 --- a/Makefile +++ b/Makefile @@ -1,13 +1,37 @@ -.PHONY: all mostlyclean clean install zip avail unavail bin lib doc html info samples test util checkstyle check +# ---- Display info during parsing phase ---- +SILENT:=$(findstring s,$(word 1, $(MAKEFLAGS))) +ifneq ($(SILENT),s) + $(info Using Makefile: $(realpath $(firstword $(MAKEFILE_LIST))) $(MAKECMDGOALS)) +endif + +.PHONY: all mostlyclean clean install zip avail unavail bin lib doc html info samples test util checkstyle check checkprefix .SUFFIXES: -all install zip: - @$(MAKE) -C src --no-print-directory $@ - @$(MAKE) -C libsrc --no-print-directory $@ - @$(MAKE) -C doc --no-print-directory $@ - @$(MAKE) -C util --no-print-directory $@ - @$(MAKE) -C samples --no-print-directory $@ +all: + @$(MAKE) -C src --no-print-directory $@ + @$(MAKE) -C libsrc --no-print-directory $@ + @$(MAKE) -C doc --no-print-directory $@ + @$(MAKE) -C util --no-print-directory $@ + @$(MAKE) -C samples --no-print-directory $@ + @$(MAKE) checkprefix --no-print-directory + +zip: + @$(MAKE) -C src --no-print-directory $@ + @$(MAKE) -C libsrc --no-print-directory $@ + @$(MAKE) -C doc --no-print-directory $@ + @$(MAKE) -C util --no-print-directory $@ + @$(MAKE) -C samples --no-print-directory $@ + +install: +ifndef PREFIX + $(error Error: PREFIX must be set for install to work) +endif + @$(MAKE) -C src --no-print-directory $@ + @$(MAKE) -C libsrc --no-print-directory $@ + @$(MAKE) -C doc --no-print-directory $@ + @$(MAKE) -C util --no-print-directory $@ + @$(MAKE) -C samples --no-print-directory $@ mostlyclean clean: @$(MAKE) -C src --no-print-directory $@ @@ -18,30 +42,51 @@ mostlyclean clean: @$(MAKE) -C test --no-print-directory $@ @$(MAKE) -C targettest --no-print-directory $@ -avail unavail bin: - @$(MAKE) -C src --no-print-directory $@ +avail unavail: +# FIXME: actually not true, PREFIX is ignored? +#ifndef PREFIX +# $(error Error: PREFIX must be set for avail/unavail to work) +#endif + @$(MAKE) -C src --no-print-directory $@ + +bin: + @$(MAKE) -C src --no-print-directory $@ + @$(MAKE) checkprefix --no-print-directory lib libtest: - @$(MAKE) -C libsrc --no-print-directory $@ + @$(MAKE) -C libsrc --no-print-directory $@ doc html info: - @$(MAKE) -C doc --no-print-directory $@ + @$(MAKE) -C doc --no-print-directory $@ samples: - @$(MAKE) -C samples --no-print-directory $@ + @$(MAKE) -C samples --no-print-directory $@ util: - @$(MAKE) -C util --no-print-directory $@ + @$(MAKE) -C util --no-print-directory $@ %65: - @$(MAKE) -C src --no-print-directory $@ + @$(MAKE) -C src --no-print-directory $@ %: - @$(MAKE) -C libsrc --no-print-directory $@ + @$(MAKE) -C libsrc --no-print-directory $@ + +checkprefix: +ifndef PREFIX + $(warning Warning: PREFIX is empty - make install will not work) +endif # check the code style checkstyle: - @$(MAKE) -C .github/checks --no-print-directory $@ + @$(MAKE) -C .github/checks --no-print-directory $@ + +# check bsearch tables +sorted: + @$(MAKE) -C .github/checks --no-print-directory $@ + +# check that no modules use "sp", requires the binaries to be built first +checksp: + @$(MAKE) -C .github/checks --no-print-directory $@ # runs regression tests, requires libtest target libraries test: @@ -50,6 +95,8 @@ test: # GNU "check" target, which runs all tests check: @$(MAKE) -C .github/checks checkstyle --no-print-directory + @$(MAKE) -C .github/checks sorted --no-print-directory + @$(MAKE) -C src test --no-print-directory @$(MAKE) test @$(MAKE) -C targettest platforms --no-print-directory @$(MAKE) -C samples platforms --no-print-directory diff --git a/README.md b/README.md index e3f1ab30f..891c31e86 100644 --- a/README.md +++ b/README.md @@ -39,6 +39,7 @@ the [cc65 web site](https://cc65.github.io): | Dr. Jozo Dujmović | Picocomputer (RP6502) | | Watara | Watura/QuickShot Supervision | | Synertek | SYM-1 | +| USSR | Agat-7/9 | A generic configuration to adapt cc65 to new targets is also around. diff --git a/asminc/agat.inc b/asminc/agat.inc new file mode 100644 index 000000000..b96d31834 --- /dev/null +++ b/asminc/agat.inc @@ -0,0 +1,39 @@ + +;----------------------------------------------------------------------------- +; Zero page stuff + +WNDLFT := $20 ; Text window left +WNDWDTH := $21 ; Text window width +WNDTOP := $22 ; Text window top +WNDBTM := $23 ; Text window bottom+1 +CH := $24 ; Cursor horizontal position +CV := $25 ; Cursor vertical position +BASL := $28 ; Text base address low +BASH := $29 ; Text base address high +CURSOR := $2D ; Cursor character +TATTR := $32 ; Text attributes +PROMPT := $33 ; Used by GETLN +VCOUT := $36 ; COUT Subroutine Vector +VCIN := $38 ; CIN Subroutine Vector +RNDL := $4E ; Random counter low +RNDH := $4F ; Random counter high +HIMEM := $73 ; Highest available memory address+1 + +;----------------------------------------------------------------------------- +; Vectors + +DOSWARM := $03D0 ; DOS warmstart vector +BRKVec := $03F0 ; Break vector +SOFTEV := $03F2 ; Vector for warm start +PWREDUP := $03F4 ; This must be = EOR #$A5 of SOFTEV+1 + +;----------------------------------------------------------------------------- +; Hardware + +; Keyboard input +KBD := $C000 ; Read keyboard +KBDSTRB := $C010 ; Clear keyboard strobe + +; Game controller +BUTN0 := $C061 ; Open-Apple Key +BUTN1 := $C062 ; Closed-Apple Key diff --git a/asminc/apple2.inc b/asminc/apple2.inc index fb4a1b2f0..bde383882 100644 --- a/asminc/apple2.inc +++ b/asminc/apple2.inc @@ -24,6 +24,8 @@ DOSWARM := $03D0 ; DOS warmstart vector BRKVec := $03F0 ; Break vector SOFTEV := $03F2 ; Vector for warm start PWREDUP := $03F4 ; This must be = EOR #$A5 of SOFTEV+1 +ROM_RST := $FFFC ; 6502 reset vector +ROM_IRQ := $FFFE ; 6502 IRQ vector ;----------------------------------------------------------------------------- ; 80 column firmware diff --git a/asminc/c65.inc b/asminc/c65.inc new file mode 100644 index 000000000..ff3572f1f --- /dev/null +++ b/asminc/c65.inc @@ -0,0 +1,239 @@ + +; --------------------------------------------------------------------------- +; Zero page, Commodore stuff + +TXTPTR := $3C ; Pointer into BASIC source code +STATUS := $90 ; Kernal I/O completion status +FNAM_LEN := $B7 ; Length of filename +SECADR := $B9 ; Secondary address +DEVNUM := $BA ; Device number +FNAM := $BB ; Address of filename +FNAM_BANK := $BE ; Bank for filename +KEY_COUNT := $D0 ; Number of keys in input buffer +FKEY_COUNT := $D1 ; Characters for function key +MODE := $D7 ; 40-/80-column mode (bit 7: 80 columns) +GRAPHM := $D8 ; Graphics mode flags (bits 5-7) +CHARDIS := $D9 ; Bit 2 shadow for location $01 +CURS_X := $EC ; Cursor column +CURS_Y := $EB ; Cursor row +SCREEN_PTR := $E0 ; Pointer to current char in text screen +CRAM_PTR := $E2 ; Pointer to current char in color RAM +CHARCOLOR := $F1 +RVS := $F3 ; Reverse output flag +SCROLL := $F8 ; Disable scrolling flag + +BASIC_BUF := $0200 ; Location of command-line +BASIC_BUF_LEN = 161 ; Maximum length of command-line + +FKEY_LEN := $1000 ; Function key lengths +FKEY_TEXT := $100A ; Function key texts + +PALFLAG := $1103 ; $FF=PAL, $00=NTSC +INIT_STATUS := $1104 ; Flags: Reset/Restore initiation status +TIME := $110C ; 60HZ clock + +KBDREPEAT := $111a +KBDREPEATRATE := $111b +KBDREPEATDELAY := $111c + +; --------------------------------------------------------------------------- +; Vectors + +IRQVec := $0314 +BRKVec := $0316 +NMIVec := $0318 + +; --------------------------------------------------------------------------- +; I/O: VIC + +VIC := $D000 +VIC_SPR0_X := $D000 +VIC_SPR0_Y := $D001 +VIC_SPR1_X := $D002 +VIC_SPR1_Y := $D003 +VIC_SPR2_X := $D004 +VIC_SPR2_Y := $D005 +VIC_SPR3_X := $D006 +VIC_SPR3_Y := $D007 +VIC_SPR4_X := $D008 +VIC_SPR4_Y := $D009 +VIC_SPR5_X := $D00A +VIC_SPR5_Y := $D00B +VIC_SPR6_X := $D00C +VIC_SPR6_Y := $D00D +VIC_SPR7_X := $D00E +VIC_SPR7_Y := $D00F +VIC_SPR_HI_X := $D010 +VIC_SPR_ENA := $D015 +VIC_SPR_EXP_Y := $D017 +VIC_SPR_EXP_X := $D01D +VIC_SPR_MCOLOR := $D01C +VIC_SPR_BG_PRIO := $D01B +VIC_SPR_COLL := $D01E +VIC_SPR_BG_COLL := $D01F + +VIC_SPR_MCOLOR0 := $D025 +VIC_SPR_MCOLOR1 := $D026 + +VIC_SPR0_COLOR := $D027 +VIC_SPR1_COLOR := $D028 +VIC_SPR2_COLOR := $D029 +VIC_SPR3_COLOR := $D02A +VIC_SPR4_COLOR := $D02B +VIC_SPR5_COLOR := $D02C +VIC_SPR6_COLOR := $D02D +VIC_SPR7_COLOR := $D02E + +VIC_CTRL1 := $D011 +VIC_CTRL2 := $D016 + +VIC_HLINE := $D012 + +VIC_LPEN_X := $D013 +VIC_LPEN_Y := $D014 + +VIC_VIDEO_ADR := $D018 + +VIC_IRR := $D019 ; Interrupt request register +VIC_IMR := $D01A ; Interrupt mask register + +VIC_BORDERCOLOR := $D020 +VIC_BG_COLOR0 := $D021 +VIC_BG_COLOR1 := $D022 +VIC_BG_COLOR2 := $D023 +VIC_BG_COLOR3 := $D024 + + +; --------------------------------------------------------------------------- +; I/O: FDC + +FDC := $D080 + +; --------------------------------------------------------------------------- +; I/O: SID + +SID1 := $D400 +SID1_S1Lo := $D400 +SID1_S1Hi := $D401 +SID1_PB1Lo := $D402 +SID1_PB1Hi := $D403 +SID1_Ctl1 := $D404 +SID1_AD1 := $D405 +SID1_SUR1 := $D406 + +SID1_S2Lo := $D407 +SID1_S2Hi := $D408 +SID1_PB2Lo := $D409 +SID1_PB2Hi := $D40A +SID1_Ctl2 := $D40B +SID1_AD2 := $D40C +SID1_SUR2 := $D40D + +SID1_S3Lo := $D40E +SID1_S3Hi := $D40F +SID1_PB3Lo := $D410 +SID1_PB3Hi := $D411 +SID1_Ctl3 := $D412 +SID1_AD3 := $D413 +SID1_SUR3 := $D414 + +SID1_FltLo := $D415 +SID1_FltHi := $D416 +SID1_FltCtl := $D417 +SID1_Amp := $D418 +SID1_ADConv1 := $D419 +SID1_ADConv2 := $D41A +SID1_Noise := $D41B +SID1_Read3 := $D41C + +SID2 := $D420 +SID2_S1Lo := $D420 +SID2_S1Hi := $D421 +SID2_PB1Lo := $D422 +SID2_PB1Hi := $D423 +SID2_Ctl1 := $D424 +SID2_AD1 := $D425 +SID2_SUR1 := $D426 + +SID2_S2Lo := $D427 +SID2_S2Hi := $D428 +SID2_PB2Lo := $D429 +SID2_PB2Hi := $D42A +SID2_Ctl2 := $D42B +SID2_AD2 := $D42C +SID2_SUR2 := $D42D + +SID2_S3Lo := $D42E +SID2_S3Hi := $D42F +SID2_PB3Lo := $D430 +SID2_PB3Hi := $D431 +SID2_Ctl3 := $D432 +SID2_AD3 := $D433 +SID2_SUR3 := $D434 + +SID2_FltLo := $D435 +SID2_FltHi := $D436 +SID2_FltCtl := $D437 +SID2_Amp := $D438 +SID2_ADConv1 := $D439 +SID2_ADConv2 := $D43A +SID2_Noise := $D43B +SID2_Read3 := $D43C + +; --------------------------------------------------------------------------- +; I/O: Complex Interface Adapters + +CIA1 := $DC00 +CIA1_PRA := $DC00 ; Port A +CIA1_PRB := $DC01 ; Port B +CIA1_DDRA := $DC02 ; Data direction register for port A +CIA1_DDRB := $DC03 ; Data direction register for port B +CIA1_TA := $DC04 ; 16-bit timer A +CIA1_TB := $DC06 ; 16-bit timer B +CIA1_TOD10 := $DC08 ; Time-of-day tenths of a second +CIA1_TODSEC := $DC09 ; Time-of-day seconds +CIA1_TODMIN := $DC0A ; Time-of-day minutes +CIA1_TODHR := $DC0B ; Time-of-day hours +CIA1_SDR := $DC0C ; Serial data register +CIA1_ICR := $DC0D ; Interrupt control register +CIA1_CRA := $DC0E ; Control register for timer A +CIA1_CRB := $DC0F ; Control register for timer B + +CIA2 := $DD00 +CIA2_PRA := $DD00 +CIA2_PRB := $DD01 +CIA2_DDRA := $DD02 +CIA2_DDRB := $DD03 +CIA2_TA := $DD04 +CIA2_TB := $DD06 +CIA2_TOD10 := $DD08 +CIA2_TODSEC := $DD09 +CIA2_TODMIN := $DD0A +CIA2_TODHR := $DD0B +CIA2_SDR := $DD0C +CIA2_ICR := $DD0D +CIA2_CRA := $DD0E +CIA2_CRB := $DD0F + +; --------------------------------------------------------------------------- +; I/O: DMA + +DMA := $D700 + + +; --------------------------------------------------------------------------- +; Processor Port at $01 + +LORAM = $01 ; Enable the basic rom +HIRAM = $02 ; Enable the kernal rom +IOEN = $04 ; Enable I/O +CASSDATA = $08 ; Cassette data +CASSPLAY = $10 ; Cassette: Play +CASSMOT = $20 ; Cassette motor on +TP_FAST = $80 ; Switch Rossmoeller TurboProcess to fast mode + +RAMONLY = $F8 ; (~(LORAM | HIRAM | IOEN)) & $FF + +; temporary, to get conio working +XSIZE = 80 +YSIZE = 50 diff --git a/asminc/cbm_kernal.inc b/asminc/cbm_kernal.inc index 4d78cf93f..f06483a47 100644 --- a/asminc/cbm_kernal.inc +++ b/asminc/cbm_kernal.inc @@ -63,6 +63,43 @@ MOUSE_GET := $FF6B .endif +.if .def (__MEGA65__) + ; extended C65 jump table + +; memory before $ff3b is all $ff in mega65 ROM? +; VERSIONQ := $FF2F +; RESET_RUN := $FF32 +; CURSOR := $FF35 + + SAVEFL := $FF3B + GETIO := $FF41 + GETLFS := $FF44 + KEYLOCKS := $FF47 + ADDKEY := $FF4A +.endif + +.if .def(__C65__) || .def (__MEGA65__) + CURSOR := $E030 ; in editor ROM + + SPIN_SPOUT := $FF4D + CLSALL := $FF50 + C64MODE := $FF53 + MonitorCall := $FF56 + BOOT_SYS := $FF59 + PHOENIX := $FF5C + LKUPLA := $FF5F + LKUPSA := $FF62 + SWAPPER := $FF65 + PFKEY := $FF68 + SETBNK := $FF6B + JSRFAR := $FF6E + JMPFAR := $FF71 + LDA_FAR := $FF74 + STA_FAR := $FF77 + CMP_FAR := $FF7A + PRIMM := $FF7D +.endif + .if .def(__C128__) ; C128 extended jump table C64MODE := $FF4D @@ -83,7 +120,7 @@ PRIMM := $FF7D .endif -.if .def(__C64__) || .def(__C128__) || .def(__C16__) || .def(__CX16__) +.if .def(__C64__) || .def(__C128__) || .def(__C16__) || .def(__CX16__) || .def(__C65__) || .def (__MEGA65__) CINT := $FF81 IOINIT := $FF84 RAMTAS := $FF87 @@ -96,7 +133,7 @@ CINT := $FF7E .endif -.if .def(__VIC20__) || .def(__C64__) || .def(__C128__) || .def(__C16__) || .def(__CX16__) +.if .def(__VIC20__) || .def(__C64__) || .def(__C128__) || .def(__C16__) || .def(__CX16__) || .def(__C65__) || .def (__MEGA65__) RESTOR := $FF8A VECTOR := $FF8D .elseif .def(__CBM510__) || .def(__CBM610__) @@ -112,6 +149,17 @@ MEMBOT := $FF9C SCNKEY := $FF9F SETTMO := $FFA2 +.elseif .def(__C65__) || .def (__MEGA65__) + SETMSG := $FF90 + SECOND := $FF93 + TKSA := $FF96 + MEMTOP := $FF99 + MEMBOT := $FF9C + SCNKEY := $FF9F + MONEXIT := $FFA2 +.endif + +.if .def(__CBM510__) || .def(__CBM610__) || .def(__VIC20__) || .def(__C64__) || .def(__C128__) || .def(__C16__) || .def(__CX16__) || .def(__C65__) || .def(__MEGA65__) ACPTR := $FFA5 CIOUT := $FFA8 UNTLK := $FFAB @@ -136,7 +184,7 @@ CHRIN := $FFCF BSOUT := $FFD2 CHROUT := $FFD2 -.if .def(__CBM510__) || .def(__CBM610__) || .def(__VIC20__) || .def(__C64__) || .def(__C128__) || .def(__C16__) || .def(__CX16__) +.if .def(__CBM510__) || .def(__CBM610__) || .def(__VIC20__) || .def(__C64__) || .def(__C128__) || .def(__C16__) || .def(__CX16__) || .def(__C65__) || .def(__MEGA65__) LOAD := $FFD5 SAVE := $FFD8 SETTIM := $FFDB @@ -147,9 +195,14 @@ CHROUT := $FFD2 STOP := $FFE1 GETIN := $FFE4 CLALL := $FFE7 -UDTIM := $FFEA -.if .def(__CBM510__) || .def(__CBM610__) || .def(__VIC20__) || .def(__C64__) || .def(__C128__) || .def(__C16__) || .def(__CX16__) +.if .def(__C65__) || .def(__MEGA65__) +ScanStopKey := $FFEA +.else +UDTIM := $FFEA +.endif + +.if .def(__CBM510__) || .def(__CBM610__) || .def(__VIC20__) || .def(__C64__) || .def(__C128__) || .def(__C16__) || .def(__CX16__) || .def(__C65__) || .def(__MEGA65__) SCREEN := $FFED PLOT := $FFF0 IOBASE := $FFF3 @@ -173,10 +226,10 @@ UDTIM := $FFEA KBDREAD := $E5CF UPDCRAMPTR := $EAB2 .elseif .def(__C64__) - CLRSCR := $E544 - KBDREAD := $E5B4 + CLRSCR := $E544 ; Clear the screen + KBDREAD := $E5B4 ; Get Character From Keyboard Buffer NMIEXIT := $FEBC - UPDCRAMPTR := $EA24 + UPDCRAMPTR := $EA24 ; Update color ram pointer .elseif .def(__C128__) CLRSCR := $C142 KBDREAD := $C006 @@ -189,4 +242,7 @@ UDTIM := $FFEA .elseif .def(__C16__) CLRSCR := $D88B KBDREAD := $D8C1 +.elseif .def(__C65__) || .def(__MEGA65__) +; CLRSCR := $E0EC ; ??? + KBDREAD := $E006 .endif diff --git a/asminc/cpu.mac b/asminc/cpu.mac index 084a42119..15b16bad5 100644 --- a/asminc/cpu.mac +++ b/asminc/cpu.mac @@ -1,24 +1,38 @@ -; CPU bitmask constants +; CPU bitmask constants (make sure this matches src/common/cpu.h) + CPU_ISET_NONE = $0001 CPU_ISET_6502 = $0002 CPU_ISET_6502X = $0004 CPU_ISET_6502DTV = $0008 CPU_ISET_65SC02 = $0010 -CPU_ISET_65C02 = $0020 +CPU_ISET_65C02 = $0020 ; Rockwell extensions CPU_ISET_65816 = $0040 CPU_ISET_SWEET16 = $0080 CPU_ISET_HUC6280 = $0100 -;CPU_ISET_M740 = $0200 not actually implemented +CPU_ISET_M740 = $0200 CPU_ISET_4510 = $0400 +CPU_ISET_45GS02 = $0800 +CPU_ISET_W65C02 = $1000 ; WDC extensions +CPU_ISET_65CE02 = $2000 ; CSG extensions ; CPU capabilities +; make sure to only combine the instruction sets that are 100% compatible CPU_NONE = CPU_ISET_NONE CPU_6502 = CPU_ISET_6502 -CPU_6502X = CPU_ISET_6502|CPU_ISET_6502X -CPU_6502DTV = CPU_ISET_6502|CPU_ISET_6502DTV -CPU_65SC02 = CPU_ISET_6502|CPU_ISET_65SC02 -CPU_65C02 = CPU_ISET_6502|CPU_ISET_65SC02|CPU_ISET_65C02 -CPU_65816 = CPU_ISET_6502|CPU_ISET_65SC02|CPU_ISET_65816 +CPU_6502X = CPU_ISET_6502X | CPU_ISET_6502 +CPU_6502DTV = CPU_ISET_6502DTV | CPU_ISET_6502 +CPU_65SC02 = CPU_ISET_65SC02 | CPU_ISET_6502 +CPU_65C02 = CPU_ISET_65C02 | CPU_ISET_6502 | CPU_ISET_65SC02 +CPU_W65C02 = CPU_ISET_W65C02 | CPU_ISET_6502 | CPU_ISET_65SC02 | CPU_ISET_65C02 + +; FIXME: CPU_ISET_65SC02 does not apply to the following, because the zp-indirect +; addressing was replaced with zp-indirect,z-indexed in 652SCE02 + +CPU_HUC6280 = CPU_ISET_HUC6280 | CPU_ISET_6502 | CPU_ISET_65C02 +CPU_4510 = CPU_ISET_4510 | CPU_ISET_6502 | CPU_ISET_65C02 | CPU_ISET_65CE02 +CPU_45GS02 = CPU_ISET_45GS02 | CPU_ISET_6502 | CPU_ISET_65C02 | CPU_ISET_65CE02 | CPU_ISET_4510 +CPU_M740 = CPU_ISET_M740 | CPU_ISET_6502 +CPU_65CE02 = CPU_ISET_65CE02 | CPU_ISET_6502 | CPU_ISET_65C02 + +CPU_65816 = CPU_ISET_65816 | CPU_ISET_6502 | CPU_ISET_65SC02 CPU_SWEET16 = CPU_ISET_SWEET16 -CPU_HUC6280 = CPU_ISET_6502|CPU_ISET_65SC02|CPU_ISET_65C02|CPU_ISET_HUC6280 -CPU_4510 = CPU_ISET_6502|CPU_ISET_65SC02|CPU_ISET_65C02|CPU_ISET_4510 diff --git a/asminc/mega65.inc b/asminc/mega65.inc new file mode 100644 index 000000000..79a4e7b03 --- /dev/null +++ b/asminc/mega65.inc @@ -0,0 +1,239 @@ + +; --------------------------------------------------------------------------- +; Zero page, Commodore stuff + +TXTPTR := $3C ; Pointer into BASIC source code +STATUS := $90 ; Kernal I/O completion status +FNAM_LEN := $B7 ; Length of filename +SECADR := $B9 ; Secondary address +DEVNUM := $BA ; Device number +FNAM := $BB ; Address of filename +FNAM_BANK := $BE ; Bank for filename +KEY_COUNT := $D0 ; Number of keys in input buffer +FKEY_COUNT := $D1 ; Characters for function key +MODE := $D7 ; 40-/80-column mode (bit 7: 80 columns) +GRAPHM := $D8 ; Graphics mode flags (bits 5-7) +CHARDIS := $D9 ; Bit 2 shadow for location $01 +CURS_X := $EC ; Cursor column +CURS_Y := $EB ; Cursor row +SCREEN_PTR := $E0 ; Pointer to current char in text screen +CRAM_PTR := $E2 ; Pointer to current char in color RAM +CHARCOLOR := $F1 +RVS := $F3 ; Reverse output flag +SCROLL := $F8 ; Disable scrolling flag + +BASIC_BUF := $0200 ; Location of command-line +BASIC_BUF_LEN = 161 ; Maximum length of command-line + +FKEY_LEN := $1000 ; Function key lengths +FKEY_TEXT := $100A ; Function key texts + +PALFLAG := $1103 ; $FF=PAL, $00=NTSC +INIT_STATUS := $1104 ; Flags: Reset/Restore initiation status +TIME := $110C ; 60HZ clock + +KBDREPEAT := $111a +KBDREPEATRATE := $111b +KBDREPEATDELAY := $111c + +; --------------------------------------------------------------------------- +; Vectors + +IRQVec := $0314 +BRKVec := $0316 +NMIVec := $0318 + +; --------------------------------------------------------------------------- +; I/O: VIC + +VIC := $D000 +VIC_SPR0_X := $D000 +VIC_SPR0_Y := $D001 +VIC_SPR1_X := $D002 +VIC_SPR1_Y := $D003 +VIC_SPR2_X := $D004 +VIC_SPR2_Y := $D005 +VIC_SPR3_X := $D006 +VIC_SPR3_Y := $D007 +VIC_SPR4_X := $D008 +VIC_SPR4_Y := $D009 +VIC_SPR5_X := $D00A +VIC_SPR5_Y := $D00B +VIC_SPR6_X := $D00C +VIC_SPR6_Y := $D00D +VIC_SPR7_X := $D00E +VIC_SPR7_Y := $D00F +VIC_SPR_HI_X := $D010 +VIC_SPR_ENA := $D015 +VIC_SPR_EXP_Y := $D017 +VIC_SPR_EXP_X := $D01D +VIC_SPR_MCOLOR := $D01C +VIC_SPR_BG_PRIO := $D01B +VIC_SPR_COLL := $D01E +VIC_SPR_BG_COLL := $D01F + +VIC_SPR_MCOLOR0 := $D025 +VIC_SPR_MCOLOR1 := $D026 + +VIC_SPR0_COLOR := $D027 +VIC_SPR1_COLOR := $D028 +VIC_SPR2_COLOR := $D029 +VIC_SPR3_COLOR := $D02A +VIC_SPR4_COLOR := $D02B +VIC_SPR5_COLOR := $D02C +VIC_SPR6_COLOR := $D02D +VIC_SPR7_COLOR := $D02E + +VIC_CTRL1 := $D011 +VIC_CTRL2 := $D016 + +VIC_HLINE := $D012 + +VIC_LPEN_X := $D013 +VIC_LPEN_Y := $D014 + +VIC_VIDEO_ADR := $D018 + +VIC_IRR := $D019 ; Interrupt request register +VIC_IMR := $D01A ; Interrupt mask register + +VIC_BORDERCOLOR := $D020 +VIC_BG_COLOR0 := $D021 +VIC_BG_COLOR1 := $D022 +VIC_BG_COLOR2 := $D023 +VIC_BG_COLOR3 := $D024 + + +; --------------------------------------------------------------------------- +; I/O: FDC + +FDC := $D080 + +; --------------------------------------------------------------------------- +; I/O: SID + +SID0 := $D400 +SID0_S1Lo := $D400 +SID0_S1Hi := $D401 +SID0_PB1Lo := $D402 +SID0_PB1Hi := $D403 +SID0_Ctl1 := $D404 +SID0_AD1 := $D405 +SID0_SUR1 := $D406 + +SID0_S2Lo := $D407 +SID0_S2Hi := $D408 +SID0_PB2Lo := $D409 +SID0_PB2Hi := $D40A +SID0_Ctl2 := $D40B +SID0_AD2 := $D40C +SID0_SUR2 := $D40D + +SID0_S3Lo := $D40E +SID0_S3Hi := $D40F +SID0_PB3Lo := $D410 +SID0_PB3Hi := $D411 +SID0_Ctl3 := $D412 +SID0_AD3 := $D413 +SID0_SUR3 := $D414 + +SID0_FltLo := $D415 +SID0_FltHi := $D416 +SID0_FltCtl := $D417 +SID0_Amp := $D418 +SID0_ADConv1 := $D419 +SID0_ADConv2 := $D41A +SID0_Noise := $D41B +SID0_Read3 := $D41C + +SID1 := $D420 +SID1_S1Lo := $D420 +SID1_S1Hi := $D421 +SID1_PB1Lo := $D422 +SID1_PB1Hi := $D423 +SID1_Ctl1 := $D424 +SID1_AD1 := $D425 +SID1_SUR1 := $D426 + +SID1_S2Lo := $D427 +SID1_S2Hi := $D428 +SID1_PB2Lo := $D429 +SID1_PB2Hi := $D42A +SID1_Ctl2 := $D42B +SID1_AD2 := $D42C +SID1_SUR2 := $D42D + +SID1_S3Lo := $D42E +SID1_S3Hi := $D42F +SID1_PB3Lo := $D430 +SID1_PB3Hi := $D431 +SID1_Ctl3 := $D432 +SID1_AD3 := $D433 +SID1_SUR3 := $D434 + +SID1_FltLo := $D435 +SID1_FltHi := $D436 +SID1_FltCtl := $D437 +SID1_Amp := $D438 +SID1_ADConv1 := $D439 +SID1_ADConv2 := $D43A +SID1_Noise := $D43B +SID1_Read3 := $D43C + +; --------------------------------------------------------------------------- +; I/O: Complex Interface Adapters + +CIA1 := $DC00 +CIA1_PRA := $DC00 ; Port A +CIA1_PRB := $DC01 ; Port B +CIA1_DDRA := $DC02 ; Data direction register for port A +CIA1_DDRB := $DC03 ; Data direction register for port B +CIA1_TA := $DC04 ; 16-bit timer A +CIA1_TB := $DC06 ; 16-bit timer B +CIA1_TOD10 := $DC08 ; Time-of-day tenths of a second +CIA1_TODSEC := $DC09 ; Time-of-day seconds +CIA1_TODMIN := $DC0A ; Time-of-day minutes +CIA1_TODHR := $DC0B ; Time-of-day hours +CIA1_SDR := $DC0C ; Serial data register +CIA1_ICR := $DC0D ; Interrupt control register +CIA1_CRA := $DC0E ; Control register for timer A +CIA1_CRB := $DC0F ; Control register for timer B + +CIA2 := $DD00 +CIA2_PRA := $DD00 +CIA2_PRB := $DD01 +CIA2_DDRA := $DD02 +CIA2_DDRB := $DD03 +CIA2_TA := $DD04 +CIA2_TB := $DD06 +CIA2_TOD10 := $DD08 +CIA2_TODSEC := $DD09 +CIA2_TODMIN := $DD0A +CIA2_TODHR := $DD0B +CIA2_SDR := $DD0C +CIA2_ICR := $DD0D +CIA2_CRA := $DD0E +CIA2_CRB := $DD0F + +; --------------------------------------------------------------------------- +; I/O: DMA + +DMA := $D700 + + +; --------------------------------------------------------------------------- +; Processor Port at $01 + +LORAM = $01 ; Enable the basic rom +HIRAM = $02 ; Enable the kernal rom +IOEN = $04 ; Enable I/O +CASSDATA = $08 ; Cassette data +CASSPLAY = $10 ; Cassette: Play +CASSMOT = $20 ; Cassette motor on +TP_FAST = $80 ; Switch Rossmoeller TurboProcess to fast mode + +RAMONLY = $F8 ; (~(LORAM | HIRAM | IOEN)) & $FF + +; temporary, to get conio working +XSIZE = 80 +YSIZE = 50 diff --git a/asminc/zeropage.inc b/asminc/zeropage.inc index 6627d86b6..8d508fc5a 100644 --- a/asminc/zeropage.inc +++ b/asminc/zeropage.inc @@ -8,11 +8,25 @@ ; by the compiler, ready for usage in asm code. - .globalzp sp, sreg, regsave + .globalzp c_sp, sreg, regsave .globalzp ptr1, ptr2, ptr3, ptr4 .globalzp tmp1, tmp2, tmp3, tmp4 .globalzp regbank +; FIXME: there must be a less ugly way to do this +.ifp4510 +.else +.ifp45GS02 +.else + + ; The following symbol is supplied for compatibility reasons only, it + ; will get removed in future versions. Using it will cause a linker + ; warning. + .globalzp sp +.endif +.endif + + ; The size of the register bank regbanksize = 6 diff --git a/cfg/agat.cfg b/cfg/agat.cfg new file mode 100644 index 000000000..1a740cfc7 --- /dev/null +++ b/cfg/agat.cfg @@ -0,0 +1,44 @@ +# Default configuration + +FEATURES { + STARTADDRESS: default = $1903; +} +SYMBOLS { + __EXEHDR__: type = import; + __FILETYPE__: type = weak, value = $0006; # file type + __STACKSIZE__: type = weak, value = $0400; # 1k stack + __HIMEM__: type = weak, value = $C000; # Presumed RAM end +} +MEMORY { + ZP: file = "", define = yes, start = $0080, size = $001A; + HEADER: file = %O, start = %S - $003A, size = $003A; + MAIN: file = %O, define = yes, start = %S, size = __HIMEM__ - %S; + BSS: file = "", start = __ONCE_RUN__, size = __HIMEM__ - __STACKSIZE__ - __ONCE_RUN__; +} +SEGMENTS { + ZEROPAGE: load = ZP, type = zp; + EXEHDR: load = HEADER, type = ro, optional = yes; + STARTUP: load = MAIN, type = ro, optional = yes; + LOWCODE: load = MAIN, type = ro, optional = yes; + CODE: load = MAIN, type = ro; + RODATA: load = MAIN, type = ro; + DATA: load = MAIN, type = rw; + INIT: load = MAIN, type = rw, optional = yes; + ONCE: load = MAIN, type = ro, define = yes; + BSS: load = BSS, type = bss, define = yes; +} +FEATURES { + CONDES: type = constructor, + label = __CONSTRUCTOR_TABLE__, + count = __CONSTRUCTOR_COUNT__, + segment = ONCE; + CONDES: type = destructor, + label = __DESTRUCTOR_TABLE__, + count = __DESTRUCTOR_COUNT__, + segment = RODATA; + CONDES: type = interruptor, + label = __INTERRUPTOR_TABLE__, + count = __INTERRUPTOR_COUNT__, + segment = RODATA, + import = __CALLIRQ__; +} diff --git a/cfg/c65-asm.cfg b/cfg/c65-asm.cfg new file mode 100644 index 000000000..40904ef70 --- /dev/null +++ b/cfg/c65-asm.cfg @@ -0,0 +1,20 @@ +FEATURES { + STARTADDRESS: default = $2001; +} +SYMBOLS { + __LOADADDR__: type = import; +} +MEMORY { + ZP: file = "", start = $0002, size = $00FE, define = yes; + LOADADDR: file = %O, start = %S - 2, size = $0002; + MAIN: file = %O, start = %S, size = $D000 - %S; +} +SEGMENTS { + ZEROPAGE: load = ZP, type = zp, optional = yes; + LOADADDR: load = LOADADDR, type = ro; + EXEHDR: load = MAIN, type = ro, optional = yes; + CODE: load = MAIN, type = rw; + RODATA: load = MAIN, type = ro, optional = yes; + DATA: load = MAIN, type = rw, optional = yes; + BSS: load = MAIN, type = bss, optional = yes, define = yes; +} diff --git a/cfg/c65.cfg b/cfg/c65.cfg new file mode 100644 index 000000000..2d78d26d2 --- /dev/null +++ b/cfg/c65.cfg @@ -0,0 +1,44 @@ +FEATURES { + STARTADDRESS: default = $2001; +} +SYMBOLS { + __LOADADDR__: type = import; + __EXEHDR__: type = import; + __STACKSIZE__: type = weak, value = $0800; # 2k stack + __HIMEM__: type = weak, value = $8000; +} +MEMORY { + ZP: file = "", define = yes, start = $0018, size = $001A; + LOADADDR: file = %O, start = %S - 2, size = $0002; + HEADER: file = %O, define = yes, start = %S, size = $0010; + MAIN: file = %O, define = yes, start = __HEADER_LAST__, size = __HIMEM__ - __HEADER_LAST__; + BSS: file = "", start = __ONCE_RUN__, size = __HIMEM__ - __STACKSIZE__ - __ONCE_RUN__; +} +SEGMENTS { + ZEROPAGE: load = ZP, type = zp; + LOADADDR: load = LOADADDR, type = ro; + EXEHDR: load = HEADER, type = ro; + STARTUP: load = MAIN, type = ro; + LOWCODE: load = MAIN, type = ro, optional = yes; + CODE: load = MAIN, type = ro; + RODATA: load = MAIN, type = ro; + DATA: load = MAIN, type = rw; + INIT: load = MAIN, type = rw; # uninitialized, but reserves output space + ONCE: load = MAIN, type = ro, define = yes; + BSS: load = BSS, type = bss, define = yes; +} +FEATURES { + CONDES: type = constructor, + label = __CONSTRUCTOR_TABLE__, + count = __CONSTRUCTOR_COUNT__, + segment = ONCE; + CONDES: type = destructor, + label = __DESTRUCTOR_TABLE__, + count = __DESTRUCTOR_COUNT__, + segment = RODATA; + CONDES: type = interruptor, + label = __INTERRUPTOR_TABLE__, + count = __INTERRUPTOR_COUNT__, + segment = RODATA, + import = __CALLIRQ__; +} diff --git a/cfg/mega65-asm.cfg b/cfg/mega65-asm.cfg new file mode 100644 index 000000000..40904ef70 --- /dev/null +++ b/cfg/mega65-asm.cfg @@ -0,0 +1,20 @@ +FEATURES { + STARTADDRESS: default = $2001; +} +SYMBOLS { + __LOADADDR__: type = import; +} +MEMORY { + ZP: file = "", start = $0002, size = $00FE, define = yes; + LOADADDR: file = %O, start = %S - 2, size = $0002; + MAIN: file = %O, start = %S, size = $D000 - %S; +} +SEGMENTS { + ZEROPAGE: load = ZP, type = zp, optional = yes; + LOADADDR: load = LOADADDR, type = ro; + EXEHDR: load = MAIN, type = ro, optional = yes; + CODE: load = MAIN, type = rw; + RODATA: load = MAIN, type = ro, optional = yes; + DATA: load = MAIN, type = rw, optional = yes; + BSS: load = MAIN, type = bss, optional = yes, define = yes; +} diff --git a/cfg/mega65.cfg b/cfg/mega65.cfg new file mode 100644 index 000000000..2d78d26d2 --- /dev/null +++ b/cfg/mega65.cfg @@ -0,0 +1,44 @@ +FEATURES { + STARTADDRESS: default = $2001; +} +SYMBOLS { + __LOADADDR__: type = import; + __EXEHDR__: type = import; + __STACKSIZE__: type = weak, value = $0800; # 2k stack + __HIMEM__: type = weak, value = $8000; +} +MEMORY { + ZP: file = "", define = yes, start = $0018, size = $001A; + LOADADDR: file = %O, start = %S - 2, size = $0002; + HEADER: file = %O, define = yes, start = %S, size = $0010; + MAIN: file = %O, define = yes, start = __HEADER_LAST__, size = __HIMEM__ - __HEADER_LAST__; + BSS: file = "", start = __ONCE_RUN__, size = __HIMEM__ - __STACKSIZE__ - __ONCE_RUN__; +} +SEGMENTS { + ZEROPAGE: load = ZP, type = zp; + LOADADDR: load = LOADADDR, type = ro; + EXEHDR: load = HEADER, type = ro; + STARTUP: load = MAIN, type = ro; + LOWCODE: load = MAIN, type = ro, optional = yes; + CODE: load = MAIN, type = ro; + RODATA: load = MAIN, type = ro; + DATA: load = MAIN, type = rw; + INIT: load = MAIN, type = rw; # uninitialized, but reserves output space + ONCE: load = MAIN, type = ro, define = yes; + BSS: load = BSS, type = bss, define = yes; +} +FEATURES { + CONDES: type = constructor, + label = __CONSTRUCTOR_TABLE__, + count = __CONSTRUCTOR_COUNT__, + segment = ONCE; + CONDES: type = destructor, + label = __DESTRUCTOR_TABLE__, + count = __DESTRUCTOR_COUNT__, + segment = RODATA; + CONDES: type = interruptor, + label = __INTERRUPTOR_TABLE__, + count = __INTERRUPTOR_COUNT__, + segment = RODATA, + import = __CALLIRQ__; +} diff --git a/cfg/plus4-hires.cfg b/cfg/plus4-hires.cfg new file mode 100644 index 000000000..0426c8d8c --- /dev/null +++ b/cfg/plus4-hires.cfg @@ -0,0 +1,56 @@ +# Linker configuration that allows for a hi-res bitmap at $C000-$DF3F, but +# puts the stack (and a "HIBSS" segment) in the remaining RAM at $DF40-$FD00. + +FEATURES { + STARTADDRESS: default = $1001; +} +SYMBOLS { + __LOADADDR__: type = import; + __EXEHDR__: type = import; + __STACKSIZE__: type = weak, value = $0800; # 2k stack + __HIMEM__: type = weak, value = $FD00; +} +MEMORY { + # Reserve 8000 bytes at $C000 for 320x200 bitmap + RESERVED: file = "", define = yes, start = $C000, size = 8000; + + ZP: file = "", define = yes, start = $0002, size = $001A; + LOADADDR: file = %O, start = %S - 2, size = $0002; + HEADER: file = %O, define = yes, start = %S, size = $000D; + MAIN: file = %O, define = yes, start = __HEADER_LAST__, size = __RESERVED_START__ - __MAIN_START__; + + # Space between bitmap and top of memory + HIRAM: file = "", define = yes, start = __RESERVED_LAST__, size = __HIMEM__ - __HIRAM_START__ - __STACKSIZE__; +} +SEGMENTS { + ZEROPAGE: load = ZP, type = zp; + LOADADDR: load = LOADADDR, type = ro; + EXEHDR: load = HEADER, type = ro; + STARTUP: load = MAIN, type = ro; + LOWCODE: load = MAIN, type = ro, optional = yes; + CODE: load = MAIN, type = ro; + ONCE: load = MAIN, type = ro, optional = yes; + RODATA: load = MAIN, type = ro; + DATA: load = MAIN, type = rw; + INIT: load = MAIN, type = bss; + BSS: load = MAIN, type = bss, define = yes; + + # Allow data between bitmap and top of memory to be used as a second BSS + # space. Define symbols for it so that it can be supplied to _heapadd(). + HIBSS: load = HIRAM, type = bss, optional = yes, define = yes; +} +FEATURES { + CONDES: type = constructor, + label = __CONSTRUCTOR_TABLE__, + count = __CONSTRUCTOR_COUNT__, + segment = ONCE; + CONDES: type = destructor, + label = __DESTRUCTOR_TABLE__, + count = __DESTRUCTOR_COUNT__, + segment = RODATA; + CONDES: type = interruptor, + label = __INTERRUPTOR_TABLE__, + count = __INTERRUPTOR_COUNT__, + segment = RODATA, + import = __CALLIRQ__; +} diff --git a/doc/Makefile b/doc/Makefile index bfdf0cce3..330f7b31c 100644 --- a/doc/Makefile +++ b/doc/Makefile @@ -1,3 +1,9 @@ +# ---- Display info during parsing phase ---- +SILENT:=$(findstring s,$(word 1, $(MAKEFLAGS))) +ifneq ($(SILENT),s) + $(info Using Makefile: $(realpath $(firstword $(MAKEFILE_LIST))) $(MAKECMDGOALS)) +endif + ifneq ($(shell echo),) CMD_EXE = 1 endif diff --git a/doc/agat.sgml b/doc/agat.sgml new file mode 100644 index 000000000..ca5338c5f --- /dev/null +++ b/doc/agat.sgml @@ -0,0 +1,79 @@ + + +
+Agat-7/9 - specific information for cc65 + +<author><url url="https://sourceforge.net/u/olegodintsov/profile/" name="Oleg A. Odintsov">,<newline> +<url url="mailto:sintechs@gmail.com" name="Konstantin Fedorov"> + +<abstract> +An overview over the Agat-7 and Agat-9 and theirs interfaces to the cc65 C +compiler. +</abstract> + +<!-- Table of contents --> +<toc> + +<!-- Begin the document --> + +<sect>Overview + +<p>The Agat was a series of 8-bit computers produced in the Soviet Union from 1983 to 1993. +It was based on Apple II architecture with all electronic components made in the Soviet Union except for 6502 microprocessors supplied by UMC (UM6502A). +<p>If compared to Apple II, Agat had many improvements such as color text mode, additional graphic modes and flexible memory controller. +Agat-7 had an Apple II compatibility card called "Module 121", while Agat-9 had a built-in Apple II+ mode activated by soft-switch. +<p>All mass-produced Agat models were disk-based systems, 2K ROM contained only basic machine language monitor and disassembler. +Agat-7 had 140K floppy-drive based on Apple DISK II, while Agat-9 was supplied with 840K drive having its own sector format and controller. + +<sect>Binary format<p> + +The standard binary file format generated by the linker for the Agat target is +an AppleSingle file to be compatible with AppleCommander <url url="https://applecommander.github.io/">. +The default load address is $1903. + + + +<sect>Platform-specific header files<p> + +Programs containing Agat-specific code may use the <tt/agat.h/ or +<tt/agat.inc/ include files. + +<sect>Usefull info<p> + +<sect1>Emulation<p> + +<enum> +<item> Oleg Odintsov's Agat Emulator - <url url="https://agatemulator.sourceforge.net/english.html"> +<item> MAME - <url url="https://www.mamedev.org/"> +</enum> + +<sect1>Links<p> +<enum> +<item> Most informative source on Agat (in russian) - <url url="https://agatcomp.ru"> +<item> Wikipedia - <url url="https://en.wikipedia.org/wiki/Agat_(computer)"> +<item> Controversial article on Agat from <url name="BYTE Magazine November 1984 Vol. 9, No. 12" url="https://archive.org/details/byte-magazine-1984-11/page/n135/mode/2up?view=theater">. +The author reviewed custom-build mockup Agat bearing little relation to even the early Agat systems. +</enum> + + +<sect>License<p> + +This software is provided "as-is", without any expressed or implied +warranty. In no event will the authors be held liable for any damages +arising from the use of this software. + +Permission is granted to anyone to use this software for any purpose, +including commercial applications, and to alter it and redistribute it +freely, subject to the following restrictions: +<enum> +<item> The origin of this software must not be misrepresented; you must not + claim that you wrote the original software. If you use this software + in a product, an acknowledgment in the product documentation would be + appreciated, but is not required. +<item> Altered source versions must be plainly marked as such, and must not + be misrepresented as being the original software. +<item> This notice may not be removed or altered from any source + distribution. +</enum> + +</article> diff --git a/doc/apple2.sgml b/doc/apple2.sgml index 9cff996b7..ec9598d04 100644 --- a/doc/apple2.sgml +++ b/doc/apple2.sgml @@ -87,7 +87,7 @@ several useful settings: exit then a plain vanilla ProDOS 8 doesn't make use of the Language Card bank 2 at all. - <tag>LC address: $D000, LC size: $3000</tag> + <tag>LC address: $D000, LC size: $2FFC</tag> For plain vanilla DOS 3.3 which doesn't make use of the Language Card at all. </descrip><p> @@ -361,6 +361,7 @@ usage. <item>rebootafterexit <item>ser_apple2_slot <item>tgi_apple2_mix +<item>videomode </itemize> @@ -406,6 +407,10 @@ The names in the parentheses denote the symbols to be used for static linking of with <tt/-S $4000/ to reserve the first hires page or with <tt/-S $6000/ to reserve both hires pages. + Note that the second hires page is only available if the text display is not in + 80 column mode. This can be asserted by calling <tt/videomode (VIDEOMODE_40COL);/ + before installing the driver. + The function <tt/tgi_apple2_mix()/ allows to activate 4 lines of text. The function doesn't clear the corresponding area at the bottom of the screen. diff --git a/doc/apple2enh.sgml b/doc/apple2enh.sgml index 094ddd93e..1e94d3b60 100644 --- a/doc/apple2enh.sgml +++ b/doc/apple2enh.sgml @@ -88,7 +88,7 @@ several useful settings: exit then a plain vanilla ProDOS 8 doesn't make use of the Language Card bank 2 at all. - <tag>LC address: $D000, LC size: $3000</tag> + <tag>LC address: $D000, LC size: $2FFC</tag> For plain vanilla DOS 3.3 which doesn't make use of the Language Card at all. </descrip><p> diff --git a/doc/atari.sgml b/doc/atari.sgml index 060bc8ad4..1a83d74fb 100644 --- a/doc/atari.sgml +++ b/doc/atari.sgml @@ -1121,7 +1121,7 @@ If BSS and/or the stack shouldn't stay at the end of the program, some parts of the cc65 runtime lib need to be replaced/modified. common/_heap.s defines the location of the heap and atari/crt0.s -defines the location of the stack by initializing sp. +defines the location of the stack by initializing c_sp. <sect1>Upgrading from an older cc65 version<p> diff --git a/doc/ca65.sgml b/doc/ca65.sgml index 80224a84e..b7e8539af 100644 --- a/doc/ca65.sgml +++ b/doc/ca65.sgml @@ -151,8 +151,21 @@ Here is a description of all the command line options: Set the default for the CPU type. The option takes a parameter, which may be one of - - 6502, 6502X, 6502DTV, 65SC02, 65C02, 65816, sweet16, HuC6280, 4510 + <itemize> + <item>6502 - NMOS 6502 (all legal instructions) + <item>6502X - NMOS 6502 with all undocumented instructions + <item>6502DTV - the emulated CPU of the C64DTV device + <item>65SC02 - first CMOS instruction set (no bit manipulation, no wai/stp) + <item>65C02 - CMOS with Rockwell extensions + <item>W65C02 - full CMOS instruction set (has bit manipulation and wai/stp) + <item>65CE02 - CMOS with CSG extensions + <item>4510 - the CPU of the Commodore C65 + <item>45GS02 - the CPU of the Commodore MEGA65 + <item>HuC6280 - the CPU of the PC engine + <item>M740 - a Microcontroller by Mitsubishi + <item>65816 - the CPU of the SNES, and the SCPU + <item>sweet16 - an interpreter for a pseudo 16 bit CPU + </itemize> <label id="option-create-dep"> @@ -302,7 +315,7 @@ Here is a description of all the command line options: character constants into the character set of the target platform. The default for the target system is "none", which means that no translation will take place. The assembler supports the same target systems as the - compiler, see there for a list. + compiler, see <htmlurl url="ca65.html#option-t" name="there for a list">. Depending on the target, the default CPU type is also set. This can be overridden by using the <tt/<ref id="option--cpu" name="--cpu">/ option. @@ -399,7 +412,7 @@ name="--bin-include-dir">/ option on the command line. -<sect>Input format<p> +<sect>Input format<p><label id="input-format"> <sect1>Assembler syntax<p> @@ -426,22 +439,36 @@ Here are some examples for valid input lines: The assembler accepts <itemize> -<item>all valid 6502 mnemonics when in 6502 mode (the default or after the +<item>all valid 6502 mnemonics when in <ref id="6502-mode" name="6502 mode"> + (the default or after the <tt><ref id=".P02" name=".P02"></tt> command was given). -<item>all valid 6502 mnemonics plus a set of illegal instructions when in - <ref id="6502X-mode" name="6502X mode">. -<item>all valid 6502DTV mnemonics when in 6502DTV mode (after the +<item>all valid 6502 mnemonics, plus a set of illegal instructions, when in + <ref id="6502X-mode" name="6502X mode"> (after the + <tt><ref id=".P02X" name=".P02X"></tt> command was given). +<item>all valid 6502DTV mnemonics when in <ref id="DTV-mode" name="DTV mode"> (after the <tt><ref id=".PDTV" name=".PDTV"></tt> command was given). -<item>all valid 65SC02 mnemonics when in 65SC02 mode (after the +<item>all valid 65SC02 mnemonics when in <ref id="65SC02-mode" name="65SC02 mode"> (after the <tt><ref id=".PSC02" name=".PSC02"></tt> command was given). -<item>all valid 65C02 mnemonics when in 65C02 mode (after the +<item>all valid 65C02 mnemonics when in <ref id="65C02-mode" name="65C02 mode"> (after the <tt><ref id=".PC02" name=".PC02"></tt> command was given). -<item>all valid 65816 mnemonics when in 65816 mode (after the - <tt><ref id=".P816" name=".P816"></tt> command was given). -<item>all valid 4510 mnemonics when in 4510 mode (after the +<item>all valid W65C02 mnemonics when in <ref id="W65C02-mode" name="W65C02 mode"> (after the + <tt><ref id=".PWC02" name=".PWC02"></tt> command was given). +<item>all valid 65CE02 mnemonics when in <ref id="65CE02-mode" name="65CE02 mode"> (after the + <tt><ref id=".PCE02" name=".PCE02"></tt> command was given). +<item>all valid 4510 mnemonics when in <ref id="4510-mode" name="4510 mode"> (after the <tt><ref id=".P4510" name=".P4510"></tt> command was given). +<item>all valid 45GS02 mnemonics when in <ref id="45GS02-mode" name="45GS02 mode"> (after the + <tt><ref id=".P45GS02" name=".P45GS02"></tt> command was given). +<item>all valid HuC6280 mnemonics when in <ref id="HUC6280-mode" name="HuC6280 mode"> (after the + <tt><ref id=".P6280" name=".P6280"></tt> command was given). +<item>all valid M740 mnemonics when in <ref id="M740-mode" name="M740 mode"> (after the + <tt><ref id=".PM740" name=".PM740"></tt> command was given). +<item>all valid 65816 mnemonics when in <ref id="65816-mode" name="65816 mode"> (after the + <tt><ref id=".P816" name=".P816"></tt> command was given). </itemize> +for more details on the various CPUs, see <tt><htmlurl url="cpus.html" name="here"></tt>. + On 6502-derived platforms the <tt/BRK/ instruction has an optional signature byte. If omitted, the assembler will only produce only 1 byte. @@ -451,8 +478,138 @@ byte. If omitted, the assembler will only produce only 1 byte. brk #$34 ; 2-bytes: $00 $34 </verb></tscreen> +<sect2>6502 mode<label id="6502-mode"><p> -<sect1>65816 mode<p> +In 6502 mode (which is the default) the assembler accepts all regular "legal" +6502 mnemonics and addressing modes. + +<sect2>6502X mode<label id="6502X-mode"><p> + +6502X mode is an extension to the normal 6502 mode. In this mode, several +mnemonics for undocumented instructions of the NMOS 6502 CPUs are accepted. + +Note: Since these instructions are undocumented, there are no official mnemonics +for them. + +<itemize> +<item><tt>ALR: A:=(A and #{imm})/2;</tt> +<item><tt>ANC: A:= A and #{imm};</tt> Generates opcode $0B. +<item><tt>ANE: A:= (A or CONST) and X and #{imm};</tt> +<item><tt>ARR: A:=(A and #{imm})/2;</tt> +<item><tt>AXS: X:=A and X-#{imm};</tt> +<item><tt>DCP: {addr}:={addr}-1; A-{addr};</tt> +<item><tt>ISC: {addr}:={addr}+1; A:=A-{addr};</tt> +<item><tt>JAM:</tt> +<item><tt>LAS: A,X,S:={addr} and S;</tt> +<item><tt>LAX: A,X:={addr};</tt> +<item><tt>NOP: #{imm}; zp; zp,x; abs; abs,x</tt> +<item><tt>RLA: {addr}:={addr}rol; A:=A and {addr};</tt> +<item><tt>RRA: {addr}:={addr}ror; A:=A adc {addr};</tt> +<item><tt>SAX: {addr}:=A and X;</tt> +<item><tt>SHA: {addr}:=A and X and {addr hi +1};</tt> +<item><tt>SHX: {addr}:=X and {addr hi +1};</tt> +<item><tt>SHY: {addr}:=Y and {addr hi +1};</tt> +<item><tt>SLO: {addr}:={addr}*2; A:=A or {addr};</tt> +<item><tt>SRE: {addr}:={addr}/2; A:=A xor {addr};</tt> +<item><tt>TAS: {addr}:=A and X and {addr hi +1}; SP:=A and X;</tt> +</itemize> + + +<sect2>DTV mode<label id="DTV-mode"><p> + +The C64DTV CPU is based on the 6510, but adds some instructions, and does not +support all undocumented instructions. + +<itemize> +<item><tt>bra {rel}</tt> Generates opcode $12. +<item><tt>sac #{imm}</tt> Generates opcode $32. +<item><tt>sir #{imm}</tt> Generates opcode $42. +</itemize> + +Supported undocumented instructions: + +<itemize> +<item><tt>ALR: A:=(A and #{imm})/2;</tt> +<item><tt>ANC: A:=A and #{imm};</tt> Generates opcode $0B. +<item><tt>ARR: A:=(A and #{imm})/2;</tt> +<item><tt>AXS: X:=A and X-#{imm};</tt> +<item><tt>LAS: A,X,S:={addr} and S;</tt> +<item><tt>LAX: A,X:={addr};</tt> +<item><tt>NOP: #{imm}; zp; zp,x; abs; abs,x</tt> +<item><tt>RLA: {addr}:={addr}rol; A:=A and {addr};</tt> +<item><tt>RRA: {addr}:={addr}ror; A:=A adc {addr};</tt> +<item><tt>SHX: {addr}:=X and {addr hi +1};</tt> +<item><tt>SHY: {addr}:=y and {addr hi +1};</tt> +</itemize> + + +<sect2>65SC02 mode<label id="65SC02-mode"><p> + +65SC02 mode supports all regular 6502 instructions, plus the original CMOS +instructions. + + +<sect2>65C02 mode (CMOS with Rockwell extensions)<label id="65C02-mode"><p> + +65C02 mode supports all original CMOS instructions, plus the Rockwell (bit +manipulation instructions) extensions. + + +<sect2>W65C02 mode (CMOS with WDC extensions)<label id="W65C02-mode"><p> + +W65C02 mode supports the Rockwell extensions, plus wai and stp. + + +<sect2>65CE02 mode<label id="65CE02-mode"><p> + +All 65CE02 instructions are accepted, plus the Rockwell extensions. + + +<sect2>4510 mode<label id="4510-mode"><p> + +The 4510 is a microcontroller that is the core of the Commodore C65 aka C64DX. +It contains among other functions a slightly modified 65CE02/4502 CPU, to allow +address mapping for 20 bits of address space (1 megabyte addressable area). + +As compared to the description of the CPU in the +<url url="http://www.zimmers.net/anonftp/pub/cbm/c65/c65manualupdated.txt.gz" +name="C65 System Specification"> +<url url="https://raw.githubusercontent.com/MEGA65/c65-specifications/master/c65manualupdated.txt" +name="(updated version)"> uses these changes: +<itemize> +<item><tt>LDA (d,SP),Y</tt> may also be written as <tt>LDA (d,S),Y</tt> +(matching the 65816 notation). +<item>All branch instruction allow now 16 bit offsets. To use a 16 bit +branch you have to prefix these with an "L" (e.g. "<tt>LBNE</tt>" instead of +"<tt>BNE</tt>"). This might change at a later implementation of the assembler. +</itemize> + +For more information about the Commodore C65/C64DX and the 4510 CPU, see +<url url="http://www.zimmers.net/anonftp/pub/cbm/c65/"> and +<url url="https://en.wikipedia.org/wiki/Commodore_65" name="Wikipedia">. + +<sect2>45GS02 mode<label id="45GS02-mode"><p> + +The 45GS02 is a microcontroller that is the core of the MEGA65. +It is an extension of the 4510 CPU and adds 32-bit addressing and a 32-bit +pseudo register Q that is comprised of the four registers A, X, Y, and Z. + +<sect2>HUC6280 mode (CMOS with Hudson extensions)<label id="HUC6280-mode"><p> + +The HUC6280 is a superset of 65C02, used in the PC Engine. + + +<sect2>M740 mode<label id="M740-mode"><p> + +The M740 is a microcontroller by Mitsubishi, which was marketed for embedded +devices in the mid 80s. It is a superset of 6502, and a subset of 65SC02, plus +some new instructions. + +For more information about the M740 Controllers, see +<url url="https://en.wikipedia.org/wiki/Mitsubishi_740" name="Wikipedia">. + + +<sect2>65816 mode<label id="65816-mode"><p><p> In 65816 mode, several aliases are accepted, in addition to the official mnemonics: @@ -479,57 +636,15 @@ or two far addresses whose high byte will be used. mvp $123456, $789ABC ; bank $12 to $78 </verb></tscreen> - -<sect1>6502X mode<label id="6502X-mode"><p> - -6502X mode is an extension to the normal 6502 mode. In this mode, several -mnemonics for illegal instructions of the NMOS 6502 CPUs are accepted. Since -these instructions are illegal, there are no official mnemonics for them. The -unofficial ones are taken from <url -url="http://www.oxyron.de/html/opcodes02.html">. Please note that only the -ones marked as "stable" are supported. The following table uses information -from the mentioned web page, for more information, see there. - -<itemize> -<item><tt>ALR: A:=(A and #{imm})/2;</tt> -<item><tt>ANC: A:=A and #{imm};</tt> Generates opcode $0B. -<item><tt>ARR: A:=(A and #{imm})/2;</tt> -<item><tt>AXS: X:=A and X-#{imm};</tt> -<item><tt>DCP: {adr}:={adr}-1; A-{adr};</tt> -<item><tt>ISC: {adr}:={adr}+1; A:=A-{adr};</tt> -<item><tt>LAS: A,X,S:={adr} and S;</tt> -<item><tt>LAX: A,X:={adr};</tt> -<item><tt>RLA: {adr}:={adr}rol; A:=A and {adr};</tt> -<item><tt>RRA: {adr}:={adr}ror; A:=A adc {adr};</tt> -<item><tt>SAX: {adr}:=A and X;</tt> -<item><tt>SLO: {adr}:={adr}*2; A:=A or {adr};</tt> -<item><tt>SRE: {adr}:={adr}/2; A:=A xor {adr};</tt> -</itemize> +also see <ref id="long_jsr_jmp_rts" name="long_jsr_jmp_rts"> + <ref id=".SMART" name=".SMART"> + <ref id=".A8" name=".A8"> + <ref id=".A16" name=".A16"> + <ref id=".I8" name=".I8"> + <ref id=".I16" name=".I16"> -<sect1>4510 mode<p> - -The 4510 is a microcontroller that is the core of the Commodore C65 aka C64DX. -It contains among other functions a slightly modified 65CE02/4502 CPU, to allow -address mapping for 20 bits of address space (1 megabyte addressable area). -As compared to the description of the CPU in the -<url url="http://www.zimmers.net/anonftp/pub/cbm/c65/c65manualupdated.txt.gz" -name="C65 System Specification"> -<url url="https://raw.githubusercontent.com/MEGA65/c65-specifications/master/c65manualupdated.txt" -name="(updated version)"> uses these changes: -<itemize> -<item><tt>LDA (d,SP),Y</tt> may also be written as <tt>LDA (d,S),Y</tt> -(matching the 65816 notataion). -<item>All branch instruction allow now 16 bit offsets. To use a 16 bit -branch you have to prefix these with an "L" (e.g. "<tt>LBNE</tt>" instead of -"<tt>BNE</tt>"). This might change at a later implementation of the assembler. -</itemize> -For more information about the Commodore C65/C64DX and the 4510 CPU, see -<url url="http://www.zimmers.net/anonftp/pub/cbm/c65/"> and -<url url="https://en.wikipedia.org/wiki/Commodore_65" name="Wikipedia">. - - -<sect1>sweet16 mode<label id="sweet16-mode"><p> +<sect2>sweet16 mode<label id="sweet16-mode"><p> SWEET 16 is an interpreter for a pseudo 16 bit CPU written by Steve Wozniak for the Apple ][ machines. It is available in the Apple ][ ROM. ca65 can @@ -3234,12 +3349,30 @@ See: <tt><ref id=".ASCIIZ" name=".ASCIIZ"></tt>,<tt><ref id=".CHARMAP" name=".CH (see <tt><ref id=".P02" name=".P02"></tt> command). +<sect1><tt>.IFP02X</tt><label id=".IFP02X"><p> + + Conditional assembly: Check if the assembler is currently in 6502X mode + (see <tt><ref id=".P02X" name=".P02X"></tt> command). + + <sect1><tt>.IFP4510</tt><label id=".IFP4510"><p> Conditional assembly: Check if the assembler is currently in 4510 mode (see <tt><ref id=".P4510" name=".P4510"></tt> command). +<sect1><tt>.IFP45GS02</tt><label id=".IFP45GS02"><p> + + Conditional assembly: Check if the assembler is currently in 45GS02 mode + (see <tt><ref id=".P45GS02" name=".P45GS02"></tt> command). + + +<sect1><tt>.IFP6280</tt><label id=".IFP816"><p> + + Conditional assembly: Check if the assembler is currently in HuC6280 mode + (see <tt><ref id=".P6280" name=".P6280"></tt> command). + + <sect1><tt>.IFP816</tt><label id=".IFP816"><p> Conditional assembly: Check if the assembler is currently in 65816 mode @@ -3252,18 +3385,36 @@ See: <tt><ref id=".ASCIIZ" name=".ASCIIZ"></tt>,<tt><ref id=".CHARMAP" name=".CH (see <tt><ref id=".PC02" name=".PC02"></tt> command). +<sect1><tt>.IFPCE02</tt><label id=".IFPCE02"><p> + + Conditional assembly: Check if the assembler is currently in 65CE02 mode + (see <tt><ref id=".PCE02" name=".PCE02"></tt> command). + + <sect1><tt>.IFPDTV</tt><label id=".IFPDTV"><p> Conditional assembly: Check if the assembler is currently in 6502DTV mode (see <tt><ref id=".PDTV" name=".PDTV"></tt> command). +<sect1><tt>.IFPM740</tt><label id=".IFPM740"><p> + + Conditional assembly: Check if the assembler is currently in M740 mode + (see <tt><ref id=".PM740" name=".PM740"></tt> command). + + <sect1><tt>.IFPSC02</tt><label id=".IFPSC02"><p> Conditional assembly: Check if the assembler is currently in 65SC02 mode (see <tt><ref id=".PSC02" name=".PSC02"></tt> command). +<sect1><tt>.IFPSWEET16</tt><label id=".IFPSWEET16"><p> + + Conditional assembly: Check if the assembler is currently in Sweet16 mode + (see <tt><ref id=".PSWEET16" name=".PSWEET16"></tt> command). + + <sect1><tt>.IFREF</tt><label id=".IFREF"><p> Conditional assembly: Check if a symbol is referenced. Must be followed @@ -3287,6 +3438,12 @@ See: <tt><ref id=".ASCIIZ" name=".ASCIIZ"></tt>,<tt><ref id=".CHARMAP" name=".CH <tt><ref id=".REFERTO" name=".REFERTO"></tt> +<sect1><tt>.IFPWC02</tt><label id=".IFPWC02"><p> + + Conditional assembly: Check if the assembler is currently in 65WC02 mode + (see <tt><ref id=".PWC02" name=".PWC02"></tt> command). + + <sect1><tt>.IMPORT</tt><label id=".IMPORT"><p> Import a symbol from another module. The command is followed by a comma @@ -3616,6 +3773,17 @@ See: <tt><ref id=".ASCIIZ" name=".ASCIIZ"></tt>,<tt><ref id=".BYTE" name=".BYTE" instructions. This is the default if not overridden by the <tt><ref id="option--cpu" name="--cpu"></tt> command line option. + See: <tt><ref id=".PC02" name=".PC02"></tt>, <tt><ref id=".PSC02" + name=".PSC02"></tt>, <tt><ref id=".P816" name=".P816"></tt>, + <tt><ref id=".P4510" name=".P4510"></tt>, and + <tt><ref id=".P45GS02" name=".P45GS02"></tt> + + +<sect1><tt>.P02X</tt><label id=".P02X"><p> + + Enable the 6502X instruction set, disable 65SC02, 65C02 and 65816 + instructions. + See: <tt><ref id=".PC02" name=".PC02"></tt>, <tt><ref id=".PSC02" name=".PSC02"></tt>, <tt><ref id=".P816" name=".P816"></tt> and <tt><ref id=".P4510" name=".P4510"></tt> @@ -3627,8 +3795,31 @@ See: <tt><ref id=".ASCIIZ" name=".ASCIIZ"></tt>,<tt><ref id=".BYTE" name=".BYTE" 6502 instruction sets. See: <tt><ref id=".P02" name=".P02"></tt>, <tt><ref id=".PSC02" - name=".PSC02"></tt>, <tt><ref id=".PC02" name=".PC02"></tt> and - <tt><ref id=".P816" name=".P816"></tt> + name=".PSC02"></tt>, <tt><ref id=".PC02" name=".PC02"></tt>, + <tt><ref id=".P816" name=".P816"></tt>, and + <tt><ref id=".P45GS02" name=".P45GS02"></tt> + + +<sect1><tt>.P45GS02</tt><label id=".P45GS02"><p> + + Enable the 45GS02 instruction set. This is a superset of the 4510, 65C02, and + 6502 instruction sets. + + See: <tt><ref id=".P02" name=".P02"></tt>, <tt><ref id=".PSC02" + name=".PSC02"></tt>, <tt><ref id=".PC02" name=".PC02"></tt>, + <tt><ref id=".P816" name=".P816"></tt>, and + <tt><ref id=".P4510" name=".P4510"></tt> + + +<sect1><tt>.P6280</tt><label id=".P6280"><p> + + Enable the HuC6280 instruction set. This is a superset of the 65C02 and + 6502 instruction sets. + + See: <tt><ref id=".P02" name=".P02"></tt>, <tt><ref id=".PSC02" + name=".PSC02"></tt>, <tt><ref id=".PC02" name=".PC02"></tt>, + <tt><ref id=".P4510" name=".P4510"></tt>, and + <tt><ref id=".P45GS02" name=".P45GS02"></tt> <sect1><tt>.P816</tt><label id=".P816"><p> @@ -3637,8 +3828,9 @@ See: <tt><ref id=".ASCIIZ" name=".ASCIIZ"></tt>,<tt><ref id=".BYTE" name=".BYTE" 6502 instruction sets. See: <tt><ref id=".P02" name=".P02"></tt>, <tt><ref id=".PSC02" - name=".PSC02"></tt>, <tt><ref id=".PC02" name=".PC02"></tt> and - <tt><ref id=".P4510" name=".P4510"></tt> + name=".PSC02"></tt>, <tt><ref id=".PC02" name=".PC02"></tt>, + <tt><ref id=".P4510" name=".P4510"></tt>, and + <tt><ref id=".P45GS02" name=".P45GS02"></tt> <sect1><tt>.PAGELEN, .PAGELENGTH</tt><label id=".PAGELENGTH"><p> @@ -3666,8 +3858,19 @@ See: <tt><ref id=".ASCIIZ" name=".ASCIIZ"></tt>,<tt><ref id=".BYTE" name=".BYTE" 6502 and 65SC02 instructions. See: <tt><ref id=".P02" name=".P02"></tt>, <tt><ref id=".PSC02" - name=".PSC02"></tt>, <tt><ref id=".P816" name=".P816"></tt> and - <tt><ref id=".P4510" name=".P4510"></tt> + name=".PSC02"></tt>, <tt><ref id=".P816" name=".P816"></tt>, + <tt><ref id=".P4510" name=".P4510"></tt>, and + <tt><ref id=".P45GS02" name=".P45GS02"></tt> + +<sect1><tt>.PCE02</tt><label id=".PCE02"><p> + + Enable the 65CE02 instructions set. This instruction set includes all + 6502 and extended 65CE02 instructions. + + See: <tt><ref id=".P02" name=".P02"></tt>, <tt><ref id=".PSC02" + name=".PSC02"></tt>, <tt><ref id=".P816" name=".P816"></tt>, + <tt><ref id=".P4510" name=".P4510"></tt>, and + <tt><ref id=".P45GS02" name=".P45GS02"></tt> <sect1><tt>.PDTV</tt><label id=".PDTV"><p> @@ -3678,6 +3881,14 @@ See: <tt><ref id=".ASCIIZ" name=".ASCIIZ"></tt>,<tt><ref id=".BYTE" name=".BYTE" See: <tt><ref id=".P02" name=".P02"></tt> +<sect1><tt>.PM740</tt><label id=".PM740"><p> + + Enable the M740 instruction set. This is a superset of the 6502 + instruction set. + + See: <tt><ref id=".P02" name=".P02"></tt> + + <sect1><tt>.POPCHARMAP</tt><label id=".POPCHARMAP"><p> Pop the last character mapping from the stack, and activate it. @@ -3763,8 +3974,19 @@ See: <tt><ref id=".ASCIIZ" name=".ASCIIZ"></tt>,<tt><ref id=".BYTE" name=".BYTE" 6502 instructions. See: <tt><ref id=".P02" name=".P02"></tt>, <tt><ref id=".PC02" - name=".PC02"></tt>, <tt><ref id=".P816" name=".P816"></tt> and - <tt><ref id=".P4510" name=".P4510"></tt> + name=".PC02"></tt>, <tt><ref id=".P816" name=".P816"></tt>, + <tt><ref id=".P4510" name=".P4510"></tt>, and + <tt><ref id=".P45GS02" name=".P45GS02"></tt> + + +<sect1><tt>.PSWEET16</tt><label id=".PSWEET16"><p> + + Enable the Sweet16 instructions set. + + See: <tt><ref id=".P02" name=".P02"></tt>, <tt><ref id=".PC02" + name=".PC02"></tt>, <tt><ref id=".P816" name=".P816"></tt>, + <tt><ref id=".P4510" name=".P4510"></tt>, and + <tt><ref id=".P45GS02" name=".P45GS02"></tt> <sect1><tt>.PUSHCHARMAP</tt><label id=".PUSHCHARMAP"><p> @@ -3815,6 +4037,17 @@ See: <tt><ref id=".ASCIIZ" name=".ASCIIZ"></tt>,<tt><ref id=".BYTE" name=".BYTE" See: <tt><ref id=".POPSEG" name=".POPSEG"></tt> +<sect1><tt>.PWC02</tt><label id=".PWC02"><p> + + Enable the W65C02 instructions set. This instruction set includes all + 6502, 65SC02, 65C02 and two extra instructions (wai and stp) + + See: <tt><ref id=".P02" name=".P02"></tt>, <tt><ref id=".PSC02" + name=".PSC02"></tt>, <tt><ref id=".P816" name=".P816"></tt>, + <tt><ref id=".P4510" name=".P4510"></tt>, and + <tt><ref id=".P45GS02" name=".P45GS02"></tt> + + <sect1><tt>.REFERTO, .REFTO</tt><label id=".REFERTO"><p> Mark a symbol as referenced. @@ -4012,18 +4245,23 @@ See: <tt><ref id=".ASCIIZ" name=".ASCIIZ"></tt>,<tt><ref id=".BYTE" name=".BYTE" Switch the CPU instruction set. The command is followed by a string that specifies the CPU. Possible values are those that can also be supplied to the <tt><ref id="option--cpu" name="--cpu"></tt> command line option, - namely: 6502, 6502X, 6502DTV, 65SC02, 65C02, 65816, 4510 and HuC6280. + namely: 6502, 6502X, 6502DTV, 65SC02, 65C02, 65816, 4510, 45GS02, HuC6280 and m740. See: <tt><ref id=".CPU" name=".CPU"></tt>, <tt><ref id=".IFP02" name=".IFP02"></tt>, + <tt><ref id=".IFP02X" name=".IFP02X"></tt>, <tt><ref id=".IFPDTV" name=".IFPDTV"></tt>, <tt><ref id=".IFP816" name=".IFP816"></tt>, <tt><ref id=".IFPC02" name=".IFPC02"></tt>, + <tt><ref id=".IFPM740" name=".IFPM740"></tt>, <tt><ref id=".IFPSC02" name=".IFPSC02"></tt>, <tt><ref id=".P02" name=".P02"></tt>, + <tt><ref id=".P02X" name=".P02X"></tt>, <tt><ref id=".P816" name=".P816"></tt>, <tt><ref id=".P4510" name=".P4510"></tt>, + <tt><ref id=".P45GS02" name=".P45GS02"></tt>, <tt><ref id=".PC02" name=".PC02"></tt>, + <tt><ref id=".PM740" name=".PM740"></tt>, <tt><ref id=".PSC02" name=".PSC02"></tt> @@ -4761,7 +4999,9 @@ each supported CPU a constant similar to CPU_SWEET16 CPU_HUC6280 CPU_4510 + CPU_45GS02 CPU_6502DTV + CPU_M740 </verb></tscreen> is defined. These constants may be used to determine the exact type of the @@ -4776,7 +5016,9 @@ another constant is defined: CPU_ISET_SWEET16 CPU_ISET_HUC6280 CPU_ISET_4510 + CPU_ISET_45GS02 CPU_ISET_6502DTV + CPU_ISET_M740 </verb></tscreen> The value read from the <tt/<ref id=".CPU" name=".CPU">/ pseudo variable may @@ -4788,22 +5030,23 @@ bit. Using <tscreen><verb> .if (.cpu .bitand CPU_ISET_65SC02) - lda (sp) + lda (c_sp) .else ldy #$00 - lda (sp),y + lda (c_sp),y .endif </verb></tscreen> it is possible to determine if the <tscreen><verb> - lda (sp) + lda (c_sp) </verb></tscreen> instruction is supported, which is the case for the 65SC02, 65C02 and 65816 CPUs (the latter two are upwards compatible to the 65SC02). +see section <ref id="6502-mode" name="6502 format"> and following. <sect1><tt>.MACPACK module</tt><p> diff --git a/doc/cc65-intern.sgml b/doc/cc65-intern.sgml index 904cee070..9c59cd79a 100644 --- a/doc/cc65-intern.sgml +++ b/doc/cc65-intern.sgml @@ -131,7 +131,7 @@ All other parameters will be pushed to the C-stack from left to right. The rightmost parameter will have the lowest address on the stack, and multi-byte parameters will have their least significant byte at the lower address. -The <tt/sp/ pseudo-register is a zeropage pointer to the base of the C-stack. +The <tt/c_sp/ pseudo-register is a zeropage pointer to the base of the C-stack. If the function is variadic, the <tt/Y/ register will contain the number of bytes pushed to the stack for this function. @@ -153,10 +153,10 @@ void cdecl foo(unsigned bar, unsigned char baz); ; Example code for accessing bar. The variable is in A/X after this code snippet: ; ldy #2 ; Offset of high byte of bar - lda (sp),y ; High byte now in A + lda (c_sp),y ; High byte now in A tax ; High byte now in X dey ; Offset of low byte of bar - lda (sp),y ; Low byte now in A + lda (c_sp),y ; Low byte now in A </verb></tscreen> <sect1>Epilogue, after the function call<p> @@ -175,12 +175,12 @@ used if the return type is 32-bit. If the function has a void return type, the compiler will not depend on the result of <tt>A/X/sreg</tt>, so these may be clobbered by the function. -The C-stack pointer <tt/sp/ must be restored by the function to its value before the +The C-stack pointer <tt/c_sp/ must be restored by the function to its value before the function call prologue. It may pop all of its parameters from the C-stack (e.g. using the <tt/runtime/ function <tt/popa/), -or it could adjust <tt/sp/ directly. +or it could adjust <tt/c_sp/ directly. If the function is variadic, the <tt/Y/ register contains the number of bytes -pushed to the stack on entry, which may be added to <tt/sp/ to restore its +pushed to the stack on entry, which may be added to <tt/c_sp/ to restore its original state. The internal pseudo-register <tt/regbank/ must not be changed by the function. diff --git a/doc/cc65.sgml b/doc/cc65.sgml index 6793603d5..734e4eaf4 100644 --- a/doc/cc65.sgml +++ b/doc/cc65.sgml @@ -63,6 +63,8 @@ Short options: -V Print the compiler version number -W [-+]warning[,...] Control warnings ('-' disables, '+' enables) -d Debug mode + -dM Output all user macros (needs -E) + -dP Output all predefined macros (needs -E) -g Add debug info to object file -h Help (this text) -j Default characters are signed @@ -199,6 +201,28 @@ Here is a description of all the command line options: Enables debug mode, for debugging the behavior of cc65. + + <label id="option-dM"> + <tag><tt>-dM</tt></tag> + + When used with -E, will output <tt>#define</tt> directives for all the user + macros defined during execution of the preprocessor. This does not include + macros defined by the compiler. + + Note: Can be combined with <tt/<ref id="option-dP" name="-dP">/ by using + <tt/-dMP/. + + + <label id="option-dP"> + <tag><tt>-dP</tt></tag> + + When used with -E, will output <tt>#define</tt> directives for all the macros + defined by the compiler itself. This does not include any user defined macros. + + Note: Can be combined with <tt/<ref id="option-dM" name="-dM">/ by using + <tt/-dMP/. + + <tag><tt>--debug-tables name</tt></tag> Writes symbol table information to a file, which includes details on structs, unions @@ -586,27 +610,42 @@ Here is a description of all the command line options: <itemize> <item>none + <item>agat (a russian apple2 like computer) <item>apple2 <item>apple2enh <item>atari + <item>atari2600 + <item>atari5200 + <item>atari7800 <item>atarixl <item>atmos + <item>bbc <item>c16 (works also for the c116 with memory up to 32K) <item>c64 + <item>c65 <item>c128 <item>cbm510 (CBM-II series with 40 column video) <item>cbm610 (all CBM-II II computers with 80 column video) + <item>creativision + <item>cx16 + <item>gamate <item>geos-apple <item>geos-cbm + <item>geos (alias for geos-cbm) + <item>kim1 <item>lunix <item>lynx + <item>mega65 <item>nes <item>osic1p + <item>pce (PC engine) <item>pet (all CBM PET systems except the 2001) <item>plus4 + <item>p6502 <item>sim6502 <item>sim65c02 <item>supervision + <item>sym1 <item>telestrat <item>vic20 </itemize> @@ -1154,6 +1193,134 @@ The compiler defines several macros at startup: <item><tt/__CC65_STD_CC65__/ </itemize> + <label id="macro-CPU"> + <tag><tt>__CPU__</tt></tag> + + This macro contains a bitset that allows to check if a specific instruction + set is supported. For example, the 65C02 CPU supports all instructions of the + 65SC02. So testing for the instruction set of the 65SC02 using the following + check will succeed for both CPUs (and also for the 65816 and HUC6280). + + <tscreen><verb> + #if (__CPU__ & __CPU_ISET_65SC02__) + </verb></tscreen> + + This is much simpler and more future proof than checking for specific CPUs. + + The compiler defines a set of constants named <tt/__CPU_ISET_xxx/ to do the + checks. The <tt/__CPU__/ variable is usually derived from the target system + given, but can be changed using the <tt/<ref id="option--cpu" name="--cpu">/ + command line option. + + <tag><tt>__CPU_4510__</tt></tag> + + This macro is defined if the code is compiled for a 4510 CPU. + + <tag><tt>__CPU_45GS02__</tt></tag> + + This macro is defined if the code is compiled for a 45GS02 CPU. + + <tag><tt>__CPU_6502__</tt></tag> + + This macro is defined if the code is compiled for a 6502 CPU. + + <tag><tt>__CPU_6502X__</tt></tag> + + This macro is defined if the code is compiled for a 6502 CPU with invalid + opcodes. + + <tag><tt>__CPU_6502DTV__</tt></tag> + + This macro is defined if the code is compiled for a DTV CPU. + + <tag><tt>__CPU_65SC02__</tt></tag> + + This macro is defined if the code is compiled for a 65SC02 CPU. + + <tag><tt>__CPU_65C02__</tt></tag> + + This macro is defined if the code is compiled for a 65C02 CPU. + + <tag><tt>__CPU_65CE02__</tt></tag> + + This macro is defined if the code is compiled for a 65CE02 CPU. + + <tag><tt>__CPU_65816__</tt></tag> + + This macro is defined if the code is compiled for a 65816 CPU. + + <tag><tt>__CPU_HUC6280__</tt></tag> + + This macro is defined if the code is compiled for a HUC6280 CPU. + + <tag><tt>__CPU_M740__</tt></tag> + + This macro is defined if the code is compiled for a M740 CPU. + + <tag><tt>__CPU_W65C02__</tt></tag> + + This macro is defined if the code is compiled for a W65C02 CPU. + + <tag><tt>__CPU_ISET_6502__</tt></tag> + + This macro expands to a numeric constant that can be used to check the + <tt/<ref id="macro-CPU" name="__CPU__">/ macro for the instruction set + of the 6502 CPU. + + <tag><tt>__CPU_ISET_6502X__</tt></tag> + + This macro expands to a numeric constant that can be used to check the + <tt/<ref id="macro-CPU" name="__CPU__">/ macro for the instruction set + of the 6502X CPU. + + <tag><tt>__CPU_ISET_6502DTV__</tt></tag> + + This macro expands to a numeric constant that can be used to check the + <tt/<ref id="macro-CPU" name="__CPU__">/ macro for the instruction set + of the 6502DTV CPU. + + <tag><tt>__CPU_ISET_65SC02__</tt></tag> + + This macro expands to a numeric constant that can be used to check the + <tt/<ref id="macro-CPU" name="__CPU__">/ macro for the instruction set + of the 65SC02 CPU. + + <tag><tt>__CPU_ISET_65C02__</tt></tag> + + This macro expands to a numeric constant that can be used to check the + <tt/<ref id="macro-CPU" name="__CPU__">/ macro for the instruction set + of the 65C02 CPU. + + <tag><tt>__CPU_ISET_65CE02__</tt></tag> + + This macro expands to a numeric constant that can be used to check the + <tt/<ref id="macro-CPU" name="__CPU__">/ macro for the instruction set + of the 65CE02 CPU. + + <tag><tt>__CPU_ISET_65816__</tt></tag> + + This macro expands to a numeric constant that can be used to check the + <tt/<ref id="macro-CPU" name="__CPU__">/ macro for the instruction set + of the 65816 CPU. + + <tag><tt>__CPU_ISET_HUC6280__</tt></tag> + + This macro expands to a numeric constant that can be used to check the + <tt/<ref id="macro-CPU" name="__CPU__">/ macro for the instruction set + of the HUC6280 CPU. + + <tag><tt>__CPU_ISET_M740__</tt></tag> + + This macro expands to a numeric constant that can be used to check the + <tt/<ref id="macro-CPU" name="__CPU__">/ macro for the instruction set + of the M740 CPU. + + <tag><tt>__CPU_ISET_W65C02__</tt></tag> + + This macro expands to a numeric constant that can be used to check the + <tt/<ref id="macro-CPU" name="__CPU__">/ macro for the instruction set + of the W65C02 CPU. + <tag><tt>__CX16__</tt></tag> This macro is defined if the target is the Commander X16 (-t cx16). diff --git a/doc/cpus.sgml b/doc/cpus.sgml new file mode 100644 index 000000000..60230408f --- /dev/null +++ b/doc/cpus.sgml @@ -0,0 +1,1082 @@ +<!doctype linuxdoc system> + +<article> +<title>ca65/da65 Users Guide +<author><url url="mailto:uz@cc65.org" name="Ullrich von Bassewitz">,<newline> +<url url="mailto:groepaz@gmx.net" name="Groepaz"> + +<abstract> +An Overview on all supported CPUs +</abstract> + +<!-- Table of contents --> +<toc> + +<!-- Begin the document --> + +<sect>Overview<p> + + <itemize> + <item><ref id="6502-mode" name="6502"> - NMOS 6502 (all legal instructions) + <item><ref id="6502X-mode" name="6502X"> - NMOS 6502 with all undocumented instructions + <item><ref id="DTV-mode" name="6502DTV"> - the CPU of the C64 DTV device + <item><ref id="65SC02-mode" name="65SC02"> - original CMOS + <item><ref id="65C02-mode" name="65C02"> - CMOS with Rockwell extensions + <item><ref id="65CE02-mode" name="65CE02"> - CMOS with CSG extensions + <item><ref id="W65C02-mode" name="W65C02"> - CMOS with WDC extensions + <item><ref id="4510-mode" name="4510"> - the CPU of the Commodore C65 + <item><ref id="45GS02-mode" name="45GS02"> - the CPU of the Commodore MEGA65 + <item><ref id="HUC6280-mode" name="HuC6280"> - the CPU of the PC engine + <item><ref id="M740-mode" name="M740"> - a Microcontroller by Mitsubishi + <item><ref id="65816-mode" name="65816"> - the CPU of the SNES, and the SCPU + <item><ref id="sweet16-mode" name="Sweet16"> - an interpreter for a pseudo 16 bit CPU + </itemize> + +<sect>NMOS branch<p> + +<sect1>6502<label id="6502-mode"><p> + +The original NMOS 6502 CPU. + +For Example: MOS MCS6502 Rev. D, Rockwell R6502, Synertek SY6502, UMC UM6502 + +(56 instructions, 151 opcodes) + +<tscreen><verb> +$00 brk +$01 ora (zp,x) +$05 ora zp +$06 asl zp +$08 php +$09 ora #imm +$0a asl a +$0d ora addr +$0e asl addr +$10 bpl rel80 +$11 ora (zp),y +$15 ora zp,x +$16 asl zp,x +$18 clc +$19 ora addr,y +$1d ora addr,x +$1e asl addr,x +$20 jsr addr +$21 and (zp,x) +$24 bit zp +$25 and zp +$26 rol zp +$28 plp +$29 and #imm +$2a rol a +$2c bit addr +$2d and addr +$2e rol addr +$30 bmi rel8 +$31 and (zp),y +$35 and zp,x +$36 rol zp,x +$38 sec +$39 and addr,y +$3d and addr,x +$3e rol addr,x +$40 rti +$41 eor (zp,x) +$45 eor zp +$46 lsr zp +$48 pha +$49 eor #imm +$4a lsr a +$4c jmp addr +$4d eor addr +$4e lsr addr +$50 bvc rel8 +$51 eor (zp),y +$55 eor zp,x +$56 lsr zp,x +$58 cli +$59 eor addr,y +$5d eor addr,x +$5e lsr addr,x +$60 rts +$61 adc (zp,x) +$65 adc zp +$66 ror zp +$68 pla +$69 adc #imm +$6a ror a +$6c jmp (addr) +$6d adc addr +$6e ror addr +$70 bvs rel8 +$71 adc (zp),y +$75 adc zp,x +$76 ror zp,x +$78 sei +$79 adc addr,y +$7d adc addr,x +$7e ror addr,x +$81 sta (zp,x) +$84 sty zp +$85 sta zp +$86 stx zp +$88 dey +$8a txa +$8c sty addr +$8d sta addr +$8e stx addr +$90 bcc rel8 +$91 sta (zp),y +$94 sty zp,x +$95 sta zp,x +$96 stx zp,y +$98 tya +$99 sta addr,y +$9a txs +$9d sta addr,x +$a0 ldy #imm +$a1 lda (zp,x) +$a2 ldx #imm +$a4 ldy zp +$a5 lda zp +$a6 ldx zp +$a8 tay +$a9 lda #imm +$aa tax +$ac ldy addr +$ad lda addr +$ae ldx addr +$b0 bcs rel8 +$b1 lda (zp),y +$b4 ldy zp,x +$b5 lda zp,x +$b6 ldx zp,y +$b8 clv +$b9 lda addr,y +$ba tsx +$bc ldy addr,x +$bd lda addr,x +$be ldx addr,y +$c0 cpy #imm +$c1 cmp (zp,x) +$c4 cpy zp +$c5 cmp zp +$c6 dec zp +$c8 iny +$c9 cmp #imm +$ca dex +$cc cpy addr +$cd cmp addr +$ce dec addr +$d0 bne rel8 +$d1 cmp (zp),y +$d5 cmp zp,x +$d6 dec zp,x +$d8 cld +$d9 cmp addr,y +$dd cmp addr,x +$de dec addr,x +$e0 cpx #imm +$e1 sbc (zp,x) +$e4 cpx zp +$e5 sbc zp +$e6 inc zp +$e8 inx +$e9 sbc #imm +$ea nop +$ec cpx addr +$ed sbc addr +$ee inc addr +$f0 beq rel81 +$f1 sbc (zp),y +$f5 sbc zp,x +$f6 inc zp,x +$f8 sed +$f9 sbc addr,y +$fd sbc addr,x +$fe inc addr,x +</verb></tscreen> + + + +<sect1>6502X<label id="6502X-mode"><p> + +6502X mode is an extension to the normal 6502 mode. In this mode, several +mnemonics for undocumented instructions of the NMOS 6502 CPUs are accepted. + +Note: Since these instructions are undocumented, there are no official mnemonics +for them. + +(20 new instructions, 105 new opcodes, 76 instructions/256 opcodes total) + +<itemize> +<item><tt>ALR: A:=(A and #imm)/2;</tt> +<item><tt>ANC: A:= A and #imm;</tt> Generates opcode $0B. +<item><tt>ANE: A:= (A or CONST) and X and #imm;</tt> +<item><tt>ARR: A:=(A and #imm)/2;</tt> +<item><tt>AXS: X:=A and X-#imm;</tt> +<item><tt>DCP: addr:=addr-1; A-addr;</tt> +<item><tt>ISC: addr:=addr+1; A:=A-addr;</tt> +<item><tt>JAM:</tt> +<item><tt>LAS: A,X,S:=addr and S;</tt> +<item><tt>LAX: A,X:=addr;</tt> +<item><tt>NOP: #imm; zp; zp,x; abs; abs,x</tt> +<item><tt>RLA: addr:=addrrol; A:=A and addr;</tt> +<item><tt>RRA: addr:=addrror; A:=A adc addr;</tt> +<item><tt>SAX: addr:=A and X;</tt> +<item><tt>SHA: addr:=A and X and {addr hi +1};</tt> +<item><tt>SHX: addr:=X and {addr hi +1};</tt> +<item><tt>SHY: addr:=Y and {addr hi +1};</tt> +<item><tt>SLO: addr:=addr*2; A:=A or addr;</tt> +<item><tt>SRE: addr:=addr/2; A:=A xor addr;</tt> +<item><tt>TAS: addr:=A and X and {addr hi +1}; SP:=A and X;</tt> +</itemize> + +<tscreen><verb> +$02 jam +$03 slo (zp,x) +$04 nop zp +$07 slo zp +$0b anc #imm +$0c nop addr +$0f slo addr +$12 jam +$13 slo (zp),y +$14 nop zp,x +$17 slo zp,y +$1a nop +$1b slo addr,y +$1c nop addr,x +$1f slo addr,x +$22 jam +$23 rla (zp,x) +$27 rla zp +$2b anc #imm +$2f rla addr +$32 jam +$33 rla (zp),y +$34 nop zp,x +$37 rla zp,y +$3a nop +$3b rla addr,y +$3c nop addr,x +$3f rla addr,x +$42 jam +$43 sre (zp,x) +$44 nop zp +$47 sre zp +$4b alr #imm +$4f sre addr +$52 jam +$53 sre (zp),y +$54 nop zp,x +$57 sre zp,y +$5a nop +$5b sre addr,y +$5c nop addr,x +$5f sre addr,x +$62 jam +$63 rra (zp,x) +$64 nop zp +$67 rra zp +$6b arr #imm +$6f rra addr +$72 jam +$73 rra (zp),y +$74 nop zp,x +$77 rra zp,y +$7a nop +$7b rra addr,y +$7c nop addr,x +$7f rra addr,x +$80 nop #imm +$82 nop #imm +$83 sax (zp,x) +$87 sax zp +$89 nop #imm +$8b ane #imm +$8f sax addr +$92 jam +$93 sha (zp),y +$97 sax zp,y +$9b tas addr,y +$9c shy addr,x +$9e shx addr,y +$9f sha addr,y +$a3 lax (zp,x) +$a7 lax zp +$ab lax #imm +$af lax addr +$b2 jam +$b3 lax (zp),y +$b7 lax zp,y +$bb las addr,y +$bf lax addr,y +$c2 nop #imm +$c3 dcp (zp,x) +$c7 dcp zp +$cb axs #imm +$cf dcp addr +$d2 jam +$d3 dcp (zp),y +$d4 nop zp,x +$d7 dcp zp,y +$da nop +$db dcp addr,y +$dc nop addr,x +$df dcp addr,x +$e2 nop #imm +$e3 isc (zp,x) +$e7 isc zp +$eb sbc #imm +$ef isc addr +$f2 jam +$f3 isc (zp),y +$f4 nop zp,x +$f7 isc zp,y +$fa nop +$fb isc addr,y +$fc nop addr,x +$ff isc addr,x +</verb></tscreen> + + + +<sect1>6502DTV<label id="DTV-mode"><p> + +The CPU of the C64 DTV is based on the 6510. It adds some instructions, and does +not support all undocumented 6510 instructions. + +(3+10 new instructions, 3+56 new opcodes, 69 instructions/210 opcodes total) + +Opcodes added over 6502 (these are JAM on 6502): + +<tscreen><verb> +$12 bra rel8 +$32 sac #imm +$42 sir #imm +</verb></tscreen> + +Supported undocumented 6510 instructions (nop, anc, rla, lax, las, alr, arr, +rra, shy, shx, axs, sbc): + +<tscreen><verb> +$04 nop zp +$0b anc #imm +$0c nop addr +$14 nop zp,x +$1a nop +$1c nop addr,x +$23 rla (zp,x) +$27 rla zp +$2b anc #imm +$2f rla addr +$33 rla (zp),y +$34 nop zp,x +$37 rla zp,y +$3a nop +$3b rla addr,y +$3c nop addr,x +$3f rla addr,x +$44 nop zp +$4b alr #imm +$54 nop zp,x +$5a nop +$5c nop addr,x +$63 rra (zp,x) +$64 nop zp +$67 rra zp +$6b arr #imm +$6f rra addr +$73 rra (zp),y +$74 nop zp,x +$77 rra zp,y +$7a nop +$7b rra addr,y +$7c nop addr,x +$7f rra addr,x +$80 nop #imm +$82 nop #imm +$89 nop #imm +$9c shy addr,x +$9e shx addr,y +$a3 lax (zp,x) +$a7 lax zp +$ab lax #imm +$af lax addr +$b3 lax (zp),y +$b7 lax zp,y +$bb las addr,y +$bf lax addr,y +$c2 nop #imm +$cb axs #imm +$d4 nop zp,x +$da nop +$dc nop addr,x +$e2 nop #imm +$eb sbc #imm +$f4 nop zp,x +$fa nop +$fc nop addr,x +</verb></tscreen> + + +<sect>CMOS branch<p> + +The original CMOS version was apparently developed already back in the Commodore +days, but never saw the light of day. It was then licensed by (now) WDC to +different other vendors. Unfortunately some of those named their chips "65C02" +(not SC), which causes a lot of confusion now. So keep that in mind: some chips +that are named "65C02" will only support the original 65SC02 instruction set. + + +<sect1>65SC02 (Original CMOS)<label id="65SC02-mode"><p> + +The first CMOS instruction set, without bit manipulation, nor wai/stp. It adds +8 new instructions (phx, phy, plx, ply, bra, stz, tsb, trb) and two new address +modes (zeropage-indirect, absolute-x-indexed-indirect) to the original (legal) +6502 instructions. + +For example: Synertek SY65C02, GTE G65SC02, CMD G65SC02, NCR 65C02 + +(8 new instructions, 27 new opcodes, 64 instructions/178 opcodes total) + +<tscreen><verb> +$04 tsb zp +$0c tsb abs16 +$12 ora (zp) +$14 trb zp +$1a inc +$1c trb abs16 +$32 and (zp) +$34 bit zp, x +$3a dec +$3c bit abs16, x +$52 eor (zp) +$5a phy +$64 stz zp +$72 adc (zp) +$74 stz zp, x +$7a ply +$7c jmp (abs16, x) +$80 bra rel8 +$89 bit #imm8 +$92 sta (zp) +$9c stz abs16 +$9e stz abs16, x +$b2 lda (zp) +$d2 cmp (zp) +$da phx +$f2 sbc (zp) +$fa plx +</verb></tscreen> + + + +<sect1>65C02 (CMOS with Rockwell extensions)<label id="65C02-mode"><p> + +The Rockwell extensions add additional bit manipulation and bit test-and-branch +commands to the original 65SC02 instruction set. + +For Example: Rockwell R65C02, Ricoh RP65C02, NCR 65CX02 + +(4 new instructions, 32 new opcodes, 68 instructions/210 opcodes total) + +<tscreen><verb> +$07 rmb0 zp clear bit in zp location +$0f bbr0 zp, rel8 branch if bit is not set in zp location +$17 rmb1 zp +$1f bbr1 zp, rel8 +$27 rmb2 zp +$2f bbr2 zp, rel8 +$37 rmb3 zp +$3f bbr3 zp, rel8 +$47 rmb4 zp +$4f bbr4 zp, rel8 +$57 rmb5 zp +$5f bbr5 zp, rel8 +$67 rmb6 zp +$6f bbr6 zp, rel8 +$77 rmb7 zp +$7f bbr7 zp, rel8 +$87 smb0 zp set bit in zp location +$8f bbs0 zp, rel8 branch if bit is set in zp location +$97 smb1 zp +$9f bbs1 zp, rel8 +$a7 smb2 zp +$af bbs2 zp, rel8 +$b7 smb3 zp +$bf bbs3 zp, rel8 +$c7 smb4 zp +$cf bbs4 zp, rel8 +$d7 smb5 zp +$df bbs5 zp, rel8 +$e7 smb6 zp +$ef bbs6 zp, rel8 +$f7 smb7 zp +$ff bbs7 zp, rel8 +</verb></tscreen> + +All "illegal" opcodes perform NOP on this CPU. + + + +<sect1>W65C02 (CMOS with WDC extensions)<label id="W65C02-mode"><p> + +For their W65C02S WDC took the Rockwell extensions, and added two extra +instructions (which they also added to the 65C816/65C802) + +(2 new instructions, 2 new opcodes, 70 instructions/212 opcodes total) + +<tscreen><verb> +$cb wai wait for interrupt +$db stp wait for reset +</verb></tscreen> + +All "illegal" opcodes perform NOP on this CPU. + + + +<sect1>65CE02 (CMOS with CSG extensions)<label id="65CE02-mode"><p> + +CSG took the Rockwell extensions and developed them further. Notable additions +are long relative branches/jumps, and finally a real z register. Note that the +two opcodes used by the WDC extensions have been repurposed for something else, +so the 65CE02 is not 100% compatible with the W65C02. + +For Example: CSG 65CE02 (used on the Amiga A2232 Serial Card) + +(34 new instructions, 46 new opcodes, 102 instructions/256 opcodes total) + +<tscreen><verb> +$02 cle clear stack extend disable +$03 see set stack extend disable +$0b tsy transfer stack_ptr_high to Y +$12 ora (zp), z +$13 lbpl rel16 +$1b inz increment Z +$22 jsr (abs16) +$23 jsr (abs16, x) +$2b tys transfer Y to stack_ptr_high +$32 and (zp), z +$33 lbmi rel16 +$3b dez decrement Z +$42 neg negate A +$43 asr +$44 asr zp +$4b taz transfer A to Z +$52 eor (zp), z +$53 lbvc rel16 +$54 asr zp, x +$5b tab +$5c aug "4-byte NOP reserved for future expansion" +$62 rtn #imm8 +$63 lbsr rel16 relative jsr, "branch to subroutine" +$64 stz zp store Z +$6b tza transfer Z to A +$72 adc (zp), z +$73 lbvs rel16 +$74 stz zp, x store Z +$7b tba +$82 sta (off8, s), y +$83 lbra rel16 relative jmp +$8b sty abs16, x +$92 sta (zp), z +$93 lbcc rel16 +$9b stx abs16, y +$9c stz abs16 store Z +$9e stz abs16, x store Z +$a3 ldz #imm8 +$ab ldz abs16 +$b2 lda (zp), z +$b3 lbcs rel16 +$bb ldz abs16, x +$c2 cpz #imm8 +$c3 dew zp +$cb asw abs16 +$d2 cmp (zp), z +$d3 lbne rel16 +$d4 cpz zp +$db phz push Z +$dc cpz abs16 +$e2 lda (off8, s), y +$e3 inw zp +$eb row abs16 +$f2 sbc (zp), z +$f3 lbeq rel16 +$f4 phw #imm16 +$fb plz pull Z +$fc phw abs16 +</verb></tscreen> + +One notable change is that some instructions of the original CMOS instruction set +were changed from "zeropage indirect" addressing to "zeropage indirect, z indexed". +This could be done, because the z register is initially guaranteed to be zero, +making the CPU binary compatible with older CMOS variants. + +<tscreen><verb> +$12 ora (zp) -> ora (zp), z +$32 and (zp) -> and (zp), z +$52 eor (zp) -> eor (zp), z +$72 adc (zp) -> adc (zp), z +$92 sta (zp) -> sta (zp), z +$b2 lda (zp) -> cmp (zp), z +$d2 cmp (zp) -> lda (zp), z +$f2 sbc (zp) -> sbc (zp), z +</verb></tscreen> + +Additional to that, the meaning of the following instruction changes from "store +zero" to "store z register". Again, this makes the CPU binary compatible with +older CMOS variants + +<tscreen><verb> +$64 stz zp +$74 stz zp, x +$9c stz abs16 +$9e stz abs16, x +</verb></tscreen> + +The other 65SC02 instructions (phx, phy, plx, ply, tsb, trb, bra) are unchanged. + + + +<sect1>4510<label id="4510-mode"><p> + +The 4510 is a microcontroller that is the core of the Commodore C65 aka C64DX. +It contains among other functions a slightly modified 65CE02/4502 CPU, to allow +address mapping for 20 bits of address space (1 megabyte addressable area). + +The 4510 supports the complete 65CE02 instruction set, but changes +the 4-Byte NOP into the "map" instruction: + +<tscreen><verb> +$5c map +</verb></tscreen> + +For more information about the Commodore C65/C64DX and the 4510 CPU, see +<url url="http://www.zimmers.net/anonftp/pub/cbm/c65/"> and +<url url="https://en.wikipedia.org/wiki/Commodore_65" name="Wikipedia">. + + + +<sect1>45GS02<label id="45GS02-mode"><p> + +The 45GS02 is a microcontroller that is the core of the MEGA65. +It is an extension of the 4510 CPU and adds 32-bit addressing and a 32-bit +pseudo register Q that is comprised of the four registers A, X, Y, and Z. + +<tscreen><verb> +$42 $42 $05 orq zp +$42 $42 $06 aslq zp +$42 $42 $0a aslq +$42 $42 $0d orq addr +$42 $42 $0e aslq addr +$42 $42 $12 orq (zp) +$42 $42 $16 aslq zp,x +$42 $42 $1a inq +$42 $42 $1e aslq addr,x +$42 $42 $24 bitq zp +$42 $42 $25 andq zp +$42 $42 $26 rolq zp +$42 $42 $2a rolq +$42 $42 $2c bitq addr +$42 $42 $2d andq addr +$42 $42 $2e rolq addr +$42 $42 $32 andq (zp) +$42 $42 $36 rolq zp, x +$42 $42 $3a deq +$42 $42 $3e rolq addr, x +$42 $42 $43 asrq +$42 $42 $44 asrq zp +$42 $42 $45 eorq zp +$42 $42 $46 lsrq zp +$42 $42 $4a lsrq +$42 $42 $4d eorq addr +$42 $42 $4e lsrq addr +$42 $42 $52 eorq (zp) +$42 $42 $54 asrq zp, x +$42 $42 $56 lsrq zp, x +$42 $42 $5e lsrq addr, x +$42 $42 $65 adcq zp +$42 $42 $66 rorq zp +$42 $42 $6a rorq +$42 $42 $6d adcq addr +$42 $42 $6e rorq addr +$42 $42 $72 adcq (zp) +$42 $42 $76 rorq zp, x +$42 $42 $7e rorq addr, x +$42 $42 $85 stq zp +$42 $42 $8d stq addr +$42 $42 $92 stq (zp) +$42 $42 $a5 ldq zp +$42 $42 $ad ldq addr +$42 $42 $b2 ldq (zp), z +$42 $42 $c5 cmpq zp +$42 $42 $c6 deq zp +$42 $42 $cd cmpq addr +$42 $42 $ce deq addr +$42 $42 $d2 cmpq (zp) +$42 $42 $d6 deq zp, x +$42 $42 $de deq addr, x +$42 $42 $e5 sbcq zp +$42 $42 $e6 inq zp +$42 $42 $ed sbcq addr +$42 $42 $ee inq addr +$42 $42 $f2 sbcq (zp) +$42 $42 $f6 inq zp, x +$42 $42 $fe inq addr, x + +$ea $12 ora [zp], z +$ea $32 and [zp], z +$ea $52 eor [zp], z +$ea $72 adc [zp], z +$ea $92 sta [zp], z +$ea $b2 lda [zp], z +$ea $d2 cmp [zp], z +$ea $f2 sbc [zp], z + +$42 $42 $ea $12 orq [zp] +$42 $42 $ea $32 andq [zp] +$42 $42 $ea $52 eorq [zp] +$42 $42 $ea $72 adcq [zp] +$42 $42 $ea $92 stq [zp] +$42 $42 $ea $b2 ldq [zp], z +$42 $42 $ea $d2 cmpq [zp] +$42 $42 $ea $f2 sbcq [zp] +</verb></tscreen> + + +<sect1>HUC6280<label id="HUC6280-mode"><p> + +The HUC6280 is a superset of 65C02. It implements the original CMOS instructions +with Rockwell extensions, plus some other instructions: + +<tscreen><verb> +$02 sxy +$03 st0 #imm +$13 st1 #imm +$22 sax +$23 st2 #imm +$42 say +$43 tma #imm +$44 bsr rel8 +$53 tam #imm +$54 csl +$62 cla +$73 tii addr, addr, addr +$82 clx +$83 tst #imm, zp +$82 clx +$83 tst #imm, zp +$93 tst #imm, addr +$a3 tst #imm, zp, x +$b3 tst #imm, addr, x +$c2 cly +$c3 tdd addr, addr, addr +$d3 tin addr, addr, addr +$d4 csh +$e3 tia addr, addr, addr +$f3 tai addr, addr, addr +$f4 set +</verb></tscreen> + + +<sect1>M740<label id="M740-mode"><p> + +The M740 is a microcontroller by Mitsubishi, which was marketed for embedded +devices in the mid 80s. It is a superset of 6502, the added CMOS instructions +seem to be completely custom however: + +<tscreen><verb> +$02 jsr (zp) +$03 bbs0 a, rel8 +$07 bbs0 zp, rel8 +$0b seb0 a +$0f seb0 zp +$12 clt +$13 bbc0 a, rel8 +$17 bbc0 zp, rel8 +$1a inc a +$1b clb0 a +$1f clb0 zp +$22 jsr $ff12 +$23 bbs1 a, rel8 +$27 bbs1 zp, rel8 +$2b seb1 a +$2f seb1 zp +$32 set +$33 bbc1 a, rel8 +$37 bbc1 zp, rel8 +$3a dec a +$3b clb1 a +$3c ldm zp, #imm +$3f clb1 zp +$42 stp +$43 bbs2 a, rel8 +$44 com zp +$47 bbs2 zp, rel8 +$4b seb2 a +$4f seb2 zp +$53 bbc2 a, rel8 +$57 bbc2 zp, rel8 +$5b clb2 a +$5f clb2 zp +$63 bbs3 a, rel8 +$64 tst zp +$67 bbs3 zp, rel8 +$6b seb3 a +$6f seb3 zp +$73 bbc3 a, rel8 +$77 bbc3 zp, rel8 +$7b clb3 a +$7f clb3 zp +$80 bra rel8 +$82 rrf zp +$83 bbs4 a, rel8 +$87 bbs4 zp, rel8 +$8b seb4 a +$8f seb4 zp +$93 bbc4 a, rel8 +$97 bbc4 zp, rel8 +$9b clb4 a +$9f clb4 zp +$a3 bbs5 a, rel8 +$a7 bbs5 zp, rel8 +$ab seb5 a +$af seb5 zp +$b2 lda (zp) +$b3 bbc5 a, rel8 +$b7 bbc5 zp, rel8 +$bb clb5 a +$bf clb5 zp +$c2 slw +$c3 bbs6 a, rel8 +$c7 bbs6 zp, rel8 +$cb seb6 a +$cf seb6 zp +$d3 bbc6 a, rel8 +$d7 bbc6 zp, rel8 +$db clb6 a +$df clb6 zp +$e2 fst +$e3 bbs7 a, rel8 +$e7 bbs7 zp, rel8 +$eb seb7 a +$ef seb7 zp +$f3 bbc7 a, rel8 +$f7 bbc7 zp, rel8 +$fb clb7 a +$ff clb7 zp +</verb></tscreen> + +Four instructions are the same on 65SC02: + +<tscreen><verb> +$1a inc a +$3a dec a +$80 bra rel8 +$b2 lda (zp) +</verb></tscreen> + +These four instructions are different from 65SC02: + +<tscreen><verb> +$12 ora (zp) -> clt +$32 and (zp) -> set +$3c bit addr,x -> ldm zp, #imm +$64 stz zp -> tst zp +</verb></tscreen> + +The following 65SC02 instructions are not implemented: + +<tscreen><verb> +$04 tsb zp +$0c tsb addr +$14 trb zp +$1c trb addr +$34 bit zp,y +$52 eor (zp) +$5a phy +$72 adc (zp) +$74 stz zp,y +$7a ply +$7c jmp (addr) +$89 bit #imm8 +$92 sta (zp) +$9c stz addr +$9e stz addr,x +$d2 cmp (zp) +$da phx +$f2 sbc (zp) +$fa plx +</verb></tscreen> + +For more information about the M740 Controllers, see +<url url="https://en.wikipedia.org/wiki/Mitsubishi_740" name="Wikipedia">. + + + +<sect1>65816<label id="65816-mode"><p><p> + +The W65C816S is a 16bit CPU developed by WDC. The instruction set contains the +complete legal 6502 instructions, the original CMOS instructions (65SC02), plus +some new instructions and addressing modes. It has wai/stp, but it does NOT have +the Rockwell extensions (BBRx, BBSx, RMBx and SMBx bit manipulation instructions). + +(24 new instructions, 77 new opcodes, 88 instructions/256 opcodes total) + +<tscreen><verb> +$02 cop imm8 coprocessor operation +$03 ora offs8, s +$07 ora [dp] +$0b phd push direct page register +$0f ora abs24 +$13 ora (offs8, s), y +$17 ora [dp], y +$1b tcs transfer C to stack pointer +$1f ora abs24, x +$22 jsl abs24 +$23 and offs8, s +$27 and [dp] +$2b pld pull direct page register +$2f and abs24 +$33 and (offs8, s), y +$37 and [dp], y +$3b tsc transfer stack pointer to C +$3f and abs24, x +$42 wdm (reserved for future expansion) +$43 eor offs8, s +$44 mvp src, dst +$47 eor [dp] +$4b phk push program bank register +$4f eor abs24 +$53 eor (offs8, s), y +$54 mvn src, dst +$57 eor [dp], y +$5b tcd transfer C to direct page register +$5c jml abs24 +$5f eor abs24, x +$62 per rel16 push effective relative address +$63 adc offs8, s +$67 adc [dp] +$6b rtl return long (fetches 24-bit address from stack) +$6f adc abs24 +$73 adc (offs8, s), y +$77 adc [dp], y +$7b tdc transfer direct page register to C +$7f adc abs24, x +$82 brl rel16 branch long (16-bit offset) +$83 sta offs8, s +$87 sta [dp] +$8b phb push data bank register +$8f sta abs24 +$93 sta (offs8, s), y +$97 sta [dp], y +$9b txy transfer X to Y +$9f sta abs24, x +$a3 lda offs8, s +$a7 lda [dp] +$ab plb pull data bank register +$af lda abs24 +$b3 lda (offs8, s), y +$b7 lda [dp], y +$bb tyx transfer Y to X +$bf lda abs24, x +$c2 rep #imm8 clear bits in status register +$c3 cmp offs8, s +$c7 cmp [dp] +$cb wai wait for interrupt +$cf cmp abs24 +$d3 cmp (offs8, s), y +$d4 pei (dp) push effective indirect address +$d7 cmp [dp], y +$db stp wait for reset +$dc jmp [abs16] +$df cmp abs24, x +$e2 sep #imm8 set bits in status register +$e3 sbc offs8, s +$e7 sbc [dp] +$eb xba exchange high and low bytes of accumulator +$ef sbc abs24 +$f3 sbc (offs8, s), y +$f4 pea abs16 push effective absolute address +$f7 sbc [dp], y +$fb xce exchange Carry and Emulation bits +$fc jsr (abs16, x) +$ff sbc abs24, x +</verb></tscreen> + + + +<sect>other<p> + +<sect1>Sweet16<label id="sweet16-mode"><p><p> + +SWEET 16 is an interpreter for a pseudo 16 bit CPU written by Steve Wozniak +for the Apple ][ machines. It is available in the Apple ][ ROM. + +It implements the following opcodes: + +<tscreen><verb> +00 1 RTN (Return to 6502 mode) +01 2 BR ea (Branch always) +02 2 BNC ea (Branch if No Carry) +03 2 BC ea (Branch if Carry) +04 2 BP ea (Branch if Plus) +05 2 BM ea (Branch if Minus) +06 2 BZ ea (Branch if Zero) +07 2 BNZ ea (Branch if NonZero) +08 2 BM1 ea (Branch if Minus 1) +09 2 BNM1 ea (Branch if Not Minus 1) +0A 1 BK (Break to Monitor) +0B 1 RS (Return from Subroutine) +0C 1 BS ea (Branch to Subroutine) +1n 3 SET Rn R<-2 byte constant (Set Constant) (load register immediate) +2n 1 LD Rn ACC<-R (Load) +3n 1 ST Rn ACC->R (Store) +4n 1 LD @Rn ACC<-@R, R<-R+1 (Load Indirect) +5n 1 ST @Rn ACC->@R, R<-R+1 (Store Indirect) +6n 1 LDD @Rn ACC<-@R double (Load Double Indirect) +7n 1 STD @Rn ACC->@R double (Store Double Indirect) +8n 1 POP @Rn R<-R-1, ACC<-@R (pop) (Pop Indirect) +9n 1 STP @Rn R<-R-1, ACC->@R (Store POP Indirect) +An 1 ADD Rn ACC<-@R (pop) double (Add) +Bn 1 SUB Rn compare ACC to R (Sub) +Cn 1 POPD @Rn ACC<-ACC+R (Pop Double Indirect) +Dn 1 CPR Rn ACC<-ACC-R (Compare) +En 1 INR Rn R<-R+1 (Increment) +Fn 1 DCR Rn R<-R-1 (Decrement) +</verb></tscreen> + +For more information about SWEET 16, see +<url url="http://www.6502.org/source/interpreters/sweet16.htm">. + + + +<sect>Copyright<p> + +ca65 (and all cc65 binutils) are (C) Copyright 1998-2003 Ullrich von +Bassewitz. For usage of the binaries and/or sources the following +conditions do apply: + +This software is provided 'as-is', without any expressed or implied +warranty. In no event will the authors be held liable for any damages +arising from the use of this software. + +Permission is granted to anyone to use this software for any purpose, +including commercial applications, and to alter it and redistribute it +freely, subject to the following restrictions: + +<enum> +<item> The origin of this software must not be misrepresented; you must not + claim that you wrote the original software. If you use this software + in a product, an acknowledgment in the product documentation would be + appreciated but is not required. +<item> Altered source versions must be plainly marked as such, and must not + be misrepresented as being the original software. +<item> This notice may not be removed or altered from any source + distribution. +</enum> + + + +</article> diff --git a/doc/customizing.sgml b/doc/customizing.sgml index 58631eb3c..ffca0ce58 100644 --- a/doc/customizing.sgml +++ b/doc/customizing.sgml @@ -193,9 +193,9 @@ _init: LDX #$FF ; Initialize stack pointer to $01FF ; Set cc65 argument stack pointer LDA #<(__RAM_START__ + __RAM_SIZE__) - STA sp + STA c_sp LDA #>(__RAM_START__ + __RAM_SIZE__) - STA sp+1 + STA c_sp+1 ; --------------------------------------------------------------------------- ; Initialize memory storage diff --git a/doc/da65.sgml b/doc/da65.sgml index 94fbfbd29..ba3ceb165 100644 --- a/doc/da65.sgml +++ b/doc/da65.sgml @@ -46,14 +46,16 @@ The assembler accepts the following options: --------------------------------------------------------------------------- Usage: da65 [options] [inputfile] Short options: + -d Debug mode -g Add debug info to object file -h Help (this text) -i name Specify an info file + -m Run multiple passes to resolve labels -o name Name the output file -v Increase verbosity -F Add formfeeds to the output - -s Accept line markers in the info file -S addr Set the start/load address + -s Accept line markers in the info file -V Print the disassembler version Long options: @@ -61,6 +63,7 @@ Long options: --comment-column n Specify comment start column --comments n Set the comment level for the output --cpu type Set cpu type + --debug Debug mode --debug-info Add debug info to object file --formfeeds Add formfeeds to the output --help Help (this text) @@ -68,6 +71,7 @@ Long options: --info name Specify an info file --label-break n Add newline if label exceeds length n --mnemonic-column n Specify mnemonic start column + --multi-pass Run multiple passes to resolve labels --pagelength n Set the page length for the listing --start-addr addr Set the start/load address --sync-lines Accept line markers in the info file @@ -110,19 +114,23 @@ Here is a description of all the command line options: Set the CPU type. The option takes a parameter, which may be one of <itemize> - <item>6502 - <item>6502x - <item>6502dtv - <item>65sc02 - <item>65c02 - <item>65816 - <item>huc6280 - <item>4510 + <item>6502 - NMOS 6502 (all legal instructions) + <item>6502X - NMOS 6502 with all undocumented instructions + <item>6502DTV - the emulated CPU of the C64DTV device + <item>65SC02 - first CMOS instruction set (no bit manipulation, no wai/stp) + <item>65C02 - full CMOS instruction set (has bit manipulation and wai/stp) + <item>65816 - the CPU of the SNES, and the SCPU + <item>HuC6280 - the CPU of the PC engine + <item>4510 - the CPU of the Commodore C65 + <item>45GS02 - the CPU of the Commodore MEGA65 + <item>M740 - a Microcontroller by Mitsubishi </itemize> - 6502x is for the NMOS 6502 with unofficial opcodes. 6502dtv is for the - emulated CPU of the C64DTV device. huc6280 is the CPU of the PC engine. - 4510 is the CPU of the Commodore C65. 65816 is the CPU of the SNES. + + <tag><tt>-d, --debug</tt></tag> + + Enables debug mode, something that should not be needed for mere + mortals:-) <label id="option--formfeeds"> @@ -181,6 +189,15 @@ Here is a description of all the command line options: <tt><ref id="LABELBREAK" name="LABELBREAK"></tt>. + <tag><tt>-m, --multi-pass</tt></tag> + + This option causes the disassembler to run multiple passes over the input + binary to find and create all necessary labels. Without this option the + disassembler may detect the necessity for a label in the final pass, when + output was already partially generated. It will output numerical addresses + or program counter relative expressions in this case. + + <label id="option--mnemonic-column"> <tag><tt>--mnemonic-column n</tt></tag> @@ -246,23 +263,85 @@ Here is a description of all the command line options: <sect1>Supported CPUs<p> +With the command line option <tt><ref id="option--cpu" name="--cpu"></tt>, the +disassembler may be told which CPU to support: + + <itemize> + <item>6502 - NMOS 6502 (all legal instructions) + <item>6502X - NMOS 6502 with all undocumented instructions + <item>6502DTV - the emulated CPU of the C64DTV device + <item>65SC02 - first CMOS instruction set (no bit manipulation, no wai/stp) + <item>65C02 - CMOS with Rockwell extensions + <item>W65C02 - full CMOS instruction set (has bit manipulation and wai/stp) + <item>65CE02 - CMOS with CSG extensions + <item>4510 - the CPU of the Commodore C65 + <item>45GS02 - the CPU of the Commodore MEGA65 + <item>HuC6280 - the CPU of the PC engine + <item>M740 - a Microcontroller by Mitsubishi + <item>65816 - the CPU of the SNES, and the SCPU + </itemize> + +for more details on the various CPUs, see <tt><htmlurl url="cpus.html" name="here"></tt>. + + +<sect2>6502 mode<label id="6502-mode"><p> + The default (no CPU given on the command line or in the <tt/GLOBAL/ section of the info file) is the 6502 CPU. The disassembler knows all "official" opcodes for this CPU. Invalid opcodes are translated into <tt/.byte/ commands. -With the command line option <tt><ref id="option--cpu" name="--cpu"></tt>, the -disassembler may be told to recognize either the 65SC02 or 65C02 CPUs. The -latter understands the same opcodes as the former, plus 16 additional bit -manipulation and bit test-and-branch commands. Using 6502x as CPU the illegal -opcodes of 6502 CPU are detected and displayed. 6502dtv setting recognizes the -emulated CPU instructions of the C64DTV device. +<sect2>6502X mode<label id="6502X-mode"><p> +Using 6502X as CPU the illegal opcodes of 6502 CPU are detected and displayed. + + +<sect2>DTV mode<label id="DTV-mode"><p> + +6502DTV setting recognizes the emulated CPU instructions of the C64DTV device. + + +<sect2>65SC02 mode<label id="65SC02-mode"><p> + +The first CMOS instruction set, without bit manipulation or wai/stp. + + +<sect2>65C02 mode<label id="65C02-mode"><p> + +The 65C02 understands the same opcodes as the 65SC02, plus 16 additional bit +manipulation and bit test-and-branch commands. + +<sect2>W65C02 mode<label id="W65C02-mode"><p> + +This mode also supports wai/stp. + +<sect2>65CE02 mode<label id="65CE02-mode"><p> + + +<sect2>4510 mode<label id="4510-mode"><p> When disassembling 4510 code, due to handling of 16-bit wide branches, da65 can produce output that can not be re-assembled, when one or more of those branches point outside of the disassembled memory. This can happen when text or binary data is processed. + +<sect2>45GS02 mode<label id="45GS02-mode"><p> + +All compound instructions are supported. + + +<sect2>HUC6280 mode<label id="HUC6280-mode"><p> + +All special opcodes are supported. + + +<sect2>M740 mode<label id="M740-mode"><p> + +All special opcodes are supported. + + +<sect2>65816 mode<label id="65816-mode"><p><p> + The 65816 support requires annotating ranges with the M and X flag states. This can be recorded with an emulator that supports Code and Data Logging, for example. Disassemble one bank at a time. diff --git a/doc/funcref.sgml b/doc/funcref.sgml index e534b47be..82d5cf8bb 100644 --- a/doc/funcref.sgml +++ b/doc/funcref.sgml @@ -103,6 +103,8 @@ function. <item><ref id="gmtime_dt" name="gmtime_dt"> <item><ref id="mktime_dt" name="mktime_dt"> <item>rebootafterexit +<item><ref id="videomode" name="videomode"> +<item><ref id="waitvsync" name="waitvsync"> </itemize> @@ -118,6 +120,7 @@ function. <item><ref id="mktime_dt" name="mktime_dt"> <item>rebootafterexit <item><ref id="videomode" name="videomode"> +<item><ref id="waitvsync" name="waitvsync"> </itemize> @@ -286,6 +289,7 @@ function. <item><ref id="cclear" name="cclear"> <item><ref id="cclearxy" name="cclearxy"> <item><ref id="cgetc" name="cgetc"> +<item><ref id="cgets" name="cgets"> <item><ref id="chline" name="chline"> <item><ref id="chlinexy" name="chlinexy"> <item><ref id="clrscr" name="clrscr"> @@ -298,6 +302,7 @@ function. <item><ref id="cputcxy" name="cputcxy"> <item><ref id="cputs" name="cputs"> <item><ref id="cputsxy" name="cputsxy"> +<item><ref id="cscanf" name="cscanf"> <item><ref id="cursor" name="cursor"> <item><ref id="cvline" name="cvline"> <item><ref id="cvlinexy" name="cvlinexy"> @@ -2712,6 +2717,45 @@ see anything that you type. (See the description of <tt/cbm_k_scnkey()/.) </quote> +<sect1>cgets<label id="cgets"><p> + +<quote> +<descrip> +<tag/Function/Input a string directly from the console. +<tag/Header/<tt/<ref id="conio.h" name="conio.h">/ +<tag/Declaration/<tt/char* __fastcall__ cgets (const char* buffer, int size);/ +<tag/Description/The function inputs a string of at most <tt/size - 1/ +characters from the console into <tt/buffer/. It returns when <tt/size - 1/ +characters or either <tt/CR/ or <tt/LF/ are entered. It also handles both +multi-line input and backspacing. +<tag/Notes/<itemize> +<item>The function echoes <tt/CRLF/ when either <tt/CR/ or <tt/LF/ are read +but does NOT append either in <tt/buffer/. +<item>The function is only available as fastcall function, so it may only +be used in the presence of a prototype. +</itemize> +<tag/Availability/cc65 +<tag/See also/ +<ref id="cgetc" name="cgetc">, +<ref id="cscanf" name="cscanf"> +<tag/Example/<verb> +#include <conio.h> + +int main (void) +{ + char buffer[200], *p; + + cputs ("Type a lot and backspace a lot: "); + if (p = cgets (buffer, sizeof(buffer))) + cputs (p); + + return 0; +} +</verb> +</descrip> +</quote> + + <sect1>chline<label id="chline"><p> <quote> @@ -3311,6 +3355,47 @@ be used in presence of a prototype. </quote> +<sect1>cscanf<label id="cscanf"><p> + +<quote> +<descrip> +<tag/Function/Read formatted input from the console +<tag/Header/<tt/<ref id="conio.h" name="conio.h">/ +<tag/Declaration/<tt/int cscanf (const char* format, ...);/ +<tag/Description/The <tt/cscanf()/ function scans input from the console under +control of the argument <tt/format/. Following the format string is a list of +addresses to receive values. The format string is identical to that of the +<tt/scanf()/ function. +<tag/Notes/<itemize> +<item>A direct call to <tt/cursor()/ may be required to show the cursor. +<item>Some control characters like backspaces are not recognized. +<item>A better user experience can sometimes be provided by using <tt/cgets()/ +to retrieve the input, and then using <tt/sscanf()/ to parse it. +</itemize> +<tag/Availability/cc65 +<tag/See also/ +<ref id="cgets" name="cgets">, +<ref id="cursor" name="cursor"> +<tag/Example/<verb> +#include <conio.h> + +int main (void) +{ + int a, b, c; + + cputs ("Type three integers that add to 100: "); + if (cscanf ("%d %d %d", &a, &b, &c) == 3 && a + b + c == 100) + cputs ("\r\nYou passed!\r\n"); + else + cputs ("\r\nYou failed!\r\n"); + + return 0; +} +</verb> +</descrip> +</quote> + + <sect1>cursor<label id="cursor"><p> <quote> @@ -8477,24 +8562,27 @@ used in presence of a prototype. <tag/Function/Switch to either 40- or 80-column text mode, or a standard graphics mode. <tag/Header/<tt/ +<ref id="apple2.h" name="apple2.h">, <ref id="apple2enh.h" name="apple2enh.h">, <ref id="c128.h" name="c128.h">, <ref id="cx16.h" name="cx16.h">/ <tag/Declaration/ -<tt>unsigned __fastcall__ videomode (unsigned Mode); /* for apple2enh and c128 */</tt><newline> -<tt>signed char __fastcall__ videomode (signed char Mode); /* for cx16 */</tt> +<tt>unsigned __fastcall__ videomode (unsigned Mode); /* for c128 */</tt><newline> +<tt>signed char __fastcall__ videomode (signed char Mode); /* for apple2 and cx16 */</tt> <tag/Description/Switch to a 40- or 80-column text or graphics mode, depending on the argument. If the requested mode is already active, nothing happens. The old mode is returned from the call. <tag/Notes/<itemize> -<item>The function is specific to the Commodore 128, the enhanced Apple //e, +<item>The function is specific to the Commodore 128, the Apple II, and the Commander X16. <item>This function replaces <ref id="toggle_videomode" name="toggle_videomode">. <item>The function is available as only a fastcall function, so it may be used only in the presence of a prototype. +<item>On Apple II, this functions returns the previously active video mode, or -1 +if the mode is not supported due to lack of hardware. </itemize> -<tag/Availability/C128, enhanced Apple //e, and CX16 +<tag/Availability/C128, Apple II, and CX16 <tag/See also/ <ref id="fast" name="fast">, <ref id="isfast" name="isfast">, @@ -8512,14 +8600,19 @@ only in the presence of a prototype. <descrip> <tag/Function/Wait until the start of the next video frame. <tag/Header/<tt/ -<ref id="apple2enh.h" name="apple2enh.h">, +<ref id="apple2.h" name="apple2.h">, <ref id="atmos.h" name="atmos.h">, <ref id="cbm.h" name="cbm.h">, <ref id="gamate.h" name="gamate.h">, <ref id="nes.h" name="nes.h">, <ref id="pce.h" name="pce.h">/ -<tag/Declaration/<tt/void waitvsync (void);/ +<tag/Declaration/ +<tt>void waitvsync (void);</tt><newline> <tag/Description/Wait for vertical sync, to reduce flickering. +<tag/Notes/<itemize> +<item>The function will silently fail when the feature is not +supported, like on the Apple ][+. +</itemize> <tag/Availability/Platforms served by the headers above (Atmos requires the VSync hack) <tag/Example/None. diff --git a/doc/index.sgml b/doc/index.sgml index 92df5e018..e39fd11b4 100644 --- a/doc/index.sgml +++ b/doc/index.sgml @@ -109,6 +109,9 @@ <descrip> + <tag><htmlurl url="agat.html" name="agat.html"></tag> + Topics specific to the Agat machines. + <tag><htmlurl url="apple2.html" name="apple2.html"></tag> Topics specific to the Apple ][. diff --git a/doc/plus4.sgml b/doc/plus4.sgml index 79a2597d0..578f61c33 100644 --- a/doc/plus4.sgml +++ b/doc/plus4.sgml @@ -165,8 +165,26 @@ The names in the parentheses denote the symbols to be used for static linking of <sect1>Graphics drivers<p> -No graphics drivers are currently available for the Plus/4. +<descrip> + <tag><tt/ted-hi.tgi (ted_hi_tgi)/</tag> + This driver features a resolution of 320*200 with two colors and an + adjustable palette (that means that the two colors can be chosen out of a + palette of the 121 TED colors). + Note that the text-mode character matrix and color data are destroyed by this + driver. The driver calls the Kernal <tt/CLRSCR/ routine to return the text + screen to a usable (if empty) state on <tt/tgi_done()/. + + This driver places the bitmap at $C000-$E000. Programs using + this driver must either be linked with the option <tt/-D + __HIMEM__=$C000/, or use the <tt/plus4-hires.cfg/ linker configuration. + + The <tt/plus4-hires.cfg/ is preferable, as it allows the stack to remain at + $FCFF, and exposes the remaining high memory from the end of the bitmap + to the stack top as a <tt/HIBSS/ segment that can be used by the programmer, + or given to <tt/_heapadd()/ (using the symbols <tt/_HIBSS_START__/ and + <tt/_HIBSS_SIZE__/). +</descrip><p> <sect1>Extended memory drivers<p> diff --git a/doc/sim65.sgml b/doc/sim65.sgml index 9c3764e1d..46ef961cb 100644 --- a/doc/sim65.sgml +++ b/doc/sim65.sgml @@ -209,7 +209,7 @@ Internally, the binary program file has a 12 byte header provided by the library <item>1 byte <bf/CPU type/: <tt/0/ = 6502, <tt/1/ = 65C02 -<item>1 byte <bf/sp address/: the zero page address of the C parameter stack pointer <tt/sp/ used by the paravirtualization functions +<item>1 byte <bf/c_sp address/: the zero page address of the C parameter stack pointer <tt/c_sp/ used by the paravirtualization functions <item>1 word <bf/load address/: where to load the data from the file into memory (default: <tt/$0200/) diff --git a/doc/tgi.sgml b/doc/tgi.sgml index 3b013664f..96709ae31 100644 --- a/doc/tgi.sgml +++ b/doc/tgi.sgml @@ -43,7 +43,7 @@ of range. <ref id="tgi_setcolor" name="tgi_setcolor"> <tag/Example/<tscreen><verb> /* Draw the upper half of an ellipse */ -tgi_setcolor(TGI_COLOR_BLUE); +tgi_setcolor(1); tgi_arc (50, 50, 40, 20, 0, 180); </verb></tscreen> </descrip> @@ -67,7 +67,7 @@ be used in presence of a prototype. <tag/Availability/cc65 <tag/See also/Other tgi function <tag/Example/<tscreen><verb> -tgi_setcolor(TGI_COLOR_GREEN); +tgi_setcolor(1); tgi_bar(10, 10, 100, 60); </verb></tscreen> </descrip> @@ -94,7 +94,7 @@ be used in presence of a prototype. <ref id="tgi_pieslice" name="tgi_pieslice">, <ref id="tgi_setcolor" name="tgi_setcolor"> <tag/Example/<tscreen><verb> -tgi_setcolor(TGI_COLOR_BLACK); +tgi_setcolor(1); tgi_circle(50, 40, 40); </verb></tscreen> </descrip> @@ -154,7 +154,7 @@ be used in presence of a prototype. <ref id="tgi_pieslice" name="tgi_pieslice">, <ref id="tgi_setcolor" name="tgi_setcolor"> <tag/Example/<tscreen><verb> -tgi_setcolor(TGI_COLOR_RED); +tgi_setcolor(1); tgi_ellipse (50, 40, 40, 20); </verb></tscreen> </descrip> @@ -216,17 +216,19 @@ original aspect ratio. <quote> <descrip> -<tag/Function/Return the current drawing color. +<tag/Function/Return the current drawing color (palette index). <tag/Header/<tt/<ref id="tgi.h" name="tgi.h">/ <tag/Declaration/<tt/unsigned char tgi_getcolor (void);/ <tag/Description/The actual color is an index to a palette. During tgi_init -you will get a default palette. The number of colors depend on the platform. -All platforms recognize at least TGI_COLOR_BLACK and TGI_COLOR_WHITE. But some -platforms have many more predefined colors. If you paint using TGI_COLOR_GREEN -and then you change the green of the palette to blue using tgi_setpalette then -after this painting in TGI_COLOR_GREEN will actually be blue. +you will get a default palette. +A default palette has always two entries with values equal to TGI_COLOR_BLACK +and TGI_COLOR_WHITE. However, which default palette entries have those two +values is target specific. +Note that both the number of colors, and also the available colors, depend on +the target and/or driver. <tag/Availability/cc65 -<tag/See also/Other tgi functions +<tag/See also/<ref id="tgi_setcolor" name="tgi_setcolor">, +<ref id="tgi_setpalette" name="tgi_setpalette"> <tag/Example/<tscreen><verb> color = tgi_getcolor(); </verb></tscreen> @@ -238,7 +240,8 @@ color = tgi_getcolor(); <quote> <descrip> -<tag/Function/Get the number of available colors. +<tag/Function/Get the number of available colors in the palette for the current +driver. <tag/Header/<tt/<ref id="tgi.h" name="tgi.h">/ <tag/Declaration/<tt/unsigned char tgi_getcolorcount (void);/ <tag/Description/TGI platforms use indexed color palettes. This function @@ -287,8 +290,6 @@ if (num_colors == 0) { <tag/Header/<tt/<ref id="tgi.h" name="tgi.h">/ <tag/Declaration/<tt/const unsigned char* tgi_getdefpalette (void);/ <tag/Description/The tgi driver has a default palette that is active at startup. -The named colors TGI_COLOR_BLACK, TGI_COLOR_WHITE, TGI_COLOR_RED... need this -palette to work correctly. <tag/Availability/cc65 <tag/See also/Other tgi functions <tag/Example/None. @@ -418,10 +419,10 @@ be used in presence of a prototype. <quote> <descrip> -<tag/Function/Get the color of a pixel from the viewpage. +<tag/Function/Get the color (palette index) of a pixel from the viewpage. <tag/Header/<tt/<ref id="tgi.h" name="tgi.h">/ <tag/Declaration/<tt/unsigned char __fastcall__ tgi_getpixel (int x, int y);/ -<tag/Description/Get the color of a pixel from the viewpage. +<tag/Description/Get the color (palette index) of a pixel from the viewpage. <tag/Notes/<itemize> <item>The function is only available as fastcall function, so it may only be used in presence of a prototype. @@ -626,7 +627,7 @@ be used in presence of a prototype. #define tgi_updatedisplay() tgi_ioctl(4, (void*)1) if (!tgi_busy()) { tgi_sprite(&background); - tgi_setcolor(TGI_COLOR_BLUE); + tgi_setcolor(1); tgi_outttextxy(20,40,"Hello World"); tgi_updatedisplay(); } @@ -791,7 +792,7 @@ of range. <ref id="tgi_setcolor" name="tgi_setcolor"> <tag/Example/<tscreen><verb> /* Draw the closed upper half of an ellipse */ -tgi_setcolor(TGI_COLOR_BLUE); +tgi_setcolor(1); tgi_pieslice (50, 50, 40, 20, 0, 180); </verb></tscreen> </descrip> @@ -834,20 +835,21 @@ only in the presence of a prototype. <quote> <descrip> -<tag/Function/Set color to be used in future draw operations. +<tag/Function/Set color (palette index) to be used in future draw operations. <tag/Header/<tt/<ref id="tgi.h" name="tgi.h">/ -<tag/Declaration/<tt/void __fastcall__ tgi_setcolor (unsigned char color);/ -<tag/Description/Set color to be used in future draw operations. +<tag/Declaration/<tt/void __fastcall__ tgi_setcolor (unsigned char color_index);/ +<tag/Description/Set color (palette index) to be used in future draw operations. <tag/Notes/<itemize> <item>The function is only available as fastcall function, so it may only be used in presence of a prototype. </itemize> <tag/Availability/cc65 -<tag/See also/Other tgi functions. +<tag/See also/<ref id="tgi_getcolor" name="tgi_getcolor">, +<ref id="tgi_setpalette" name="tgi_setpalette"> <tag/Example/<tscreen><verb> -tgi_setcolor(TGI_COLOR_BLACK); +tgi_setcolor(1); tgi_bar(0,0,30,30); -tgi_setcolor(TGI_COLOR_WHITE); +tgi_setcolor(2); tgi_bar(10,10,20,20); </verb></tscreen> </descrip> @@ -893,13 +895,21 @@ Palette is a pointer to as many entries as there are colors. <tag/Header/<tt/<ref id="tgi.h" name="tgi.h">/ <tag/Declaration/<tt/void __fastcall__ tgi_setpalette (const unsigned char* palette);/ <tag/Description/Set the palette (not available with all drivers/hardware). -Palette is a pointer to as many entries as there are colors. +Palette is a pointer to as many entries as there are colors. The values in the +palette are target specific, some (hopefully, more or less) portable values are +defined in the TGI_COLOR_XY defines. Note that different platforms provide +different colors, only TGI_COLOR_BLACK and TGI_COLOR_WHITE are guaranteed to +exist (needed for the default palette). <tag/Notes/<itemize> <item>The function is only available as fastcall function, so it may only be used in presence of a prototype. +<item>The palette is the (only) place where to use the TGI_COLOR_XY values. This +has been an ongoing and reoccurring misunderstanding in the past: At every other +place, the "color" values are indices into the current palette. </itemize> <tag/Availability/cc65 -<tag/See also/Other tgi functions. +<tag/See also/<ref id="tgi_setcolor" name="tgi_setcolor">, +<ref id="tgi_getpalette" name="tgi_getpalette"> <tag/Example/None. </descrip> </quote> diff --git a/include/_vic3.h b/include/_vic3.h new file mode 100644 index 000000000..820591656 --- /dev/null +++ b/include/_vic3.h @@ -0,0 +1,188 @@ +/*****************************************************************************/ +/* */ +/* _vic3.h */ +/* */ +/* Internal include file, do not use directly */ +/* */ +/* */ +/* */ +/* (C) 1998-2012, Ullrich von Bassewitz */ +/* Roemerstrasse 52 */ +/* D-70794 Filderstadt */ +/* EMail: uz@cc65.org */ +/* */ +/* */ +/* This software is provided 'as-is', without any expressed or implied */ +/* warranty. In no event will the authors be held liable for any damages */ +/* arising from the use of this software. */ +/* */ +/* Permission is granted to anyone to use this software for any purpose, */ +/* including commercial applications, and to alter it and redistribute it */ +/* freely, subject to the following restrictions: */ +/* */ +/* 1. The origin of this software must not be misrepresented; you must not */ +/* claim that you wrote the original software. If you use this software */ +/* in a product, an acknowledgment in the product documentation would be */ +/* appreciated but is not required. */ +/* 2. Altered source versions must be plainly marked as such, and must not */ +/* be misrepresented as being the original software. */ +/* 3. This notice may not be removed or altered from any source */ +/* distribution. */ +/* */ +/*****************************************************************************/ + + + +#ifndef __VIC3_H +#define __VIC3_H + +/* FIXME: only VIC2 registers right now */ + +/* Define a structure with the vic register offsets. In cc65 mode, there +** are aliases for the field accessible as arrays. +*/ +#if __CC65_STD__ == __CC65_STD_CC65__ +struct __vic3 { + union { + struct { + unsigned char spr0_x; /* Sprite 0, X coordinate */ + unsigned char spr0_y; /* Sprite 0, Y coordinate */ + unsigned char spr1_x; /* Sprite 1, X coordinate */ + unsigned char spr1_y; /* Sprite 1, Y coordinate */ + unsigned char spr2_x; /* Sprite 2, X coordinate */ + unsigned char spr2_y; /* Sprite 2, Y coordinate */ + unsigned char spr3_x; /* Sprite 3, X coordinate */ + unsigned char spr3_y; /* Sprite 3, Y coordinate */ + unsigned char spr4_x; /* Sprite 4, X coordinate */ + unsigned char spr4_y; /* Sprite 4, Y coordinate */ + unsigned char spr5_x; /* Sprite 5, X coordinate */ + unsigned char spr5_y; /* Sprite 5, Y coordinate */ + unsigned char spr6_x; /* Sprite 6, X coordinate */ + unsigned char spr6_y; /* Sprite 6, Y coordinate */ + unsigned char spr7_x; /* Sprite 7, X coordinate */ + unsigned char spr7_y; /* Sprite 7, Y coordinate */ + }; + struct { + unsigned char x; /* X coordinate */ + unsigned char y; /* Y coordinate */ + } spr_pos[8]; + }; + unsigned char spr_hi_x; /* High bits of X coordinate */ + unsigned char ctrl1; /* Control register 1 */ + unsigned char rasterline; /* Current raster line */ + union { + struct { + unsigned char strobe_x; /* Light pen, X position */ + unsigned char strobe_y; /* Light pen, Y position */ + }; + struct { + unsigned char x; /* Light pen, X position */ + unsigned char y; /* Light pen, Y position */ + } strobe; + }; + unsigned char spr_ena; /* Enable sprites */ + unsigned char ctrl2; /* Control register 2 */ + unsigned char spr_exp_y; /* Expand sprites in Y dir */ + unsigned char addr; /* Address of chargen and video ram */ + unsigned char irr; /* Interrupt request register */ + unsigned char imr; /* Interrupt mask register */ + unsigned char spr_bg_prio; /* Priority to background */ + unsigned char spr_mcolor; /* Sprite multicolor bits */ + unsigned char spr_exp_x; /* Expand sprites in X dir */ + unsigned char spr_coll; /* Sprite/sprite collision reg */ + unsigned char spr_bg_coll; /* Sprite/background collision reg */ + unsigned char bordercolor; /* Border color */ + union { + struct { + unsigned char bgcolor0; /* Background color 0 */ + unsigned char bgcolor1; /* Background color 1 */ + unsigned char bgcolor2; /* Background color 2 */ + unsigned char bgcolor3; /* Background color 3 */ + }; + unsigned char bgcolor[4]; /* Background colors */ + }; + union { + struct { + unsigned char spr_mcolor0; /* Color 0 for multicolor sprites */ + unsigned char spr_mcolor1; /* Color 1 for multicolor sprites */ + }; + /* spr_color is already used ... */ + unsigned char spr_mcolors[2]; /* Color for multicolor sprites */ + }; + union { + struct { + unsigned char spr0_color; /* Color sprite 0 */ + unsigned char spr1_color; /* Color sprite 1 */ + unsigned char spr2_color; /* Color sprite 2 */ + unsigned char spr3_color; /* Color sprite 3 */ + unsigned char spr4_color; /* Color sprite 4 */ + unsigned char spr5_color; /* Color sprite 5 */ + unsigned char spr6_color; /* Color sprite 6 */ + unsigned char spr7_color; /* Color sprite 7 */ + }; + unsigned char spr_color[8]; /* Colors for the sprites */ + }; + + /* The following ones are only valid in the C128: */ + unsigned char x_kbd; /* Additional keyboard lines */ + unsigned char clock; /* Clock switch bit */ +}; +#else +struct __vic3 { + unsigned char spr0_x; /* Sprite 0, X coordinate */ + unsigned char spr0_y; /* Sprite 0, Y coordinate */ + unsigned char spr1_x; /* Sprite 1, X coordinate */ + unsigned char spr1_y; /* Sprite 1, Y coordinate */ + unsigned char spr2_x; /* Sprite 2, X coordinate */ + unsigned char spr2_y; /* Sprite 2, Y coordinate */ + unsigned char spr3_x; /* Sprite 3, X coordinate */ + unsigned char spr3_y; /* Sprite 3, Y coordinate */ + unsigned char spr4_x; /* Sprite 4, X coordinate */ + unsigned char spr4_y; /* Sprite 4, Y coordinate */ + unsigned char spr5_x; /* Sprite 5, X coordinate */ + unsigned char spr5_y; /* Sprite 5, Y coordinate */ + unsigned char spr6_x; /* Sprite 6, X coordinate */ + unsigned char spr6_y; /* Sprite 6, Y coordinate */ + unsigned char spr7_x; /* Sprite 7, X coordinate */ + unsigned char spr7_y; /* Sprite 7, Y coordinate */ + unsigned char spr_hi_x; /* High bits of X coordinate */ + unsigned char ctrl1; /* Control register 1 */ + unsigned char rasterline; /* Current raster line */ + unsigned char strobe_x; /* Light pen, X position */ + unsigned char strobe_y; /* Light pen, Y position */ + unsigned char spr_ena; /* Enable sprites */ + unsigned char ctrl2; /* Control register 2 */ + unsigned char spr_exp_y; /* Expand sprites in Y dir */ + unsigned char addr; /* Address of chargen and video ram */ + unsigned char irr; /* Interrupt request register */ + unsigned char imr; /* Interrupt mask register */ + unsigned char spr_bg_prio; /* Priority to background */ + unsigned char spr_mcolor; /* Sprite multicolor bits */ + unsigned char spr_exp_x; /* Expand sprites in X dir */ + unsigned char spr_coll; /* Sprite/sprite collision reg */ + unsigned char spr_bg_coll; /* Sprite/background collision reg */ + unsigned char bordercolor; /* Border color */ + unsigned char bgcolor0; /* Background color 0 */ + unsigned char bgcolor1; /* Background color 1 */ + unsigned char bgcolor2; /* Background color 2 */ + unsigned char bgcolor3; /* Background color 3 */ + unsigned char spr_mcolor0; /* Color 0 for multicolor sprites */ + unsigned char spr_mcolor1; /* Color 1 for multicolor sprites */ + unsigned char spr0_color; /* Color sprite 0 */ + unsigned char spr1_color; /* Color sprite 1 */ + unsigned char spr2_color; /* Color sprite 2 */ + unsigned char spr3_color; /* Color sprite 3 */ + unsigned char spr4_color; /* Color sprite 4 */ + unsigned char spr5_color; /* Color sprite 5 */ + unsigned char spr6_color; /* Color sprite 6 */ + unsigned char spr7_color; /* Color sprite 7 */ +}; +#endif + + + +/* End of _vic3.h */ +#endif + + + diff --git a/include/agat.h b/include/agat.h new file mode 100644 index 000000000..04ec16984 --- /dev/null +++ b/include/agat.h @@ -0,0 +1,76 @@ +#ifndef _AGAT_H +#define _AGAT_H + +/* Check for errors */ +#if !defined(__AGAT__) +# error This module may only be used when compiling for the Agat! +#endif + + +/*****************************************************************************/ +/* Data */ +/*****************************************************************************/ + + + +/* Color defines */ +#define COLOR_BLACK 0x00 +#define COLOR_RED 0x01 +#define COLOR_GREEN 0x02 +#define COLOR_YELLOW 0x03 +#define COLOR_BLUE 0x04 +#define COLOR_MAGENTA 0x05 +#define COLOR_CYAN 0x06 +#define COLOR_WHITE 0x07 + +/* Characters codes */ +#define CH_CTRL_C 0x03 +#define CH_ENTER 0x0D +#define CH_ESC 0x1B +#define CH_CURS_LEFT 0x08 +#define CH_CURS_RIGHT 0x15 +#define CH_CURS_UP 0x19 +#define CH_CURS_DOWN 0x1A +#define CH_ESC 0x1B +#define CH_HLINE 0x1B +#define CH_VLINE 0x5C +#define CH_ULCORNER 0x10 +#define CH_URCORNER 0x12 +#define CH_LLCORNER 0x1D +#define CH_LRCORNER 0x1F + +/* Masks for joy_read */ +#define JOY_UP_MASK 0x10 +#define JOY_DOWN_MASK 0x20 +#define JOY_LEFT_MASK 0x04 +#define JOY_RIGHT_MASK 0x08 +#define JOY_BTN_1_MASK 0x40 +#define JOY_BTN_2_MASK 0x80 + +/* Return codes for get_ostype */ +#define AGAT_UNKNOWN 0x00 +#define AGAT_7 0x10 /* Agat 7 */ +#define AGAT_9 0x20 /* Agat 9 */ + + +/*****************************************************************************/ +/* Code */ +/*****************************************************************************/ + +unsigned char get_ostype (void); +/* Get the machine type. Returns one of the AGAT_xxx codes. */ + +void rebootafterexit (void); +/* Reboot machine after program termination has completed. */ + +/* The following #defines will cause the matching functions calls in conio.h +** to be overlaid by macros with the same names, saving the function call +** overhead. +*/ +#define _bgcolor(color) COLOR_BLACK +#define _bordercolor(color) COLOR_BLACK + +/* End of agat.h */ + + +#endif diff --git a/include/apple2.h b/include/apple2.h index 9f7526f59..82f8dd3e4 100644 --- a/include/apple2.h +++ b/include/apple2.h @@ -83,7 +83,77 @@ #define CH_CURS_LEFT 0x08 #define CH_CURS_RIGHT 0x15 -#if !defined(__APPLE2ENH__) +/* These characters are not available on the ][+, but + * are on the //e. */ +#if defined(__APPLE2ENH__) || defined(APPLE2_INCLUDE_IIE_CHARS) +#define CH_DEL 0x7F +#define CH_CURS_UP 0x0B +#define CH_CURS_DOWN 0x0A + +/* These are defined to be OpenApple + NumberKey */ +#define CH_F1 0xB1 +#define CH_F2 0xB2 +#define CH_F3 0xB3 +#define CH_F4 0xB4 +#define CH_F5 0xB5 +#define CH_F6 0xB6 +#define CH_F7 0xB7 +#define CH_F8 0xB8 +#define CH_F9 0xB9 +#define CH_F10 0xB0 +#endif + +#if defined(__APPLE2ENH__) + +/* MouseText-based functions for boxes and lines drawing */ +void mt_chline (unsigned char length); +void mt_cvline (unsigned char length); +void mt_chlinexy (unsigned char x, unsigned char y, unsigned char length); +void mt_cvlinexy (unsigned char x, unsigned char y, unsigned char length); + +#define CH_HLINE 0x5F +#define CH_VLINE 0xDF +#define CH_ULCORNER 0x5F +#define CH_URCORNER 0x20 +#define CH_LLCORNER 0xD4 +#define CH_LRCORNER 0xDF +#define CH_TTEE 0x5F +#define CH_BTEE 0xD4 +#define CH_LTEE 0xD4 +#define CH_RTEE 0xDF +#define CH_CROSS 0xD4 + +#define _chline(length) mt_chline(length) +#define _chlinexy(x,y,length) mt_chlinexy(x,y,length) +#define _cvline(length) mt_cvline(length) +#define _cvlinexy(x,y,length) mt_cvlinexy(x,y,length) + +#else + +/* Functions that don't depend on MouseText to draw boxes and lines */ +void dyn_chline (unsigned char h, unsigned char length); +void dyn_cvline (unsigned char v, unsigned char length); +void dyn_chlinexy (unsigned char h, unsigned char x, unsigned char y, unsigned char length); +void dyn_cvlinexy (unsigned char v, unsigned char x, unsigned char y, unsigned char length); + +#if defined(DYN_BOX_DRAW) +/* When the user defines DYN_BOX_DRAW, we'll adapt to the machine +** we run on. + */ +extern char CH_HLINE; +extern char CH_VLINE; +extern char CH_ULCORNER; +extern char CH_URCORNER; +extern char CH_LLCORNER; +extern char CH_LRCORNER; +extern char CH_TTEE; +extern char CH_BTEE; +extern char CH_LTEE; +extern char CH_RTEE; +extern char CH_CROSS; + +#else +/* Otherwise, fallback to safety and don't use MouseText at all. */ #define CH_HLINE '-' #define CH_VLINE '!' #define CH_ULCORNER '+' @@ -95,7 +165,14 @@ #define CH_LTEE '+' #define CH_RTEE '+' #define CH_CROSS '+' -#endif +#endif /* DYN_BOX_DRAW */ + +#define _chline(length) dyn_chline(CH_HLINE, length) +#define _chlinexy(x, y, length) dyn_chlinexy(CH_HLINE, x ,y, length) +#define _cvline(length) dyn_cvline(CH_VLINE, length) +#define _cvlinexy(x, y, length) dyn_cvlinexy(CH_VLINE, x, y, length) + +#endif /* __APPLE2ENH__ */ /* Masks for joy_read */ #define JOY_UP_MASK 0x10 @@ -127,6 +204,12 @@ #define TV_PAL 1 #define TV_OTHER 2 +/* Video modes */ +#define VIDEOMODE_40x24 0x15 +#define VIDEOMODE_80x24 0x00 +#define VIDEOMODE_40COL VIDEOMODE_40x24 +#define VIDEOMODE_80COL VIDEOMODE_80x24 + extern unsigned char _dos_type; /* Valid _dos_type values: ** @@ -255,6 +338,14 @@ unsigned char __fastcall__ allow_lowercase (unsigned char onoff); */ #endif +signed char __fastcall__ videomode (unsigned mode); +/* Set the video mode, return the old mode, or -1 if 80-column hardware is not +** installed. Call with one of the VIDEOMODE_xx constants. +*/ + +void waitvsync (void); +/* Wait for start of next frame */ + /* End of apple2.h */ diff --git a/include/apple2enh.h b/include/apple2enh.h index 864d24986..84e6f4ab3 100644 --- a/include/apple2enh.h +++ b/include/apple2enh.h @@ -46,49 +46,6 @@ -/*****************************************************************************/ -/* Data */ -/*****************************************************************************/ - - - -/* Characters codes */ -#define CH_DEL 0x7F -#define CH_CURS_UP 0x0B -#define CH_CURS_DOWN 0x0A - -#define CH_HLINE 0x5F -#define CH_VLINE 0xDF -#define CH_ULCORNER 0x5F -#define CH_URCORNER 0x20 -#define CH_LLCORNER 0xD4 -#define CH_LRCORNER 0xDF -#define CH_TTEE 0x5F -#define CH_BTEE 0xD4 -#define CH_LTEE 0xD4 -#define CH_RTEE 0xDF -#define CH_CROSS 0xD4 - -/* These are defined to be OpenApple + NumberKey */ -#define CH_F1 0xB1 -#define CH_F2 0xB2 -#define CH_F3 0xB3 -#define CH_F4 0xB4 -#define CH_F5 0xB5 -#define CH_F6 0xB6 -#define CH_F7 0xB7 -#define CH_F8 0xB8 -#define CH_F9 0xB9 -#define CH_F10 0xB0 - -/* Video modes */ -#define VIDEOMODE_40x24 0x15 -#define VIDEOMODE_80x24 0x00 -#define VIDEOMODE_40COL VIDEOMODE_40x24 -#define VIDEOMODE_80COL VIDEOMODE_80x24 - - - /*****************************************************************************/ /* Variables */ /*****************************************************************************/ @@ -106,21 +63,5 @@ extern void a2e_lo_tgi[]; -/*****************************************************************************/ -/* Code */ -/*****************************************************************************/ - - - -unsigned __fastcall__ videomode (unsigned mode); -/* Set the video mode, return the old mode. Call with one of the VIDEOMODE_xx -** constants. -*/ - -void waitvsync (void); -/* Wait for start of next frame */ - - - /* End of apple2enh.h */ #endif diff --git a/include/arpa/inet.h b/include/arpa/inet.h index cd353a2bb..3d715766f 100644 --- a/include/arpa/inet.h +++ b/include/arpa/inet.h @@ -40,6 +40,20 @@ /*****************************************************************************/ +#if (__CPU__ & __CPU_ISET_65SC02__) +/* Always inline, three bytes is not more than a jsr */ + +#define ntohs(x) \ + ( \ + __AX__=(x), \ + asm("phx"), \ + asm("tax"), \ + asm("pla"), \ + __AX__ \ + ) +#define htons(x) ntohs(x) + +#else #if (__OPT_i__ < 200) int __fastcall__ ntohs (int val); @@ -56,12 +70,12 @@ int __fastcall__ htons (int val); ) #define htons(x) ntohs(x) -#endif +#endif /* __OPT_i__ < 200 */ + +#endif /* __CPU__ & __CPU_ISET_65SC02__ */ long __fastcall__ ntohl (long val); long __fastcall__ htonl (long val); - - /* End of arpa/inet.h */ #endif diff --git a/include/c65.h b/include/c65.h new file mode 100644 index 000000000..34270be03 --- /dev/null +++ b/include/c65.h @@ -0,0 +1,120 @@ +/*****************************************************************************/ +/* */ +/* c65.h */ +/* */ +/* C65 system specific definitions */ +/* */ +/* */ +/* */ +/* (C) 1998-2013, Ullrich von Bassewitz */ +/* Roemerstrasse 52 */ +/* D-70794 Filderstadt */ +/* EMail: uz@cc65.org */ +/* */ +/* */ +/* This software is provided 'as-is', without any expressed or implied */ +/* warranty. In no event will the authors be held liable for any damages */ +/* arising from the use of this software. */ +/* */ +/* Permission is granted to anyone to use this software for any purpose, */ +/* including commercial applications, and to alter it and redistribute it */ +/* freely, subject to the following restrictions: */ +/* */ +/* 1. The origin of this software must not be misrepresented; you must not */ +/* claim that you wrote the original software. If you use this software */ +/* in a product, an acknowledgment in the product documentation would be */ +/* appreciated but is not required. */ +/* 2. Altered source versions must be plainly marked as such, and must not */ +/* be misrepresented as being the original software. */ +/* 3. This notice may not be removed or altered from any source */ +/* distribution. */ +/* */ +/*****************************************************************************/ + + + +#ifndef _C65_H +#define _C65_H + + + +/* Check for errors */ +#if !defined(__C65__) +# error This module may only be used when compiling for the MEGA65! +#endif + + + +/* Additional key defines */ +#define CH_F1 133 +#define CH_F2 137 +#define CH_F3 134 +#define CH_F4 138 +#define CH_F5 135 +#define CH_F6 139 +#define CH_F7 136 +#define CH_F8 140 + +/* Color defines */ +#define COLOR_BLACK 0x00 +#define COLOR_WHITE 0x01 +#define COLOR_RED 0x02 +#define COLOR_CYAN 0x03 +#define COLOR_PURPLE 0x04 +#define COLOR_GREEN 0x05 +#define COLOR_BLUE 0x06 +#define COLOR_YELLOW 0x07 +#define COLOR_ORANGE 0x08 +#define COLOR_BROWN 0x09 +#define COLOR_LIGHTRED 0x0A +#define COLOR_GRAY1 0x0B +#define COLOR_GRAY2 0x0C +#define COLOR_LIGHTGREEN 0x0D +#define COLOR_LIGHTBLUE 0x0E +#define COLOR_GRAY3 0x0F + +/* TGI color defines */ +#define TGI_COLOR_BLACK COLOR_BLACK +#define TGI_COLOR_WHITE COLOR_WHITE +#define TGI_COLOR_RED COLOR_RED +#define TGI_COLOR_CYAN COLOR_CYAN +#define TGI_COLOR_PURPLE COLOR_PURPLE +#define TGI_COLOR_GREEN COLOR_GREEN +#define TGI_COLOR_BLUE COLOR_BLUE +#define TGI_COLOR_YELLOW COLOR_YELLOW +#define TGI_COLOR_ORANGE COLOR_ORANGE +#define TGI_COLOR_BROWN COLOR_BROWN +#define TGI_COLOR_LIGHTRED COLOR_LIGHTRED +#define TGI_COLOR_GRAY1 COLOR_GRAY1 +#define TGI_COLOR_GRAY2 COLOR_GRAY2 +#define TGI_COLOR_LIGHTGREEN COLOR_LIGHTGREEN +#define TGI_COLOR_LIGHTBLUE COLOR_LIGHTBLUE +#define TGI_COLOR_GRAY3 COLOR_GRAY3 + +/* Masks for joy_read */ +#define JOY_UP_MASK 0x01 +#define JOY_DOWN_MASK 0x02 +#define JOY_LEFT_MASK 0x04 +#define JOY_RIGHT_MASK 0x08 +#define JOY_BTN_1_MASK 0x10 + + +/* Define hardware */ +#include <_vic3.h> +#define VIC (*(struct __vic2*)0xD000) + +#include <_sid.h> +#define SID1 (*(struct __sid*)0xD400) +#define SID2 (*(struct __sid*)0xD420) + +#include <_6526.h> +#define CIA1 (*(struct __6526*)0xDC00) +#define CIA2 (*(struct __6526*)0xDD00) + + +/* Define special memory areas */ +#define COLOR_RAM ((unsigned char*)0xD800) + + +/* End of c65.h */ +#endif diff --git a/include/cbm.h b/include/cbm.h index 0679b2d65..89c01ffc0 100644 --- a/include/cbm.h +++ b/include/cbm.h @@ -67,6 +67,10 @@ # include <pet.h> #elif defined(__CX16__) && !defined(_CX16_H) # include <cx16.h> +#elif defined(__C65__) && !defined(_C65_H) +# include <c65.h> +#elif defined(__MEGA65__) && !defined(_MEGA65_H) +# include <mega65.h> #endif /* Include definitions for CBM file types */ diff --git a/include/cbm264.h b/include/cbm264.h index ab634b721..c220bf407 100644 --- a/include/cbm264.h +++ b/include/cbm264.h @@ -110,7 +110,23 @@ #define COLOR_LIGHTBLUE (BCOLOR_LIGHTBLUE | CATTR_LUMA7) #define COLOR_GRAY3 (BCOLOR_WHITE | CATTR_LUMA5) - +/* TGI color defines */ +#define TGI_COLOR_BLACK (BCOLOR_BLACK) +#define TGI_COLOR_WHITE (BCOLOR_WHITE | CATTR_LUMA7) +#define TGI_COLOR_RED (BCOLOR_RED | CATTR_LUMA4) +#define TGI_COLOR_CYAN (BCOLOR_CYAN | CATTR_LUMA7) +#define TGI_COLOR_PURPLE (BCOLOR_LIGHTVIOLET | CATTR_LUMA7) +#define TGI_COLOR_GREEN (BCOLOR_GREEN | CATTR_LUMA7) +#define TGI_COLOR_BLUE (BCOLOR_BLUE | CATTR_LUMA7) +#define TGI_COLOR_YELLOW (BCOLOR_YELLOW | CATTR_LUMA7) +#define TGI_COLOR_ORANGE (BCOLOR_ORANGE | CATTR_LUMA7) +#define TGI_COLOR_BROWN (BCOLOR_BROWN | CATTR_LUMA7) +#define TGI_COLOR_LIGHTRED (BCOLOR_RED | CATTR_LUMA7) +#define TGI_COLOR_GRAY1 (BCOLOR_WHITE | CATTR_LUMA1) +#define TGI_COLOR_GRAY2 (BCOLOR_WHITE | CATTR_LUMA3) +#define TGI_COLOR_LIGHTGREEN (BCOLOR_LIGHTGREEN | CATTR_LUMA7) +#define TGI_COLOR_LIGHTBLUE (BCOLOR_LIGHTBLUE | CATTR_LUMA7) +#define TGI_COLOR_GRAY3 (BCOLOR_WHITE | CATTR_LUMA5) /* Masks for joy_read */ #define JOY_UP_MASK 0x01 diff --git a/include/conio.h b/include/conio.h index bac20e3c5..3e1614cc1 100644 --- a/include/conio.h +++ b/include/conio.h @@ -110,6 +110,21 @@ char cgetc (void); ** 1 (see below), a blinking cursor is displayed while waiting. */ +char* __fastcall__ cgets (char* buffer, int size); +/* Get a string of characters directly from the console. The function returns +** when size - 1 characters or either CR/LF are read. Note the parameters are +** more aligned with stdio fgets() as opposed to the quirky "standard" conio +** cgets(). Besides providing saner parameters, the function also echoes CRLF +** when either CR/LF are read but does NOT append either in the buffer. This is +** to correspond to stdio fgets() which echoes CRLF, but prevents a "gotcha" +** where the buffer might not be able to accommodate both CR and LF at the end. +** +** param: buffer - where to save the input, must be non-NULL +** param: size - size of the buffer, must be > 1 +** return: buffer if successful, NULL on error +** author: Russell-S-Harper +*/ + int cscanf (const char* format, ...); /* Like scanf(), but uses direct keyboard input */ @@ -216,7 +231,18 @@ void __fastcall__ cputhex16 (unsigned val); # define cpeekrevers() _cpeekrevers() #endif - +#ifdef _chline +# define chline(len) _chline(len) +#endif +#ifdef _cvline +# define cvline(len) _cvline(len) +#endif +#ifdef _chlinexy +# define chlinexy(x, y, len) _chlinexy(x, y, len) +#endif +#ifdef _cvlinexy +# define cvlinexy(x, y, len) _cvlinexy(x, y, len) +#endif /* End of conio.h */ #endif diff --git a/include/mega65.h b/include/mega65.h new file mode 100644 index 000000000..83d48606d --- /dev/null +++ b/include/mega65.h @@ -0,0 +1,120 @@ +/*****************************************************************************/ +/* */ +/* mega65.h */ +/* */ +/* MEGA65 system specific definitions */ +/* */ +/* */ +/* */ +/* (C) 1998-2013, Ullrich von Bassewitz */ +/* Roemerstrasse 52 */ +/* D-70794 Filderstadt */ +/* EMail: uz@cc65.org */ +/* */ +/* */ +/* This software is provided 'as-is', without any expressed or implied */ +/* warranty. In no event will the authors be held liable for any damages */ +/* arising from the use of this software. */ +/* */ +/* Permission is granted to anyone to use this software for any purpose, */ +/* including commercial applications, and to alter it and redistribute it */ +/* freely, subject to the following restrictions: */ +/* */ +/* 1. The origin of this software must not be misrepresented; you must not */ +/* claim that you wrote the original software. If you use this software */ +/* in a product, an acknowledgment in the product documentation would be */ +/* appreciated but is not required. */ +/* 2. Altered source versions must be plainly marked as such, and must not */ +/* be misrepresented as being the original software. */ +/* 3. This notice may not be removed or altered from any source */ +/* distribution. */ +/* */ +/*****************************************************************************/ + + + +#ifndef _MEGA65_H +#define _MEGA65_H + + + +/* Check for errors */ +#if !defined(__MEGA65__) +# error This module may only be used when compiling for the MEGA65! +#endif + + + +/* Additional key defines */ +#define CH_F1 133 +#define CH_F2 137 +#define CH_F3 134 +#define CH_F4 138 +#define CH_F5 135 +#define CH_F6 139 +#define CH_F7 136 +#define CH_F8 140 + +/* Color defines */ +#define COLOR_BLACK 0x00 +#define COLOR_WHITE 0x01 +#define COLOR_RED 0x02 +#define COLOR_CYAN 0x03 +#define COLOR_PURPLE 0x04 +#define COLOR_GREEN 0x05 +#define COLOR_BLUE 0x06 +#define COLOR_YELLOW 0x07 +#define COLOR_ORANGE 0x08 +#define COLOR_BROWN 0x09 +#define COLOR_LIGHTRED 0x0A +#define COLOR_GRAY1 0x0B +#define COLOR_GRAY2 0x0C +#define COLOR_LIGHTGREEN 0x0D +#define COLOR_LIGHTBLUE 0x0E +#define COLOR_GRAY3 0x0F + +/* TGI color defines */ +#define TGI_COLOR_BLACK COLOR_BLACK +#define TGI_COLOR_WHITE COLOR_WHITE +#define TGI_COLOR_RED COLOR_RED +#define TGI_COLOR_CYAN COLOR_CYAN +#define TGI_COLOR_PURPLE COLOR_PURPLE +#define TGI_COLOR_GREEN COLOR_GREEN +#define TGI_COLOR_BLUE COLOR_BLUE +#define TGI_COLOR_YELLOW COLOR_YELLOW +#define TGI_COLOR_ORANGE COLOR_ORANGE +#define TGI_COLOR_BROWN COLOR_BROWN +#define TGI_COLOR_LIGHTRED COLOR_LIGHTRED +#define TGI_COLOR_GRAY1 COLOR_GRAY1 +#define TGI_COLOR_GRAY2 COLOR_GRAY2 +#define TGI_COLOR_LIGHTGREEN COLOR_LIGHTGREEN +#define TGI_COLOR_LIGHTBLUE COLOR_LIGHTBLUE +#define TGI_COLOR_GRAY3 COLOR_GRAY3 + +/* Masks for joy_read */ +#define JOY_UP_MASK 0x01 +#define JOY_DOWN_MASK 0x02 +#define JOY_LEFT_MASK 0x04 +#define JOY_RIGHT_MASK 0x08 +#define JOY_BTN_1_MASK 0x10 + + +/* Define hardware */ +#include <_vic3.h> +#define VIC (*(struct __vic2*)0xD000) + +#include <_sid.h> +#define SID1 (*(struct __sid*)0xD400) +#define SID2 (*(struct __sid*)0xD420) + +#include <_6526.h> +#define CIA1 (*(struct __6526*)0xDC00) +#define CIA2 (*(struct __6526*)0xDD00) + + +/* Define special memory areas */ +#define COLOR_RAM ((unsigned char*)0xD800) + + +/* End of mega65.h */ +#endif diff --git a/include/plus4.h b/include/plus4.h index 7730938e8..5eb14d24d 100644 --- a/include/plus4.h +++ b/include/plus4.h @@ -57,8 +57,7 @@ /* The addresses of the static drivers */ extern void plus4_stdjoy_joy[]; /* Referred to by joy_static_stddrv[] */ extern void plus4_stdser_ser[]; /* Referred to by ser_static_stddrv[] */ - - +extern void ted_hi_tgi[]; /* End of plus4.h */ #endif diff --git a/include/target.h b/include/target.h index 7663a39dd..5f9d8859c 100644 --- a/include/target.h +++ b/include/target.h @@ -37,6 +37,8 @@ # include <apple2enh.h> #elif defined(__APPLE2__) # include <apple2.h> +#elif defined(__AGAT__) +# include <agat.h> #elif defined(__ATARI__) # include <atari.h> #elif defined(__ATARI2600__) diff --git a/include/tgi.h b/include/tgi.h index 2ef65b856..ecd98e6e8 100644 --- a/include/tgi.h +++ b/include/tgi.h @@ -141,15 +141,16 @@ unsigned char tgi_getmaxcolor (void); ** then be getmaxcolor()+1). */ -void __fastcall__ tgi_setcolor (unsigned char color); -/* Set the current drawing color. */ +void __fastcall__ tgi_setcolor (unsigned char color_index); +/* Set the current drawing color (palette index). */ unsigned char tgi_getcolor (void); -/* Return the current drawing color. */ +/* Return the current drawing color (palette index). */ void __fastcall__ tgi_setpalette (const unsigned char* palette); /* Set the palette (not available with all drivers/hardware). palette is -** a pointer to as many entries as there are colors. +** a pointer to as many entries as there are colors required for the drivers +** palette. This palette is the (only) place where to use the TGI_COLOR values. */ const unsigned char* tgi_getpalette (void); diff --git a/libsrc/Makefile b/libsrc/Makefile index 8a4f11414..821ff8372 100644 --- a/libsrc/Makefile +++ b/libsrc/Makefile @@ -1,13 +1,31 @@ +# ---- Display info during parsing phase ---- +SILENT:=$(findstring s,$(word 1, $(MAKEFLAGS))) +ifneq ($(SILENT),s) + $(info Using Makefile: $(realpath $(firstword $(MAKEFILE_LIST))) $(MAKECMDGOALS)) +endif + ifneq ($(shell echo),) CMD_EXE = 1 endif +ifeq ($(SILENT),s) + QUIET = 1 +endif + +ifdef QUIET + .SILENT: + PQ = "QUIET=1" + PD = --no-print-directory +endif + CBMS = c128 \ c16 \ c64 \ + c65 \ cbm510 \ cbm610 \ cx16 \ + mega65 \ pet \ plus4 \ vic20 @@ -15,7 +33,8 @@ CBMS = c128 \ GEOS = geos-apple \ geos-cbm -TARGETS = apple2 \ +TARGETS = agat \ + apple2 \ apple2enh \ atari \ atarixl \ @@ -124,7 +143,7 @@ zip: $(foreach dir,$(OUTPUTDIRS),$(ZIP_recipe)) $(TARGETS): | ../lib - @$(MAKE) --no-print-directory $@ + @$(MAKE) $(PD) $@ $(PQ) # ../lib must be created globally before doing lib targets in parallel ../lib: @@ -243,8 +262,8 @@ $1_DYNS = $$(patsubst $$($1_SRCPAT),$$($1_DYNPAT),$$($1_SRCS)) $1_DRVS = $$(patsubst $$($1_DYNPAT),$$($1_DRVPAT),$$($1_DYNS)) $$($1_STCPAT): $$($1_SRCPAT) - @echo $$(TARGET) - $$< - static - @$$(CA65) -t $$(TARGET) -D DYN_DRV=0 $$(CA65FLAGS) --create-dep $$(@:.o=.d) -o $$@ $$< + $$(if $$(QUIET),@echo $$(TARGET) - $$< - static) + $$(CA65) -t $$(TARGET) -D DYN_DRV=0 $$(CA65FLAGS) --create-dep $$(@:.o=.d) -o $$@ $$< OBJS += $$($1_STCS) DEPS += $$($1_STCS:.o=.d) @@ -252,8 +271,8 @@ DEPS += $$($1_STCS:.o=.d) $$($1_DYNS): | $$($1_DYNDIR) $$($1_DRVPAT): $$($1_DYNPAT) $$(ZPOBJ) | $$($1_DRVDIR) - @echo $$(TARGET) - $$(<F) - @$$(LD65) -o $$@ -t module $$^ + $$(if $$(QUIET),@echo $$(TARGET) - $$(<F)) + $$(LD65) -o $$@ -t module $$^ $$($1_DYNDIR) $$($1_DRVDIR): @$$(call MKDIR,$$@) @@ -275,16 +294,16 @@ export CC65_HOME := $(abspath ..) define ASSEMBLE_recipe -$(if $(QUIET),,@echo $(TARGET) - $<) -@$(CA65) -t $(TARGET) $(CA65FLAGS) --create-dep $(@:.o=.d) -o $@ $< + $(if $(QUIET),@echo $(TARGET) - $<) + $(CA65) -t $(TARGET) $(CA65FLAGS) --create-dep $(@:.o=.d) -o $@ $< endef # ASSEMBLE_recipe define COMPILE_recipe -$(if $(QUIET),,@echo $(TARGET) - $<) -@$(CC65) -t $(TARGET) $(CC65FLAGS) --create-dep $(@:.o=.d) --dep-target $@ -o $(@:.o=.s) $< -@$(CA65) -t $(TARGET) -o $@ $(@:.o=.s) + $(if $(QUIET),@echo $(TARGET) - $<) + $(CC65) -t $(TARGET) $(CC65FLAGS) --create-dep $(@:.o=.d) --dep-target $@ -o $(@:.o=.s) $< + $(CA65) -t $(TARGET) -o $@ $(@:.o=.s) endef # COMPILE_recipe @@ -295,12 +314,13 @@ endef # COMPILE_recipe $(COMPILE_recipe) $(EXTRA_OBJPAT): $(EXTRA_SRCPAT) | ../libwrk/$(TARGET) ../lib - @echo $(TARGET) - $(<F) + $(if $(QUIET),@echo $(TARGET) - $(<F)) @$(CA65) -t $(TARGET) $(CA65FLAGS) --create-dep $(@:../lib/%.o=../libwrk/$(TARGET)/%.d) -o $@ $< $(EXTRA_OBJS): | ../lib ../lib/$(TARGET).lib: $(OBJS) | ../lib + $(if $(QUIET),@echo $(TARGET) - $<) $(AR65) a $@ $? ../libwrk/$(TARGET) ../target/$(TARGET)/util: diff --git a/libsrc/agat/_scrsize.s b/libsrc/agat/_scrsize.s new file mode 100644 index 000000000..09d7e879f --- /dev/null +++ b/libsrc/agat/_scrsize.s @@ -0,0 +1,23 @@ +; +; Ullrich von Bassewitz, 26.10.2000 +; Konstantin Fedorov, 12.06.2025 +; +; Screen size variables +; + + .export screensize + + .include "agat.inc" + +screensize: + lda WNDWDTH + bit TATTR + bmi t64 + lsr +t64: + tax + lda WNDBTM + sec + sbc WNDTOP + tay + rts diff --git a/libsrc/agat/break.s b/libsrc/agat/break.s new file mode 100644 index 000000000..d46679ba2 --- /dev/null +++ b/libsrc/agat/break.s @@ -0,0 +1,113 @@ +; +; Ullrich von Bassewitz, 27.09.1998 +; Oleg A. Odintsov, Moscow, 2024 +; +; void __fastcall__ set_brk (unsigned Addr); +; void reset_brk (void); +; + + .export _set_brk, _reset_brk + .destructor _reset_brk + + ; Be sure to export the following variables absolute + .export _brk_a: abs, _brk_x: abs, _brk_y: abs + .export _brk_sr: abs, _brk_pc: abs + + .include "agat.inc" + +_brk_a = $45 +_brk_x = $46 +_brk_y = $47 +_brk_sr = $48 +_brk_sp = $49 +_brk_pc = $3A + +.bss +oldvec: .res 2 ; Old vector + + +.data +uservec: jmp $FFFF ; Patched at runtime + + +.code + +; Set the break vector +.proc _set_brk + + sta uservec+1 + stx uservec+2 ; Set the user vector + + lda oldvec + ora oldvec+1 ; Did we save the vector already? + bne L1 ; Jump if we installed the handler already + + lda BRKVec + sta oldvec + lda BRKVec+1 + sta oldvec+1 ; Save the old vector + +L1: lda #<brk_handler ; Set the break vector to our routine + ldx #>brk_handler + sta BRKVec + stx BRKVec+1 + rts + +.endproc + + +; Reset the break vector +.proc _reset_brk + + lda oldvec + ldx oldvec+1 + beq @L9 ; Jump if vector not installed + sta BRKVec + stx BRKVec+1 + lda #$00 + sta oldvec ; Clear the old vector + stx oldvec+1 +@L9: rts + +.endproc + + + +; Break handler, called if a break occurs + +.proc brk_handler + + sec + lda _brk_pc + sbc #$02 ; Point to start of brk + sta _brk_pc + lda _brk_pc+1 + sbc #$00 + sta _brk_pc+1 + + clc + lda _brk_sp + adc #$04 ; Adjust stack pointer + sta _brk_sp + + lda _brk_sr ; Clear brk + and #$EF + sta _brk_sr + + jsr uservec ; Call the user's routine + + lda _brk_pc+1 + pha + lda _brk_pc + pha + lda _brk_sr + pha + + ldx _brk_x + ldy _brk_y + lda _brk_a + + rti ; Jump back... + +.endproc + diff --git a/libsrc/agat/cclear.s b/libsrc/agat/cclear.s new file mode 100644 index 000000000..93a561ef4 --- /dev/null +++ b/libsrc/agat/cclear.s @@ -0,0 +1,18 @@ +; +; Oleg A. Odintsov, Moscow, 2024 +; +; void __fastcall__ cclear (unsigned char length); +; + + .export _cclear + .import COUT + .include "zeropage.inc" + +_cclear: + sta ptr1 + lda #$A0 +next: + jsr COUT + dec ptr1 + bne next + rts diff --git a/libsrc/agat/cgetc.s b/libsrc/agat/cgetc.s new file mode 100644 index 000000000..839e4314a --- /dev/null +++ b/libsrc/agat/cgetc.s @@ -0,0 +1,23 @@ +; +; Oleg A. Odintsov, Moscow, 2024 +; +; char cgetc (void); +; + + .export _cgetc + .import cursor + .include "agat.inc" + +_cgetc: + lda #$DF ; _ + bit cursor + bne hascur + lda #$00 +hascur: + sta CURSOR + jsr j1 + cmp #$A0 + bpl :+ + and #$7F +: rts +j1: jmp (VCIN) diff --git a/libsrc/agat/chline.s b/libsrc/agat/chline.s new file mode 100644 index 000000000..bc95b2a16 --- /dev/null +++ b/libsrc/agat/chline.s @@ -0,0 +1,33 @@ +; +; Ullrich von Bassewitz, 08.08.1998 +; Colin Leroy-Mira, 26.05.2025 +; Konstantin Fedorov, 12.06.2025 +; +; void chlinexy (unsigned char x, unsigned char y, unsigned char length); +; void chline (unsigned char length); +; + + .export _chlinexy, _chline, chlinedirect + .import gotoxy, putchar + + .include "zeropage.inc" + +_chlinexy: + pha ; Save the length + jsr gotoxy ; Call this one, will pop params + pla ; Restore the length and run into _chline + +_chline: + ldx #$1B ; horizontal line character + +chlinedirect: + stx tmp1 + cmp #$00 ; Is the length zero? + beq done ; Jump if done + sta tmp2 +: lda tmp1 ; Screen code + jsr putchar ; Direct output + dec tmp2 + bne :- +done: rts + diff --git a/libsrc/agat/clrscr.s b/libsrc/agat/clrscr.s new file mode 100644 index 000000000..8b2d7100b --- /dev/null +++ b/libsrc/agat/clrscr.s @@ -0,0 +1,10 @@ +; +; Kevin Ruland +; +; void clrscr (void); +; + + .export _clrscr + .import HOME + +_clrscr := HOME diff --git a/libsrc/agat/color.s b/libsrc/agat/color.s new file mode 100644 index 000000000..0992bb860 --- /dev/null +++ b/libsrc/agat/color.s @@ -0,0 +1,20 @@ +; +; Oleg A. Odintsov, Moscow, 2024 +; +; unsigned char __fastcall__ textcolor (unsigned char color); +; + + + .export _textcolor + .include "agat.inc" + + +_textcolor: + ldx TATTR + eor TATTR + and #$07 + eor TATTR + sta TATTR + txa + and #$0F + rts diff --git a/libsrc/agat/cout.s b/libsrc/agat/cout.s new file mode 100644 index 000000000..ae9d8a177 --- /dev/null +++ b/libsrc/agat/cout.s @@ -0,0 +1,14 @@ +; +; Oleg A. Odintsov, Moscow, 2024 +; +; COUT routine +; + + .export COUT + .include "agat.inc" + +COUT: + cmp #$10 + bpl out + ora #$80 +out: jmp (VCOUT) diff --git a/libsrc/agat/cputc.s b/libsrc/agat/cputc.s new file mode 100644 index 000000000..b82ce22e6 --- /dev/null +++ b/libsrc/agat/cputc.s @@ -0,0 +1,60 @@ +; +; Oleg A. Odintsov, Moscow, 2024 +; Konstantin Fedorov, 12.06.2025 +; +; void __fastcall__ cputcxy (unsigned char x, unsigned char y, char c); +; void __fastcall__ cputc (char c); +; + + .import COUT + .export _cputcxy, _cputc, newline, putchar,putchardirect + .import gotoxy, VTABZ + .include "agat.inc" + +_cputcxy: + pha + jsr gotoxy + pla +_cputc: + cmp #$0D ; Test for \r = carriage return + bne notleft + ldy #$00 + sty CH + rts +notleft: + cmp #$0A ; Test for \n = line feed + beq newline + +putchar: + ldy CH + sta (BASL),Y + iny + lda TATTR + bmi wch ; Skip if t64 + sta (BASL),Y + iny +wch: + sty CH + cpy WNDWDTH + bcc noend + ldy #$00 + sty CH +newline: + inc CV + lda CV + cmp WNDBTM + bcc :+ + lda WNDTOP + sta CV +: jmp VTABZ +noend: + rts + +putchardirect: + ldy CH + sta (BASL),Y + lda TATTR + bmi :+ + iny + sta (BASL),Y +: rts diff --git a/libsrc/agat/crt0.s b/libsrc/agat/crt0.s new file mode 100644 index 000000000..eaca89308 --- /dev/null +++ b/libsrc/agat/crt0.s @@ -0,0 +1,78 @@ +; +; Startup code for cc65 (Agat version) +; + + .export __STARTUP__ : absolute = 1 ; Mark as startup + .export _exit + + .import initlib, donelib + .import zerobss, callmain + .import __ONCE_LOAD__, __ONCE_SIZE__ ; Linker generated + + .include "zeropage.inc" + .include "agat.inc" + +; ------------------------------------------------------------------------ + + .segment "STARTUP" + jsr init + jsr zerobss + jsr callmain +_exit: + ldx #<exit + lda #>exit + jsr reset + jsr donelib +exit: + ldx #$02 +: lda rvsave,x + sta SOFTEV,x + dex + bpl :- + ldx #zpspace-1 +: lda zpsave,x + sta c_sp,x + dex + bpl :- + ldx #$FF + txs + jmp DOSWARM + + + + .segment "ONCE" + +init: + ldx #zpspace-1 +: lda c_sp,x + sta zpsave,x + dex + bpl :- + + ldx #$02 +: lda SOFTEV,x + sta rvsave,x + dex + bpl :- + + lda HIMEM + ldx HIMEM+1 + sta c_sp + stx c_sp+1 + ldx #<_exit + lda #>_exit + jsr reset + jmp initlib + + .code + +reset: + stx SOFTEV + sta SOFTEV+1 + eor #$A5 + sta PWREDUP + rts + + .segment "INIT" +zpsave: .res zpspace +rvsave: .res 3 diff --git a/libsrc/agat/cvline.s b/libsrc/agat/cvline.s new file mode 100644 index 000000000..63c0d4daf --- /dev/null +++ b/libsrc/agat/cvline.s @@ -0,0 +1,29 @@ +; +; Ullrich von Bassewitz, 08.08.1998 +; Colin Leroy-Mira, 26.05.2025 +; Konstantin Fedorov, 12.06.2025 +; +; void cvlinexy (unsigned char x, unsigned char y, unsigned char length); +; void cvline (unsigned char length); +; + + .export _cvlinexy, _cvline + .import gotoxy, putchardirect, newline + + .include "zeropage.inc" + +_cvlinexy: + pha ; Save the length + jsr gotoxy ; Call this one, will pop params + pla ; Restore the length and run into _cvline + +_cvline: + cmp #$00 ; Is the length zero? + beq done ; Jump if done + sta tmp2 +: lda #$5C ; vertical line character + jsr putchardirect ; Write, no cursor advance + jsr newline ; Advance cursor to next line + dec tmp2 + bne :- +done: rts diff --git a/libsrc/agat/exehdr.s b/libsrc/agat/exehdr.s new file mode 100644 index 000000000..3f3047bf9 --- /dev/null +++ b/libsrc/agat/exehdr.s @@ -0,0 +1,43 @@ +; +; Oliver Schmidt, 2012-06-10 +; +; This module supplies an AppleSingle version 2 file header + entry with +; ID 11 according to https://tools.ietf.org/rfc/rfc1740.txt Appendix A. +; +; Agat target uses this header only for compatibility with Apple Commander +; because Agat's 140K disk filesystem is identical to Apple II DOS 3.3 and +; "ac.jar -as" option can be used to import binaries into disk images. + + .export __EXEHDR__ : absolute = 1 ; Linker referenced + .import __FILETYPE__ ; Linker generated + .import __MAIN_START__, __MAIN_LAST__ ; Linker generated + +; ------------------------------------------------------------------------ + +; Data Fork +ID01_LENGTH = __MAIN_LAST__ - __MAIN_START__ +ID01_OFFSET = ID01 - START + +; ProDOS File Info +ID11_LENGTH = ID01 - ID11 +ID11_OFFSET = ID11 - START + +; ------------------------------------------------------------------------ + + .segment "EXEHDR" + +START: .byte $00, $05, $16, $00 ; Magic number + .byte $00, $02, $00, $00 ; Version number + .res 16 ; Filler + .byte 0, 2 ; Number of entries + .byte 0, 0, 0, 1 ; Entry ID 1 - Data Fork + .byte 0, 0, >ID01_OFFSET, <ID01_OFFSET ; Offset + .byte 0, 0, >ID01_LENGTH, <ID01_LENGTH ; Length + .byte 0, 0, 0, 11 ; Entry ID 11 - ProDOS File Info + .byte 0, 0, >ID11_OFFSET, <ID11_OFFSET ; Offset + .byte 0, 0, >ID11_LENGTH, <ID11_LENGTH ; Length +ID11: .byte 0, %11000011 ; Access - Destroy, Rename, Write, Read + .byte >__FILETYPE__, <__FILETYPE__ ; File Type + .byte 0, 0 ; Auxiliary Type high + .byte >__MAIN_START__, <__MAIN_START__ ; Auxiliary Type low +ID01: diff --git a/libsrc/agat/gotoxy.s b/libsrc/agat/gotoxy.s new file mode 100644 index 000000000..13e7cb747 --- /dev/null +++ b/libsrc/agat/gotoxy.s @@ -0,0 +1,28 @@ +; +; Ullrich von Bassewitz, 06.08.1998 +; Oleg A. Odintsov, Moscow, 2024 +; +; void __fastcall__ gotoxy (unsigned char x, unsigned char y); +; void __fastcall__ gotox (unsigned char x); +; + + .export gotoxy, _gotoxy, _gotox + .import popa, VTABZ + + .include "agat.inc" + +gotoxy: + jsr popa ; Get Y +_gotoxy: + clc + adc WNDTOP + sta CV ; Store Y + jsr VTABZ + jsr popa ; Get X +_gotox: + bit TATTR + bmi t64 + asl +t64: + sta CH ; Store X + rts diff --git a/libsrc/agat/gotoy.s b/libsrc/agat/gotoy.s new file mode 100644 index 000000000..ea0eadbf2 --- /dev/null +++ b/libsrc/agat/gotoy.s @@ -0,0 +1,16 @@ +; +; Ullrich von Bassewitz, 06.08.1998 +; Oleg A. Odintsov, Moscow, 2024 +; +; void __fastcall__ gotoy (unsigned char y); +; + + .import VTABZ + .export _gotoy + .include "agat.inc" + +_gotoy: + clc + adc WNDTOP + sta CV + jmp VTABZ diff --git a/libsrc/agat/home.s b/libsrc/agat/home.s new file mode 100644 index 000000000..a0434c9bb --- /dev/null +++ b/libsrc/agat/home.s @@ -0,0 +1,15 @@ +; +; Oleg A. Odintsov, Moscow, 2024 +; +; HOME routine +; + + .export HOME + .import COUT + + .include "agat.inc" + +HOME: + lda #$8C + jmp COUT + rts diff --git a/libsrc/agat/kbhit.s b/libsrc/agat/kbhit.s new file mode 100644 index 000000000..f2bc4fc9f --- /dev/null +++ b/libsrc/agat/kbhit.s @@ -0,0 +1,19 @@ +; +; Kevin Ruland +; Ullrich von Bassewitz, 2005-03-25 +; Oleg A. Odintsov, Moscow, 2024 +; +; unsigned char kbhit (void); +; + + .export _kbhit + + .include "agat.inc" + +_kbhit: + lda KBD ; Reading KBD checks for keypress + rol ; if high bit is set, key was pressed + lda #$00 + tax + rol + rts diff --git a/libsrc/agat/randomize.s b/libsrc/agat/randomize.s new file mode 100644 index 000000000..9eef16f05 --- /dev/null +++ b/libsrc/agat/randomize.s @@ -0,0 +1,18 @@ +; +; Ullrich von Bassewitz, 07.11.2002 +; Oleg A. Odintsov, Moscow, 2024 +; +; void _randomize (void); +; /* Initialize the random number generator */ +; + + .export __randomize + .import _srand + + .include "agat.inc" + +__randomize: + ldx RNDH ; Use random value supplied by ROM + lda RNDL + jmp _srand ; Initialize generator + diff --git a/libsrc/agat/revers.s b/libsrc/agat/revers.s new file mode 100644 index 000000000..20c1b9bdb --- /dev/null +++ b/libsrc/agat/revers.s @@ -0,0 +1,38 @@ +; +; Ullrich von Bassewitz, 2005-03-28 +; Oleg A. Odintsov, Moscow, 2024 +; +; unsigned char __fastcall__ revers (unsigned char onoff) +; unsigned char __fastcall__ flash (unsigned char onoff) +; + + .export _revers, _flash + + .include "agat.inc" + +_revers: + tax + beq noinv + lda TATTR + and #$D7 + sta TATTR + rts +noinv: + lda TATTR + ora #$20 + sta TATTR + rts + +_flash: + tax + beq noflash + lda TATTR + and #$DF + ora #$08 + sta TATTR + rts +noflash: + lda TATTR + ora #$20 + sta TATTR + rts diff --git a/libsrc/agat/sysuname.s b/libsrc/agat/sysuname.s new file mode 100644 index 000000000..b2d2a334f --- /dev/null +++ b/libsrc/agat/sysuname.s @@ -0,0 +1,37 @@ +; +; Ullrich von Bassewitz, 2003-08-12 +; +; unsigned char __fastcall__ _sysuname (struct utsname* buf); +; + + .export __sysuname, utsdata + + .import utscopy + + __sysuname = utscopy + +;-------------------------------------------------------------------------- +; Data. We define a fixed utsname struct here and just copy it. + +.rodata + +utsdata: + ; sysname + .asciiz "cc65" + + ; nodename + .asciiz "" + + ; release + .byte .string (>.version) + .byte '.' + .byte .string (<.version) + .byte $00 + + ; version + .byte '0' ; unused + .byte $00 + + ; machine + .asciiz "Agat" + diff --git a/libsrc/agat/vtabz.s b/libsrc/agat/vtabz.s new file mode 100644 index 000000000..88166eb35 --- /dev/null +++ b/libsrc/agat/vtabz.s @@ -0,0 +1,24 @@ +; +; Oleg A. Odintsov, Moscow, 2024 +; +; VTABZ routine +; + + .export VTABZ + .include "agat.inc" + +VTABZ: + lda CV + ror + ror + ror + and #$C0 + sta BASL + lda CV + lsr + lsr + eor BASH + and #$07 + eor BASH + sta BASH + rts diff --git a/libsrc/agat/wherex.s b/libsrc/agat/wherex.s new file mode 100644 index 000000000..a83f7cd75 --- /dev/null +++ b/libsrc/agat/wherex.s @@ -0,0 +1,19 @@ +; +; Kevin Ruland +; Oleg A. Odintsov, Moscow, 2024 +; +; unsigned char wherex (void); +; + + .export _wherex + + .include "agat.inc" + +_wherex: + lda CH + bit TATTR + bmi t64 + lsr +t64: + ldx #$00 + rts diff --git a/libsrc/agat/wherey.s b/libsrc/agat/wherey.s new file mode 100644 index 000000000..4660a55f9 --- /dev/null +++ b/libsrc/agat/wherey.s @@ -0,0 +1,17 @@ +; +; Kevin Ruland +; Oleg A. Odintsov, Moscow, 2024 +; +; unsigned char wherey (void); +; + + .export _wherey + + .include "agat.inc" + +_wherey: + lda CV + sec + sbc WNDTOP + ldx #$00 + rts diff --git a/libsrc/agat/write.s b/libsrc/agat/write.s new file mode 100644 index 000000000..6ac28f32c --- /dev/null +++ b/libsrc/agat/write.s @@ -0,0 +1,50 @@ +; +; Oleg A. Odintsov, Moscow, 2024 +; +; int __fastcall__ write (int fd, const void* buf, unsigned count); +; + + .export _write + .import popax, popptr1 + .import COUT + + .include "zeropage.inc" + +_write: + sta ptr2 + stx ptr2+1 + jsr popptr1 + jsr popax + + ; Check for zero count + ora ptr2 + beq done + + ; Get char from buf +next: ldy #$00 + lda (ptr1),y + + ; Replace '\n' with '\r' + cmp #$0A + bne output + lda #$8D + + ; Set hi bit and write to device +output: + jsr COUT ; Preserves X and Y + + ; Increment pointer + inc ptr1 + bne :+ + inc ptr1+1 + + ; Decrement count +: dec ptr2 + bne next + dec ptr2+1 + bpl next + + ; Return success +done: lda #$00 + rts + diff --git a/libsrc/apple2/allow_lowercase.s b/libsrc/apple2/allow_lowercase.s index 648276b4c..b78544a66 100644 --- a/libsrc/apple2/allow_lowercase.s +++ b/libsrc/apple2/allow_lowercase.s @@ -4,8 +4,11 @@ ; unsigned char __fastcall__ allow_lowercase (unsigned char onoff); ; +.ifndef __APPLE2ENH__ + .export _allow_lowercase - .import uppercasemask, return0, return1 + .import return0 + .import uppercasemask, return1 _allow_lowercase: tax @@ -21,3 +24,5 @@ _allow_lowercase: values: .byte $DF ; Force uppercase .byte $FF ; Keep lowercase + +.endif diff --git a/libsrc/apple2/boxchars.s b/libsrc/apple2/boxchars.s new file mode 100644 index 000000000..8feee3bd3 --- /dev/null +++ b/libsrc/apple2/boxchars.s @@ -0,0 +1,73 @@ +; +; Colin Leroy-Mira and Oliver Schmidt, 26.05.2025 +; +; Initialize box-drawing characters according to +; MouseText availability +; + +.ifndef __APPLE2ENH__ + + .constructor initboxchars + .import machinetype + + .export _CH_HLINE + .export _CH_VLINE + .export _CH_ULCORNER + .export _CH_URCORNER + .export _CH_LLCORNER + .export _CH_LRCORNER + .export _CH_TTEE + .export _CH_BTEE + .export _CH_LTEE + .export _CH_RTEE + .export _CH_CROSS + + .segment "ONCE" + +initboxchars: + bit machinetype ; IIe enhanced or newer? + bvs out + + ldx #NUM_BOXCHARS ; No mousetext, patch characters +: lda std_boxchars,x + sta boxchars,x + dex + bpl :- + +out: rts + +; Replacement chars for when MouseText is not available +std_boxchars: .byte '!' + .byte '-' + .byte '+' + .byte '+' + .byte '+' + .byte '+' + + .data + +; MouseText-based box characters +boxchars: +VERT: .byte $DF +HORIZ: .byte $5F +ULCORNER: .byte $5F +URCORNER: .byte $20 +LLCORNER: .byte $D4 +LRCORNER: .byte $DF + +NUM_BOXCHARS = *-boxchars + +; exported symbols, referencing our 6 bytes +_CH_HLINE = HORIZ +_CH_VLINE = VERT +_CH_ULCORNER = ULCORNER +_CH_URCORNER = URCORNER +_CH_LLCORNER = LLCORNER +_CH_LRCORNER = LRCORNER +_CH_TTEE = ULCORNER +_CH_BTEE = LLCORNER +_CH_LTEE = LLCORNER +_CH_RTEE = LRCORNER +_CH_CROSS = LLCORNER + +.endif ; not __APPLE2ENH__ diff --git a/libsrc/apple2/callmain.s b/libsrc/apple2/callmain.s index 71a8b5611..c43e339aa 100644 --- a/libsrc/apple2/callmain.s +++ b/libsrc/apple2/callmain.s @@ -54,7 +54,7 @@ exit: ldx #$02 ; Copy back the zero-page stuff. ldx #zpspace-1 : lda zpsave,x - sta sp,x + sta c_sp,x dex bpl :- diff --git a/libsrc/apple2/cgetc.s b/libsrc/apple2/cgetc.s index d2ebe5db8..f0b9566ff 100644 --- a/libsrc/apple2/cgetc.s +++ b/libsrc/apple2/cgetc.s @@ -7,6 +7,10 @@ ; .export _cgetc + + .ifndef __APPLE2ENH__ + .import machinetype + .endif .import cursor, putchardirect .include "zeropage.inc" @@ -18,11 +22,14 @@ _cgetc: beq :+ ; Show caret. - .ifdef __APPLE2ENH__ - lda #$7F | $80 ; Checkerboard, screen code - .else + .ifndef __APPLE2ENH__ lda #' ' | $40 ; Blank, flashing + bit machinetype + bpl put_caret .endif + + lda #$7F | $80 ; Checkerboard, screen code +put_caret: jsr putchardirect ; Saves old character in tmp3 ; Wait for keyboard strobe. @@ -44,10 +51,14 @@ _cgetc: ; At this time, the high bit of the key pressed is set. : bit KBDSTRB ; Clear keyboard strobe - .ifdef __APPLE2ENH__ + + .ifndef __APPLE2ENH__ + bit machinetype ; Apple //e or more recent? + bpl clear + .endif bit BUTN0 ; Check if OpenApple is down bmi done - .endif - and #$7F ; If not down, then clear high bit + +clear: and #$7F ; If not down, then clear high bit done: ldx #>$0000 rts diff --git a/libsrc/apple2/cpeekc.s b/libsrc/apple2/cpeekc.s index a6a082eab..4f5361461 100644 --- a/libsrc/apple2/cpeekc.s +++ b/libsrc/apple2/cpeekc.s @@ -4,14 +4,24 @@ ; char cpeekc (void); ; + .ifndef __APPLE2ENH__ + .import machinetype + .endif + .export _cpeekc .include "apple2.inc" _cpeekc: ldy CH - .ifdef __APPLE2ENH__ + sec ; Assume main memory + + .ifndef __APPLE2ENH__ + bit machinetype + bpl peek + .endif + bit RD80VID ; In 80 column mode? bpl peek ; No, just go ahead lda OURCH @@ -21,13 +31,12 @@ _cpeekc: php sei ; No valid MSLOT et al. in aux memory bit HISCR ; Assume SET80COL - .endif + peek: lda (BASL),Y ; Get character - .ifdef __APPLE2ENH__ bcs :+ ; In main memory bit LOWSCR plp -: .endif - eor #$80 ; Invert high bit + +: eor #$80 ; Invert high bit ldx #>$0000 rts diff --git a/libsrc/apple2/cputc.s b/libsrc/apple2/cputc.s index fdf799357..aa4a383b3 100644 --- a/libsrc/apple2/cputc.s +++ b/libsrc/apple2/cputc.s @@ -5,13 +5,13 @@ ; void __fastcall__ cputc (char c); ; - .ifdef __APPLE2ENH__ .constructor initconio - .endif .export _cputcxy, _cputc .export cputdirect, newline, putchar, putchardirect .import gotoxy, VTABZ + .ifndef __APPLE2ENH__ + .import machinetype .import uppercasemask .endif @@ -22,12 +22,16 @@ .segment "ONCE" - .ifdef __APPLE2ENH__ initconio: + .ifndef __APPLE2ENH__ + bit machinetype + bmi :+ + rts +: + .endif sta SETALTCHAR ; Switch in alternate charset bit LORES ; Limit SET80COL-HISCR to text rts - .endif .code @@ -52,14 +56,22 @@ _cputc: cputdirect: jsr putchar - .ifdef __APPLE2ENH__ + + .ifndef __APPLE2ENH__ + bit machinetype + bpl :+ + .endif bit RD80VID ; In 80 column mode? bpl :+ inc OURCH ; Bump to next column lda OURCH + .ifdef __APPLE2ENH__ bra check ; Must leave CH alone -: .endif - inc CH ; Bump to next column + .else + jmp check + .endif + +: inc CH ; Bump to next column lda CH check: cmp WNDWDTH bcc done @@ -67,13 +79,24 @@ check: cmp WNDWDTH left: .ifdef __APPLE2ENH__ stz CH ; Goto left edge of screen - bit RD80VID ; In 80 column mode? - bpl done - stz OURCH ; Goto left edge of screen .else - lda #$00 ; Goto left edge of screen + lda #$00 sta CH .endif + + .ifndef __APPLE2ENH__ + bit machinetype + bpl done + .endif + + bit RD80VID ; In 80 column mode? + bpl done + .ifdef __APPLE2ENH__ + stz OURCH ; Goto left edge of screen + .else + sta OURCH + .endif + done: rts newline: @@ -100,8 +123,14 @@ mask: and INVFLG ; Apply normal, inverse, flash putchardirect: tax ldy CH - .ifdef __APPLE2ENH__ + sec ; Assume main memory + + .ifndef __APPLE2ENH__ + bit machinetype + bpl put + .endif + bit RD80VID ; In 80 column mode? bpl put ; No, just go ahead lda OURCH @@ -111,14 +140,13 @@ putchardirect: php sei ; No valid MSLOT et al. in aux memory bit HISCR ; Assume SET80COL - .endif + put: lda (BASL),Y ; Get current character sta tmp3 ; Save old character for _cgetc txa sta (BASL),Y - .ifdef __APPLE2ENH__ + bcs :+ ; In main memory bit LOWSCR plp -: .endif - rts +: rts diff --git a/libsrc/apple2/crt0.s b/libsrc/apple2/crt0.s index 628303687..44450b4b9 100644 --- a/libsrc/apple2/crt0.s +++ b/libsrc/apple2/crt0.s @@ -43,7 +43,7 @@ ; Save the zero-page locations that we need. init: ldx #zpspace-1 -: lda sp,x +: lda c_sp,x sta zpsave,x dex bpl :- @@ -56,8 +56,10 @@ init: ldx #zpspace-1 bpl :- ; Check for ProDOS. - ldy $BF00 ; MLI call entry point - cpy #$4C ; Is MLI present? (JMP opcode) + lda $BF00 ; MLI call entry point + sec + sbc #$4C ; Is MLI present? (JMP opcode) + pha ; Backup the result for later bne basic ; Check the ProDOS system bit map. @@ -81,8 +83,8 @@ basic: lda HIMEM ldx HIMEM+1 ; Set up the C stack. -: sta sp - stx sp+1 +: sta c_sp + stx c_sp+1 ; ProDOS TechRefMan, chapter 5.3.5: ; "Your system program should place in the RESET vector the @@ -99,7 +101,20 @@ basic: lda HIMEM bit $C081 bit $C081 - ; Set the source start address. + pla ; If not running ProDOS, we need to patch 6502 vectors. + beq :+ + + lda #<reset_6502 + ldx #>reset_6502 + sta ROM_RST + stx ROM_RST+1 + + lda #<irq_6502 + ldx #>irq_6502 + sta ROM_IRQ + stx ROM_IRQ+1 + +: ; Set the source start address. ; Aka __LC_LOAD__ iff segment LC exists. lda #<(__ONCE_LOAD__ + __ONCE_SIZE__) ldy #>(__ONCE_LOAD__ + __ONCE_SIZE__) @@ -144,6 +159,14 @@ quit: jsr $BF00 ; MLI call entry point .byte $65 ; Quit .word q_param +reset_6502: ; Used with DOS3.3 programs + bit $C082 ; Switch in ROM + jmp (ROM_RST) ; Jump to ROM's RESET vector + +irq_6502: ; Used with DOS3.3 programs + bit $C082 ; Switch in ROM + jmp (ROM_IRQ) ; Jump to ROM's IRQ/BRK vector + ; ------------------------------------------------------------------------ .rodata diff --git a/libsrc/apple2/detect80cols.s b/libsrc/apple2/detect80cols.s new file mode 100644 index 000000000..c6f263566 --- /dev/null +++ b/libsrc/apple2/detect80cols.s @@ -0,0 +1,56 @@ +; +; Colin Leroy-Mira, 27/05/2025 +; +; Verify the presence of a 80 columns card in slot 3, +; and publish a flag accordingly. +; + .export aux80col + + .ifndef __APPLE2ENH__ + .import machinetype + .endif + + .constructor detect80cols + + .include "apple2.inc" + + .data + +aux80col: .byte 0 + + .segment "ONCE" + +IdOfsTable: ; Table of bytes positions, used to check four + ; specific bytes on the slot's firmware to make + ; sure this is a serial card. + .byte $05 ; Pascal 1.0 ID byte + .byte $07 ; Pascal 1.0 ID byte + .byte $0B ; Pascal 1.1 generic signature byte + .byte $0C ; Device signature byte + +IdValTable: ; Table of expected values for the four checked + ; bytes + .byte $38 ; ID Byte 0 (from Pascal 1.0), fixed + .byte $18 ; ID Byte 1 (from Pascal 1.0), fixed + .byte $01 ; Generic signature for Pascal 1.1, fixed + .byte $88 ; Device signature byte (80 columns card) + +IdTableLen = * - IdValTable + +detect80cols: + .ifndef __APPLE2ENH__ + bit machinetype ; Check we're on a //e at least, otherwise we + bpl NoDev ; handle no 80cols hardware (like Videx) + .endif + + ldx #IdTableLen-1 +: ldy IdOfsTable,x ; Check Pascal 1.1 Firmware Protocol ID bytes + lda IdValTable,x + cmp $C300,y + bne NoDev + dex + bpl :- + + dec aux80col ; We have an 80-columns card! Set flag to $FF + +NoDev: rts diff --git a/libsrc/apple2/dynchline.s b/libsrc/apple2/dynchline.s new file mode 100644 index 000000000..74cc5a41e --- /dev/null +++ b/libsrc/apple2/dynchline.s @@ -0,0 +1,41 @@ +; +; Ullrich von Bassewitz, 08.08.1998 +; Colin Leroy-Mira, 26.05.2025 +; +; void __fastcall__ dyn_chlinexy (unsigned char c, unsigned char x, unsigned char y, unsigned char length); +; void __fastcall__ dyn_chline (unsigned char c, unsigned char length); +; + +.ifndef __APPLE2ENH__ + + .export _dyn_chlinexy, _dyn_chline, chlinedirect + .import gotoxy, cputdirect, popa + .import machinetype + + .include "zeropage.inc" + .include "apple2.inc" + +_dyn_chlinexy: + pha ; Save the length + jsr gotoxy ; Call this one, will pop params + pla ; Restore the length and run into _chline + +_dyn_chline: + pha + jsr popa ; Get the character to draw + eor #$80 ; Invert high bit + tax + pla + +chlinedirect: + stx tmp1 + cmp #$00 ; Is the length zero? + beq done ; Jump if done + sta tmp2 +: lda tmp1 ; Screen code + jsr cputdirect ; Direct output + dec tmp2 + bne :- +done: rts + +.endif diff --git a/libsrc/apple2/dyncvline.s b/libsrc/apple2/dyncvline.s new file mode 100644 index 000000000..b74126a4d --- /dev/null +++ b/libsrc/apple2/dyncvline.s @@ -0,0 +1,40 @@ +; +; Ullrich von Bassewitz, 08.08.1998 +; Colin Leroy-Mira, 26.05.2025 +; +; void __fastcall__ dyn_cvlinexy (unsigned char c, unsigned char x, unsigned char y, unsigned char length); +; void __fastcall__ dyn_cvline (unsigned char c, unsigned char length); +; + +.ifndef __APPLE2ENH__ + + .export _dyn_cvlinexy, _dyn_cvline + .import gotoxy, putchar, newline, popa + .import machinetype + + .include "zeropage.inc" + +_dyn_cvlinexy: + pha ; Save the length + jsr gotoxy ; Call this one, will pop params + pla ; Restore the length and run into _cvline + +_dyn_cvline: + pha + jsr popa ; Get the character to draw + eor #$80 ; Invert high bit + tax + pla + + stx tmp1 + cmp #$00 ; Is the length zero? + beq done ; Jump if done + sta tmp2 +: lda tmp1 ; Screen code + jsr putchar ; Write, no cursor advance + jsr newline ; Advance cursor to next line + dec tmp2 + bne :- +done: rts + +.endif diff --git a/libsrc/apple2/exec.s b/libsrc/apple2/exec.s index ec90f19bb..38f31ee37 100644 --- a/libsrc/apple2/exec.s +++ b/libsrc/apple2/exec.s @@ -6,6 +6,7 @@ .export _exec .import mli_file_info_direct + .import aux80col .import pushname, popname, popax, done, _exit .include "zeropage.inc" @@ -41,9 +42,9 @@ _exec: ; binary programs so we should do the same too in any case ; especially as _we_ rely on it in mainargs.s for argv[0] ldy #$00 - lda (sp),y + lda (c_sp),y tay -: lda (sp),y +: lda (c_sp),y sta $0280,y dey bpl :- @@ -115,7 +116,8 @@ setbuf: lda #$00 ; Low byte sta io_buffer stx io_buffer+1 - .ifdef __APPLE2ENH__ + bit aux80col + bpl :+ ; Calling the 80 column firmware needs the ROM switched ; in, otherwise it copies the F8 ROM to the LC (@ $CEF4) bit $C082 @@ -128,9 +130,8 @@ setbuf: lda #$00 ; Low byte ; Switch in LC bank 2 for R/O bit $C080 - .endif - ; Reset stack as we already passed +: ; Reset stack as we already passed ; the point of no return anyway ldx #$FF txs diff --git a/libsrc/apple2/extra/iobuf-0800.s b/libsrc/apple2/extra/iobuf-0800.s index 694b91fdb..b00dba6ae 100644 --- a/libsrc/apple2/extra/iobuf-0800.s +++ b/libsrc/apple2/extra/iobuf-0800.s @@ -54,18 +54,20 @@ iobuf_alloc: rts ; Mark table entry as used -: lda #$FF - sta table,x +: dec table,x ; Convert table index to address hibyte txa asl asl - clc + ; Skip clearing carry, it can't be set as long as MAX_FDS*4 is + ; less than 64. + .assert MAX_FDS*4 < $40, error adc #>$0800 ; Store address in "memptr" - ldy #$01 + ; (Y still equals 0 from popptr1) + iny sta (ptr1),y dey tya @@ -82,8 +84,7 @@ iobuf_free: ; Mark table entry as free tax - lda #$00 - sta table,x + inc table,x rts ; ------------------------------------------------------------------------ diff --git a/libsrc/apple2/filename.s b/libsrc/apple2/filename.s index 0d4b6bedd..f4723ee1f 100644 --- a/libsrc/apple2/filename.s +++ b/libsrc/apple2/filename.s @@ -34,8 +34,8 @@ pushname: sta mliparam + MLI::ON_LINE::UNIT_NUM ; Use allocated pathname buffer - lda sp - ldx sp+1 + lda c_sp + ldx c_sp+1 sta mliparam + MLI::ON_LINE::DATA_BUFFER stx mliparam + MLI::ON_LINE::DATA_BUFFER+1 @@ -46,16 +46,16 @@ pushname: bcs addsp65 ; Get volume name length - lda (sp),y + lda (c_sp),y and #15 ; Max volume name length ; Bracket volume name with slashes to form prefix sta tmp1 lda #'/' - sta (sp),y + sta (c_sp),y ldy tmp1 iny ; Leading slash - sta (sp),y + sta (c_sp),y iny ; Trailing slash ; Adjust source pointer for copy @@ -69,7 +69,7 @@ pushname: ; Copy source to allocated pathname buffer copy: lda (ptr1),y - sta (sp),y + sta (c_sp),y beq setlen iny cpy #FILENAME_MAX @@ -86,7 +86,7 @@ addsp65:ldy #FILENAME_MAX setlen: tya jsr decsp1 ; Preserves A ldy #$00 - sta (sp),y + sta (c_sp),y ; Return success tya diff --git a/libsrc/apple2/get_ostype.s b/libsrc/apple2/get_ostype.s index ea9ff25cc..0bd53717c 100644 --- a/libsrc/apple2/get_ostype.s +++ b/libsrc/apple2/get_ostype.s @@ -4,6 +4,8 @@ ; unsigned char get_ostype (void) ; + ; Priority higher than the default one so that things depending + ; on ostype can get ostype set when called at normal priority .constructor initostype, 9 .export _get_ostype, ostype diff --git a/libsrc/apple2/get_tv.s b/libsrc/apple2/get_tv.s index 830cc4ac1..b2eb4d857 100644 --- a/libsrc/apple2/get_tv.s +++ b/libsrc/apple2/get_tv.s @@ -8,7 +8,7 @@ .import _set_iigs_speed, _get_iigs_speed .import ostype - .constructor calibrate_tv, 2 + .constructor calibrate_tv, 8 ; After ostype .include "accelerator.inc" .include "apple2.inc" diff --git a/libsrc/apple2/gotoxy.s b/libsrc/apple2/gotoxy.s index 2a0261eba..2ecd2a513 100644 --- a/libsrc/apple2/gotoxy.s +++ b/libsrc/apple2/gotoxy.s @@ -8,6 +8,10 @@ .export gotoxy, _gotoxy, _gotox .import popa, VTABZ + .ifndef __APPLE2ENH__ + .import machinetype + .endif + .include "apple2.inc" gotoxy: @@ -22,9 +26,13 @@ _gotoxy: _gotox: sta CH ; Store X - .ifdef __APPLE2ENH__ + + .ifndef __APPLE2ENH__ + bit machinetype + bpl :+ + .endif + bit RD80VID ; In 80 column mode? bpl :+ sta OURCH ; Store X -: .endif - rts +: rts diff --git a/libsrc/apple2/libref.s b/libsrc/apple2/libref.s index 8aa54abab..9c6994a5d 100644 --- a/libsrc/apple2/libref.s +++ b/libsrc/apple2/libref.s @@ -2,10 +2,8 @@ ; Oliver Schmidt, 2013-05-31 ; - .export em_libref, mouse_libref, ser_libref, tgi_libref + .export em_libref, ser_libref .import _exit em_libref := _exit -mouse_libref := _exit ser_libref := _exit -tgi_libref := _exit diff --git a/libsrc/apple2/machinetype.s b/libsrc/apple2/machinetype.s new file mode 100644 index 000000000..7fa70f29f --- /dev/null +++ b/libsrc/apple2/machinetype.s @@ -0,0 +1,24 @@ +.ifndef __APPLE2ENH__ + + .constructor initmachinetype, 8 + + .import ostype + .export machinetype + + .segment "ONCE" + +initmachinetype: + ldx ostype + cpx #$31 ; Apple //e enhanced? + ror machinetype ; Carry to high bit + cpx #$30 ; Apple //e? + ror machinetype + rts + + .data + +; bit 7: Machine is a //e or newer +; bit 6: Machine is a //e enhanced or newer +machinetype: .byte 0 + +.endif diff --git a/libsrc/apple2/mcbdefault.s b/libsrc/apple2/mcbdefault.s index 556a9d8fb..6a369114c 100644 --- a/libsrc/apple2/mcbdefault.s +++ b/libsrc/apple2/mcbdefault.s @@ -9,6 +9,10 @@ .export _mouse_def_callbacks + .ifndef __APPLE2ENH__ + .import machinetype + .endif + .include "apple2.inc" ; ------------------------------------------------------------------------ @@ -42,11 +46,14 @@ cursor = '+' | $40 ; Flashing crosshair .endif getcursor: - .ifdef __APPLE2ENH__ + .ifndef __APPLE2ENH__ + bit machinetype + bpl column + .endif bit RD80VID ; In 80 column mode? bpl column ; No, skip bank switching switch: bit LOWSCR ; Patched at runtime - .endif + column: ldx #$00 ; Patched at runtime getscr: lda $0400,x ; Patched at runtime cmp #cursor @@ -55,9 +62,7 @@ getscr: lda $0400,x ; Patched at runtime setcursor: lda #cursor setscr: sta $0400,x ; Patched at runtime - .ifdef __APPLE2ENH__ bit LOWSCR ; Doesn't hurt in 40 column mode - .endif rts ; ------------------------------------------------------------------------ @@ -65,9 +70,7 @@ setscr: sta $0400,x ; Patched at runtime .code done: - .ifdef __APPLE2ENH__ bit LOWSCR ; Doesn't hurt in 40 column mode - .endif return: rts ; Hide the mouse cursor. @@ -108,14 +111,14 @@ movex: inx bcs :- stx column+1 - .ifdef __APPLE2ENH__ + + ; Patch switch anyway, it will just be skipped over if in 40-col mode adc #7 / 2 ; Left or right half of 40-col column? ldx #<LOWSCR ; Columns 1,3,5..79 bcs :+ .assert LOWSCR + 1 = HISCR, error inx ; Columns 0,2,4..78 : stx switch+1 - .endif rts ; Move the mouse cursor y position to the value in A/X. diff --git a/libsrc/apple2/mli_file_info_direct.s b/libsrc/apple2/mli_file_info_direct.s index c15ebc28f..7fdaa9edf 100644 --- a/libsrc/apple2/mli_file_info_direct.s +++ b/libsrc/apple2/mli_file_info_direct.s @@ -11,8 +11,8 @@ ; Returns with carry set on error, and sets errno mli_file_info_direct: ; Set pushed name - lda sp - ldx sp+1 + lda c_sp + ldx c_sp+1 sta mliparam + MLI::INFO::PATHNAME stx mliparam + MLI::INFO::PATHNAME+1 diff --git a/libsrc/apple2/mou/a2.stdmou.s b/libsrc/apple2/mou/a2.stdmou.s index e48abbb41..38cd7c957 100644 --- a/libsrc/apple2/mou/a2.stdmou.s +++ b/libsrc/apple2/mou/a2.stdmou.s @@ -7,6 +7,7 @@ .include "zeropage.inc" .include "mouse-kernel.inc" .include "apple2.inc" + .include "get_tv.inc" .macpack module @@ -21,6 +22,7 @@ CLAMPMOUSE = $17 ; Sets mouse bounds in a window HOMEMOUSE = $18 ; Sets mouse to upper-left corner of clamp win INITMOUSE = $19 ; Resets mouse clamps to default values and ; sets mouse position to 0,0 +TIMEDATA = $1C ; Set mousecard's interrupt rate pos1_lo := $0478 pos1_hi := $0578 @@ -41,6 +43,7 @@ status := $0778 .byte MOUSE_API_VERSION ; Mouse driver API version number ; Library reference +libref: .addr $0000 ; Jump table @@ -169,7 +172,31 @@ next: inc ptr1+1 asl sta yparam+1 - ; The AppleMouse II Card needs the ROM switched in + ; Apple II technical notes "Varying VBL Interrupt Rate", + lda libref + ldx libref+1 + sta ptr1 + stx ptr1+1 + + .ifdef __APPLE2ENH__ + lda (ptr1) + .else + ldy #$00 + lda (ptr1),y + .endif + + cmp #TV::OTHER + beq :+ + + ; The TV values are aligned with the values the mousecard + ; expect: 0 for 60Hz, 1 for 50Hz. + .assert TV::NTSC = 0, error + .assert TV::PAL = 1, error + + ldx #TIMEDATA + jsr firmware + +: ; The AppleMouse II Card needs the ROM switched in ; to be able to detect an Apple //e and use RDVBL bit $C082 @@ -314,10 +341,10 @@ MOVE: ldy #$00 ; Start at top of stack ; Set x - lda (sp),y + lda (c_sp),y iny sta pos1_lo,x - lda (sp),y + lda (c_sp),y sta pos1_hi,x ; Update cursor diff --git a/libsrc/apple2/mouseref.s b/libsrc/apple2/mouseref.s new file mode 100644 index 000000000..b0e75c367 --- /dev/null +++ b/libsrc/apple2/mouseref.s @@ -0,0 +1,25 @@ +; +; Colin Leroy-Mira, 2025-05-11 +; + + .export mouse_libref + .import _get_tv, ostype, return0 + + .constructor init_mousetv + + .include "get_tv.inc" + + .segment "ONCE" + +.proc init_mousetv + lda ostype + cmp #$40 ; Technical notes say not to change + bcs :+ ; interrupt rate on IIc/IIgs, so... + jsr _get_tv + sta mouse_libref +: rts ; ...don't update "Other" on those machines +.endproc + + .data + +mouse_libref: .byte TV::OTHER diff --git a/libsrc/apple2/chline.s b/libsrc/apple2/mtchline.s similarity index 68% rename from libsrc/apple2/chline.s rename to libsrc/apple2/mtchline.s index be157ca9e..71347c563 100644 --- a/libsrc/apple2/chline.s +++ b/libsrc/apple2/mtchline.s @@ -1,27 +1,26 @@ ; ; Ullrich von Bassewitz, 08.08.1998 +; Colin Leroy-Mira, 26.05.2025 ; -; void __fastcall__ chlinexy (unsigned char x, unsigned char y, unsigned char length); -; void __fastcall__ chline (unsigned char length); +; void __fastcall__ mt_chlinexy (unsigned char x, unsigned char y, unsigned char length); +; void __fastcall__ mt_chline (unsigned char length); ; - .export _chlinexy, _chline, chlinedirect +.ifdef __APPLE2ENH__ + + .export _mt_chlinexy, _mt_chline, chlinedirect .import gotoxy, cputdirect .include "zeropage.inc" .include "apple2.inc" -_chlinexy: +_mt_chlinexy: pha ; Save the length jsr gotoxy ; Call this one, will pop params pla ; Restore the length and run into _chline -_chline: - .ifdef __APPLE2ENH__ +_mt_chline: ldx #'_' | $80 ; Underscore, screen code - .else - ldx #'-' | $80 ; Minus, screen code - .endif chlinedirect: stx tmp1 @@ -33,3 +32,5 @@ chlinedirect: dec tmp2 bne :- done: rts + +.endif diff --git a/libsrc/apple2/cvline.s b/libsrc/apple2/mtcvline.s similarity index 57% rename from libsrc/apple2/cvline.s rename to libsrc/apple2/mtcvline.s index 86bbf11f4..03e11bf51 100644 --- a/libsrc/apple2/cvline.s +++ b/libsrc/apple2/mtcvline.s @@ -1,34 +1,32 @@ ; ; Ullrich von Bassewitz, 08.08.1998 +; Colin Leroy-Mira, 26.05.2025 ; -; void __fastcall__ cvlinexy (unsigned char x, unsigned char y, unsigned char length); -; void __fastcall__ cvline (unsigned char length); +; void __fastcall__ mt_cvlinexy (unsigned char x, unsigned char y, unsigned char length); +; void __fastcall__ mt_cvline (unsigned char length); ; - .export _cvlinexy, _cvline +.ifdef __APPLE2ENH__ + + .export _mt_cvlinexy, _mt_cvline .import gotoxy, putchar, newline .include "zeropage.inc" -_cvlinexy: +_mt_cvlinexy: pha ; Save the length jsr gotoxy ; Call this one, will pop params pla ; Restore the length and run into _cvline -_cvline: - .ifdef __APPLE2ENH__ - ldx #$5F ; Left vertical line MouseText character - .else - ldx #'!' | $80 ; Exclamation mark, screen code - .endif - - stx tmp1 +_mt_cvline: cmp #$00 ; Is the length zero? beq done ; Jump if done sta tmp2 -: lda tmp1 ; Screen code +: lda #$5F ; Left vertical line MouseText character jsr putchar ; Write, no cursor advance jsr newline ; Advance cursor to next line dec tmp2 bne :- done: rts + +.endif diff --git a/libsrc/apple2/open.s b/libsrc/apple2/open.s index 7ece7f18d..8f1df26df 100644 --- a/libsrc/apple2/open.s +++ b/libsrc/apple2/open.s @@ -101,8 +101,8 @@ found: tya bne oserr1 ; Set pushed name - lda sp - ldx sp+1 + lda c_sp + ldx c_sp+1 sta mliparam + MLI::OPEN::PATHNAME stx mliparam + MLI::OPEN::PATHNAME+1 diff --git a/libsrc/apple2/syschdir.s b/libsrc/apple2/syschdir.s index b3f81e2a5..be78a91b9 100644 --- a/libsrc/apple2/syschdir.s +++ b/libsrc/apple2/syschdir.s @@ -17,8 +17,8 @@ __syschdir: bne oserr ; Set pushed name - lda sp - ldx sp+1 + lda c_sp + ldx c_sp+1 sta mliparam + MLI::PREFIX::PATHNAME stx mliparam + MLI::PREFIX::PATHNAME+1 diff --git a/libsrc/apple2/sysmkdir.s b/libsrc/apple2/sysmkdir.s index 7759da260..e59421319 100644 --- a/libsrc/apple2/sysmkdir.s +++ b/libsrc/apple2/sysmkdir.s @@ -23,8 +23,8 @@ __sysmkdir: bne oserr ; Set pushed name - lda sp - ldx sp+1 + lda c_sp + ldx c_sp+1 sta mliparam + MLI::CREATE::PATHNAME stx mliparam + MLI::CREATE::PATHNAME+1 diff --git a/libsrc/apple2/sysremove.s b/libsrc/apple2/sysremove.s index 08c4dff68..088407024 100644 --- a/libsrc/apple2/sysremove.s +++ b/libsrc/apple2/sysremove.s @@ -16,8 +16,8 @@ __sysremove: bne oserr ; Set pushed name - lda sp - ldx sp+1 + lda c_sp + ldx c_sp+1 sta mliparam + MLI::DESTROY::PATHNAME stx mliparam + MLI::DESTROY::PATHNAME+1 diff --git a/libsrc/apple2/sysrename.s b/libsrc/apple2/sysrename.s index 0fe8dd7b1..3e380548f 100644 --- a/libsrc/apple2/sysrename.s +++ b/libsrc/apple2/sysrename.s @@ -22,8 +22,8 @@ __sysrename: bne oserr1 ; Save pushed oldname - lda sp - ldx sp+1 + lda c_sp + ldx c_sp+1 sta ptr3 stx ptr3+1 @@ -40,8 +40,8 @@ __sysrename: stx mliparam + MLI::RENAME::PATHNAME+1 ; Set pushed newname - lda sp - ldx sp+1 + lda c_sp + ldx c_sp+1 sta mliparam + MLI::RENAME::NEW_PATHNAME stx mliparam + MLI::RENAME::NEW_PATHNAME+1 diff --git a/libsrc/apple2/sysuname.s b/libsrc/apple2/sysuname.s index cd41eac29..52a7ec7e1 100644 --- a/libsrc/apple2/sysuname.s +++ b/libsrc/apple2/sysuname.s @@ -23,13 +23,13 @@ utsdata: .asciiz "" ; release - .byte ((.VERSION >> 8) & $0F) + '0' + .byte .string (>.version) .byte '.' - .byte ((.VERSION >> 4) & $0F) + '0' + .byte .string (<.version) .byte $00 ; version - .byte (.VERSION & $0F) + '0' + .byte '0' ; unused .byte $00 ; machine diff --git a/libsrc/apple2/tgi/a2.hi.s b/libsrc/apple2/tgi/a2.hi.s index 1d5bdb68b..0398701eb 100644 --- a/libsrc/apple2/tgi/a2.hi.s +++ b/libsrc/apple2/tgi/a2.hi.s @@ -83,7 +83,10 @@ Y2 := ptr4 .byte $74, $67, $69 ; "tgi" .byte TGI_API_VERSION ; TGI API version number + +libref: .addr $0000 ; Library reference + .word 280 ; X resolution .word 192 ; Y resolution .byte 8 ; Number of drawing colors @@ -120,6 +123,10 @@ pages: .byte 2 ; Number of screens available .bss +.ifndef __APPLE2ENH__ +machinetype: .res 1 +.endif + ; Absolute variables used in the code ERROR: .res 1 ; Error code @@ -146,13 +153,22 @@ FONT: ; most of the time. ; Must set an error code: NO INSTALL: - .ifdef __APPLE2ENH__ + .ifndef __APPLE2ENH__ + lda libref + ldx libref+1 + sta ptr1 + stx ptr1+1 + ldy #$0 + lda (ptr1),y + sta machinetype + bpl :+ + .endif ; No page switching if 80 column store is enabled bit RD80COL bpl :+ lda #$01 sta pages -: .endif +: ; Fall through @@ -175,10 +191,16 @@ INIT: ; Switch into graphics mode bit MIXCLR bit HIRES - .ifdef __APPLE2ENH__ + + .ifndef __APPLE2ENH__ + bit machinetype + bpl clr_txt + .endif + sta IOUDISON bit DHIRESOFF - .endif + +clr_txt: bit TXTCLR ; Beagle Bros Shape Mechanic fonts don't @@ -200,10 +222,8 @@ DONE: bit TXTSET bit LOWSCR - .ifdef __APPLE2ENH__ ; Limit SET80COL-HISCR to text bit LORES - .endif ; Reset the text window top lda #$00 diff --git a/libsrc/apple2/tgi/a2.lo.s b/libsrc/apple2/tgi/a2.lo.s index 8b00c5d20..b0f608e86 100644 --- a/libsrc/apple2/tgi/a2.lo.s +++ b/libsrc/apple2/tgi/a2.lo.s @@ -53,7 +53,7 @@ Y2 := ptr4 .byte $74, $67, $69 ; "tgi" .byte TGI_API_VERSION ; TGI API version number - .addr $0000 ; Library reference +libref: .addr $0000 ; Library reference .word 40 ; X resolution .word 48 ; Y resolution .byte 16 ; Number of drawing colors @@ -93,6 +93,10 @@ Y2 := ptr4 ERROR: .res 1 ; Error code MIX: .res 1 ; 4 lines of text +.ifndef __APPLE2ENH__ +machinetype: .res 1 +.endif + ; ------------------------------------------------------------------------ .rodata @@ -126,11 +130,15 @@ INIT: bit $C082 ; Switch in ROM jsr SETGR bit MIXCLR - .ifdef __APPLE2ENH__ + + .ifndef __APPLE2ENH__ + bit machinetype + bpl lc_in + .endif + sta IOUDISON bit DHIRESOFF - .endif - bit $C080 ; Switch in LC bank 2 for R/O +lc_in: bit $C080 ; Switch in LC bank 2 for R/O ; Done, reset the error code lda #TGI_ERR_OK @@ -144,6 +152,16 @@ INIT: ; most of the time. ; Must set an error code: NO INSTALL: + .ifndef __APPLE2ENH__ + lda libref + ldx libref+1 + sta ptr1 + stx ptr1+1 + ldy #$0 + lda (ptr1),y + sta machinetype + bpl :+ + .endif ; Fall through ; UNINSTALL routine. Is called before the driver is removed from memory. May diff --git a/libsrc/apple2/tgi_colors.s b/libsrc/apple2/tgi_colors.s index 53505b33d..936d89b76 100644 --- a/libsrc/apple2/tgi_colors.s +++ b/libsrc/apple2/tgi_colors.s @@ -1,6 +1,7 @@ ; ; Target-specific black & white values for use by the target-shared TGI kernel ; +; NOTE: These are indices into the default palette .include "tgi-kernel.inc" diff --git a/libsrc/apple2/tgiref.s b/libsrc/apple2/tgiref.s new file mode 100644 index 000000000..e9bcab5e8 --- /dev/null +++ b/libsrc/apple2/tgiref.s @@ -0,0 +1,18 @@ +; +; Colin Leroy-Mira, 2025-05-10 +; + + .export tgi_libref + .import _exit + +.ifndef __APPLE2ENH__ + + .import machinetype + +tgi_libref := machinetype + +.else + +tgi_libref := _exit + +.endif diff --git a/libsrc/apple2/uppercasemask.s b/libsrc/apple2/uppercasemask.s index 8b993bb1e..cd818c5bf 100644 --- a/libsrc/apple2/uppercasemask.s +++ b/libsrc/apple2/uppercasemask.s @@ -2,8 +2,26 @@ ; Oliver Schmidt, 2024-08-06 ; +.ifndef __APPLE2ENH__ + .export uppercasemask + .import machinetype + .constructor detectlowercase + + .segment "ONCE" + +detectlowercase: + bit machinetype + bpl :+ + + lda #$FF + sta uppercasemask +: rts + + .data uppercasemask: .byte $DF ; Convert to uppercase + +.endif diff --git a/libsrc/apple2/videomode.s b/libsrc/apple2/videomode.s index 414105b18..ea9eb28df 100644 --- a/libsrc/apple2/videomode.s +++ b/libsrc/apple2/videomode.s @@ -1,17 +1,31 @@ ; ; Oliver Schmidt, 07.09.2009 ; -; unsigned __fastcall__ videomode (unsigned mode); +; signed char __fastcall__ videomode (unsigned mode); ; - .ifdef __APPLE2ENH__ - .export _videomode + .import aux80col + .import returnFFFF + .include "apple2.inc" + +VIDEOMODE_40x24 = $15 +VIDEOMODE_80x24 = $00 + .segment "LOWCODE" _videomode: + bit aux80col + bmi set_mode + + ; No 80 column card, return error if requested mode is 80cols + cmp #VIDEOMODE_40x24 + beq out + jmp returnFFFF +set_mode: + ; Get and save current videomode flag bit RD80VID php @@ -31,10 +45,8 @@ _videomode: ; Return ctrl-char code for setting previous ; videomode using the saved videomode flag - lda #$15 ; Ctrl-char code for 40 cols + lda #VIDEOMODE_40x24 plp - bpl :+ - lda #$00 ; Ctrl-char code for 80 cols -: rts ; X was preserved all the way - - .endif ; __APPLE2ENH__ + bpl out + lda #VIDEOMODE_80x24 +out: rts ; X was preserved all the way diff --git a/libsrc/apple2/waitvsync.s b/libsrc/apple2/waitvsync.s index 486b93a53..d02071915 100644 --- a/libsrc/apple2/waitvsync.s +++ b/libsrc/apple2/waitvsync.s @@ -3,18 +3,26 @@ ; ; void waitvsync (void); ; - .ifdef __APPLE2ENH__ - .export _waitvsync .import ostype + .ifndef __APPLE2ENH__ + .import machinetype + .endif + .include "apple2.inc" _waitvsync: + .ifndef __APPLE2ENH__ + bit machinetype ; IIe/enh? + bpl out ; No, silently fail + .endif + bit ostype bmi iigs ; $8x bvs iic ; $4x + ; Apple IIe : bit RDVBLBAR bpl :- ; Blanking : bit RDVBLBAR @@ -42,6 +50,4 @@ iic: php bit DISVBL : sta IOUDISON ; IIc Tech Ref Man: The firmware normally leaves IOUDIS on. plp - rts - - .endif ; __APPLE2ENH__ +out: rts diff --git a/libsrc/apple2/wherex.s b/libsrc/apple2/wherex.s index 4d4f856f0..b447ac6e9 100644 --- a/libsrc/apple2/wherex.s +++ b/libsrc/apple2/wherex.s @@ -4,16 +4,23 @@ ; unsigned char wherex (void); ; + .ifndef __APPLE2ENH__ + .import machinetype + .endif + .export _wherex .include "apple2.inc" _wherex: lda CH - .ifdef __APPLE2ENH__ + .ifndef __APPLE2ENH__ + bit machinetype + bpl :+ + .endif bit RD80VID ; In 80 column mode? bpl :+ lda OURCH -: .endif - ldx #>$0000 + +: ldx #>$0000 rts diff --git a/libsrc/atari/crt0.s b/libsrc/atari/crt0.s index 50e3ca7b6..23c1f580c 100644 --- a/libsrc/atari/crt0.s +++ b/libsrc/atari/crt0.s @@ -59,8 +59,8 @@ start: lda #<(__MAIN_START__ + __MAIN_SIZE__ + __STACKSIZE__) ldx #>(__MAIN_START__ + __MAIN_SIZE__ + __STACKSIZE__) - sta sp - stx sp+1 + sta c_sp + stx c_sp+1 .else @@ -75,11 +75,11 @@ start: lda MEMTOP sbc #<__RESERVED_MEMORY__ sta APPMHI ; initialize our APPMHI value - sta sp ; set up runtime stack part 1 + sta c_sp ; set up runtime stack part 1 lda MEMTOP+1 sbc #>__RESERVED_MEMORY__ sta APPMHI+1 - sta sp+1 ; set up runtime stack part 2 + sta c_sp+1 ; set up runtime stack part 2 .endif diff --git a/libsrc/atari/diopncls.s b/libsrc/atari/diopncls.s index f40d6bba4..a5c145081 100644 --- a/libsrc/atari/diopncls.s +++ b/libsrc/atari/diopncls.s @@ -16,7 +16,7 @@ .export sectsizetab .import ___oserror, __sio_call, _dio_read .import pushax, addysp, subysp - .importzp ptr2, sp + .importzp ptr2, c_sp .include "atari.inc" @@ -78,10 +78,10 @@ _dio_open: ldy #128 jsr subysp ; allocate buffer on the stack - lda sp + lda c_sp pha - lda sp+1 - pha ; save sp (buffer address) on processor stack + lda c_sp+1 + pha ; save c_sp (buffer address) on processor stack lda ptr2 ldx ptr2+1 diff --git a/libsrc/atari/fdtable.s b/libsrc/atari/fdtable.s index fd9f5021b..d1d869387 100644 --- a/libsrc/atari/fdtable.s +++ b/libsrc/atari/fdtable.s @@ -6,7 +6,7 @@ .include "atari.inc" .include "fd.inc" - .importzp tmp1,tmp2,tmp3,ptr4,sp + .importzp tmp1,tmp2,tmp3,ptr4,c_sp .import fd_table,fd_index .import fdt_to_fdi .export clriocb @@ -229,7 +229,7 @@ freefnd:txa beq l2 l1: ldy #0 - lda (sp),y ; get device + lda (c_sp),y ; get device l2: sta fd_table+ft_dev,x ; set device lda #1 sta fd_table+ft_usa,x ; set usage counter diff --git a/libsrc/atari/mcbpm.s b/libsrc/atari/mcbpm.s index 9e6ccc2c5..bc36b6f99 100644 --- a/libsrc/atari/mcbpm.s +++ b/libsrc/atari/mcbpm.s @@ -8,7 +8,7 @@ ; .include "atari.inc" - .importzp sp + .importzp c_sp .export _mouse_pm_callbacks .constructor pm_init, 27 .destructor pm_down @@ -193,22 +193,22 @@ pm_init: .else -; use top of memory and lower sp accordingly - sta sp +; use top of memory and lower c_sp accordingly + sta c_sp sta MOUSE_PM_BASE - lda sp+1 + lda c_sp+1 and #7 ; offset within 2K cmp #3 + MOUSE_PM_RAW + 1 ; can we use it? bcc @decr ; no - lda sp+1 + lda c_sp+1 and #$F8 @set: adc #3 + MOUSE_PM_RAW - 1 ; CF is set, so adding MOUSE_PM_RAW + 3 sta MOUSE_PM_BASE+1 - sta sp+1 + sta c_sp+1 bne @cont ; jump always -@decr: lda sp+1 +@decr: lda c_sp+1 and #$F8 sbc #8 - 1 ; CF is clear, subtracts 8 bcs @set ; jump always diff --git a/libsrc/atari/mou/atrjoy.s b/libsrc/atari/mou/atrjoy.s index a93c7de13..f30d72050 100644 --- a/libsrc/atari/mou/atrjoy.s +++ b/libsrc/atari/mou/atrjoy.s @@ -241,11 +241,11 @@ MOVE: php jsr CMOVEY ; Set it ldy #$01 - lda (sp),y + lda (c_sp),y sta XPos+1 tax dey - lda (sp),y + lda (c_sp),y sta XPos ; New X position jsr CMOVEX ; Move the cursor diff --git a/libsrc/atari/mou/atrst.s b/libsrc/atari/mou/atrst.s index 626b7a8f7..7f915cc36 100644 --- a/libsrc/atari/mou/atrst.s +++ b/libsrc/atari/mou/atrst.s @@ -399,12 +399,12 @@ MOVE: php jsr CMOVEY ; Set it ldy #$01 - lda (sp),y + lda (c_sp),y sta XPos+1 sta XPosWrk+1 tax dey - lda (sp),y + lda (c_sp),y sta XPos ; New X position sta XPosWrk jsr CMOVEX ; Move the cursor diff --git a/libsrc/atari/mou/atrtt.s b/libsrc/atari/mou/atrtt.s index f7c56e9f2..516565844 100644 --- a/libsrc/atari/mou/atrtt.s +++ b/libsrc/atari/mou/atrtt.s @@ -236,11 +236,11 @@ MOVE: php jsr CMOVEY ; Set it ldy #$01 - lda (sp),y + lda (c_sp),y sta XPos+1 tax dey - lda (sp),y + lda (c_sp),y sta XPos ; New X position jsr CMOVEX ; Move the cursor diff --git a/libsrc/atari/sysrename.s b/libsrc/atari/sysrename.s index e526af5c8..b410ebcfd 100644 --- a/libsrc/atari/sysrename.s +++ b/libsrc/atari/sysrename.s @@ -6,7 +6,7 @@ .include "atari.inc" .import findfreeiocb - .importzp tmp4, sp, ptr2, ptr3 + .importzp tmp4, c_sp, ptr2, ptr3 .import incsp2, subysp, addysp, popax .ifdef UCASE_FILENAME .importzp tmp3 @@ -118,19 +118,19 @@ L1: jsr subysp ; make room on the stack ; copy old name ldy #0 con: lda (ptr3),y - sta (sp),y + sta (c_sp),y beq copyend iny bne con copyend:lda #$20 ; space - sta (sp),y + sta (c_sp),y iny tya ; get current offset (beyond old name) clc - adc sp + adc c_sp sta ptr3 - lda sp+1 + lda c_sp+1 adc #0 sta ptr3+1 ; ptr3 now contains pointer to space for new filename @@ -143,9 +143,9 @@ cnn: lda (ptr2),y bne cnn copend2:ldx tmp4 - lda sp + lda c_sp sta ICBAL,x - lda sp+1 + lda c_sp+1 sta ICBAH,x lda #RENAME sta ICCOM,x @@ -160,13 +160,13 @@ copend2:ldx tmp4 ; clean up stack - lda sp + lda c_sp clc adc sspc - sta sp - lda sp+1 + sta c_sp + lda c_sp+1 adc sspc+1 - sta sp+1 + sta c_sp+1 ; handle status diff --git a/libsrc/atari/sysuname.s b/libsrc/atari/sysuname.s index 25a891a1b..893ebcfdc 100644 --- a/libsrc/atari/sysuname.s +++ b/libsrc/atari/sysuname.s @@ -23,13 +23,13 @@ utsdata: .asciiz "" ; release - .byte ((.VERSION >> 8) & $0F) + '0' + .byte .string (>.version) .byte '.' - .byte ((.VERSION >> 4) & $0F) + '0' + .byte .string (<.version) .byte $00 ; version - .byte (.VERSION & $0F) + '0' + .byte '0' ; unused .byte $00 ; machine diff --git a/libsrc/atari/ucase_fn.s b/libsrc/atari/ucase_fn.s index f7f03915d..534c6a21c 100644 --- a/libsrc/atari/ucase_fn.s +++ b/libsrc/atari/ucase_fn.s @@ -24,7 +24,7 @@ .importzp tmp2 .import __defdev .endif - .importzp tmp3,ptr4,sp + .importzp tmp3,ptr4,c_sp .import subysp,addysp .export ucase_fn @@ -63,13 +63,13 @@ hasdev: ldy #0 loop2: lda (ptr4),y - sta (sp),y + sta (c_sp),y beq copy_end bmi L1 ; Not lowercase (also, invalid, should reject) cmp #'a' bcc L1 ; Not lowercase and #$DF ; make upper case char, assume ASCII chars - sta (sp),y ; store back + sta (c_sp),y ; store back L1: iny bpl loop2 ; bpl: this way we only support a max. length of 127 @@ -93,15 +93,15 @@ copy_end: jsr subysp ; adjust stack pointer dey cpdev: lda __defdev,y - sta (sp),y ; insert device name, number and ':' + sta (c_sp),y ; insert device name, number and ':' dey bpl cpdev hasdev2: .endif ; leave A and X pointing to the modified filename - lda sp - ldx sp+1 + lda c_sp + ldx c_sp+1 clc ; indicate success rts diff --git a/libsrc/atari2600/crt0.s b/libsrc/atari2600/crt0.s index 4f09a0a5a..7b5b679b0 100644 --- a/libsrc/atari2600/crt0.s +++ b/libsrc/atari2600/crt0.s @@ -35,8 +35,8 @@ clearLoop: ; Initialize C stack pointer lda #<(__RAM_START__ + __RAM_SIZE__) ldx #>(__RAM_START__ + __RAM_SIZE__) - sta sp - stx sp+1 + sta c_sp + stx c_sp+1 ; Call main jsr _main diff --git a/libsrc/atari5200/crt0.s b/libsrc/atari5200/crt0.s index 8f6e02273..a72d7f9f6 100644 --- a/libsrc/atari5200/crt0.s +++ b/libsrc/atari5200/crt0.s @@ -27,8 +27,8 @@ start: lda #<(__RAM_START__ + __RAM_SIZE__ - __RESERVED_MEMORY__) ldx #>(__RAM_START__ + __RAM_SIZE__ - __RESERVED_MEMORY__) - sta sp - stx sp+1 ; Set argument stack ptr + sta c_sp + stx c_sp+1 ; Set argument stack ptr ; Call the module constructors. diff --git a/libsrc/atari5200/sysuname.s b/libsrc/atari5200/sysuname.s index 7fd9281a1..5a75edf04 100644 --- a/libsrc/atari5200/sysuname.s +++ b/libsrc/atari5200/sysuname.s @@ -23,13 +23,13 @@ utsdata: .asciiz "" ; release - .byte ((.VERSION >> 8) & $0F) + '0' + .byte .string (>.version) .byte '.' - .byte ((.VERSION >> 4) & $0F) + '0' + .byte .string (<.version) .byte $00 ; version - .byte (.VERSION & $0F) + '0' + .byte '0' ; unused .byte $00 ; machine diff --git a/libsrc/atari7800/crt0.s b/libsrc/atari7800/crt0.s index e791179f3..dea351473 100644 --- a/libsrc/atari7800/crt0.s +++ b/libsrc/atari7800/crt0.s @@ -30,9 +30,9 @@ start: ; Set up parameter stack lda #<(__RAM3_START__ + __RAM3_SIZE__) - sta sp + sta c_sp lda #>(__RAM3_START__ + __RAM3_SIZE__) - sta sp+1 + sta c_sp+1 jsr copydata jsr zerobss diff --git a/libsrc/atari7800/mono_setcursor.s b/libsrc/atari7800/mono_setcursor.s index 02e0308f6..995f0d661 100644 --- a/libsrc/atari7800/mono_setcursor.s +++ b/libsrc/atari7800/mono_setcursor.s @@ -27,7 +27,7 @@ .constructor mono_init_cursor .interruptor mono_blink_cursor - .importzp sp + .importzp c_sp .import _zonecounter .import _mono_zones .import cursor diff --git a/libsrc/atari7800/setcursor.s b/libsrc/atari7800/setcursor.s index f438de24f..040732cff 100644 --- a/libsrc/atari7800/setcursor.s +++ b/libsrc/atari7800/setcursor.s @@ -27,7 +27,7 @@ .constructor init_cursor .interruptor blink_cursor - .importzp sp + .importzp c_sp .import _zonecounter .import _zones .import cursor diff --git a/libsrc/atmos/crt0.s b/libsrc/atmos/crt0.s index 8c2be656c..55c60dd30 100644 --- a/libsrc/atmos/crt0.s +++ b/libsrc/atmos/crt0.s @@ -51,7 +51,7 @@ _exit: jsr donelib ldx #zpspace - 1 L2: lda zpsave,x - sta sp,x + sta c_sp,x dex bpl L2 @@ -68,7 +68,7 @@ L2: lda zpsave,x ; Save the zero-page area that we're about to use. init: ldx #zpspace - 1 -L1: lda sp,x +L1: lda c_sp,x sta zpsave,x dex bpl L1 @@ -85,8 +85,8 @@ L1: lda sp,x lda #<(__MAIN_START__ + __MAIN_SIZE__) ldx #>(__MAIN_START__ + __MAIN_SIZE__) - sta sp - stx sp+1 ; Set argument stack ptr + sta c_sp + stx c_sp+1 ; Set argument stack ptr ; Call the module constructors. diff --git a/libsrc/atmos/sysuname.s b/libsrc/atmos/sysuname.s index 546f942ab..7e7bd2341 100644 --- a/libsrc/atmos/sysuname.s +++ b/libsrc/atmos/sysuname.s @@ -23,23 +23,13 @@ utsdata: .asciiz "" ; release - .byte ((.VERSION >> 8) & $0F) + '0' + .byte .string (>.version) .byte '.' - .if ((.VERSION >> 4) & $0F) > 9 - .byte ((.VERSION >> 4) & $0F) / 10 + '0' - .byte ((.VERSION >> 4) & $0F) .MOD 10 + '0' - .else - .byte ((.VERSION >> 4) & $0F) + '0' - .endif + .byte .string (<.version) .byte $00 ; version - .if (.VERSION & $0F) > 9 - .byte (.VERSION & $0F) / 10 + '0' - .byte (.VERSION & $0F) .MOD 10 + '0' - .else - .byte (.VERSION & $0F) + '0' - .endif + .byte '0' ; unused .byte $00 ; machine diff --git a/libsrc/c128/crt0.s b/libsrc/c128/crt0.s index ba6a78ac5..f6a55778c 100644 --- a/libsrc/c128/crt0.s +++ b/libsrc/c128/crt0.s @@ -39,7 +39,7 @@ Start: ; Save the zero-page locations that we need. ldx #zpspace-1 -L1: lda sp,x +L1: lda c_sp,x sta zpsave,x dex bpl L1 @@ -58,8 +58,8 @@ L1: lda sp,x lda #<(__MAIN_START__ + __MAIN_SIZE__ + __STACKSIZE__) ldx #>(__MAIN_START__ + __MAIN_SIZE__ + __STACKSIZE__) - sta sp - stx sp+1 ; Set argument stack ptr + sta c_sp + stx c_sp+1 ; Set argument stack ptr ; Call the module constructors. @@ -85,7 +85,7 @@ _exit: pha ; Save the return code on stack ldx #zpspace-1 L2: lda zpsave,x - sta sp,x + sta c_sp,x dex bpl L2 diff --git a/libsrc/c128/mou/c128-1351.s b/libsrc/c128/mou/c128-1351.s index 76e28d9f7..f6954c823 100644 --- a/libsrc/c128/mou/c128-1351.s +++ b/libsrc/c128/mou/c128-1351.s @@ -296,11 +296,11 @@ MOVE: sei ; No interrupts jsr CMOVEY ; Set it ldy #$01 - lda (sp),y + lda (c_sp),y sta XPos+1 tax dey - lda (sp),y + lda (c_sp),y sta XPos ; New X position jsr CMOVEX ; Move the cursor diff --git a/libsrc/c128/mou/c128-inkwell.s b/libsrc/c128/mou/c128-inkwell.s index 2aac7d32d..b86959788 100644 --- a/libsrc/c128/mou/c128-inkwell.s +++ b/libsrc/c128/mou/c128-inkwell.s @@ -323,10 +323,10 @@ MOVE: sei ; No interrupts jsr MoveY ldy #$01 - lda (sp),y + lda (c_sp),y tax dey - lda (sp),y + lda (c_sp),y jsr MoveX ; Move the cursor cli ; Allow interrupts diff --git a/libsrc/c128/mou/c128-joy.s b/libsrc/c128/mou/c128-joy.s index d809db526..26367f8df 100644 --- a/libsrc/c128/mou/c128-joy.s +++ b/libsrc/c128/mou/c128-joy.s @@ -297,11 +297,11 @@ MOVE: sei ; No interrupts jsr CMOVEY ; Set it ldy #$01 - lda (sp),y + lda (c_sp),y sta XPos+1 tax dey - lda (sp),y + lda (c_sp),y sta XPos ; New X position jsr CMOVEX ; Move the cursor diff --git a/libsrc/c128/mou/c128-pot.s b/libsrc/c128/mou/c128-pot.s index 1cbe4aa18..55de4ac12 100644 --- a/libsrc/c128/mou/c128-pot.s +++ b/libsrc/c128/mou/c128-pot.s @@ -297,11 +297,11 @@ MOVE: sei ; No interrupts jsr CMOVEY ; Set it ldy #$01 - lda (sp),y + lda (c_sp),y sta XPos+1 tax dey - lda (sp),y + lda (c_sp),y sta XPos ; New X position jsr CMOVEX ; Move the cursor diff --git a/libsrc/c128/sysuname.s b/libsrc/c128/sysuname.s index 55fe5ba28..b7c7794b5 100644 --- a/libsrc/c128/sysuname.s +++ b/libsrc/c128/sysuname.s @@ -23,13 +23,13 @@ utsdata: .asciiz "" ; release - .byte ((.VERSION >> 8) & $0F) + '0' + .byte .string (>.version) .byte '.' - .byte ((.VERSION >> 4) & $0F) + '0' + .byte .string (<.version) .byte $00 ; version - .byte (.VERSION & $0F) + '0' + .byte '0' ; unused .byte $00 ; machine diff --git a/libsrc/c16/crt0.s b/libsrc/c16/crt0.s index 1df1e5c62..c203fb20f 100644 --- a/libsrc/c16/crt0.s +++ b/libsrc/c16/crt0.s @@ -24,7 +24,7 @@ Start: ; Save the zero-page locations that we need. ldx #zpspace-1 -L1: lda sp,x +L1: lda c_sp,x sta zpsave,x dex bpl L1 @@ -49,8 +49,8 @@ L1: lda sp,x bcc MemOk ldy #$80 ldx #$00 -MemOk: stx sp - sty sp+1 ; set argument stack ptr +MemOk: stx c_sp + sty c_sp+1 ; set argument stack ptr ; Call the module constructors. @@ -69,7 +69,7 @@ _exit: pha ; Save the return code on stack ldx #zpspace-1 L2: lda zpsave,x - sta sp,x + sta c_sp,x dex bpl L2 diff --git a/libsrc/c16/sysuname.s b/libsrc/c16/sysuname.s index c44ab6acc..960509866 100644 --- a/libsrc/c16/sysuname.s +++ b/libsrc/c16/sysuname.s @@ -23,13 +23,13 @@ utsdata: .asciiz "" ; release - .byte ((.VERSION >> 8) & $0F) + '0' + .byte .string (>.version) .byte '.' - .byte ((.VERSION >> 4) & $0F) + '0' + .byte .string (<.version) .byte $00 ; version - .byte (.VERSION & $0F) + '0' + .byte '0' ; unused .byte $00 ; machine diff --git a/libsrc/c64/crt0.s b/libsrc/c64/crt0.s index 4e5c7c9d4..dea9226aa 100644 --- a/libsrc/c64/crt0.s +++ b/libsrc/c64/crt0.s @@ -55,7 +55,7 @@ _exit: pha ; Save the return code on stack ldx #zpspace-1 L2: lda zpsave,x - sta sp,x + sta c_sp,x dex bpl L2 @@ -85,7 +85,7 @@ init: ; Save the zero-page locations that we need. ldx #zpspace-1 -L1: lda sp,x +L1: lda c_sp,x sta zpsave,x dex bpl L1 @@ -94,8 +94,8 @@ L1: lda sp,x lda #<(__MAIN_START__ + __MAIN_SIZE__) ldx #>(__MAIN_START__ + __MAIN_SIZE__) - sta sp - stx sp+1 ; Set argument stack ptr + sta c_sp + stx c_sp+1 ; Set argument stack ptr ; Switch to the second charset. diff --git a/libsrc/c64/mou/c64-1351.s b/libsrc/c64/mou/c64-1351.s index ce0f18803..dcf949730 100644 --- a/libsrc/c64/mou/c64-1351.s +++ b/libsrc/c64/mou/c64-1351.s @@ -239,11 +239,11 @@ MOVE: sei ; No interrupts jsr CMOVEY ; Set it ldy #$01 - lda (sp),y + lda (c_sp),y sta XPos+1 tax dey - lda (sp),y + lda (c_sp),y sta XPos ; New X position jsr CMOVEX ; Move the cursor diff --git a/libsrc/c64/mou/c64-inkwell.s b/libsrc/c64/mou/c64-inkwell.s index d2f14a6f0..68941260c 100644 --- a/libsrc/c64/mou/c64-inkwell.s +++ b/libsrc/c64/mou/c64-inkwell.s @@ -249,10 +249,10 @@ MOVE: sei ; No interrupts jsr MoveY ldy #$01 - lda (sp),y + lda (c_sp),y tax dey - lda (sp),y + lda (c_sp),y jsr MoveX ; Move the cursor cli ; Allow interrupts diff --git a/libsrc/c64/mou/c64-joy.s b/libsrc/c64/mou/c64-joy.s index 5ee1b4f84..901b9c42d 100644 --- a/libsrc/c64/mou/c64-joy.s +++ b/libsrc/c64/mou/c64-joy.s @@ -245,11 +245,11 @@ MOVE: sei ; No interrupts jsr CMOVEY ; Set it ldy #$01 - lda (sp),y + lda (c_sp),y sta XPos+1 tax dey - lda (sp),y + lda (c_sp),y sta XPos ; New X position jsr CMOVEX ; Move the cursor diff --git a/libsrc/c64/mou/c64-pot.s b/libsrc/c64/mou/c64-pot.s index 9bdf24f62..1728913e1 100644 --- a/libsrc/c64/mou/c64-pot.s +++ b/libsrc/c64/mou/c64-pot.s @@ -230,11 +230,11 @@ MOVE: sei ; No interrupts jsr CMOVEY ; Set it ldy #$01 - lda (sp),y + lda (c_sp),y sta XPos+1 tax dey - lda (sp),y + lda (c_sp),y sta XPos ; New X position jsr CMOVEX ; Move the cursor diff --git a/libsrc/c64/sysuname.s b/libsrc/c64/sysuname.s index 1903986c9..1f6cfc410 100644 --- a/libsrc/c64/sysuname.s +++ b/libsrc/c64/sysuname.s @@ -23,13 +23,13 @@ utsdata: .asciiz "" ; release - .byte ((.VERSION >> 8) & $0F) + '0' + .byte .string (>.version) .byte '.' - .byte ((.VERSION >> 4) & $0F) + '0' + .byte .string (<.version) .byte $00 ; version - .byte (.VERSION & $0F) + '0' + .byte '0' ; unused .byte $00 ; machine diff --git a/libsrc/c65/_scrsize.s b/libsrc/c65/_scrsize.s new file mode 100644 index 000000000..3fc955657 --- /dev/null +++ b/libsrc/c65/_scrsize.s @@ -0,0 +1,17 @@ +; +; Ullrich von Bassewitz, 26.10.2000 +; +; Screen size variables +; + + .export screensize + .include "cbm_kernal.inc" + +.proc screensize + + jsr SCREEN + inx + iny + rts + +.endproc diff --git a/libsrc/c65/bordercolor.s b/libsrc/c65/bordercolor.s new file mode 100644 index 000000000..6b3c7f86c --- /dev/null +++ b/libsrc/c65/bordercolor.s @@ -0,0 +1,17 @@ +; +; Ullrich von Bassewitz, 06.08.1998 +; +; unsigned char __fastcall__ bordercolor (unsigned char color); +; + + + .export _bordercolor + + .include "c65.inc" + +_bordercolor: + ldx VIC_BORDERCOLOR ; get old value + sta VIC_BORDERCOLOR ; set new value + txa + rts + diff --git a/libsrc/c65/cgetc.s b/libsrc/c65/cgetc.s new file mode 100644 index 000000000..3b2d5934d --- /dev/null +++ b/libsrc/c65/cgetc.s @@ -0,0 +1,32 @@ + + + .include "cbm_kernal.inc" + .import cursor + .export _cgetc +_cgetc: + + lda cursor + beq nocursor + + ; enable the cursor + clc + jsr CURSOR + +nocursor: + ; wait for a key + ; FIXME: is $d610 mega65 specific? +: + lda $d610 + beq :- + + jsr KBDREAD + + pha + ; disable the cursor + sec + jsr CURSOR + + pla + ldx #0 + rts + diff --git a/libsrc/c65/clrscr.s b/libsrc/c65/clrscr.s new file mode 100644 index 000000000..84fef5eac --- /dev/null +++ b/libsrc/c65/clrscr.s @@ -0,0 +1,15 @@ +; +; Ullrich von Bassewitz, 06.08.1998 +; +; void clrscr (void); +; + + .export _clrscr + + .include "cbm_kernal.inc" + +;_clrscr = CLRSCR + +_clrscr: + lda #$93 + jmp CHROUT diff --git a/libsrc/c65/color.s b/libsrc/c65/color.s new file mode 100644 index 000000000..b80ba2367 --- /dev/null +++ b/libsrc/c65/color.s @@ -0,0 +1,24 @@ +; +; Ullrich von Bassewitz, 06.08.1998 +; +; unsigned char __fastcall__ textcolor (unsigned char color); +; unsigned char __fastcall__ bgcolor (unsigned char color); +; + + + .export _textcolor, _bgcolor + + .include "c65.inc" + +_textcolor: + ldx CHARCOLOR ; get old value + sta CHARCOLOR ; set new value + txa + rts + + +_bgcolor: + ldx VIC_BG_COLOR0 ; get old value + sta VIC_BG_COLOR0 ; set new value + txa + rts diff --git a/libsrc/c65/conio.s b/libsrc/c65/conio.s new file mode 100644 index 000000000..6c90a6d2e --- /dev/null +++ b/libsrc/c65/conio.s @@ -0,0 +1,10 @@ +; +; Ullrich von Bassewitz, 06.08.1998 +; +; Low level stuff for screen output/console input +; + + .exportzp CURS_X, CURS_Y + + .include "c65.inc" + diff --git a/libsrc/c65/cpeekc.s b/libsrc/c65/cpeekc.s new file mode 100644 index 000000000..a64e13cfd --- /dev/null +++ b/libsrc/c65/cpeekc.s @@ -0,0 +1,45 @@ +; +; 2016-02-28, Groepaz +; 2017-06-22, Greg King +; +; char cpeekc (void); +; + + .include "c65.inc" + + .export _cpeekc + .importzp ptr1 + +_cpeekc: + lda SCREEN_PTR + 1 + clc + adc #>$0800 + sta ptr1 + 1 + lda SCREEN_PTR + sta ptr1 + + ldy CURS_X + lda (ptr1),y ; get screen code + ldx #>$0000 + and #<~$80 ; remove reverse bit + +; Convert the screen code into a PetSCII code. +; $00 - $1F: +$40 +; $20 - $3F +; $40 - $5f: +$20 +; $60 - $7F: +$40 + + cmp #$20 + bcs @sk1 ;(bge) + ora #$40 + rts + +@sk1: cmp #$40 + bcc @end ;(blt) + cmp #$60 + bcc @sk2 ;(blt) + ;sec + adc #$20 - $01 +@sk2: ;clc ; both above cmp and adc clear carry flag + adc #$20 +@end: rts diff --git a/libsrc/c65/cpeekcolor.s b/libsrc/c65/cpeekcolor.s new file mode 100644 index 000000000..f4b4a5573 --- /dev/null +++ b/libsrc/c65/cpeekcolor.s @@ -0,0 +1,25 @@ +; +; 2016-02-28, Groepaz +; 2017-06-22, Greg King +; +; unsigned char cpeekcolor (void); +; + + .include "c65.inc" + + .export _cpeekcolor + .importzp ptr1 + +_cpeekcolor: + lda SCREEN_PTR + 1 + clc + adc #>$D800 + sta ptr1 + 1 + lda SCREEN_PTR + sta ptr1 + + ldy #0 + lda (ptr1),y + + ldx #>$0000 + rts diff --git a/libsrc/c65/cpeekrevers.s b/libsrc/c65/cpeekrevers.s new file mode 100644 index 000000000..4fef17340 --- /dev/null +++ b/libsrc/c65/cpeekrevers.s @@ -0,0 +1,28 @@ +; +; 2016-02-28, Groepaz +; 2017-06-15, Greg King +; +; unsigned char cpeekrevers (void); +; + + .include "c65.inc" + + .export _cpeekrevers + .importzp ptr1 + +_cpeekrevers: + lda SCREEN_PTR + 1 + clc + adc #>$0800 + sta ptr1 + 1 + lda SCREEN_PTR + sta ptr1 + + ldy CURS_X + lda (ptr1),y ; get screen code + and #$80 ; get reverse bit + asl a + tax ; ldx #>$0000 + rol a ; return boolean value + + rts diff --git a/libsrc/c65/cpeeks.s b/libsrc/c65/cpeeks.s new file mode 100644 index 000000000..9c33831f1 --- /dev/null +++ b/libsrc/c65/cpeeks.s @@ -0,0 +1,80 @@ +; +; 2017-07-05, Greg King +; +; void cpeeks (char* s, unsigned length); +; + + .include "c65.inc" + + .export _cpeeks + + .import popax + .importzp ptr1, ptr2, ptr3, tmp1, tmp2 + + .macpack generic + +_cpeeks: + eor #<$FFFF ; counting a word upward is faster + sta ptr3 ; so, we use -(length + 1) + txa + eor #>$FFFF + sta ptr3+1 + + lda SCREEN_PTR + sta ptr2 + lda SCREEN_PTR+1 + clc + adc #>$0800 + sta ptr2+1 + + ldy CURS_X + sty tmp2 + + jsr popax + sta tmp1 ; (will be a .Y index) + stx ptr1+1 + ldx #<$0000 + stx ptr1 + bze L3 ; branch always + +L4: ldy tmp2 + lda (ptr2),y ; get char + iny + bnz L2 + inc ptr2+1 +L2: sty tmp2 + and #<~$80 ; remove reverse bit + +; Convert the screen code into a PetSCII code. +; $00 - $1F: +$40 +; $20 - $3F +; $40 - $5f: +$20 +; $60 - $7F: +$40 + + cmp #$20 + blt @sk1 ;(bcc) + cmp #$40 + blt L5 + cmp #$60 + blt @sk2 ;(bcc) + clc +@sk1: adc #$20 +@sk2: ;clc ; both above cmp and adc clear carry flag + adc #$20 + +L5: ldy tmp1 + sta (ptr1),y + iny + bnz L1 + inc ptr1+1 +L1: sty tmp1 + +L3: inc ptr3 ; count length + bnz L4 + inc ptr3+1 + bnz L4 + + txa ; terminate the string + ldy tmp1 + sta (ptr1),y + rts diff --git a/libsrc/c65/cputc.s b/libsrc/c65/cputc.s new file mode 100644 index 000000000..1a8dd1fee --- /dev/null +++ b/libsrc/c65/cputc.s @@ -0,0 +1,120 @@ +; +; Ullrich von Bassewitz, 1998-08-06, 2009-09-26 +; +; void __fastcall__ cputcxy (unsigned char x, unsigned char y, char c); +; void __fastcall__ cputc (char c); +; + + .export _cputcxy, _cputc, cputdirect, putchar + .export newline, plot + .import gotoxy + .import PLOT + .importzp ptr4 + + .include "c65.inc" + +_cputcxy: + pha ; Save C + jsr gotoxy ; Set cursor, drop x and y + pla ; Restore C + +; Plot a character - also used as internal function + +_cputc: cmp #$0A ; CR? + bne L1 + lda #0 + sta CURS_X + beq plot ; Recalculate pointers + +L1: cmp #$0D ; LF? + beq newline ; Recalculate pointers + +; Printable char of some sort + + cmp #' ' + bcc cputdirect ; Other control char + tay + bmi L10 + cmp #$60 + bcc L2 + and #$DF + bne cputdirect ; Branch always +L2: and #$3F + +cputdirect: + jsr putchar ; Write the character to the screen + +; Advance cursor position + +advance: + iny + cpy #XSIZE + bne L3 + jsr newline ; new line + ldy #0 ; + cr +L3: sty CURS_X + rts + +newline: + clc + lda #XSIZE + adc SCREEN_PTR + sta SCREEN_PTR + bcc L4 + inc SCREEN_PTR+1 + clc +L4: lda #XSIZE + adc CRAM_PTR + sta CRAM_PTR + bcc L5 + inc CRAM_PTR+1 +L5: inc CURS_Y + rts + +; Handle character if high bit set + +L10: and #$7F + cmp #$7F ; PI? + bne L11 + lda #$5E ; Load screen code for PI +L11: ora #$40 + bne cputdirect + + + +; Set cursor position, calculate RAM pointers. + +plot: ldy CURS_X + ldx CURS_Y + clc + jmp PLOT ; Set the new cursor + + + +; Write one character to the screen without doing anything else, return X +; position in Y + +putchar: + ora RVS ; Set revers bit + + tay + lda SCREEN_PTR + 1 + clc + adc #>$0800 + sta ptr4 + 1 + lda SCREEN_PTR + sta ptr4 + tya + + ldy CURS_X + sta (ptr4),y ; Set char + + lda ptr4 + 1 + clc + adc #>$d000 + sta ptr4 + 1 + + lda CHARCOLOR + sta (ptr4),y ; Set color + + rts diff --git a/libsrc/c65/crt0.s b/libsrc/c65/crt0.s new file mode 100644 index 000000000..380d04e2e --- /dev/null +++ b/libsrc/c65/crt0.s @@ -0,0 +1,123 @@ +; +; Startup code for cc65 (C65 version) +; + + .export _exit + .export __STARTUP__ : absolute = 1 ; Mark as startup + + .import initlib, donelib + .import zerobss, callmain + .import BSOUT + .import __MAIN_START__, __MAIN_SIZE__ ; Linker generated + .import __STACKSIZE__ ; from configure file + + .include "zeropage.inc" + .include "c65.inc" + + +; ------------------------------------------------------------------------ +; Startup code + +.segment "STARTUP" + +Start: + +; Switch off the BASIC ROM. + +; FIXME +; lda $01 +; sta mmusave ; Save the memory configuration +; and #$F8 +; ora #$06 ; Enable Kernal+I/O, disable BASIC +; sta $01 +; sei +; lda #%00000000 ; lower offset 15-8 +; ldx #%00000000 ; map blk3-1 | lower offset 19-6 +; ldy #%00000000 ; upper offset 15-8 +; ldz #%00000000 ; map blk7-4 | upper offset 19-6 +; map +; eom + + tsx + stx spsave ; Save the system stack ptr + +; Save space by putting some of the start-up code in the ONCE segment, +; which can be re-used by the BSS segment, the heap and the C stack. + + jsr init + +; Clear the BSS data. + + jsr zerobss + +; Push the command-line arguments; and, call main(). + + jsr callmain + +; Back from main() [this is also the exit() entry]. Run the module destructors. + +_exit: pha ; Save the return code on stack + jsr donelib + +; Copy back the zero-page stuff. + + ldx #zpspace-1 +L2: lda zpsave,x + sta c_sp,x + dex + bpl L2 + +; Place the program return code into BASIC's status variable. + + pla + sta STATUS + +; Restore the system stuff. + + ldx spsave + txs ; Restore stack pointer + +; Back to BASIC. + + rts + + +; ------------------------------------------------------------------------ + +.segment "ONCE" + +init: + +; Save the zero-page locations that we need. + + ldx #zpspace-1 +L1: lda c_sp,x + sta zpsave,x + dex + bpl L1 + +; Set up the stack. + + lda #<(__MAIN_START__ + __MAIN_SIZE__) + ldx #>(__MAIN_START__ + __MAIN_SIZE__) + sta c_sp + stx c_sp+1 ; Set argument stack ptr + +; Switch to the second charset. + + lda #14 + jsr BSOUT + +; Call the module constructors. + + jmp initlib + + +; ------------------------------------------------------------------------ +; Data + +.segment "INIT" + +mmusave:.res 1 +spsave: .res 1 +zpsave: .res zpspace diff --git a/libsrc/c65/devnum.s b/libsrc/c65/devnum.s new file mode 100644 index 000000000..412b63fd7 --- /dev/null +++ b/libsrc/c65/devnum.s @@ -0,0 +1,7 @@ +; +; Oliver Schmidt, 2010-02-14 +; + + .include "c65.inc" + + .exportzp devnum := DEVNUM diff --git a/libsrc/c65/exehdr.s b/libsrc/c65/exehdr.s new file mode 100644 index 000000000..645fc12e7 --- /dev/null +++ b/libsrc/c65/exehdr.s @@ -0,0 +1,32 @@ +; +; Ullrich von Bassewitz, 2010-11-14 +; +; This module supplies a small BASIC stub program that jumps to the machine +; language code that follows it using SYS. +; + + ; The following symbol is used by linker config to force the module + ; to get included into the output file + .export __EXEHDR__: absolute = 1 + +.segment "EXEHDR" + + .addr Next + .word .version ; Line number + .byte $fe, $02, "0:" ; BANK 0 + .byte $9e ; SYS +; .byte <(((Start / 10000) .mod 10) + '0') + .byte <(((Start / 1000) .mod 10) + '0') + .byte <(((Start / 100) .mod 10) + '0') + .byte <(((Start / 10) .mod 10) + '0') + .byte <(((Start / 1) .mod 10) + '0') + .byte $00 ; End of BASIC line +Next: .word 0 ; BASIC end marker +Start: + +; If the start address is larger than 4 digits, the header generated above +; will not contain the highest digit. Instead of wasting one more digit that +; is almost never used, check it at link time and generate an error so the +; user knows something is wrong. + +.assert (Start < 10000), error, "Start address too large for generated BASIC stub" diff --git a/libsrc/c65/get_tv.s b/libsrc/c65/get_tv.s new file mode 100644 index 000000000..2093e45fd --- /dev/null +++ b/libsrc/c65/get_tv.s @@ -0,0 +1,25 @@ +; +; Ullrich von Bassewitz, 2002-12-03 +; +; unsigned char get_tv (void); +; /* Return the video mode the machine is using */ +; + + .include "get_tv.inc" + .include "c65.inc" + + +;-------------------------------------------------------------------------- +; _get_tv + +.proc _get_tv + + ldx #TV::PAL ; Assume PAL + lda PALFLAG + bne pal + dex ; NTSC +pal: txa + ldx #0 + rts + +.endproc diff --git a/libsrc/c65/gettime.s b/libsrc/c65/gettime.s new file mode 100644 index 000000000..c4b200a5d --- /dev/null +++ b/libsrc/c65/gettime.s @@ -0,0 +1,83 @@ +; +; Stefan Haubenthal, 27.7.2009 +; Oliver Schmidt, 14.8.2018 +; +; int __fastcall__ clock_gettime (clockid_t clk_id, struct timespec *tp); +; + + .include "time.inc" + .include "c65.inc" + + .importzp sreg, tmp1, tmp2 + .import pushax, pusheax, tosmul0ax, steaxspidx, incsp1, return0 + .import TM, load_tenth + + +;---------------------------------------------------------------------------- +.code + +.proc _clock_gettime + + jsr pushax + jsr pushax + + lda CIA1_TODHR + sed + tax ; Save PM flag + and #%01111111 + cmp #$12 ; 12 AM/PM + bcc @L1 + sbc #$12 +@L1: inx ; Get PM flag + bpl @L2 + clc + adc #$12 +@L2: cld + jsr BCD2dec + sta TM + tm::tm_hour + lda CIA1_TODMIN + jsr BCD2dec + sta TM + tm::tm_min + lda CIA1_TODSEC + jsr BCD2dec + sta TM + tm::tm_sec + lda #<TM + ldx #>TM + jsr _mktime + + ldy #timespec::tv_sec + jsr steaxspidx ; Pops address pushed by 2. pushax + + jsr load_tenth + jsr pusheax + lda CIA1_TOD10 + ldx #>$0000 + jsr tosmul0ax + + ldy #timespec::tv_nsec + jsr steaxspidx ; Pops address pushed by 1. pushax + + jsr incsp1 + jmp return0 + +.endproc + +;---------------------------------------------------------------------------- +; dec = (((BCD>>4)*10) + (BCD&0xf)) + +.proc BCD2dec + + tax + and #%00001111 + sta tmp1 + txa + and #%11110000 ; *16 + lsr ; *8 + sta tmp2 + lsr + lsr ; *2 + adc tmp2 ; = *10 + adc tmp1 + rts + +.endproc diff --git a/libsrc/c65/joy/c65-stdjoy.s b/libsrc/c65/joy/c65-stdjoy.s new file mode 100644 index 000000000..1723c916a --- /dev/null +++ b/libsrc/c65/joy/c65-stdjoy.s @@ -0,0 +1,111 @@ +; +; Standard joystick driver for the C65. May be used multiple times when linked +; to the statically application. +; +; Ullrich von Bassewitz, 2002-12-20 +; + + .include "zeropage.inc" + + .include "joy-kernel.inc" + .include "joy-error.inc" + .include "c65.inc" + + .macpack generic + .macpack module + + +; ------------------------------------------------------------------------ +; Header. Includes jump table + + module_header _c65_stdjoy_joy + +; Driver signature + + .byte $6A, $6F, $79 ; "joy" + .byte JOY_API_VERSION ; Driver API version number + +; Library reference + + .addr $0000 + +; Jump table. + + .addr INSTALL + .addr UNINSTALL + .addr COUNT + .addr READ + +; ------------------------------------------------------------------------ +; Constants + +JOY_COUNT = 2 ; Number of joysticks we support + + +; ------------------------------------------------------------------------ +; Data. + + +.code + +; ------------------------------------------------------------------------ +; INSTALL routine. Is called after the driver is loaded into memory. If +; possible, check if the hardware is present and determine the amount of +; memory available. +; Must return an JOY_ERR_xx code in a/x. +; + +INSTALL: + lda #JOY_ERR_OK + .assert JOY_ERR_OK = 0, error + tax + +; rts ; Run into UNINSTALL instead + +; ------------------------------------------------------------------------ +; UNINSTALL routine. Is called before the driver is removed from memory. +; Can do cleanup or whatever. Must not return anything. +; + +UNINSTALL: + rts + + +; ------------------------------------------------------------------------ +; COUNT: Return the total number of available joysticks in a/x. +; + +COUNT: + lda #<JOY_COUNT + ldx #>JOY_COUNT + rts + +; ------------------------------------------------------------------------ +; READ: Read a particular joystick passed in A. +; + +READ: tax ; Joystick number into X + bne joy2 + +; Read joystick 1 + +joy1: lda #$7F + sei + sta CIA1_PRA + lda CIA1_PRB + cli + jmp end + +; Read joystick 2 + +joy2: ldx #0 + lda #$E0 + ldy #$FF + sei + sta CIA1_DDRA + lda CIA1_PRA + sty CIA1_DDRA + cli +end: and #$1F + eor #$1F + rts diff --git a/libsrc/c65/joy_stat_stddrv.s b/libsrc/c65/joy_stat_stddrv.s new file mode 100644 index 000000000..3a4deffcd --- /dev/null +++ b/libsrc/c65/joy_stat_stddrv.s @@ -0,0 +1,14 @@ +; +; Address of the static standard joystick driver +; +; Oliver Schmidt, 2012-11-01 +; +; const void joy_static_stddrv[]; +; + + .export _joy_static_stddrv + .import _c65_stdjoy_joy + +.rodata + +_joy_static_stddrv := _c65_stdjoy_joy diff --git a/libsrc/c65/joy_stddrv.s b/libsrc/c65/joy_stddrv.s new file mode 100644 index 000000000..4232d9647 --- /dev/null +++ b/libsrc/c65/joy_stddrv.s @@ -0,0 +1,14 @@ +; +; Name of the standard joystick driver +; +; Ullrich von Bassewitz, 2002-12-21 +; +; const char joy_stddrv[]; +; + + .export _joy_stddrv + +.rodata + +_joy_stddrv: .asciiz "c65-stdjoy.joy" + diff --git a/libsrc/c65/kbhit.s b/libsrc/c65/kbhit.s new file mode 100644 index 000000000..683451b03 --- /dev/null +++ b/libsrc/c65/kbhit.s @@ -0,0 +1,14 @@ + + ; FIXME: is $d610 mega65 specific? + ; FIXME: this should rather use the kernal (with keyboard buffer etc) + + .export _kbhit +_kbhit: + lda $d610 + beq :+ + + lda #1 +: + ldx #>$0000 + rts + diff --git a/libsrc/c65/kernal.s b/libsrc/c65/kernal.s new file mode 100644 index 000000000..fac8be514 --- /dev/null +++ b/libsrc/c65/kernal.s @@ -0,0 +1,47 @@ +; +; Ullrich von Bassewitz, 19.11.2002 +; +; C65 Kernal functions +; + + .include "cbm_kernal.inc" + + .export CINT + .export IOINIT + .export RAMTAS + .export RESTOR + .export VECTOR + .export SETMSG + .export SECOND + .export TKSA + .export MEMTOP + .export MEMBOT + .export SCNKEY + .export ACPTR + .export CIOUT + .export UNTLK + .export UNLSN + .export LISTEN + .export TALK + .export READST + .export SETLFS + .export SETNAM + .export OPEN + .export CLOSE + .export CHKIN + .export CKOUT + .export CLRCH + .export BASIN + .export CHRIN + .export BSOUT + .export CHROUT + .export LOAD + .export SAVE + .export SETTIM + .export RDTIM + .export STOP + .export GETIN + .export CLALL + .export SCREEN + .export IOBASE + .export PLOT diff --git a/libsrc/c65/libref.s b/libsrc/c65/libref.s new file mode 100644 index 000000000..e4afa7eb1 --- /dev/null +++ b/libsrc/c65/libref.s @@ -0,0 +1,8 @@ +; +; Oliver Schmidt, 2013-05-31 +; + + .export joy_libref + .import _exit + +joy_libref := _exit diff --git a/libsrc/c65/loadaddr.s b/libsrc/c65/loadaddr.s new file mode 100644 index 000000000..0675dd67d --- /dev/null +++ b/libsrc/c65/loadaddr.s @@ -0,0 +1,16 @@ +; +; Ullrich von Bassewitz, 2010-11-13 +; +; This module supplies the load address that is expected by Commodore +; machines in the first two bytes of an excutable disk file. +; + + + ; The following symbol is used by linker config to force the module + ; to get included into the output file + .export __LOADADDR__: absolute = 1 + +.segment "LOADADDR" + + .addr *+2 + diff --git a/libsrc/c65/mainargs.s b/libsrc/c65/mainargs.s new file mode 100644 index 000000000..e2249819f --- /dev/null +++ b/libsrc/c65/mainargs.s @@ -0,0 +1,137 @@ +; mainargs.s +; +; Ullrich von Bassewitz, 2003-03-07 +; Based on code from Stefan A. Haubenthal, <polluks@web.de> +; 2003-05-18, Greg King +; 2004-04-28, 2005-02-26, Ullrich von Bassewitz +; +; Scan a group of arguments that are in BASIC's input-buffer. +; Build an array that points to the beginning of each argument. +; Send, to main(), that array and the count of the arguments. +; +; Command-lines look like these lines: +; +; run +; run : rem +; run:rem arg1 " arg 2 is quoted " arg3 "" arg5 +; +; "run" and "rem" are entokenned; the args. are not. Leading and trailing +; spaces outside of quotes are ignored. +; +; TO-DO: +; - The "file-name" might be a path-name; don't copy the directory-components. +; - Add a control-character quoting mechanism. + + .constructor initmainargs, 24 + .import __argc, __argv + + .include "c65.inc" + + +MAXARGS = 10 ; Maximum number of arguments allowed +REM = $8f ; BASIC token-code +NAME_LEN = 16 ; Maximum length of command-name + +; Get possible command-line arguments. Goes into the special ONCE segment, +; which may be reused after the startup code is run + +.segment "ONCE" + +initmainargs: + +; Assume that the program was loaded, a moment ago, by the traditional LOAD +; statement. Save the "most-recent filename" as argument #0. + + lda #0 ; The terminating NUL character + ldy FNAM_LEN + cpy #NAME_LEN + 1 + bcc L1 + ldy #NAME_LEN ; Limit the length + bne L1 ; Branch always +L0: lda (FNAM),y +L1: sta name,y + dey + bpl L0 + inc __argc ; argc always is equal to, at least, 1 + +; Find the "rem" token. + + ldx #0 +L2: lda BASIC_BUF,x + beq done ; No "rem," no args. + inx + cmp #REM + bne L2 + ldy #1 * 2 + +; Find the next argument + +next: lda BASIC_BUF,x + beq done ; End of line reached + inx + cmp #' ' ; Skip leading spaces + beq next + +; Found start of next argument. We've incremented the pointer in X already, so +; it points to the second character of the argument. This is useful since we +; will check now for a quoted argument, in which case we will have to skip this +; first character. + +found: cmp #'"' ; Is the argument quoted? + beq setterm ; Jump if so + dex ; Reset pointer to first argument character + lda #' ' ; A space ends the argument +setterm:sta term ; Set end of argument marker + +; Now store a pointer to the argument into the next slot. Since the BASIC +; input buffer is located at the start of a RAM page, no calculations are +; necessary. + + txa ; Get low byte + sta argv,y ; argv[y]= &arg + iny + lda #>BASIC_BUF + sta argv,y + iny + inc __argc ; Found another arg + +; Search for the end of the argument + +argloop:lda BASIC_BUF,x + beq done + inx + cmp term + bne argloop + +; We've found the end of the argument. X points one character behind it, and +; A contains the terminating character. To make the argument a valid C string, +; replace the terminating character by a zero. + + lda #0 + sta BASIC_BUF-1,x + +; Check if the maximum number of command line arguments is reached. If not, +; parse the next one. + + lda __argc ; Get low byte of argument count + cmp #MAXARGS ; Maximum number of arguments reached? + bcc next ; Parse next one if not + +; (The last vector in argv[] already is NULL.) + +done: lda #<argv + ldx #>argv + sta __argv + stx __argv + 1 + rts + +.segment "INIT" + +term: .res 1 +name: .res NAME_LEN + 1 + +.data + +; char* argv[MAXARGS+1]={name}; +argv: .addr name + .res MAXARGS * 2 diff --git a/libsrc/c65/randomize.s b/libsrc/c65/randomize.s new file mode 100644 index 000000000..8ee5d1381 --- /dev/null +++ b/libsrc/c65/randomize.s @@ -0,0 +1,18 @@ +; +; 2002-11-05, Ullrich von Bassewitz +; 2015-09-11, Greg King +; +; void __randomize (void); +; /* Initialize the random number generator */ +; + + .export ___randomize + .import _srand + + .include "c65.inc" + +___randomize: + ldx VIC_HLINE ; Use VIC rasterline as high byte + lda TIME+2 ; Use 60HZ clock as low byte + jmp _srand ; Initialize generator + diff --git a/libsrc/c65/revers.s b/libsrc/c65/revers.s new file mode 100644 index 000000000..f6bd88688 --- /dev/null +++ b/libsrc/c65/revers.s @@ -0,0 +1,27 @@ +; +; Ullrich von Bassewitz, 07.08.1998 +; +; unsigned char revers (unsigned char onoff); +; + + .export _revers + + .include "c65.inc" + +.proc _revers + + ldx #$00 ; Assume revers off + tay ; Test onoff + beq L1 ; Jump if off + ldx #$80 ; Load on value + ldy #$00 ; Assume old value is zero +L1: lda RVS ; Load old value + stx RVS ; Set new value + beq L2 ; Jump if old value zero + iny ; Make old value = 1 +L2: ldx #$00 ; Load high byte of result + tya ; Load low byte, set CC + rts + +.endproc + diff --git a/libsrc/c65/settime.s b/libsrc/c65/settime.s new file mode 100644 index 000000000..8b376e089 --- /dev/null +++ b/libsrc/c65/settime.s @@ -0,0 +1,84 @@ +; +; Oliver Schmidt, 16.8.2018 +; +; int __fastcall__ clock_settime (clockid_t clk_id, const struct timespec *tp); +; + + .include "time.inc" + .include "c65.inc" + + .importzp sreg, ptr1 + .import pushax, pusheax, ldax0sp, ldeaxidx + .import tosdiveax, incsp3, return0 + .import TM, load_tenth + + +;---------------------------------------------------------------------------- +.code + +.proc _clock_settime + + jsr pushax + + .assert timespec::tv_sec = 0, error + jsr _localtime + sta ptr1 + stx ptr1+1 + ldy #.sizeof(tm)-1 +@L1: lda (ptr1),y + sta TM,y + dey + bpl @L1 + + lda TM + tm::tm_hour + jsr dec2BCD + tax ; Force flags + bne @L2 + lda #$92 ; 12 AM + bne @L3 +@L2: cmp #$13 ; 1 PM + bcc @L3 + sed + sbc #$12 + cld + ora #%10000000 +@L3: sta CIA1_TODHR + lda TM + tm::tm_min + jsr dec2BCD + sta CIA1_TODMIN + lda TM + tm::tm_sec + jsr dec2BCD + sta CIA1_TODSEC + + jsr ldax0sp + ldy #3+timespec::tv_nsec + jsr ldeaxidx + jsr pusheax + jsr load_tenth + jsr tosdiveax + sta CIA1_TOD10 + + jsr incsp3 + jmp return0 + +.endproc + +;---------------------------------------------------------------------------- +; Just sum up the value in BCD mode. +; http://forum.6502.org/viewtopic.php?p=7629#p7629 + +.proc dec2BCD + + tax + dex + bmi @L9 + lda #0 + clc + sed +@L1: adc #1 + dex + bpl @L1 + cld +@L9: rts + +.endproc diff --git a/libsrc/c65/status.s b/libsrc/c65/status.s new file mode 100644 index 000000000..c6f279230 --- /dev/null +++ b/libsrc/c65/status.s @@ -0,0 +1,5 @@ +; +; Oliver Schmidt, 2012-09-30 +; + + .exportzp ST := $90 ; IEC status byte diff --git a/libsrc/c65/sysuname.s b/libsrc/c65/sysuname.s new file mode 100644 index 000000000..b0a24a236 --- /dev/null +++ b/libsrc/c65/sysuname.s @@ -0,0 +1,37 @@ +; +; Ullrich von Bassewitz, 2003-08-12 +; +; unsigned char __fastcall__ _sysuname (struct utsname* buf); +; + + .export __sysuname, utsdata + + .import utscopy + + __sysuname = utscopy + +;-------------------------------------------------------------------------- +; Data. We define a fixed utsname struct here and just copy it. + +.rodata + +utsdata: + ; sysname + .asciiz "cc65" + + ; nodename + .asciiz "" + + ; release + .byte .string (>.version) + .byte '.' + .byte .string (<.version) + .byte $00 + + ; version + .byte '0' ; unused + .byte $00 + + ; machine + .asciiz "Commodore 65" + diff --git a/libsrc/c65/tmcommon.s b/libsrc/c65/tmcommon.s new file mode 100644 index 000000000..52094b68e --- /dev/null +++ b/libsrc/c65/tmcommon.s @@ -0,0 +1,64 @@ +; +; Oliver Schmidt, 16.8.2018 +; +; Common stuff for the clock routines +; + + .include "c65.inc" + .include "get_tv.inc" + + .export TM, load_tenth + + .constructor inittime + .importzp sreg + .import _get_tv + + +;---------------------------------------------------------------------------- +.code + +.proc load_tenth + + lda #<(100 * 1000 * 1000 / $10000) + ldx #>(100 * 1000 * 1000 / $10000) + sta sreg + stx sreg+1 + lda #<(100 * 1000 * 1000) + ldx #>(100 * 1000 * 1000) + rts + +.endproc + +;---------------------------------------------------------------------------- +; Constructor that writes to the 1/10 sec register of the TOD to kick it +; into action. If this is not done, the clock hangs. We will read the register +; and write it again, ignoring a possible change in between. +.segment "ONCE" + +.proc inittime + + lda CIA1_TOD10 + sta CIA1_TOD10 + jsr _get_tv + cmp #TV::PAL + bne @60Hz + lda CIA1_CRA + ora #$80 + sta CIA1_CRA +@60Hz: rts + +.endproc + +;---------------------------------------------------------------------------- +; TM struct with date set to 1970-01-01 +.data + +TM: .word 0 ; tm_sec + .word 0 ; tm_min + .word 0 ; tm_hour + .word 1 ; tm_mday + .word 0 ; tm_mon + .word 70 ; tm_year + .word 0 ; tm_wday + .word 0 ; tm_yday + .word 0 ; tm_isdst diff --git a/libsrc/cbm/dir.s b/libsrc/cbm/dir.s index 734485aaf..a78fc94a5 100644 --- a/libsrc/cbm/dir.s +++ b/libsrc/cbm/dir.s @@ -44,10 +44,10 @@ __dirread: ; Replace dir by dir->fd ldy #2 - lda (sp),y + lda (c_sp),y sta ptr1 iny - lda (sp),y + lda (c_sp),y sta ptr1+1 ldy #DIR::fd+1 lda (ptr1),y @@ -55,10 +55,10 @@ __dirread: dey lda (ptr1),y ldy #2 - sta (sp),y + sta (c_sp),y pla iny - sta (sp),y + sta (c_sp),y ; Get count, save it again, clear the high byte and call read(). By the ; previous actions, the stack frame is as read() needs it, and read() will diff --git a/libsrc/cbm/open.s b/libsrc/cbm/open.s index 47224925d..bf937ee0f 100644 --- a/libsrc/cbm/open.s +++ b/libsrc/cbm/open.s @@ -12,7 +12,7 @@ .import opencmdchannel, closecmdchannel, readdiskerror .import fnunit, fnisfile .import _close - .importzp sp, tmp2, tmp3 + .importzp c_sp, tmp2, tmp3 .include "errno.inc" .include "fcntl.inc" diff --git a/libsrc/cbm/write.s b/libsrc/cbm/write.s index 172e45382..43c7582f0 100644 --- a/libsrc/cbm/write.s +++ b/libsrc/cbm/write.s @@ -8,7 +8,7 @@ .constructor initstdout .import rwcommon - .importzp sp, ptr1, ptr2, ptr3 + .importzp c_sp, ptr1, ptr2, ptr3 .include "cbm.inc" .include "errno.inc" diff --git a/libsrc/cbm510/crt0.s b/libsrc/cbm510/crt0.s index 86137b1ca..80d587ff5 100644 --- a/libsrc/cbm510/crt0.s +++ b/libsrc/cbm510/crt0.s @@ -117,7 +117,7 @@ entry: php tya sec sbc #7 - sta $1FF ; Save new sp + sta $1FF ; Save new c_sp tay tsx @@ -145,7 +145,7 @@ entry: php iny sta (sysp1),y - ldy $1FF ; Restore sp in bank 15 + ldy $1FF ; Restore c_sp in bank 15 lda #.hibyte(expull-1) sta (sysp1),y @@ -245,7 +245,7 @@ L1: lda extzp,x dex bpl L1 -; Save the old stack pointer from the system bank; and, set up our hw sp. +; Save the old stack pointer from the system bank; and, set up our hw c_sp. tsx txa @@ -279,9 +279,9 @@ L3: lda vectors,x ; Set up the C stack. lda #.lobyte(callbank15::entry) - sta sp + sta c_sp lda #.hibyte(callbank15::entry) - sta sp+1 + sta c_sp+1 ; Set up the subroutine and jump vector table that redirects Kernal calls to ; the system bank. @@ -495,7 +495,7 @@ _exit: pha ; Save the return code on stack ; Set up the welcome code at the stack bottom in the system bank. ldy #$FF - lda (sysp1),y ; Load system bank sp + lda (sysp1),y ; Load system bank c_sp tax iny ; Y = 0 lda #$58 ; CLI opcode diff --git a/libsrc/cbm510/mou/cbm510-inkwl.s b/libsrc/cbm510/mou/cbm510-inkwl.s index ea6d95934..e5328cf75 100644 --- a/libsrc/cbm510/mou/cbm510-inkwl.s +++ b/libsrc/cbm510/mou/cbm510-inkwl.s @@ -256,10 +256,10 @@ MOVE: sei ; No interrupts jsr MoveY ldy #$01 - lda (sp),y + lda (c_sp),y tax dey - lda (sp),y + lda (c_sp),y jsr MoveX ; Move the cursor cli ; Allow interrupts diff --git a/libsrc/cbm510/mou/cbm510-joy.s b/libsrc/cbm510/mou/cbm510-joy.s index 4daa49272..912842be7 100644 --- a/libsrc/cbm510/mou/cbm510-joy.s +++ b/libsrc/cbm510/mou/cbm510-joy.s @@ -225,11 +225,11 @@ MOVE: sei ; No interrupts jsr MoveY ; Set new y position ldy #1 - lda (sp),y + lda (c_sp),y sta XPos+1 tax dey - lda (sp),y + lda (c_sp),y jsr MoveX ; Move the pointer cli ; Allow interrupts diff --git a/libsrc/cbm510/sysuname.s b/libsrc/cbm510/sysuname.s index 24d4dc03b..579908d19 100644 --- a/libsrc/cbm510/sysuname.s +++ b/libsrc/cbm510/sysuname.s @@ -23,13 +23,13 @@ utsdata: .asciiz "" ; release - .byte ((.VERSION >> 8) & $0F) + '0' + .byte .string (>.version) .byte '.' - .byte ((.VERSION >> 4) & $0F) + '0' + .byte .string (<.version) .byte $00 ; version - .byte (.VERSION & $0F) + '0' + .byte '0' ; unused .byte $00 ; machine diff --git a/libsrc/cbm610/crt0.s b/libsrc/cbm610/crt0.s index 0ad343d7f..dc56fa2de 100644 --- a/libsrc/cbm610/crt0.s +++ b/libsrc/cbm610/crt0.s @@ -115,7 +115,7 @@ entry: php tya sec sbc #7 - sta $1FF ; Save new sp + sta $1FF ; Save new c_sp tay tsx @@ -143,7 +143,7 @@ entry: php iny sta (sysp1),y - ldy $1FF ; Restore sp in bank 15 + ldy $1FF ; Restore c_sp in bank 15 lda #.hibyte(expull-1) sta (sysp1),y @@ -243,7 +243,7 @@ L1: lda extzp,x dex bpl L1 -; Save the old stack pointer from the system bank; and, set up our hw sp. +; Save the old stack pointer from the system bank; and, set up our hw c_sp. tsx txa @@ -277,9 +277,9 @@ L3: lda vectors,x ; Set up the C stack. lda #.lobyte(callbank15::entry) - sta sp + sta c_sp lda #.hibyte(callbank15::entry) - sta sp+1 + sta c_sp+1 ; Set up the subroutine and jump vector table that redirects Kernal calls to ; the system bank. @@ -400,7 +400,7 @@ _exit: pha ; Save the return code ; Set up the welcome code at the stack bottom in the system bank. ldy #$FF - lda (sysp1),y ; Load system bank sp + lda (sysp1),y ; Load system bank c_sp tax iny ; Y = 0 lda #$58 ; CLI opcode diff --git a/libsrc/cbm610/sysuname.s b/libsrc/cbm610/sysuname.s index 984cb93df..dab807a4f 100644 --- a/libsrc/cbm610/sysuname.s +++ b/libsrc/cbm610/sysuname.s @@ -23,13 +23,13 @@ utsdata: .asciiz "" ; release - .byte ((.VERSION >> 8) & $0F) + '0' + .byte .string (>.version) .byte '.' - .byte ((.VERSION >> 4) & $0F) + '0' + .byte .string (<.version) .byte $00 ; version - .byte (.VERSION & $0F) + '0' + .byte '0' ; unused .byte $00 ; machine diff --git a/libsrc/common/_fopen.s b/libsrc/common/_fopen.s index 17a1ec19b..0c234097e 100644 --- a/libsrc/common/_fopen.s +++ b/libsrc/common/_fopen.s @@ -9,7 +9,7 @@ .import _open .import pushax, incsp4, return0 - .importzp sp, ptr1 + .importzp c_sp, ptr1 .include "errno.inc" @@ -28,10 +28,10 @@ ; Get a pointer to the mode string ldy #1 - lda (sp),y + lda (c_sp),y sta ptr1+1 dey - lda (sp),y + lda (c_sp),y sta ptr1 ; Look at the first character in mode @@ -78,10 +78,10 @@ invmode: modeok: ldy #$00 txa ; Mode -> A - sta (sp),y + sta (c_sp),y tya iny - sta (sp),y + sta (c_sp),y ldy #4 ; Size of arguments in bytes jsr _open ; Will cleanup the stack diff --git a/libsrc/common/_heap.s b/libsrc/common/_heap.s index eb680fa20..e5d71d1be 100644 --- a/libsrc/common/_heap.s +++ b/libsrc/common/_heap.s @@ -6,7 +6,7 @@ .constructor initheap, 24 .import __BSS_RUN__, __BSS_SIZE__, __STACKSIZE__ - .importzp sp + .importzp c_sp .include "_heap.inc" @@ -31,10 +31,10 @@ ___heaplast: initheap: sec - lda sp + lda c_sp sbc #<__STACKSIZE__ sta ___heapend - lda sp+1 + lda c_sp+1 sbc #>__STACKSIZE__ sta ___heapend+1 rts diff --git a/libsrc/common/_idiv32by16r16.s b/libsrc/common/_idiv32by16r16.s index 7df78f4dd..9534f751f 100644 --- a/libsrc/common/_idiv32by16r16.s +++ b/libsrc/common/_idiv32by16r16.s @@ -20,17 +20,17 @@ ; Copy from stack to zeropage. This assumes ptr1 and ptr2 are adjacent. ldy #3 -@L1: lda (sp),y +@L1: lda (c_sp),y sta ptr1,y dey bpl @L1 lda #4 clc - adc sp - sta sp + adc c_sp + sta c_sp bcc @L2 - inc sp+1 + inc c_sp+1 @L2: pla ; Old rhs jmp idiv32by16r16 diff --git a/libsrc/common/_printf.s b/libsrc/common/_printf.s index d7eeb072d..40ab0bc64 100644 --- a/libsrc/common/_printf.s +++ b/libsrc/common/_printf.s @@ -338,25 +338,25 @@ MainLoop: jsr decsp6 ; 3 args ldy #5 lda OutData+1 - sta (sp),y + sta (c_sp),y dey lda OutData - sta (sp),y + sta (c_sp),y dey lda FSave+1 - sta (sp),y + sta (c_sp),y dey lda FSave - sta (sp),y + sta (c_sp),y dey lda FCount+1 - sta (sp),y + sta (c_sp),y dey lda FCount .if (.cpu .bitand ::CPU_ISET_65SC02) - sta (sp) + sta (c_sp) .else - sta (sp),y + sta (c_sp),y .endif jsr CallOutFunc ; Call the output function diff --git a/libsrc/common/_udiv32by16r16.s b/libsrc/common/_udiv32by16r16.s index a1d5f4e66..987390c04 100644 --- a/libsrc/common/_udiv32by16r16.s +++ b/libsrc/common/_udiv32by16r16.s @@ -21,17 +21,17 @@ ; Copy from stack to zeropage. This assumes ptr1 and ptr2 are adjacent. ldy #3 -@L1: lda (sp),y +@L1: lda (c_sp),y sta ptr1,y dey bpl @L1 lda #4 clc - adc sp - sta sp + adc c_sp + sta c_sp bcc @L2 - inc sp+1 + inc c_sp+1 @L2: jmp udiv32by16r16m diff --git a/libsrc/common/fprintf.s b/libsrc/common/fprintf.s index 1582e6521..af9a58ebc 100644 --- a/libsrc/common/fprintf.s +++ b/libsrc/common/fprintf.s @@ -6,7 +6,7 @@ .export _fprintf .import addysp, decsp4, _vfprintf - .importzp sp, ptr1 + .importzp c_sp, ptr1 .macpack generic @@ -38,9 +38,9 @@ _fprintf: ; Calculate a pointer to the Format argument lda ParamSize - add sp + add c_sp sta ptr1 - ldx sp+1 + ldx c_sp+1 bcc @L1 inx @L1: stx ptr1+1 @@ -49,7 +49,7 @@ _fprintf: ldy #4-1 @L2: lda (ptr1),y - sta (sp),y + sta (c_sp),y dey bpl @L2 diff --git a/libsrc/common/fread.s b/libsrc/common/fread.s index b39b9d748..be06c2a62 100644 --- a/libsrc/common/fread.s +++ b/libsrc/common/fread.s @@ -14,7 +14,7 @@ .import pushwysp .import tosumulax, tosudivax - .importzp ptr1, sp + .importzp ptr1, c_sp .include "errno.inc" .include "_file.inc" @@ -136,23 +136,23 @@ ; to read() by one, so read() starts to store data at buf+1. .if (.cpu .bitand ::CPU_ISET_65SC02) - lda (sp) + lda (c_sp) sta ptr1 add #1 - sta (sp) + sta (c_sp) ldy #1 .else ldy #0 - lda (sp),y + lda (c_sp),y sta ptr1 add #1 - sta (sp),y + sta (c_sp),y iny .endif - lda (sp),y + lda (c_sp),y sta ptr1+1 adc #0 - sta (sp),y ; ptr1 = buf++; + sta (c_sp),y ; ptr1 = buf++; ; Get the buffered character and place it as first character into the read ; buffer. diff --git a/libsrc/common/fscanf.s b/libsrc/common/fscanf.s index a3d1ec0a1..c687a0624 100644 --- a/libsrc/common/fscanf.s +++ b/libsrc/common/fscanf.s @@ -6,7 +6,7 @@ .export _fscanf .import addysp, decsp4, _vfscanf - .importzp sp, ptr1 + .importzp c_sp, ptr1 .macpack generic @@ -50,9 +50,9 @@ _fscanf: ; Calculate a pointer to the Format argument lda ParamSize - add sp + add c_sp sta ptr1 - ldx sp+1 + ldx c_sp+1 bcc @L1 inx @L1: stx ptr1+1 @@ -61,7 +61,7 @@ _fscanf: ldy #4-1 @L2: lda (ptr1),y - sta (sp),y + sta (c_sp),y dey bpl @L2 diff --git a/libsrc/common/interrupt.s b/libsrc/common/interrupt.s index 6bdbb5fe4..a67d51fda 100644 --- a/libsrc/common/interrupt.s +++ b/libsrc/common/interrupt.s @@ -93,8 +93,8 @@ zpsave: .res zpsavespace ; Set C level interrupt stack lda irqsp ldx irqsp+1 - sta sp - stx sp+1 + sta c_sp + stx c_sp+1 ; Call C level interrupt request handler jsr irqvec diff --git a/libsrc/common/itoa.s b/libsrc/common/itoa.s index 808f9bc33..a1cd53c8b 100644 --- a/libsrc/common/itoa.s +++ b/libsrc/common/itoa.s @@ -8,7 +8,7 @@ .export _itoa, _utoa .import addysp1 .import __hextab - .importzp sp, sreg, ptr2, ptr3, tmp1 + .importzp c_sp, sreg, ptr2, ptr3, tmp1 .rodata specval: @@ -21,18 +21,18 @@ specval: dopop: sta tmp1 ; will lose high byte ldy #0 - lda (sp),y + lda (c_sp),y sta ptr2 sta ptr3 iny - lda (sp),y + lda (c_sp),y sta ptr2+1 sta ptr3+1 iny - lda (sp),y + lda (c_sp),y sta sreg iny - lda (sp),y + lda (c_sp),y sta sreg+1 jmp addysp1 ; Bump stack pointer diff --git a/libsrc/common/longjmp.s b/libsrc/common/longjmp.s index 91606a442..8855286a9 100644 --- a/libsrc/common/longjmp.s +++ b/libsrc/common/longjmp.s @@ -7,7 +7,7 @@ .export _longjmp .import popptr1 - .importzp sp, ptr1, ptr2 + .importzp c_sp, ptr1, ptr2 _longjmp: sta ptr2 ; Save retval @@ -23,10 +23,10 @@ _longjmp: lda (ptr1),y iny - sta sp + sta c_sp lda (ptr1),y iny - sta sp+1 + sta c_sp+1 ; Get the old stack pointer diff --git a/libsrc/common/lz4.s b/libsrc/common/lz4.s index c53841897..5d26cb56a 100644 --- a/libsrc/common/lz4.s +++ b/libsrc/common/lz4.s @@ -61,7 +61,7 @@ ; } ; } - .importzp sp, sreg, regsave, regbank + .importzp c_sp, sreg, regsave, regbank .importzp tmp1, tmp2, tmp3, tmp4, ptr1, ptr2, ptr3, ptr4 .macpack longbranch .import memcpy_upwards,pushax,popax diff --git a/libsrc/common/memcpy.s b/libsrc/common/memcpy.s index fd090c788..8f6531956 100644 --- a/libsrc/common/memcpy.s +++ b/libsrc/common/memcpy.s @@ -12,7 +12,7 @@ .export _memcpy, memcpy_upwards, memcpy_getparams .import popax, popptr1 - .importzp sp, ptr1, ptr2, ptr3 + .importzp c_sp, ptr1, ptr2, ptr3 ; ---------------------------------------------------------------------- _memcpy: @@ -70,10 +70,10 @@ memcpy_getparams: ; IMPORTANT! Function has to leave with Y=0! iny ; Y=0 guaranteed by popptr1, we need '1' here... ; (direct stack access is three cycles faster ; (total cycle count with return)) - lda (sp),y + lda (c_sp),y tax stx ptr2+1 ; save high byte of ptr2 dey ; Y = 0 - lda (sp),y ; Get ptr2 low + lda (c_sp),y ; Get ptr2 low sta ptr2 rts diff --git a/libsrc/common/memset.s b/libsrc/common/memset.s index be78fc30d..5d56507a5 100644 --- a/libsrc/common/memset.s +++ b/libsrc/common/memset.s @@ -17,7 +17,7 @@ .export _memset, _bzero, ___bzero .import popax - .importzp sp, ptr1, ptr2, ptr3 + .importzp c_sp, ptr1, ptr2, ptr3 _bzero: ___bzero: @@ -36,10 +36,10 @@ _memset: common: ; Fill value is in X! ldy #1 - lda (sp),y + lda (c_sp),y sta ptr1+1 ; save high byte of ptr dey ; Y = 0 - lda (sp),y ; Get ptr + lda (c_sp),y ; Get ptr sta ptr1 lsr ptr3+1 ; divide number of diff --git a/libsrc/common/printf.s b/libsrc/common/printf.s index 8d645dfa2..76e08e584 100644 --- a/libsrc/common/printf.s +++ b/libsrc/common/printf.s @@ -6,7 +6,7 @@ .export _printf .import _stdout, pushax, addysp, _vfprintf - .importzp sp, ptr1 + .importzp c_sp, ptr1 .macpack generic @@ -43,8 +43,8 @@ _printf: ; Now calculate the va_list pointer, which does points to Format - lda sp - ldx sp+1 + lda c_sp + ldx c_sp+1 add ParamSize bcc @L1 inx diff --git a/libsrc/common/realloc.s b/libsrc/common/realloc.s index 176871dd5..16d5eea41 100644 --- a/libsrc/common/realloc.s +++ b/libsrc/common/realloc.s @@ -4,7 +4,7 @@ ; void* __fastcall__ realloc (void* block, register size_t size) ; - .importzp ptr1, ptr2, ptr3, ptr4, tmp1, tmp2, tmp3, tmp4, sp + .importzp ptr1, ptr2, ptr3, ptr4, tmp1, tmp2, tmp3, tmp4, c_sp .import _malloc, _memcpy, _free .import pushax, popptr1, return0 .import incsp2, decsp2 diff --git a/libsrc/common/scanf.s b/libsrc/common/scanf.s index dd6c16ad1..92460b629 100644 --- a/libsrc/common/scanf.s +++ b/libsrc/common/scanf.s @@ -8,7 +8,7 @@ .export _scanf .import _stdin, pushax, addysp, _vfscanf - .import sp:zp, ptr1:zp + .import c_sp:zp, ptr1:zp .macpack generic @@ -34,8 +34,8 @@ _scanf: ; Now, calculate the va_list pointer, which does point to Format. - lda sp - ldx sp+1 + lda c_sp + ldx c_sp+1 add ArgSize bcc @L1 inx diff --git a/libsrc/common/setjmp.s b/libsrc/common/setjmp.s index 886853368..3c0b8aa17 100644 --- a/libsrc/common/setjmp.s +++ b/libsrc/common/setjmp.s @@ -8,7 +8,7 @@ .export ___setjmp .import return0 - .importzp sp, ptr1 + .importzp c_sp, ptr1 ___setjmp: sta ptr1 ; Save buf @@ -17,10 +17,10 @@ ___setjmp: ; The parameter stack is now empty, put it into buf - lda sp + lda c_sp sta (ptr1),y iny - lda sp+1 + lda c_sp+1 sta (ptr1),y iny diff --git a/libsrc/common/snprintf.s b/libsrc/common/snprintf.s index 33afb434d..c922a55bc 100644 --- a/libsrc/common/snprintf.s +++ b/libsrc/common/snprintf.s @@ -6,7 +6,7 @@ .export _snprintf .import pushax, addysp, decsp6, _vsnprintf - .importzp sp, ptr1 + .importzp c_sp, ptr1 .macpack generic @@ -38,9 +38,9 @@ _snprintf: ; Calculate a pointer to the Format argument lda ParamSize - add sp + add c_sp sta ptr1 - ldx sp+1 + ldx c_sp+1 bcc @L1 inx @L1: stx ptr1+1 @@ -49,7 +49,7 @@ _snprintf: ldy #6-1 @L2: lda (ptr1),y - sta (sp),y + sta (c_sp),y dey bpl @L2 diff --git a/libsrc/common/sprintf.s b/libsrc/common/sprintf.s index d502d8638..d2ce6602e 100644 --- a/libsrc/common/sprintf.s +++ b/libsrc/common/sprintf.s @@ -6,7 +6,7 @@ .export _sprintf .import pushax, addysp, decsp4, _vsprintf - .importzp sp, ptr1 + .importzp c_sp, ptr1 .macpack generic @@ -38,9 +38,9 @@ _sprintf: ; Calculate a pointer to the Format argument lda ParamSize - add sp + add c_sp sta ptr1 - ldx sp+1 + ldx c_sp+1 bcc @L1 inx @L1: stx ptr1+1 @@ -49,7 +49,7 @@ _sprintf: ldy #4-1 @L2: lda (ptr1),y - sta (sp),y + sta (c_sp),y dey bpl @L2 diff --git a/libsrc/common/sscanf.s b/libsrc/common/sscanf.s index 941f54e92..d393087d8 100644 --- a/libsrc/common/sscanf.s +++ b/libsrc/common/sscanf.s @@ -6,7 +6,7 @@ .export _sscanf .import addysp, decsp4, _vsscanf - .importzp sp, ptr1 + .importzp c_sp, ptr1 .macpack generic @@ -51,9 +51,9 @@ _sscanf: ; Calculate a pointer to the fixed parameters lda ParamSize - add sp + add c_sp sta ptr1 - ldx sp+1 + ldx c_sp+1 bcc @L1 inx @L1: stx ptr1+1 @@ -62,7 +62,7 @@ _sscanf: ldy #4-1 @L2: lda (ptr1),y - sta (sp),y + sta (c_sp),y dey bpl @L2 diff --git a/libsrc/common/tgi_colors.s b/libsrc/common/tgi_colors.s index 6ef3729b4..ba14ffa09 100644 --- a/libsrc/common/tgi_colors.s +++ b/libsrc/common/tgi_colors.s @@ -1,6 +1,7 @@ ; ; Target-specific black & white values for use by the target-shared TGI kernel ; +; NOTE: These are indices into the default palette .include "tgi-kernel.inc" diff --git a/libsrc/common/vfprintf.s b/libsrc/common/vfprintf.s index 1225bcc47..3dc1e6729 100644 --- a/libsrc/common/vfprintf.s +++ b/libsrc/common/vfprintf.s @@ -8,7 +8,7 @@ .export _vfprintf .import push1, pushwysp, incsp6 .import _fwrite, __printf - .importzp sp, ptr1 + .importzp c_sp, ptr1 .macpack generic @@ -121,15 +121,15 @@ _vfprintf: ; exactly as _printf expects it. Parameters will get dropped by _printf. ldy #2 - lda (sp),y ; Low byte of f + lda (c_sp),y ; Low byte of f sta ptr lda #<outdesc - sta (sp),y + sta (c_sp),y iny - lda (sp),y ; High byte of f + lda (c_sp),y ; High byte of f sta ptr+1 lda #>outdesc - sta (sp),y + sta (c_sp),y ; Restore low byte of ap and call _printf diff --git a/libsrc/common/vfscanf.s b/libsrc/common/vfscanf.s index c7d6e5564..71d7c634c 100644 --- a/libsrc/common/vfscanf.s +++ b/libsrc/common/vfscanf.s @@ -61,16 +61,16 @@ _vfscanf: ; Swap f against &d on the stack, placing f into d.data ldy #2 ; Offset of f on the stack - lda (sp),y + lda (c_sp),y sta d + SCANFDATA::DATA lda #<d - sta (sp),y + sta (c_sp),y iny ; High byte - lda (sp),y + lda (c_sp),y sta d + SCANFDATA::DATA + 1 lda #>d - sta (sp),y + sta (c_sp),y ; Restore the low byte of ap, and call the _scanf function diff --git a/libsrc/common/vprintf.s b/libsrc/common/vprintf.s index 0958b1038..1c44b61ef 100644 --- a/libsrc/common/vprintf.s +++ b/libsrc/common/vprintf.s @@ -7,7 +7,7 @@ .export _vprintf .import _vfprintf, _stdout .import decsp2 - .importzp sp + .importzp c_sp .proc _vprintf @@ -23,20 +23,20 @@ ; Move the format parameter down and store stdout in it's place ldy #2 - lda (sp),y + lda (c_sp),y ldy #0 - sta (sp),y + sta (c_sp),y ldy #3 - lda (sp),y + lda (c_sp),y ldy #1 - sta (sp),y + sta (c_sp),y iny lda _stdout - sta (sp),y + sta (c_sp),y iny lda _stdout+1 - sta (sp),y + sta (c_sp),y ; Restore A diff --git a/libsrc/common/vscanf.s b/libsrc/common/vscanf.s index 94afe527f..a97bd163a 100644 --- a/libsrc/common/vscanf.s +++ b/libsrc/common/vscanf.s @@ -31,22 +31,22 @@ _vscanf: ; Move the format down ldy #2 - lda (sp),y ; Load byte of format + lda (c_sp),y ; Load byte of format ldy #0 - sta (sp),y + sta (c_sp),y ldy #3 - lda (sp),y + lda (c_sp),y ldy #1 - sta (sp),y + sta (c_sp),y ; Store stdin into the stack frame iny lda _stdin - sta (sp),y + sta (c_sp),y iny lda _stdin+1 - sta (sp),y + sta (c_sp),y ; Restore the low byte of ap and jump to vfscanf, which will cleanup the stack diff --git a/libsrc/common/vsnprintf.s b/libsrc/common/vsnprintf.s index 048a756c3..780ab10ee 100644 --- a/libsrc/common/vsnprintf.s +++ b/libsrc/common/vsnprintf.s @@ -8,7 +8,7 @@ .export _vsnprintf, vsnprintf .import ldaxysp, popax, incsp2, incsp6 .import _memcpy, __printf - .importzp sp, ptr1 + .importzp c_sp, ptr1 .include "errno.inc" @@ -55,19 +55,19 @@ vsnprintf: ; be formatted and counted. ldy #2 - lda (sp),y + lda (c_sp),y sta ptr1 lda #<outdesc - sta (sp),y + sta (c_sp),y iny - lda (sp),y + lda (c_sp),y bmi L9 ; More than $7FFF sta ptr1+1 lda #>outdesc - sta (sp),y + sta (c_sp),y ; Write size-1 to outdesc.uns. It will be -1 if there is no buffer. @@ -178,12 +178,12 @@ out: clc adc ccount+0 ldy #4 - sta (sp),y + sta (c_sp),y lda bufptr+1 adc ccount+1 iny - sta (sp),y + sta (c_sp),y ; Get Count from stack diff --git a/libsrc/common/vsscanf.s b/libsrc/common/vsscanf.s index 335712b20..2061861dc 100644 --- a/libsrc/common/vsscanf.s +++ b/libsrc/common/vsscanf.s @@ -9,7 +9,7 @@ .export _vsscanf .import popax, __scanf - .importzp sp, ptr1, ptr2 + .importzp c_sp, ptr1, ptr2 .macpack generic @@ -165,15 +165,15 @@ d: .addr get ; to d ldy #2 ; Stack offset of str - lda (sp),y + lda (c_sp),y sta sd + SSCANFDATA::STR lda #<d - sta (sp),y + sta (c_sp),y iny - lda (sp),y + lda (c_sp),y sta sd + SSCANFDATA::STR+1 lda #>d - sta (sp),y + sta (c_sp),y lda #$00 sta sd + SSCANFDATA::INDEX diff --git a/libsrc/conio/cgets.c b/libsrc/conio/cgets.c new file mode 100644 index 000000000..290a6b131 --- /dev/null +++ b/libsrc/conio/cgets.c @@ -0,0 +1,76 @@ +/* Created: 2025-06-15 Russell-S-Harper +** Modified: <iso-date> <author> +** Notes: <e.g. revisions made to support target, edge cases, bugs, etc.> +** +** char* __fastcall__ cgets (char* buffer, int size); +*/ + +#include <stddef.h> +#include <conio.h> +#include <string.h> +#include <ctype.h> + +#ifndef CRLF +#define CRLF "\r\n" +#endif /* CRLF */ + +char* __fastcall__ cgets (char* buffer, int size) +/* Get a string of characters directly from the console. The function returns +** when size - 1 characters or either CR/LF are read. Note the parameters are +** more aligned with stdio fgets() as opposed to the quirky "standard" conio +** cgets(). Besides providing saner parameters, the function also echoes CRLF +** when either CR/LF are read but does NOT append either in the buffer. This is +** to correspond to stdio fgets() which echoes CRLF, but prevents a "gotcha" +** where the buffer might not be able to accommodate both CR and LF at the end. +** +** param: buffer - where to save the input, must be non-NULL +** param: size - size of the buffer, must be > 1 +** return: buffer if successful, NULL on error +*/ +{ + int i = 0; + unsigned char w, x, y; + char c; + + if (buffer && size > 1) { + /* Just need the width */ + screensize (&w, &y); + /* Actually just the last column! */ + --w; + cursor (1); + for (buffer[i] = '\0', --size; i < size; ) { + c = cgetc (); + /* Handle CR/LF */ + if (strchr (CRLF, c)) { + /* Echo CRLF, but don't append either CR/LF */ + cputs (CRLF); + break; + } + /* Handle backspace */ + if (c == '\b') { + if (i > 0) { + /* Remove the character */ + buffer[--i] = '\0'; + /* Logic to account for line wrapping */ + y = wherey (); + x = wherex (); + y = x? y: y - 1; + x = x? x - 1: w; + /* Clear the character */ + gotoxy (x, y); + cputc (' '); + gotoxy (x, y); + } + /* Handle regular characters */ + } else if (isprint (c)) { + cputc (c); + buffer[i] = c; + buffer[++i] = '\0'; + } + } + cursor (0); + } + + /* Done */ + return (i > 0)? buffer: NULL; +} diff --git a/libsrc/conio/cprintf.s b/libsrc/conio/cprintf.s index 01bd0bbc6..80bca2308 100644 --- a/libsrc/conio/cprintf.s +++ b/libsrc/conio/cprintf.s @@ -6,7 +6,7 @@ .export _cprintf .import pushax, addysp, _vcprintf - .importzp sp, ptr1 + .importzp c_sp, ptr1 .macpack generic @@ -31,9 +31,9 @@ _cprintf: dey dey ; Sub size of Format tya - add sp + add c_sp sta ptr1 - ldx sp+1 + ldx c_sp+1 bcc @L1 inx @L1: stx ptr1+1 diff --git a/libsrc/conio/cputs.s b/libsrc/conio/cputs.s index 62e757b84..b822fddee 100644 --- a/libsrc/conio/cputs.s +++ b/libsrc/conio/cputs.s @@ -23,31 +23,17 @@ _cputsxy: _cputs: sta ptr1 ; Save s stx ptr1+1 +L0: .if (.cpu .bitand CPU_ISET_65SC02) - -L0: lda (ptr1) ; (5) - beq L9 ; (7) Jump if done - jsr _cputc ; (13) Output char, advance cursor - inc ptr1 ; (18) Bump low byte - bne L0 ; (20) Next char - inc ptr1+1 ; (25) Bump high byte - bne L0 - + lda (ptr1) ; (5) .else - -L0: ldy #0 ; (2) -L1: lda (ptr1),y ; (7) - beq L9 ; (9) Jump if done - iny - sty tmp1 ; (14) Save offset - jsr _cputc ; (20) Output char, advance cursor - ldy tmp1 ; (23) Get offset - bne L1 ; (25) Next char - inc ptr1+1 ; (30) Bump high byte - bne L1 - + ldy #0 ; (2) + lda (ptr1),y ; (7) .endif - -; Done - + beq L9 ; (7/9) Jump if done + jsr _cputc ; (13/15) Output char, advance cursor + inc ptr1 ; (18/20) Bump low byte + bne L0 ; (20/22) Next char + inc ptr1+1 ; (25/27) Bump high byte + bne L0 L9: rts diff --git a/libsrc/conio/cscanf.s b/libsrc/conio/cscanf.s index 7e54a844f..7ee532626 100644 --- a/libsrc/conio/cscanf.s +++ b/libsrc/conio/cscanf.s @@ -23,8 +23,8 @@ _cscanf: ; Now, calculate the va_list pointer -- which points to format. - ldx sp+1 - add sp + ldx c_sp+1 + add c_sp bcc @L1 inx @L1: sta ptr1 diff --git a/libsrc/conio/vcprintf.s b/libsrc/conio/vcprintf.s index 595a2d2c5..c6371f00e 100644 --- a/libsrc/conio/vcprintf.s +++ b/libsrc/conio/vcprintf.s @@ -7,7 +7,7 @@ .export _vcprintf .import pushax, popax, popptr1 .import __printf, _cputc - .importzp sp, ptr1, ptr2, ptr3, tmp1 + .importzp c_sp, ptr1, ptr2, ptr3, tmp1 .macpack generic .macpack cpu @@ -138,10 +138,10 @@ _vcprintf: ; Get the format parameter and push it again ldy #1 - lda (sp),y + lda (c_sp),y tax dey - lda (sp),y + lda (c_sp),y jsr pushax ; Replace the passed format parameter on the stack by &d - this creates @@ -150,10 +150,10 @@ _vcprintf: ldy #2 ; Low byte of d lda #<outdesc - sta (sp),y + sta (c_sp),y iny lda #>outdesc - sta (sp),y + sta (c_sp),y ; Restore ap and call _printf diff --git a/libsrc/creativision/crt0.s b/libsrc/creativision/crt0.s index 5185ff237..70009e2ba 100644 --- a/libsrc/creativision/crt0.s +++ b/libsrc/creativision/crt0.s @@ -40,8 +40,8 @@ entry: ; Setup the argument stack ptr lda #<(__ZP_LAST__ + __STACKSIZE__) ldx #>(__ZP_LAST__ + __STACKSIZE__) - sta sp - stx sp+1 + sta c_sp + stx c_sp+1 ; Call module constructors jsr initlib diff --git a/libsrc/creativision/sysuname.s b/libsrc/creativision/sysuname.s index 725cb2a62..43a0c7659 100644 --- a/libsrc/creativision/sysuname.s +++ b/libsrc/creativision/sysuname.s @@ -23,13 +23,13 @@ utsdata: .asciiz "" ; release - .byte ((.VERSION >> 8) & $0F) + '0' + .byte .string (>.version) .byte '.' - .byte ((.VERSION >> 4) & $0F) + '0' + .byte .string (<.version) .byte $00 ; version - .byte (.VERSION & $0F) + '0' + .byte '0' ; unused .byte $00 ; machine diff --git a/libsrc/cx16/crt0.s b/libsrc/cx16/crt0.s index e37a64a7c..5ee81b184 100644 --- a/libsrc/cx16/crt0.s +++ b/libsrc/cx16/crt0.s @@ -80,8 +80,8 @@ init: lda #<(__MAIN_START__ + __MAIN_SIZE__) ldx #>(__MAIN_START__ + __MAIN_SIZE__) - sta sp - stx sp+1 ; Set argument stack ptr + sta c_sp + stx c_sp+1 ; Set argument stack ptr ; Switch to the lower/UPPER PetSCII charset. diff --git a/libsrc/cx16/mou/cx16-std.s b/libsrc/cx16/mou/cx16-std.s index f211815de..5bfe27a7d 100644 --- a/libsrc/cx16/mou/cx16-std.s +++ b/libsrc/cx16/mou/cx16-std.s @@ -238,11 +238,11 @@ MOVE: php jsr CMOVEY ; Set it ldy #$01 - lda (sp),y + lda (c_sp),y sta XPos+1 tax dey - lda (sp),y + lda (c_sp),y sta XPos ; New X position jsr CMOVEX ; Move the cursor diff --git a/libsrc/cx16/sysuname.s b/libsrc/cx16/sysuname.s index 4aefb7cf5..06f4d7662 100644 --- a/libsrc/cx16/sysuname.s +++ b/libsrc/cx16/sysuname.s @@ -24,13 +24,13 @@ utsdata: .asciiz "" ; release - .byte ((.VERSION >> 8) & $0F) + '0' + .byte .string (>.version) .byte '.' - .byte ((.VERSION >> 4) & $0F) + '0' + .byte .string (<.version) .byte $00 ; version - .byte (.VERSION & $0F) + '0' + .byte '0' ; unused .byte $00 ; machine diff --git a/libsrc/dbg/dbgdump.s b/libsrc/dbg/dbgdump.s index bc6a4bd40..335175840 100644 --- a/libsrc/dbg/dbgdump.s +++ b/libsrc/dbg/dbgdump.s @@ -7,23 +7,23 @@ .export _DbgMemDump .import addysp1 .import __hextab - .importzp sp, tmp2, tmp3, tmp4, ptr3, ptr4 + .importzp c_sp, tmp2, tmp3, tmp4, ptr3, ptr4 _DbgMemDump: ldy #0 - lda (sp),y ; Get length + lda (c_sp),y ; Get length sta tmp4 iny - lda (sp),y ; Get the string buffer + lda (c_sp),y ; Get the string buffer sta ptr3 iny - lda (sp),y + lda (c_sp),y sta ptr3+1 iny - lda (sp),y ; Get the address + lda (c_sp),y ; Get the address sta ptr4 iny - lda (sp),y + lda (c_sp),y sta ptr4+1 jsr addysp1 ; Drop the parameters diff --git a/libsrc/dbg/dbgsupp.s b/libsrc/dbg/dbgsupp.s index b1f122013..ce503bcab 100644 --- a/libsrc/dbg/dbgsupp.s +++ b/libsrc/dbg/dbgsupp.s @@ -36,9 +36,9 @@ DbgBreak: jsr DbgSwapZP ; Swap stuff lda #<DbgStack ; Set new stack - sta sp + sta c_sp lda #>DbgStack - sta sp+1 + sta c_sp+1 jsr ResetDbgBreaks ; Reset temporary breakpoints jsr _DbgEntry ; Call C code jsr SetDbgBreaks ; Set temporary breakpoints @@ -61,7 +61,7 @@ DbgStack: ; Swap space for the C temporaries CTemp: -_DbgCS: .res 2 ; sp +_DbgCS: .res 2 ; c_sp _DbgHI: .res 2 ; sreg .res (zpsavespace-4) ; Other stuff @@ -78,7 +78,7 @@ Swap1: ldx CTemp,y lda <__ZP_START__,y sta CTemp,y txa - sta sp,y + sta c_sp,y dey bpl Swap1 rts diff --git a/libsrc/gamate/crt0.s b/libsrc/gamate/crt0.s index 5a5bb3aa0..67fa8813f 100644 --- a/libsrc/gamate/crt0.s +++ b/libsrc/gamate/crt0.s @@ -34,8 +34,8 @@ Start: ; Set up the stack lda #<(__RAM_START__+__RAM_SIZE__) ldx #>(__RAM_START__+__RAM_SIZE__) - sta sp - stx sp + 1 + sta c_sp + stx c_sp + 1 ; Call module constructors jsr initlib diff --git a/libsrc/geos-common/drivers/geos-stdmou.s b/libsrc/geos-common/drivers/geos-stdmou.s index 88bbc7df9..aacb2590e 100644 --- a/libsrc/geos-common/drivers/geos-stdmou.s +++ b/libsrc/geos-common/drivers/geos-stdmou.s @@ -13,7 +13,7 @@ .export _mouse_move, _mouse_buttons .import popsreg, addysp1 - .importzp sp, sreg, ptr1 + .importzp c_sp, sreg, ptr1 .include "const.inc" .include "jumptab.inc" @@ -87,22 +87,22 @@ _mouse_box: sta mouseBottom - lda (sp),y + lda (c_sp),y sta mouseRight iny - lda (sp),y + lda (c_sp),y sta mouseRight+1 ; maxx iny - lda (sp),y + lda (c_sp),y sta mouseTop iny ; Skip high byte iny - lda (sp),y + lda (c_sp),y sta mouseLeft iny - lda (sp),y + lda (c_sp),y sta mouseLeft+1 ; minx jmp addysp1 ; Drop params, return diff --git a/libsrc/geos-common/system/crt0.s b/libsrc/geos-common/system/crt0.s index 47cec74f2..e1751baef 100644 --- a/libsrc/geos-common/system/crt0.s +++ b/libsrc/geos-common/system/crt0.s @@ -11,7 +11,7 @@ .import initlib, donelib .import callmain .import zerobss - .importzp sp + .importzp c_sp .include "jumptab.inc" .include "geossym.inc" @@ -48,8 +48,8 @@ lda #<(__STACKADDR__ + __STACKSIZE__) ldx #>(__STACKADDR__ + __STACKSIZE__) - sta sp - stx sp+1 + sta c_sp + stx c_sp+1 ; Call the module constructors. diff --git a/libsrc/geos-common/system/sysuname.s b/libsrc/geos-common/system/sysuname.s index 8eac05941..954e5be5e 100644 --- a/libsrc/geos-common/system/sysuname.s +++ b/libsrc/geos-common/system/sysuname.s @@ -22,14 +22,14 @@ utsdata: .asciiz "" ; release - .byte ((.VERSION >> 8) & $0F) + '0' - .byte '.' - .byte ((.VERSION >> 4) & $0F) + '0' - .byte $00 + .byte .string (>.version) + .byte '.' + .byte .string (<.version) + .byte $00 ; version - .byte (.VERSION & $0F) + '0' - .byte $00 + .byte '0' ; unused + .byte $00 ; machine .asciiz "GEOS" diff --git a/libsrc/kim1/crt0.s b/libsrc/kim1/crt0.s index 906b3b980..adc934a78 100644 --- a/libsrc/kim1/crt0.s +++ b/libsrc/kim1/crt0.s @@ -26,9 +26,9 @@ _init: cld ; Clear decimal mode ; Set cc65 argument stack pointer lda #<(__RAM_START__ + __RAM_SIZE__) - sta sp + sta c_sp lda #>(__RAM_START__ + __RAM_SIZE__) - sta sp+1 + sta c_sp+1 ; Initialize memory storage diff --git a/libsrc/lynx/crt0.s b/libsrc/lynx/crt0.s index 030f523e9..e1f1c078e 100644 --- a/libsrc/lynx/crt0.s +++ b/libsrc/lynx/crt0.s @@ -80,8 +80,8 @@ MikeyInitData: .byte $9e,$18,$68,$1f,$00,$00,$00,$00,$00,$ff,$1a,$1b,$04,$0d,$2 lda #<(__MAIN_START__ + __MAIN_SIZE__ + __STACKSIZE__) ldx #>(__MAIN_START__ + __MAIN_SIZE__ + __STACKSIZE__) - sta sp - stx sp+1 + sta c_sp + stx c_sp+1 ; Init Mickey. diff --git a/libsrc/lynx/lseek.s b/libsrc/lynx/lseek.s index 04d816945..da0a1922b 100644 --- a/libsrc/lynx/lseek.s +++ b/libsrc/lynx/lseek.s @@ -11,7 +11,7 @@ ; ; off_t __fastcall__ lseek(int fd, off_t offset, int whence); - .importzp sp, sreg, regsave, regbank, tmp1, ptr1, ptr2 + .importzp c_sp, sreg, regsave, regbank, tmp1, ptr1, ptr2 .macpack longbranch .export _lseek .import addysp, stax0sp, tosand0ax, pusheax, asreax2 diff --git a/libsrc/lynx/sysuname.s b/libsrc/lynx/sysuname.s index 879297ea4..3c75fac08 100644 --- a/libsrc/lynx/sysuname.s +++ b/libsrc/lynx/sysuname.s @@ -23,13 +23,13 @@ utsdata: .asciiz "" ; release - .byte ((.VERSION >> 8) & $0F) + '0' + .byte .string (>.version) .byte '.' - .byte ((.VERSION >> 4) & $0F) + '0' + .byte .string (<.version) .byte $00 ; version - .byte (.VERSION & $0F) + '0' + .byte '0' ; unused .byte $00 ; machine diff --git a/libsrc/lynx/tgi_colors.s b/libsrc/lynx/tgi_colors.s index ebc8c2889..6d0ea442a 100644 --- a/libsrc/lynx/tgi_colors.s +++ b/libsrc/lynx/tgi_colors.s @@ -1,6 +1,7 @@ ; ; Target-specific black & white values for use by the target-shared TGI kernel ; +; NOTE: These are indices into the default palette .include "tgi-kernel.inc" diff --git a/libsrc/mega65/_scrsize.s b/libsrc/mega65/_scrsize.s new file mode 100644 index 000000000..3fc955657 --- /dev/null +++ b/libsrc/mega65/_scrsize.s @@ -0,0 +1,17 @@ +; +; Ullrich von Bassewitz, 26.10.2000 +; +; Screen size variables +; + + .export screensize + .include "cbm_kernal.inc" + +.proc screensize + + jsr SCREEN + inx + iny + rts + +.endproc diff --git a/libsrc/mega65/bordercolor.s b/libsrc/mega65/bordercolor.s new file mode 100644 index 000000000..2ebf83766 --- /dev/null +++ b/libsrc/mega65/bordercolor.s @@ -0,0 +1,17 @@ +; +; Ullrich von Bassewitz, 06.08.1998 +; +; unsigned char __fastcall__ bordercolor (unsigned char color); +; + + + .export _bordercolor + + .include "mega65.inc" + +_bordercolor: + ldx VIC_BORDERCOLOR ; get old value + sta VIC_BORDERCOLOR ; set new value + txa + rts + diff --git a/libsrc/mega65/cgetc.s b/libsrc/mega65/cgetc.s new file mode 100644 index 000000000..3b2d5934d --- /dev/null +++ b/libsrc/mega65/cgetc.s @@ -0,0 +1,32 @@ + + + .include "cbm_kernal.inc" + .import cursor + .export _cgetc +_cgetc: + + lda cursor + beq nocursor + + ; enable the cursor + clc + jsr CURSOR + +nocursor: + ; wait for a key + ; FIXME: is $d610 mega65 specific? +: + lda $d610 + beq :- + + jsr KBDREAD + + pha + ; disable the cursor + sec + jsr CURSOR + + pla + ldx #0 + rts + diff --git a/libsrc/mega65/clrscr.s b/libsrc/mega65/clrscr.s new file mode 100644 index 000000000..84fef5eac --- /dev/null +++ b/libsrc/mega65/clrscr.s @@ -0,0 +1,15 @@ +; +; Ullrich von Bassewitz, 06.08.1998 +; +; void clrscr (void); +; + + .export _clrscr + + .include "cbm_kernal.inc" + +;_clrscr = CLRSCR + +_clrscr: + lda #$93 + jmp CHROUT diff --git a/libsrc/mega65/color.s b/libsrc/mega65/color.s new file mode 100644 index 000000000..094bf9ed8 --- /dev/null +++ b/libsrc/mega65/color.s @@ -0,0 +1,24 @@ +; +; Ullrich von Bassewitz, 06.08.1998 +; +; unsigned char __fastcall__ textcolor (unsigned char color); +; unsigned char __fastcall__ bgcolor (unsigned char color); +; + + + .export _textcolor, _bgcolor + + .include "mega65.inc" + +_textcolor: + ldx CHARCOLOR ; get old value + sta CHARCOLOR ; set new value + txa + rts + + +_bgcolor: + ldx VIC_BG_COLOR0 ; get old value + sta VIC_BG_COLOR0 ; set new value + txa + rts diff --git a/libsrc/mega65/conio.s b/libsrc/mega65/conio.s new file mode 100644 index 000000000..14052c5a1 --- /dev/null +++ b/libsrc/mega65/conio.s @@ -0,0 +1,10 @@ +; +; Ullrich von Bassewitz, 06.08.1998 +; +; Low level stuff for screen output/console input +; + + .exportzp CURS_X, CURS_Y + + .include "mega65.inc" + diff --git a/libsrc/mega65/cpeekc.s b/libsrc/mega65/cpeekc.s new file mode 100644 index 000000000..f75926d3e --- /dev/null +++ b/libsrc/mega65/cpeekc.s @@ -0,0 +1,45 @@ +; +; 2016-02-28, Groepaz +; 2017-06-22, Greg King +; +; char cpeekc (void); +; + + .include "mega65.inc" + + .export _cpeekc + .importzp ptr1 + +_cpeekc: + lda SCREEN_PTR + 1 + clc + adc #>$0800 + sta ptr1 + 1 + lda SCREEN_PTR + sta ptr1 + + ldy CURS_X + lda (ptr1),y ; get screen code + ldx #>$0000 + and #<~$80 ; remove reverse bit + +; Convert the screen code into a PetSCII code. +; $00 - $1F: +$40 +; $20 - $3F +; $40 - $5f: +$20 +; $60 - $7F: +$40 + + cmp #$20 + bcs @sk1 ;(bge) + ora #$40 + rts + +@sk1: cmp #$40 + bcc @end ;(blt) + cmp #$60 + bcc @sk2 ;(blt) + ;sec + adc #$20 - $01 +@sk2: ;clc ; both above cmp and adc clear carry flag + adc #$20 +@end: rts diff --git a/libsrc/mega65/cpeekcolor.s b/libsrc/mega65/cpeekcolor.s new file mode 100644 index 000000000..45a59f3cb --- /dev/null +++ b/libsrc/mega65/cpeekcolor.s @@ -0,0 +1,25 @@ +; +; 2016-02-28, Groepaz +; 2017-06-22, Greg King +; +; unsigned char cpeekcolor (void); +; + + .include "mega65.inc" + + .export _cpeekcolor + .importzp ptr1 + +_cpeekcolor: + lda SCREEN_PTR + 1 + clc + adc #>$d800 + sta ptr1 + 1 + lda SCREEN_PTR + sta ptr1 + + ldy CURS_X + lda (ptr1),y + + ldx #>$0000 + rts diff --git a/libsrc/mega65/cpeekrevers.s b/libsrc/mega65/cpeekrevers.s new file mode 100644 index 000000000..a8e03e91e --- /dev/null +++ b/libsrc/mega65/cpeekrevers.s @@ -0,0 +1,28 @@ +; +; 2016-02-28, Groepaz +; 2017-06-15, Greg King +; +; unsigned char cpeekrevers (void); +; + + .include "mega65.inc" + + .export _cpeekrevers + .importzp ptr1 + +_cpeekrevers: + lda SCREEN_PTR + 1 + clc + adc #>$0800 + sta ptr1 + 1 + lda SCREEN_PTR + sta ptr1 + + ldy CURS_X + lda (ptr1),y ; get screen code + and #$80 ; get reverse bit + asl a + tax ; ldx #>$0000 + rol a ; return boolean value + + rts diff --git a/libsrc/mega65/cpeeks.s b/libsrc/mega65/cpeeks.s new file mode 100644 index 000000000..9c33831f1 --- /dev/null +++ b/libsrc/mega65/cpeeks.s @@ -0,0 +1,80 @@ +; +; 2017-07-05, Greg King +; +; void cpeeks (char* s, unsigned length); +; + + .include "c65.inc" + + .export _cpeeks + + .import popax + .importzp ptr1, ptr2, ptr3, tmp1, tmp2 + + .macpack generic + +_cpeeks: + eor #<$FFFF ; counting a word upward is faster + sta ptr3 ; so, we use -(length + 1) + txa + eor #>$FFFF + sta ptr3+1 + + lda SCREEN_PTR + sta ptr2 + lda SCREEN_PTR+1 + clc + adc #>$0800 + sta ptr2+1 + + ldy CURS_X + sty tmp2 + + jsr popax + sta tmp1 ; (will be a .Y index) + stx ptr1+1 + ldx #<$0000 + stx ptr1 + bze L3 ; branch always + +L4: ldy tmp2 + lda (ptr2),y ; get char + iny + bnz L2 + inc ptr2+1 +L2: sty tmp2 + and #<~$80 ; remove reverse bit + +; Convert the screen code into a PetSCII code. +; $00 - $1F: +$40 +; $20 - $3F +; $40 - $5f: +$20 +; $60 - $7F: +$40 + + cmp #$20 + blt @sk1 ;(bcc) + cmp #$40 + blt L5 + cmp #$60 + blt @sk2 ;(bcc) + clc +@sk1: adc #$20 +@sk2: ;clc ; both above cmp and adc clear carry flag + adc #$20 + +L5: ldy tmp1 + sta (ptr1),y + iny + bnz L1 + inc ptr1+1 +L1: sty tmp1 + +L3: inc ptr3 ; count length + bnz L4 + inc ptr3+1 + bnz L4 + + txa ; terminate the string + ldy tmp1 + sta (ptr1),y + rts diff --git a/libsrc/mega65/cputc.s b/libsrc/mega65/cputc.s new file mode 100644 index 000000000..df44f5bdd --- /dev/null +++ b/libsrc/mega65/cputc.s @@ -0,0 +1,120 @@ +; +; Ullrich von Bassewitz, 1998-08-06, 2009-09-26 +; +; void __fastcall__ cputcxy (unsigned char x, unsigned char y, char c); +; void __fastcall__ cputc (char c); +; + + .export _cputcxy, _cputc, cputdirect, putchar + .export newline, plot + .import gotoxy + .import PLOT + .importzp ptr4 + + .include "mega65.inc" + +_cputcxy: + pha ; Save C + jsr gotoxy ; Set cursor, drop x and y + pla ; Restore C + +; Plot a character - also used as internal function + +_cputc: cmp #$0A ; CR? + bne L1 + lda #0 + sta CURS_X + beq plot ; Recalculate pointers + +L1: cmp #$0D ; LF? + beq newline ; Recalculate pointers + +; Printable char of some sort + + cmp #' ' + bcc cputdirect ; Other control char + tay + bmi L10 + cmp #$60 + bcc L2 + and #$DF + bne cputdirect ; Branch always +L2: and #$3F + +cputdirect: + jsr putchar ; Write the character to the screen + +; Advance cursor position + +advance: + iny + cpy #XSIZE + bne L3 + jsr newline ; new line + ldy #0 ; + cr +L3: sty CURS_X + rts + +newline: + clc + lda #XSIZE + adc SCREEN_PTR + sta SCREEN_PTR + bcc L4 + inc SCREEN_PTR+1 + clc +L4: lda #XSIZE + adc CRAM_PTR + sta CRAM_PTR + bcc L5 + inc CRAM_PTR+1 +L5: inc CURS_Y + rts + +; Handle character if high bit set + +L10: and #$7F + cmp #$7F ; PI? + bne L11 + lda #$5E ; Load screen code for PI +L11: ora #$40 + bne cputdirect + + + +; Set cursor position, calculate RAM pointers. + +plot: ldy CURS_X + ldx CURS_Y + clc + jmp PLOT ; Set the new cursor + + + +; Write one character to the screen without doing anything else, return X +; position in Y + +putchar: + ora RVS ; Set revers bit + + tay + lda SCREEN_PTR + 1 + clc + adc #>$0800 + sta ptr4 + 1 + lda SCREEN_PTR + sta ptr4 + tya + + ldy CURS_X + sta (ptr4),y ; Set char + + lda ptr4 + 1 + clc + adc #>$d000 + sta ptr4 + 1 + + lda CHARCOLOR + sta (ptr4),y ; Set color + + rts diff --git a/libsrc/mega65/crt0.s b/libsrc/mega65/crt0.s new file mode 100644 index 000000000..c7be6b7ee --- /dev/null +++ b/libsrc/mega65/crt0.s @@ -0,0 +1,123 @@ +; +; Startup code for cc65 (MEGA65 version) +; + + .export _exit + .export __STARTUP__ : absolute = 1 ; Mark as startup + + .import initlib, donelib + .import zerobss, callmain + .import BSOUT + .import __MAIN_START__, __MAIN_SIZE__ ; Linker generated + .import __STACKSIZE__ ; from configure file + + .include "zeropage.inc" + .include "mega65.inc" + + +; ------------------------------------------------------------------------ +; Startup code + +.segment "STARTUP" + +Start: + +; Switch off the BASIC ROM. + +; FIXME +; lda $01 +; sta mmusave ; Save the memory configuration +; and #$F8 +; ora #$06 ; Enable Kernal+I/O, disable BASIC +; sta $01 +; sei +; lda #%00000000 ; lower offset 15-8 +; ldx #%00000000 ; map blk3-1 | lower offset 19-6 +; ldy #%00000000 ; upper offset 15-8 +; ldz #%00000000 ; map blk7-4 | upper offset 19-6 +; map +; eom + + tsx + stx spsave ; Save the system stack ptr + +; Save space by putting some of the start-up code in the ONCE segment, +; which can be re-used by the BSS segment, the heap and the C stack. + + jsr init + +; Clear the BSS data. + + jsr zerobss + +; Push the command-line arguments; and, call main(). + + jsr callmain + +; Back from main() [this is also the exit() entry]. Run the module destructors. + +_exit: pha ; Save the return code on stack + jsr donelib + +; Copy back the zero-page stuff. + + ldx #zpspace-1 +L2: lda zpsave,x + sta c_sp,x + dex + bpl L2 + +; Place the program return code into BASIC's status variable. + + pla + sta STATUS + +; Restore the system stuff. + + ldx spsave + txs ; Restore stack pointer + +; Back to BASIC. + + rts + + +; ------------------------------------------------------------------------ + +.segment "ONCE" + +init: + +; Save the zero-page locations that we need. + + ldx #zpspace-1 +L1: lda c_sp,x + sta zpsave,x + dex + bpl L1 + +; Set up the stack. + + lda #<(__MAIN_START__ + __MAIN_SIZE__) + ldx #>(__MAIN_START__ + __MAIN_SIZE__) + sta c_sp + stx c_sp+1 ; Set argument stack ptr + +; Switch to the second charset. + + lda #14 + jsr BSOUT + +; Call the module constructors. + + jmp initlib + + +; ------------------------------------------------------------------------ +; Data + +.segment "INIT" + +mmusave:.res 1 +spsave: .res 1 +zpsave: .res zpspace diff --git a/libsrc/mega65/devnum.s b/libsrc/mega65/devnum.s new file mode 100644 index 000000000..898989766 --- /dev/null +++ b/libsrc/mega65/devnum.s @@ -0,0 +1,7 @@ +; +; Oliver Schmidt, 2010-02-14 +; + + .include "mega65.inc" + + .exportzp devnum := DEVNUM diff --git a/libsrc/mega65/exehdr.s b/libsrc/mega65/exehdr.s new file mode 100644 index 000000000..645fc12e7 --- /dev/null +++ b/libsrc/mega65/exehdr.s @@ -0,0 +1,32 @@ +; +; Ullrich von Bassewitz, 2010-11-14 +; +; This module supplies a small BASIC stub program that jumps to the machine +; language code that follows it using SYS. +; + + ; The following symbol is used by linker config to force the module + ; to get included into the output file + .export __EXEHDR__: absolute = 1 + +.segment "EXEHDR" + + .addr Next + .word .version ; Line number + .byte $fe, $02, "0:" ; BANK 0 + .byte $9e ; SYS +; .byte <(((Start / 10000) .mod 10) + '0') + .byte <(((Start / 1000) .mod 10) + '0') + .byte <(((Start / 100) .mod 10) + '0') + .byte <(((Start / 10) .mod 10) + '0') + .byte <(((Start / 1) .mod 10) + '0') + .byte $00 ; End of BASIC line +Next: .word 0 ; BASIC end marker +Start: + +; If the start address is larger than 4 digits, the header generated above +; will not contain the highest digit. Instead of wasting one more digit that +; is almost never used, check it at link time and generate an error so the +; user knows something is wrong. + +.assert (Start < 10000), error, "Start address too large for generated BASIC stub" diff --git a/libsrc/mega65/get_tv.s b/libsrc/mega65/get_tv.s new file mode 100644 index 000000000..eb2dafd1d --- /dev/null +++ b/libsrc/mega65/get_tv.s @@ -0,0 +1,25 @@ +; +; Ullrich von Bassewitz, 2002-12-03 +; +; unsigned char get_tv (void); +; /* Return the video mode the machine is using */ +; + + .include "get_tv.inc" + .include "mega65.inc" + + +;-------------------------------------------------------------------------- +; _get_tv + +.proc _get_tv + + ldx #TV::PAL ; Assume PAL + lda PALFLAG + bne pal + dex ; NTSC +pal: txa + ldx #0 + rts + +.endproc diff --git a/libsrc/mega65/gettime.s b/libsrc/mega65/gettime.s new file mode 100644 index 000000000..34c5054d5 --- /dev/null +++ b/libsrc/mega65/gettime.s @@ -0,0 +1,83 @@ +; +; Stefan Haubenthal, 27.7.2009 +; Oliver Schmidt, 14.8.2018 +; +; int __fastcall__ clock_gettime (clockid_t clk_id, struct timespec *tp); +; + + .include "time.inc" + .include "mega65.inc" + + .importzp sreg, tmp1, tmp2 + .import pushax, pusheax, tosmul0ax, steaxspidx, incsp1, return0 + .import TM, load_tenth + + +;---------------------------------------------------------------------------- +.code + +.proc _clock_gettime + + jsr pushax + jsr pushax + + lda CIA1_TODHR + sed + tax ; Save PM flag + and #%01111111 + cmp #$12 ; 12 AM/PM + bcc @L1 + sbc #$12 +@L1: inx ; Get PM flag + bpl @L2 + clc + adc #$12 +@L2: cld + jsr BCD2dec + sta TM + tm::tm_hour + lda CIA1_TODMIN + jsr BCD2dec + sta TM + tm::tm_min + lda CIA1_TODSEC + jsr BCD2dec + sta TM + tm::tm_sec + lda #<TM + ldx #>TM + jsr _mktime + + ldy #timespec::tv_sec + jsr steaxspidx ; Pops address pushed by 2. pushax + + jsr load_tenth + jsr pusheax + lda CIA1_TOD10 + ldx #>$0000 + jsr tosmul0ax + + ldy #timespec::tv_nsec + jsr steaxspidx ; Pops address pushed by 1. pushax + + jsr incsp1 + jmp return0 + +.endproc + +;---------------------------------------------------------------------------- +; dec = (((BCD>>4)*10) + (BCD&0xf)) + +.proc BCD2dec + + tax + and #%00001111 + sta tmp1 + txa + and #%11110000 ; *16 + lsr ; *8 + sta tmp2 + lsr + lsr ; *2 + adc tmp2 ; = *10 + adc tmp1 + rts + +.endproc diff --git a/libsrc/mega65/joy/m65-stdjoy.s b/libsrc/mega65/joy/m65-stdjoy.s new file mode 100644 index 000000000..d266745d9 --- /dev/null +++ b/libsrc/mega65/joy/m65-stdjoy.s @@ -0,0 +1,111 @@ +; +; Standard joystick driver for the C64. May be used multiple times when linked +; to the statically application. +; +; Ullrich von Bassewitz, 2002-12-20 +; + + .include "zeropage.inc" + + .include "joy-kernel.inc" + .include "joy-error.inc" + .include "mega65.inc" + + .macpack generic + .macpack module + + +; ------------------------------------------------------------------------ +; Header. Includes jump table + + module_header _mega65_stdjoy_joy + +; Driver signature + + .byte $6A, $6F, $79 ; "joy" + .byte JOY_API_VERSION ; Driver API version number + +; Library reference + + .addr $0000 + +; Jump table. + + .addr INSTALL + .addr UNINSTALL + .addr COUNT + .addr READ + +; ------------------------------------------------------------------------ +; Constants + +JOY_COUNT = 2 ; Number of joysticks we support + + +; ------------------------------------------------------------------------ +; Data. + + +.code + +; ------------------------------------------------------------------------ +; INSTALL routine. Is called after the driver is loaded into memory. If +; possible, check if the hardware is present and determine the amount of +; memory available. +; Must return an JOY_ERR_xx code in a/x. +; + +INSTALL: + lda #JOY_ERR_OK + .assert JOY_ERR_OK = 0, error + tax + +; rts ; Run into UNINSTALL instead + +; ------------------------------------------------------------------------ +; UNINSTALL routine. Is called before the driver is removed from memory. +; Can do cleanup or whatever. Must not return anything. +; + +UNINSTALL: + rts + + +; ------------------------------------------------------------------------ +; COUNT: Return the total number of available joysticks in a/x. +; + +COUNT: + lda #<JOY_COUNT + ldx #>JOY_COUNT + rts + +; ------------------------------------------------------------------------ +; READ: Read a particular joystick passed in A. +; + +READ: tax ; Joystick number into X + bne joy2 + +; Read joystick 1 + +joy1: lda #$7F + sei + sta CIA1_PRA + lda CIA1_PRB + cli + jmp end + +; Read joystick 2 + +joy2: ldx #0 + lda #$E0 + ldy #$FF + sei + sta CIA1_DDRA + lda CIA1_PRA + sty CIA1_DDRA + cli +end: and #$1F + eor #$1F + rts diff --git a/libsrc/mega65/joy_stat_stddrv.s b/libsrc/mega65/joy_stat_stddrv.s new file mode 100644 index 000000000..492d84eb0 --- /dev/null +++ b/libsrc/mega65/joy_stat_stddrv.s @@ -0,0 +1,14 @@ +; +; Address of the static standard joystick driver +; +; Oliver Schmidt, 2012-11-01 +; +; const void joy_static_stddrv[]; +; + + .export _joy_static_stddrv + .import _mega65_stdjoy_joy + +.rodata + +_joy_static_stddrv := _mega65_stdjoy_joy diff --git a/libsrc/mega65/joy_stddrv.s b/libsrc/mega65/joy_stddrv.s new file mode 100644 index 000000000..97c7c7501 --- /dev/null +++ b/libsrc/mega65/joy_stddrv.s @@ -0,0 +1,14 @@ +; +; Name of the standard joystick driver +; +; Ullrich von Bassewitz, 2002-12-21 +; +; const char joy_stddrv[]; +; + + .export _joy_stddrv + +.rodata + +_joy_stddrv: .asciiz "m65-stdjoy.joy" + diff --git a/libsrc/mega65/kbhit.s b/libsrc/mega65/kbhit.s new file mode 100644 index 000000000..683451b03 --- /dev/null +++ b/libsrc/mega65/kbhit.s @@ -0,0 +1,14 @@ + + ; FIXME: is $d610 mega65 specific? + ; FIXME: this should rather use the kernal (with keyboard buffer etc) + + .export _kbhit +_kbhit: + lda $d610 + beq :+ + + lda #1 +: + ldx #>$0000 + rts + diff --git a/libsrc/mega65/kernal.s b/libsrc/mega65/kernal.s new file mode 100644 index 000000000..198e8fbb4 --- /dev/null +++ b/libsrc/mega65/kernal.s @@ -0,0 +1,47 @@ +; +; Ullrich von Bassewitz, 19.11.2002 +; +; MEGA65 Kernal functions +; + + .include "cbm_kernal.inc" + + .export CINT + .export IOINIT + .export RAMTAS + .export RESTOR + .export VECTOR + .export SETMSG + .export SECOND + .export TKSA + .export MEMTOP + .export MEMBOT + .export SCNKEY + .export ACPTR + .export CIOUT + .export UNTLK + .export UNLSN + .export LISTEN + .export TALK + .export READST + .export SETLFS + .export SETNAM + .export OPEN + .export CLOSE + .export CHKIN + .export CKOUT + .export CLRCH + .export BASIN + .export CHRIN + .export BSOUT + .export CHROUT + .export LOAD + .export SAVE + .export SETTIM + .export RDTIM + .export STOP + .export GETIN + .export CLALL + .export SCREEN + .export IOBASE + .export PLOT diff --git a/libsrc/mega65/libref.s b/libsrc/mega65/libref.s new file mode 100644 index 000000000..e4afa7eb1 --- /dev/null +++ b/libsrc/mega65/libref.s @@ -0,0 +1,8 @@ +; +; Oliver Schmidt, 2013-05-31 +; + + .export joy_libref + .import _exit + +joy_libref := _exit diff --git a/libsrc/mega65/loadaddr.s b/libsrc/mega65/loadaddr.s new file mode 100644 index 000000000..0675dd67d --- /dev/null +++ b/libsrc/mega65/loadaddr.s @@ -0,0 +1,16 @@ +; +; Ullrich von Bassewitz, 2010-11-13 +; +; This module supplies the load address that is expected by Commodore +; machines in the first two bytes of an excutable disk file. +; + + + ; The following symbol is used by linker config to force the module + ; to get included into the output file + .export __LOADADDR__: absolute = 1 + +.segment "LOADADDR" + + .addr *+2 + diff --git a/libsrc/mega65/mainargs.s b/libsrc/mega65/mainargs.s new file mode 100644 index 000000000..b4063b93c --- /dev/null +++ b/libsrc/mega65/mainargs.s @@ -0,0 +1,137 @@ +; mainargs.s +; +; Ullrich von Bassewitz, 2003-03-07 +; Based on code from Stefan A. Haubenthal, <polluks@web.de> +; 2003-05-18, Greg King +; 2004-04-28, 2005-02-26, Ullrich von Bassewitz +; +; Scan a group of arguments that are in BASIC's input-buffer. +; Build an array that points to the beginning of each argument. +; Send, to main(), that array and the count of the arguments. +; +; Command-lines look like these lines: +; +; run +; run : rem +; run:rem arg1 " arg 2 is quoted " arg3 "" arg5 +; +; "run" and "rem" are entokenned; the args. are not. Leading and trailing +; spaces outside of quotes are ignored. +; +; TO-DO: +; - The "file-name" might be a path-name; don't copy the directory-components. +; - Add a control-character quoting mechanism. + + .constructor initmainargs, 24 + .import __argc, __argv + + .include "mega65.inc" + + +MAXARGS = 10 ; Maximum number of arguments allowed +REM = $8f ; BASIC token-code +NAME_LEN = 16 ; Maximum length of command-name + +; Get possible command-line arguments. Goes into the special ONCE segment, +; which may be reused after the startup code is run + +.segment "ONCE" + +initmainargs: + +; Assume that the program was loaded, a moment ago, by the traditional LOAD +; statement. Save the "most-recent filename" as argument #0. + + lda #0 ; The terminating NUL character + ldy FNAM_LEN + cpy #NAME_LEN + 1 + bcc L1 + ldy #NAME_LEN ; Limit the length + bne L1 ; Branch always +L0: lda (FNAM),y +L1: sta name,y + dey + bpl L0 + inc __argc ; argc always is equal to, at least, 1 + +; Find the "rem" token. + + ldx #0 +L2: lda BASIC_BUF,x + beq done ; No "rem," no args. + inx + cmp #REM + bne L2 + ldy #1 * 2 + +; Find the next argument + +next: lda BASIC_BUF,x + beq done ; End of line reached + inx + cmp #' ' ; Skip leading spaces + beq next + +; Found start of next argument. We've incremented the pointer in X already, so +; it points to the second character of the argument. This is useful since we +; will check now for a quoted argument, in which case we will have to skip this +; first character. + +found: cmp #'"' ; Is the argument quoted? + beq setterm ; Jump if so + dex ; Reset pointer to first argument character + lda #' ' ; A space ends the argument +setterm:sta term ; Set end of argument marker + +; Now store a pointer to the argument into the next slot. Since the BASIC +; input buffer is located at the start of a RAM page, no calculations are +; necessary. + + txa ; Get low byte + sta argv,y ; argv[y]= &arg + iny + lda #>BASIC_BUF + sta argv,y + iny + inc __argc ; Found another arg + +; Search for the end of the argument + +argloop:lda BASIC_BUF,x + beq done + inx + cmp term + bne argloop + +; We've found the end of the argument. X points one character behind it, and +; A contains the terminating character. To make the argument a valid C string, +; replace the terminating character by a zero. + + lda #0 + sta BASIC_BUF-1,x + +; Check if the maximum number of command line arguments is reached. If not, +; parse the next one. + + lda __argc ; Get low byte of argument count + cmp #MAXARGS ; Maximum number of arguments reached? + bcc next ; Parse next one if not + +; (The last vector in argv[] already is NULL.) + +done: lda #<argv + ldx #>argv + sta __argv + stx __argv + 1 + rts + +.segment "INIT" + +term: .res 1 +name: .res NAME_LEN + 1 + +.data + +; char* argv[MAXARGS+1]={name}; +argv: .addr name + .res MAXARGS * 2 diff --git a/libsrc/mega65/randomize.s b/libsrc/mega65/randomize.s new file mode 100644 index 000000000..89feebe11 --- /dev/null +++ b/libsrc/mega65/randomize.s @@ -0,0 +1,18 @@ +; +; 2002-11-05, Ullrich von Bassewitz +; 2015-09-11, Greg King +; +; void __randomize (void); +; /* Initialize the random number generator */ +; + + .export ___randomize + .import _srand + + .include "mega65.inc" + +___randomize: + ldx VIC_HLINE ; Use VIC rasterline as high byte + lda TIME+2 ; Use 60HZ clock as low byte + jmp _srand ; Initialize generator + diff --git a/libsrc/mega65/revers.s b/libsrc/mega65/revers.s new file mode 100644 index 000000000..3dc508f79 --- /dev/null +++ b/libsrc/mega65/revers.s @@ -0,0 +1,27 @@ +; +; Ullrich von Bassewitz, 07.08.1998 +; +; unsigned char revers (unsigned char onoff); +; + + .export _revers + + .include "mega65.inc" + +.proc _revers + + ldx #$00 ; Assume revers off + tay ; Test onoff + beq L1 ; Jump if off + ldx #$80 ; Load on value + ldy #$00 ; Assume old value is zero +L1: lda RVS ; Load old value + stx RVS ; Set new value + beq L2 ; Jump if old value zero + iny ; Make old value = 1 +L2: ldx #$00 ; Load high byte of result + tya ; Load low byte, set CC + rts + +.endproc + diff --git a/libsrc/mega65/settime.s b/libsrc/mega65/settime.s new file mode 100644 index 000000000..22a17fb61 --- /dev/null +++ b/libsrc/mega65/settime.s @@ -0,0 +1,84 @@ +; +; Oliver Schmidt, 16.8.2018 +; +; int __fastcall__ clock_settime (clockid_t clk_id, const struct timespec *tp); +; + + .include "time.inc" + .include "mega65.inc" + + .importzp sreg, ptr1 + .import pushax, pusheax, ldax0sp, ldeaxidx + .import tosdiveax, incsp3, return0 + .import TM, load_tenth + + +;---------------------------------------------------------------------------- +.code + +.proc _clock_settime + + jsr pushax + + .assert timespec::tv_sec = 0, error + jsr _localtime + sta ptr1 + stx ptr1+1 + ldy #.sizeof(tm)-1 +@L1: lda (ptr1),y + sta TM,y + dey + bpl @L1 + + lda TM + tm::tm_hour + jsr dec2BCD + tax ; Force flags + bne @L2 + lda #$92 ; 12 AM + bne @L3 +@L2: cmp #$13 ; 1 PM + bcc @L3 + sed + sbc #$12 + cld + ora #%10000000 +@L3: sta CIA1_TODHR + lda TM + tm::tm_min + jsr dec2BCD + sta CIA1_TODMIN + lda TM + tm::tm_sec + jsr dec2BCD + sta CIA1_TODSEC + + jsr ldax0sp + ldy #3+timespec::tv_nsec + jsr ldeaxidx + jsr pusheax + jsr load_tenth + jsr tosdiveax + sta CIA1_TOD10 + + jsr incsp3 + jmp return0 + +.endproc + +;---------------------------------------------------------------------------- +; Just sum up the value in BCD mode. +; http://forum.6502.org/viewtopic.php?p=7629#p7629 + +.proc dec2BCD + + tax + dex + bmi @L9 + lda #0 + clc + sed +@L1: adc #1 + dex + bpl @L1 + cld +@L9: rts + +.endproc diff --git a/libsrc/mega65/status.s b/libsrc/mega65/status.s new file mode 100644 index 000000000..c6f279230 --- /dev/null +++ b/libsrc/mega65/status.s @@ -0,0 +1,5 @@ +; +; Oliver Schmidt, 2012-09-30 +; + + .exportzp ST := $90 ; IEC status byte diff --git a/libsrc/mega65/sysuname.s b/libsrc/mega65/sysuname.s new file mode 100644 index 000000000..2feab6fb1 --- /dev/null +++ b/libsrc/mega65/sysuname.s @@ -0,0 +1,37 @@ +; +; Ullrich von Bassewitz, 2003-08-12 +; +; unsigned char __fastcall__ _sysuname (struct utsname* buf); +; + + .export __sysuname, utsdata + + .import utscopy + + __sysuname = utscopy + +;-------------------------------------------------------------------------- +; Data. We define a fixed utsname struct here and just copy it. + +.rodata + +utsdata: + ; sysname + .asciiz "cc65" + + ; nodename + .asciiz "" + + ; release + .byte .string (>.version) + .byte '.' + .byte .string (<.version) + .byte $00 + + ; version + .byte '0' ; unused + .byte $00 + + ; machine + .asciiz "MEGA65" + diff --git a/libsrc/mega65/tmcommon.s b/libsrc/mega65/tmcommon.s new file mode 100644 index 000000000..52094b68e --- /dev/null +++ b/libsrc/mega65/tmcommon.s @@ -0,0 +1,64 @@ +; +; Oliver Schmidt, 16.8.2018 +; +; Common stuff for the clock routines +; + + .include "c65.inc" + .include "get_tv.inc" + + .export TM, load_tenth + + .constructor inittime + .importzp sreg + .import _get_tv + + +;---------------------------------------------------------------------------- +.code + +.proc load_tenth + + lda #<(100 * 1000 * 1000 / $10000) + ldx #>(100 * 1000 * 1000 / $10000) + sta sreg + stx sreg+1 + lda #<(100 * 1000 * 1000) + ldx #>(100 * 1000 * 1000) + rts + +.endproc + +;---------------------------------------------------------------------------- +; Constructor that writes to the 1/10 sec register of the TOD to kick it +; into action. If this is not done, the clock hangs. We will read the register +; and write it again, ignoring a possible change in between. +.segment "ONCE" + +.proc inittime + + lda CIA1_TOD10 + sta CIA1_TOD10 + jsr _get_tv + cmp #TV::PAL + bne @60Hz + lda CIA1_CRA + ora #$80 + sta CIA1_CRA +@60Hz: rts + +.endproc + +;---------------------------------------------------------------------------- +; TM struct with date set to 1970-01-01 +.data + +TM: .word 0 ; tm_sec + .word 0 ; tm_min + .word 0 ; tm_hour + .word 1 ; tm_mday + .word 0 ; tm_mon + .word 70 ; tm_year + .word 0 ; tm_wday + .word 0 ; tm_yday + .word 0 ; tm_isdst diff --git a/libsrc/nes/crt0.s b/libsrc/nes/crt0.s index 19e97bb12..dfc26dcde 100644 --- a/libsrc/nes/crt0.s +++ b/libsrc/nes/crt0.s @@ -107,8 +107,8 @@ start: lda #<(__SRAM_START__ + __SRAM_SIZE__) ldx #>(__SRAM_START__ + __SRAM_SIZE__) - sta sp - stx sp+1 ; Set argument stack ptr + sta c_sp + stx c_sp+1 ; Set argument stack ptr ; Call the module constructors. diff --git a/libsrc/nes/ppubuf.s b/libsrc/nes/ppubuf.s index 0de6d1980..f3efa4451 100644 --- a/libsrc/nes/ppubuf.s +++ b/libsrc/nes/ppubuf.s @@ -32,7 +32,9 @@ .proc ppubuf_wait - lda #$ff ; (($0100/3)*1) +; $45 is the largest number that didn't cause glitches, $44 gives a bit more +; breathing room. see issue #1703 + lda #$44 @wait: cmp ringcount beq @wait rts diff --git a/libsrc/nes/sysuname.s b/libsrc/nes/sysuname.s index fcab503e1..7e72df358 100644 --- a/libsrc/nes/sysuname.s +++ b/libsrc/nes/sysuname.s @@ -23,13 +23,13 @@ utsdata: .asciiz "" ; release - .byte ((.VERSION >> 8) & $0F) + '0' + .byte .string (>.version) .byte '.' - .byte ((.VERSION >> 4) & $0F) + '0' + .byte .string (<.version) .byte $00 ; version - .byte (.VERSION & $0F) + '0' + .byte '0' ; unused .byte $00 ; machine diff --git a/libsrc/none/crt0.s b/libsrc/none/crt0.s index 596fbcd46..443f453b9 100644 --- a/libsrc/none/crt0.s +++ b/libsrc/none/crt0.s @@ -10,8 +10,8 @@ lda #<__STACKSTART__ ldx #>__STACKSTART__ - sta sp - stx sp+1 + sta c_sp + stx c_sp+1 jsr zerobss jsr initlib jsr _main diff --git a/libsrc/osic1p/crt0.s b/libsrc/osic1p/crt0.s index 56abb7cdb..46d29ed66 100644 --- a/libsrc/osic1p/crt0.s +++ b/libsrc/osic1p/crt0.s @@ -34,8 +34,8 @@ _init: ldx #$FF ; Initialize stack pointer to $01FF lda #<(__MAIN_START__ + __MAIN_SIZE__ + __STACKSIZE__) ldx #>(__MAIN_START__ + __MAIN_SIZE__ + __STACKSIZE__) - sta sp - stx sp+1 + sta c_sp + stx c_sp+1 ; --------------------------------------------------------------------------- ; Initialize memory storage diff --git a/libsrc/pce/_printf.s b/libsrc/pce/_printf.s index e1d2a1cf4..675076ec6 100644 --- a/libsrc/pce/_printf.s +++ b/libsrc/pce/_printf.s @@ -329,22 +329,22 @@ MainLoop: jsr decsp6 ; 3 args ldy #5 lda OutData+1 - sta (sp),y + sta (c_sp),y dey lda OutData - sta (sp),y + sta (c_sp),y dey lda FSave+1 - sta (sp),y + sta (c_sp),y dey lda FSave - sta (sp),y + sta (c_sp),y dey lda FCount+1 - sta (sp),y + sta (c_sp),y dey lda FCount - sta (sp),y + sta (c_sp),y jsr CallOutFunc ; Call the output function ; We're back from out(), or we didn't call it. Check for end of string. diff --git a/libsrc/pce/crt0.s b/libsrc/pce/crt0.s index d6dee3ef4..660faae7f 100644 --- a/libsrc/pce/crt0.s +++ b/libsrc/pce/crt0.s @@ -13,7 +13,7 @@ .import initlib, donelib .import push0, _main .import IRQStub, __nmi - .importzp sp + .importzp c_sp ; Linker-generated .import __CARTSIZE__ @@ -86,8 +86,8 @@ start: sei ; Set up the stack lda #<(__MAIN_START__ + __MAIN_SIZE__ + __STACKSIZE__) ldx #>(__MAIN_START__ + __MAIN_SIZE__ + __STACKSIZE__) - sta sp - stx sp+1 + sta c_sp + stx c_sp+1 ; Call the module constructors. jsr initlib diff --git a/libsrc/pce/memcpy.s b/libsrc/pce/memcpy.s index 98db6a964..7ee33477b 100644 --- a/libsrc/pce/memcpy.s +++ b/libsrc/pce/memcpy.s @@ -18,7 +18,7 @@ .export memcpy_increment, memcpy_transfer, memcpy_getparams .import incsp2, popax, popptr1 - .importzp sp, ptr1, ptr2, ptr3 + .importzp c_sp, ptr1, ptr2, ptr3 ; The structure of the transfer instructions @@ -86,9 +86,9 @@ memcpy_getparams: ; (Direct stack access is six cycles faster [total cycle count].) iny ; (Y=0 by popptr1, need '1' here) save dest - lda (sp),y ; get high byte + lda (c_sp),y ; get high byte tax - lda (sp) ; get low byte + lda (c_sp) ; get low byte sta ptr2 stx ptr2+1 rts ; return dest address (for memmove) diff --git a/libsrc/pet/crt0.s b/libsrc/pet/crt0.s index e56a7eca4..e3c6ed4b4 100644 --- a/libsrc/pet/crt0.s +++ b/libsrc/pet/crt0.s @@ -23,7 +23,7 @@ Start: ; Save the zero-page locations that we need. ldx #zpspace-1 -L1: lda sp,x +L1: lda c_sp,x sta zpsave,x dex bpl L1 @@ -52,9 +52,9 @@ L1: lda sp,x stx spsave ; Save the system stack ptr lda MEMSIZE - sta sp + sta c_sp lda MEMSIZE+1 - sta sp+1 ; Set argument stack ptr + sta c_sp+1 ; Set argument stack ptr ; Call the module constructors. @@ -73,7 +73,7 @@ _exit: pha ; Save the return code on stack ldx #zpspace-1 L2: lda zpsave,x - sta sp,x + sta c_sp,x dex bpl L2 diff --git a/libsrc/pet/sysuname.s b/libsrc/pet/sysuname.s index 59174d821..ddc7d644f 100644 --- a/libsrc/pet/sysuname.s +++ b/libsrc/pet/sysuname.s @@ -23,13 +23,13 @@ utsdata: .asciiz "" ; release - .byte ((.VERSION >> 8) & $0F) + '0' + .byte .string (>.version) .byte '.' - .byte ((.VERSION >> 4) & $0F) + '0' + .byte .string (<.version) .byte $00 ; version - .byte (.VERSION & $0F) + '0' + .byte '0' ; unused .byte $00 ; machine diff --git a/libsrc/plus4/cgetc.s b/libsrc/plus4/cgetc.s index 62863c06e..8c8bb0082 100644 --- a/libsrc/plus4/cgetc.s +++ b/libsrc/plus4/cgetc.s @@ -18,11 +18,16 @@ _cgetc: lda KEY_COUNT ; Get number of characters ora FKEY_COUNT ; Or with number of function key chars bne L2 ; Jump if there are already chars waiting + lda #%00100000 + bit $FF06 + bne L2 ; always disable cursor if in bitmap mode + ; Switch on the cursor if needed ldy CURS_X lda (CRAM_PTR),y ; Get current char pha ; And save it + lda CHARCOLOR sta (CRAM_PTR),y diff --git a/libsrc/plus4/crt0.s b/libsrc/plus4/crt0.s index 6b44a2b7e..a8a5b8e63 100644 --- a/libsrc/plus4/crt0.s +++ b/libsrc/plus4/crt0.s @@ -9,8 +9,7 @@ .import callirq_y, initlib, donelib .import callmain, zerobss .import __INTERRUPTOR_COUNT__ - .import __MAIN_START__, __MAIN_SIZE__ ; Linker generated - .import __STACKSIZE__ ; Linker generated + .import __HIMEM__ ; Linker generated .importzp ST .include "zeropage.inc" @@ -34,7 +33,7 @@ Start: sei ; No interrupts since we're banking out the ROM sta ENABLE_RAM ldx #zpspace-1 -L1: lda sp,x +L1: lda c_sp,x sta zpsave,x dex bpl L1 @@ -52,19 +51,28 @@ L1: lda sp,x tsx stx spsave ; Save system stk ptr - lda #<(__MAIN_START__ + __MAIN_SIZE__ + __STACKSIZE__) - ldx #>(__MAIN_START__ + __MAIN_SIZE__ + __STACKSIZE__) - sta sp - stx sp+1 + lda #<__HIMEM__ + ldx #>__HIMEM__ + sta c_sp + stx c_sp+1 ; Set up the IRQ vector in the banked RAM; and, switch off the ROM. - ldx #<IRQ - ldy #>IRQ + lda #<IRQ + ldx #>IRQ sei ; No ints, handler not yet in place sta ENABLE_RAM - stx $FFFE ; Install interrupt handler - sty $FFFF + sta $FFFE ; Install interrupt handler + stx $FFFF + lda IRQVec + ldx IRQVec+1 + sta IRQInd+1 + stx IRQInd+2 + lda #<IRQStub + ldx #>IRQStub + sta IRQVec + stx IRQVec+1 + cli ; Allow interrupts ; Clear the BSS data. @@ -95,11 +103,18 @@ _exit: pha ; Save the return code lda #0 sta irqcount ; Disable custom IRQ handlers + sei + ldx IRQInd+1 + ldy IRQInd+2 + stx IRQVec + sty IRQVec+1 + cli + ; Copy back the zero-page stuff. ldx #zpspace-1 L2: lda zpsave,x - sta sp,x + sta c_sp,x dex bpl L2 @@ -122,9 +137,13 @@ L2: lda zpsave,x ; IRQ handler. The handler in the ROM enables the Kernal, and jumps to ; $CE00, where the ROM code checks for a BRK or IRQ, and branches via the ; indirect vectors at $314/$316. -; To make our stub as fast as possible, we skip the whole part of the ROM -; handler, and jump to the indirect vectors directly. We do also call our -; own interrupt handlers if we have any; so, they need not use $314. +; +; When RAM is banked in, we skip the whole part of the ROM handler, and jump to +; the indirect vectors directly, after calling our own interrupt handlers. +; +; When ROM is banked in, a stub installed in the $314 indirect vector ensures +; that our interrupt handlers are still called (otherwise, interrupts that are +; not serviced by the ROM handler may cause a deadlock). .segment "LOWCODE" @@ -139,15 +158,6 @@ IRQ: cld ; Just to be sure and #$10 ; Test for BRK bit bne dobreak -; It's an IRQ; and, RAM is enabled. If we have handlers, call them. We will use -; a flag here instead of loading __INTERRUPTOR_COUNT__ directly, since the -; condes function is not reentrant. The irqcount flag will be set/reset from -; the main code, to avoid races. - - ldy irqcount - beq @L1 - jsr callirq_y ; Call the IRQ functions - ; Since the ROM handler will end with an RTI, we have to fake an IRQ return ; on the stack, so that we get control of the CPU after the ROM handler, ; and can switch back to RAM. @@ -161,7 +171,7 @@ IRQ: cld ; Just to be sure pha ; Push faked X register pha ; Push faked Y register sta ENABLE_ROM ; Switch to ROM - jmp (IRQVec) ; Jump indirect to Kernal IRQ handler + jmp (IRQVec) ; Jump indirect to IRQ stub irq_ret: sta ENABLE_RAM ; Switch back to RAM @@ -183,6 +193,22 @@ nohandler: sta ENABLE_ROM jmp (BRKVec) ; Jump indirect to the break vector + +; IRQ stub installed at $314, called by our handler above if RAM is banked in, +; or the Kernal IRQ handler if ROM is banked in. + +; If we have handlers, call them. We will use a flag here instead of loading +; __INTERRUPTOR_COUNT__ directly, since the condes function is not reentrant. +; The irqcount flag will be set/reset from the main code, to avoid races. +IRQStub: + cld ; Just to be sure + sta ENABLE_RAM + ldy irqcount + beq @L1 + jsr callirq_y ; Call the IRQ functions +@L1: sta ENABLE_ROM + jmp (IRQInd+1) ; Jump to the saved IRQ vector + ; ------------------------------------------------------------------------ ; Data diff --git a/libsrc/plus4/libref.s b/libsrc/plus4/libref.s index 0bda1e7e8..62c78b8c5 100644 --- a/libsrc/plus4/libref.s +++ b/libsrc/plus4/libref.s @@ -2,8 +2,9 @@ ; Oliver Schmidt, 2013-05-31 ; - .export joy_libref, ser_libref + .export joy_libref, ser_libref, tgi_libref .import _exit joy_libref := _exit ser_libref := _exit +tgi_libref := _exit diff --git a/libsrc/plus4/ser/plus4-stdser.s b/libsrc/plus4/ser/plus4-stdser.s index 77445c7a2..38809d6ab 100644 --- a/libsrc/plus4/ser/plus4-stdser.s +++ b/libsrc/plus4/ser/plus4-stdser.s @@ -64,15 +64,15 @@ ACIA_STATUS := ACIA+1 ; Status register ACIA_CMD := ACIA+2 ; Command register ACIA_CTRL := ACIA+3 ; Control register +RecvHead := $07D1 ; Head of receive buffer +RecvTail := $07D2 ; Tail of receive buffer +RecvFreeCnt := $07D3 ; Number of bytes in receive buffer ;---------------------------------------------------------------------------- ; ; Global variables ; .bss -RecvHead: .res 1 ; Head of receive buffer -RecvTail: .res 1 ; Tail of receive buffer -RecvFreeCnt: .res 1 ; Number of bytes in receive buffer SendHead: .res 1 ; Head of send buffer SendTail: .res 1 ; Tail of send buffer SendFreeCnt: .res 1 ; Number of bytes in send buffer @@ -88,7 +88,7 @@ SendBuf: .res 256 ; Tables used to translate RS232 params into register values -BaudTable: ; bit7 = 1 means setting is invalid +BaudTable: ; Bit7 = 1 means setting is invalid .byte $FF ; SER_BAUD_45_5 .byte $01 ; SER_BAUD_50 .byte $02 ; SER_BAUD_75 @@ -354,26 +354,27 @@ SER_IOCTL: ; SER_IRQ: - lda ACIA_STATUS ; Check ACIA status for receive interrupt - and #$08 - beq @L9 ; Jump if no ACIA interrupt (carry still clear) - lda ACIA_DATA ; Get byte from ACIA - ldx RecvFreeCnt ; Check if we have free space left - beq @L1 ; Jump if no space in receive buffer - ldy RecvTail ; Load buffer pointer - sta RecvBuf,y ; Store received byte in buffer - inc RecvTail ; Increment buffer pointer - dec RecvFreeCnt ; Decrement free space counter - cpx #33 ; Check for buffer space low - bcc @L1 ; Assert flow control if buffer space low + lda ACIA_STATUS ; (4) Check for byte received + and #$08 ; (2) + beq @L9 ; (2*) + + lda ACIA_DATA ; (4) Get byte and put into receive buffer + ldy RecvTail ; (4) + ldx RecvFreeCnt ; (4) + beq @L3 ; (2*) Jump if no space in receive buffer + sta RecvBuf,y ; (5) + inc RecvTail ; (6) + dec RecvFreeCnt ; (6) + cpx #33 ; (2) Check for buffer space low + bcc @L2 ; (2*) rts ; Return with carry set (interrupt handled) ; Assert flow control if buffer space too low -@L1: lda RtsOff - sta ACIA_CMD - sta Stopped - sec ; Interrupt handled +@L2: lda RtsOff ; (3) + sta ACIA_CMD ; (4) + sta Stopped ; (3) +@L3: sec ; Interrupt handled @L9: rts ;---------------------------------------------------------------------------- diff --git a/libsrc/plus4/sysuname.s b/libsrc/plus4/sysuname.s index 332daae0d..e75e6cacc 100644 --- a/libsrc/plus4/sysuname.s +++ b/libsrc/plus4/sysuname.s @@ -23,13 +23,13 @@ utsdata: .asciiz "" ; release - .byte ((.VERSION >> 8) & $0F) + '0' + .byte .string (>.version) .byte '.' - .byte ((.VERSION >> 4) & $0F) + '0' + .byte .string (<.version) .byte $00 ; version - .byte (.VERSION & $0F) + '0' + .byte '0' ; unused .byte $00 ; machine diff --git a/libsrc/plus4/tgi/ted-hi.s b/libsrc/plus4/tgi/ted-hi.s new file mode 100644 index 000000000..61dd9c2c4 --- /dev/null +++ b/libsrc/plus4/tgi/ted-hi.s @@ -0,0 +1,860 @@ +; +; Graphics driver for the 320x200x2 mode on Commodore Plus/4 systems. +; +; Luminance/Chrominance matrices at $800/$C00, overwriting text-mode character +; and color data. Bitmap is at $C000-$DF3F. Programs using this driver should +; either be linked with the option '-D __HIMEM__=0xC000'. +; +; Based on the c64-hi TGI driver, which in turn was based on Stephen L. Judd's +; GRLIB code. +; +; 2017-01-13, Greg King +; 2018-03-13, Sven Klose +; 2019-10-23, Richard Halkyard +; + .include "zeropage.inc" + + .include "tgi-kernel.inc" + .include "tgi-error.inc" + + .include "cbm_kernal.inc" + .include "plus4.inc" + + .macpack generic + .macpack module + +; ------------------------------------------------------------------------ +; Header. Includes jump table and constants. + + module_header _ted_hi_tgi + +; First part of the header is a structure that has a magic and defines the +; capabilities of the driver + + .byte $74, $67, $69 ; "tgi" + .byte TGI_API_VERSION ; TGI API version number + .addr $0000 ; Library reference + .word 320 ; X resolution + .word 200 ; Y resolution + .byte 2 ; Number of drawing colors + .byte 1 ; Number of screens available + .byte 8 ; System font X size + .byte 8 ; System font Y size + .word $00D4 ; Aspect ratio (based on 4/3 display) + .byte 0 ; TGI driver flags + +; Next comes the jump table. With the exception of IRQ, all entries must be +; valid and may point to an RTS for test versions (function not implemented). + + .addr INSTALL + .addr UNINSTALL + .addr INIT + .addr DONE + .addr GETERROR + .addr CONTROL + .addr CLEAR + .addr SETVIEWPAGE + .addr SETDRAWPAGE + .addr SETCOLOR + .addr SETPALETTE + .addr GETPALETTE + .addr GETDEFPALETTE + .addr SETPIXEL + .addr GETPIXEL + .addr LINE + .addr BAR + .addr TEXTSTYLE + .addr OUTTEXT + +; ------------------------------------------------------------------------ +; Data. + +; Variables mapped to the zero page segment variables. Some of these are +; used for passing parameters to the driver. + +X1 := ptr1 +Y1 := ptr2 +X2 := ptr3 +Y2 := ptr4 +TEXT := ptr3 + +TEMP := tmp4 +TEMP2 := sreg +POINT := regsave + +CHUNK := X2 ; Used in the line routine +OLDCHUNK := X2+1 ; Dito + +; Absolute variables used in the code + +.bss + +ERROR: .res 1 ; Error code +PALETTE: .res 2 ; The current palette + +BITMASK: .res 1 ; $00 = clear, $FF = set pixels + +; Line routine stuff +DX: .res 2 +DY: .res 2 + +; BAR variables +X1SAVE: .res 2 +Y1SAVE: .res 2 +X2SAVE: .res 2 +Y2SAVE: .res 2 + +; Text output stuff +TEXTMAGX: .res 1 +TEXTMAGY: .res 1 +TEXTDIR: .res 1 + +; Constants and tables + +.rodata + +DEFPALETTE: .byte $00, $71 ; White on black +PALETTESIZE = * - DEFPALETTE + +BITTAB: .byte $80,$40,$20,$10,$08,$04,$02,$01 +BITCHUNK: .byte $FF,$7F,$3F,$1F,$0F,$07,$03,$01 + +CHARROM := $D000 ; Character rom base address + +; The TED uses the CPU's memory configuration to fetch color data! Although +; we run with ROMs banked out, putting color data in banked RAM (above $8000) +; will result in color artifacts appearing when we bank ROM back in for +; interrupts and Kernal calls. Bitmap data is not affected by this limitation, +; but since there is no way to access RAM under IO (FE00-FF40), we can't put the +; bitmap at $E000 like we do on the C64, and have to use the next lowest +; position at $C000. + +LBASE := $0800 ; Luminance memory base address +VBASE := $C000 ; Bitmap base address + +CBASE := LBASE + $400 ; Chrominance memory base address (fixed relative to LBASE) +CHRBASE := $0800 ; Base address of text mode data + +.assert LBASE .mod $0800 = 0, error, "Luma/Chroma memory base address must be a multiple of 2K" +.assert VBASE .mod $2000 = 0, error, "Bitmap base address must be a multiple of 8K" +.assert LBASE + $800 < $8000, warning, "Luma/Chroma memory overlaps ROM. This will produce color artifacts." +.assert VBASE + $2000 < $FE00, error, "Bitmap overlaps IO space" + +.code + +; ------------------------------------------------------------------------ +; INSTALL routine. Is called after the driver is loaded into memory. May +; initialize anything that has to be done just once. Is probably empty +; most of the time. +; +; Must set an error code: NO +; + +INSTALL: +; rts ; Fall through + + +; ------------------------------------------------------------------------ +; UNINSTALL routine. Is called before the driver is removed from memory. May +; clean up anything done by INSTALL but is probably empty most of the time. +; +; Must set an error code: NO +; + +UNINSTALL: + rts + + +; ------------------------------------------------------------------------ +; INIT: Changes an already installed device from text mode to graphics +; mode. +; Note that INIT/DONE may be called multiple times while the driver +; is loaded, while INSTALL is only called once, so any code that is needed +; to initializes variables and so on must go here. Setting palette and +; clearing the screen is not needed because this is called by the graphics +; kernel later. +; The graphics kernel will never call INIT when a graphics mode is already +; active, so there is no need to protect against that. +; +; Must set an error code: YES +; + +INIT: + +; Initialize variables + + ldx #$FF + stx BITMASK + +; Switch into graphics mode + lda $FF12 ; Set bitmap address and enable fetch from RAM + and #%00000011 + ora #(>VBASE >> 2) + sta $FF12 + +.if LBASE <> CHRBASE + lda #>LBASE ; Set color memory address + sta $FF14 +.endif + + lda $FF06 ; Enable bitmap mode + ora #%00100000 + sta $FF06 + +; Done, reset the error code + + lda #TGI_ERR_OK + sta ERROR + rts + +; ------------------------------------------------------------------------ +; DONE: Will be called to switch the graphics device back into text mode. +; The graphics kernel will never call DONE when no graphics mode is active, +; so there is no need to protect against that. +; +; Must set an error code: NO +; + +DONE: lda $FF12 + ora #%00000100 ; Fetch from ROM + sta $FF12 + +.if LBASE <> CHRBASE + lda #>CHRBASE ; Reset character/color matrix address + sta $FF14 +.else + sta ENABLE_ROM ; Clear text display since we clobbered it + jsr CLRSCR + sta ENABLE_RAM +.endif + + lda $FF06 + and #%11011111 ; Exit bitmap mode + sta $FF06 + + rts + +; ------------------------------------------------------------------------ +; GETERROR: Return the error code in A and clear it. + +GETERROR: + ldx #TGI_ERR_OK + lda ERROR + stx ERROR + rts + +; ------------------------------------------------------------------------ +; CONTROL: Platform/driver specific entry point. +; +; Must set an error code: YES +; + +CONTROL: + lda #TGI_ERR_INV_FUNC + sta ERROR + rts + +; ------------------------------------------------------------------------ +; CLEAR: Clears the screen. +; +; Must set an error code: NO +; + +CLEAR: ldy #$00 + tya +@L1: sta VBASE+$0000,y + sta VBASE+$0100,y + sta VBASE+$0200,y + sta VBASE+$0300,y + sta VBASE+$0400,y + sta VBASE+$0500,y + sta VBASE+$0600,y + sta VBASE+$0700,y + sta VBASE+$0800,y + sta VBASE+$0900,y + sta VBASE+$0A00,y + sta VBASE+$0B00,y + sta VBASE+$0C00,y + sta VBASE+$0D00,y + sta VBASE+$0E00,y + sta VBASE+$0F00,y + sta VBASE+$1000,y + sta VBASE+$1100,y + sta VBASE+$1200,y + sta VBASE+$1300,y + sta VBASE+$1400,y + sta VBASE+$1500,y + sta VBASE+$1600,y + sta VBASE+$1700,y + sta VBASE+$1800,y + sta VBASE+$1900,y + sta VBASE+$1A00,y + sta VBASE+$1B00,y + sta VBASE+$1C00,y + sta VBASE+$1D00,y + sta VBASE+$1E00,y + sta VBASE+$1E40,y + iny + bne @L1 + rts + +; ------------------------------------------------------------------------ +; SETVIEWPAGE: Set the visible page. Called with the new page in A (0..n). +; The page number is already checked to be valid by the graphics kernel. +; +; Must set an error code: NO (will only be called if page ok) +; + +SETVIEWPAGE: +; rts ; Fall through + +; ------------------------------------------------------------------------ +; SETDRAWPAGE: Set the drawable page. Called with the new page in A (0..n). +; The page number is already checked to be valid by the graphics kernel. +; +; Must set an error code: NO (will only be called if page ok) +; + +SETDRAWPAGE: + rts + +; ------------------------------------------------------------------------ +; SETCOLOR: Set the drawing color (in A). The new color is already checked +; to be in a valid range (0..maxcolor-1). +; +; Must set an error code: NO (will only be called if color ok) +; + +SETCOLOR: + tax + beq @L1 + lda #$FF +@L1: sta BITMASK + rts + +; ------------------------------------------------------------------------ +; SETPALETTE: Set the palette (not available with all drivers/hardware). +; A pointer to the palette is passed in ptr1. Must set an error if palettes +; are not supported +; +; Must set an error code: YES +; + +SETPALETTE: + ldy #PALETTESIZE - 1 +@L1: lda (ptr1),y ; Copy the palette + sta PALETTE,y + dey + bpl @L1 + +; Get luma values from the high nybble of the palette entries + lda PALETTE+1 ; Foreground luma + lsr a + lsr a + lsr a + lsr a + sta TEMP ; Foreground -> low nybble + lda PALETTE ; Background luma + and #$F0 + ora TEMP ; Background -> high nybble + +; Initialize the luma map with the new luma values + ldy #0 +@L2: sta LBASE+$0000,y + sta LBASE+$0100,y + sta LBASE+$0200,y + sta LBASE+$02e8,y + iny + bne @L2 + + +; Get chroma values from the low nybble of the palette entries + lda PALETTE+1 ; Foreground chroma + and #$0F + asl a + asl a + asl a + asl a + sta TEMP ; Foreground -> high nybble + lda PALETTE ; Background chroma + and #$0F + ora TEMP ; Background -> low nybble + +; Initialize the chroma map with the new chroma values + ldy #0 +@L3: sta CBASE+$0000,y + sta CBASE+$0100,y + sta CBASE+$0200,y + sta CBASE+$02e8,y + iny + bne @L3 + +; Done, reset the error code + lda #TGI_ERR_OK + sta ERROR + rts + +; ------------------------------------------------------------------------ +; GETPALETTE: Return the current palette in A/X. Even drivers that cannot +; set the palette should return the default palette here, so there's no +; way for this function to fail. +; +; Must set an error code: NO +; + +GETPALETTE: + lda #<PALETTE + ldx #>PALETTE + rts + +; ------------------------------------------------------------------------ +; GETDEFPALETTE: Return the default palette for the driver in A/X. All +; drivers should return something reasonable here, even drivers that don't +; support palettes, otherwise the caller has no way to determine the colors +; of the (not changeable) palette. +; +; Must set an error code: NO (all drivers must have a default palette) +; + +GETDEFPALETTE: + lda #<DEFPALETTE + ldx #>DEFPALETTE + rts + +; ------------------------------------------------------------------------ +; SETPIXEL: Draw one pixel at X1/Y1 = ptr1/ptr2 with the current drawing +; color. The coordinates passed to this function are never outside the +; visible screen area, so there is no need for clipping inside this function. +; +; Must set an error code: NO +; + +SETPIXEL: + jsr CALC ; Calculate coordinates + + lda (POINT),Y + eor BITMASK + and BITTAB,X + eor (POINT),Y + sta (POINT),Y + +@L9: rts + +; ------------------------------------------------------------------------ +; GETPIXEL: Read the color value of a pixel and return it in A/X. The +; coordinates passed to this function are never outside the visible screen +; area, so there is no need for clipping inside this function. + + +GETPIXEL: + jsr CALC ; Calculate coordinates + + lda (POINT),Y + ldy #$00 + and BITTAB,X + beq @L1 + iny + +@L1: + tya ; Get color value into A + ldx #$00 ; Clear high byte + rts + +; ------------------------------------------------------------------------ +; LINE: Draw a line from X1/Y1 to X2/Y2, where X1/Y1 = ptr1/ptr2 and +; X2/Y2 = ptr3/ptr4 using the current drawing color. +; +; X1,X2 etc. are set up above (x2=LINNUM in particular) +; Format is LINE x2,y2,x1,y1 +; +; Must set an error code: NO +; + +LINE: + +@CHECK: lda X2 ; Make sure x1<x2 + sec + sbc X1 + tax + lda X2+1 + sbc X1+1 + bpl @CONT + lda Y2 ; If not, swap P1 and P2 + ldy Y1 + sta Y1 + sty Y2 + lda Y2+1 + ldy Y1+1 + sta Y1+1 + sty Y2+1 + lda X1 + ldy X2 + sty X1 + sta X2 + lda X2+1 + ldy X1+1 + sta X1+1 + sty X2+1 + bcc @CHECK + +@CONT: sta DX+1 + stx DX + + ldx #$C8 ; INY + lda Y2 ; Calculate dy + sec + sbc Y1 + tay + lda Y2+1 + sbc Y1+1 + bpl @DYPOS ; Is y2>=y1? + lda Y1 ; Otherwise dy=y1-y2 + sec + sbc Y2 + tay + ldx #$88 ; DEY + +@DYPOS: sty DY ; 8-bit DY -- FIX ME? + stx YINCDEC + stx XINCDEC + + jsr CALC ; Set up .X, .Y, and POINT + lda BITCHUNK,X + sta OLDCHUNK + sta CHUNK + + ldx DY + cpx DX ; Who's bigger: dy or dx? + bcc STEPINX ; If dx, then... + lda DX+1 + bne STEPINX + +; +; Big steps in Y +; +; To simplify my life, just use PLOT to plot points. +; +; No more! +; Added special plotting routine -- cool! +; +; X is now counter, Y is y-coordinate +; +; On entry, X=DY=number of loop iterations, and Y= +; Y1 AND #$07 +STEPINY: + lda #00 + sta OLDCHUNK ; So plotting routine will work right + lda CHUNK + lsr ; Strip the bit + eor CHUNK + sta CHUNK + txa + beq YCONT2 ; If dy=0, it's just a point +@CONT: lsr ; Init counter to dy/2 +; +; Main loop +; +YLOOP: sta TEMP + + lda (POINT),y + eor BITMASK + and CHUNK + eor (POINT),y + sta (POINT),y +YINCDEC: + iny ; Advance Y coordinate + cpy #8 + bcc @CONT ; No prob if Y=0..7 + jsr FIXY +@CONT: lda TEMP ; Restore A + sec + sbc DX + bcc YFIXX +YCONT: dex ; X is counter + bne YLOOP +YCONT2: lda (POINT),y ; Plot endpoint + eor BITMASK + and CHUNK + eor (POINT),y + sta (POINT),y + rts + +YFIXX: ; X=x+1 + adc DY + lsr CHUNK + bne YCONT ; If we pass a column boundary... + ror CHUNK ; Then reset CHUNK to $80 + sta TEMP2 + lda POINT ; And add 8 to POINT + adc #8 + sta POINT + bcc @CONT + inc POINT+1 +@CONT: lda TEMP2 + dex + bne YLOOP + beq YCONT2 + +; +; Big steps in X direction +; +; On entry, X=DY=number of loop iterations, and Y= +; Y1 AND #$07 + +.bss +COUNTHI: + .byte $00 ; Temporary counter, only used once. +.code +STEPINX: + ldx DX + lda DX+1 + sta COUNTHI + cmp #$80 + ror ; Need bit for initialization + sta Y1 ; High byte of counter + txa + bne @CONT ; Could be $100 + dec COUNTHI +@CONT: ror +; +; Main loop +; +XLOOP: lsr CHUNK + beq XFIXC ; If we pass a column boundary... +XCONT1: sbc DY + bcc XFIXY ; Time to step in Y? +XCONT2: dex + bne XLOOP + dec COUNTHI ; High bits set? + bpl XLOOP + + lsr CHUNK ; Advance to last point + jmp LINEPLOT ; Plot the last chunk +; +; CHUNK has passed a column, so plot and increment pointer +; and fix up CHUNK, OLDCHUNK. +; +XFIXC: sta TEMP + jsr LINEPLOT + lda #$FF + sta CHUNK + sta OLDCHUNK + lda POINT + clc + adc #8 + sta POINT + lda TEMP + bcc XCONT1 + inc POINT+1 + jmp XCONT1 +; +; Check to make sure there isn't a high bit, plot chunk, +; and update Y-coordinate. +; +XFIXY: dec Y1 ; Maybe high bit set + bpl XCONT2 + adc DX + sta TEMP + lda DX+1 + adc #$FF ; Hi byte + sta Y1 + + jsr LINEPLOT ; Plot chunk + lda CHUNK + sta OLDCHUNK + + lda TEMP +XINCDEC: + iny ; Y-coord + cpy #8 ; 0..7 is ok + bcc XCONT2 + sta TEMP + jsr FIXY + lda TEMP + jmp XCONT2 + +; +; Subroutine to plot chunks/points (to save a little +; room, gray hair, etc.) +; +LINEPLOT: ; Plot the line chunk + lda (POINT),Y + eor BITMASK + ora CHUNK + and OLDCHUNK + eor CHUNK + eor (POINT),Y + sta (POINT),Y + rts + +; +; Subroutine to fix up pointer when Y decreases through +; zero or increases through 7. +; +FIXY: cpy #255 ; Y=255 or Y=8 + beq @DECPTR + +@INCPTR: ; Add 320 to pointer + ldy #0 ; Y increased through 7 + lda POINT + adc #<320 + sta POINT + lda POINT+1 + adc #>320 + sta POINT+1 + rts + +@DECPTR: ; Okay, subtract 320 then + ldy #7 ; Y decreased through 0 + lda POINT + sec + sbc #<320 + sta POINT + lda POINT+1 + sbc #>320 + sta POINT+1 + rts + +; ------------------------------------------------------------------------ +; BAR: Draw a filled rectangle with the corners X1/Y1, X2/Y2, where +; X1/Y1 = ptr1/ptr2 and X2/Y2 = ptr3/ptr4 using the current drawing color. +; Contrary to most other functions, the graphics kernel will sort and clip +; the coordinates before calling the driver, so on entry the following +; conditions are valid: +; X1 <= X2 +; Y1 <= Y2 +; (X1 >= 0) && (X1 < XRES) +; (X2 >= 0) && (X2 < XRES) +; (Y1 >= 0) && (Y1 < YRES) +; (Y2 >= 0) && (Y2 < YRES) +; +; Must set an error code: NO +; + +; Note: This function needs optimization. It's just a cheap translation of +; the original C wrapper and could be written much smaller (besides that, +; calling LINE is not a good idea either). + +BAR: lda Y2 + sta Y2SAVE + lda Y2+1 + sta Y2SAVE+1 + + lda X2 + sta X2SAVE + lda X2+1 + sta X2SAVE+1 + + lda Y1 + sta Y1SAVE + lda Y1+1 + sta Y1SAVE+1 + + lda X1 + sta X1SAVE + lda X1+1 + sta X1SAVE+1 + +@L1: lda Y1 + sta Y2 + lda Y1+1 + sta Y2+1 + jsr LINE + + lda Y1SAVE + cmp Y2SAVE + bne @L2 + lda Y1SAVE + cmp Y2SAVE + beq @L4 + +@L2: inc Y1SAVE + bne @L3 + inc Y1SAVE+1 + +@L3: lda Y1SAVE + sta Y1 + lda Y1SAVE+1 + sta Y1+1 + + lda X1SAVE + sta X1 + lda X1SAVE+1 + sta X1+1 + + lda X2SAVE + sta X2 + lda X2SAVE+1 + sta X2+1 + jmp @L1 + +@L4: rts + + +; ------------------------------------------------------------------------ +; TEXTSTYLE: Set the style used when calling OUTTEXT. Text scaling in X and Y +; direction is passend in X/Y, the text direction is passed in A. +; +; Must set an error code: NO +; + +TEXTSTYLE: + stx TEXTMAGX + sty TEXTMAGY + sta TEXTDIR + rts + + +; ------------------------------------------------------------------------ +; OUTTEXT: Output text at X/Y = ptr1/ptr2 using the current color and the +; current text style. The text to output is given as a zero terminated +; string with address in ptr3. +; +; Must set an error code: NO +; + +OUTTEXT: + rts + +; ------------------------------------------------------------------------ +; Calculate all variables to plot the pixel at X1/Y1. + +CALC: lda Y1 + sta TEMP2 + and #7 + tay + lda Y1+1 + lsr ; Neg is possible + ror TEMP2 + lsr + ror TEMP2 + lsr + ror TEMP2 + + lda #00 + sta POINT + lda TEMP2 + cmp #$80 + ror + ror POINT + cmp #$80 + ror + ror POINT ; Row * 64 + adc TEMP2 ; + Row * 256 + clc + adc #>VBASE ; + Bitmap base + sta POINT+1 + + lda X1 + tax + and #$F8 + clc + adc POINT ; +(X AND #$F8) + sta POINT + lda X1+1 + adc POINT+1 + sta POINT+1 + txa + and #7 + tax + rts diff --git a/libsrc/plus4/tgi_stat_stddrv.s b/libsrc/plus4/tgi_stat_stddrv.s new file mode 100644 index 000000000..dc918eb8b --- /dev/null +++ b/libsrc/plus4/tgi_stat_stddrv.s @@ -0,0 +1,14 @@ +; +; Address of the static standard tgi driver +; +; Oliver Schmidt, 2012-11-01 +; +; const void tgi_static_stddrv[]; +; + + .export _tgi_static_stddrv + .import _ted_hi_tgi + +.rodata + +_tgi_static_stddrv := _ted_hi_tgi diff --git a/libsrc/plus4/tgi_stddrv.s b/libsrc/plus4/tgi_stddrv.s new file mode 100644 index 000000000..eac16905d --- /dev/null +++ b/libsrc/plus4/tgi_stddrv.s @@ -0,0 +1,13 @@ +; +; Name of the standard tgi driver +; +; Oliver Schmidt, 2011-05-02 +; +; const char tgi_stddrv[]; +; + + .export _tgi_stddrv + +.rodata + +_tgi_stddrv: .asciiz "ted-hi.tgi" diff --git a/libsrc/rp6502/crt0.s b/libsrc/rp6502/crt0.s index 165ecf0a2..32d565fda 100644 --- a/libsrc/rp6502/crt0.s +++ b/libsrc/rp6502/crt0.s @@ -24,9 +24,9 @@ _init: ; Set cc65 argument stack pointer lda #<(__RAM_START__ + __RAM_SIZE__) - sta sp + sta c_sp lda #>(__RAM_START__ + __RAM_SIZE__) - sta sp+1 + sta c_sp+1 ; Initialize memory storage jsr zerobss ; Clear BSS segment diff --git a/libsrc/rp6502/ria.s b/libsrc/rp6502/ria.s index a1b53efb1..78da4daba 100644 --- a/libsrc/rp6502/ria.s +++ b/libsrc/rp6502/ria.s @@ -11,7 +11,7 @@ .export _ria_call_int, _ria_call_long .export _ria_call_int_errno, _ria_call_long_errno -.importzp sp, sreg +.importzp c_sp, sreg .import ___mappederrno, incsp1 .code diff --git a/libsrc/rp6502/xreg.s b/libsrc/rp6502/xreg.s index 40d4a6705..a882ab10f 100644 --- a/libsrc/rp6502/xreg.s +++ b/libsrc/rp6502/xreg.s @@ -5,7 +5,7 @@ ; int __cdecl__ xreg(char device, char channel, unsigned char address, ...); .export _xreg -.importzp sp +.importzp c_sp .import addysp, _ria_call_int_errno .include "rp6502.inc" @@ -20,12 +20,12 @@ @copy: ; copy stack dey - lda (sp),y + lda (c_sp),y sta RIA_XSTACK tya bne @copy - ; recover variadic size and move sp + ; recover variadic size and move c_sp txa tay jsr addysp diff --git a/libsrc/runtime/add.s b/libsrc/runtime/add.s index a4658cc13..85ddd0f25 100644 --- a/libsrc/runtime/add.s +++ b/libsrc/runtime/add.s @@ -9,7 +9,7 @@ ; called a lot! .export tosadda0, tosaddax - .importzp sp, tmp1 + .importzp c_sp, tmp1 .macpack cpu @@ -20,34 +20,34 @@ tosaddax: .if (.cpu .bitand ::CPU_ISET_65SC02) - adc (sp) ; (7) + adc (c_sp) ; (7) tay ; (9) - inc sp ; (14) + inc c_sp ; (14) bne hiadd ; (17) - inc sp+1 ; (-1+5) + inc c_sp+1 ; (-1+5) hiadd: txa ; (19) - adc (sp) ; (24) + adc (c_sp) ; (24) tax ; (26) - inc sp ; (31) + inc c_sp ; (31) bne done ; (34) - inc sp+1 ; (-1+5) + inc c_sp+1 ; (-1+5) done: tya ; (36) .else ldy #0 ; (4) - adc (sp),y ; (9) lo byte + adc (c_sp),y ; (9) lo byte iny ; (11) sta tmp1 ; (14) save it txa ; (16) - adc (sp),y ; (21) hi byte + adc (c_sp),y ; (21) hi byte tax ; (23) clc ; (25) - lda sp ; (28) + lda c_sp ; (28) adc #2 ; (30) - sta sp ; (33) + sta c_sp ; (33) bcc L1 ; (36) - inc sp+1 ; (-1+5) + inc c_sp+1 ; (-1+5) L1: lda tmp1 ; (39) restore low byte .endif diff --git a/libsrc/runtime/addeqsp.s b/libsrc/runtime/addeqsp.s index 5112d2790..3c098ea5f 100644 --- a/libsrc/runtime/addeqsp.s +++ b/libsrc/runtime/addeqsp.s @@ -5,19 +5,19 @@ ; .export addeq0sp, addeqysp - .importzp sp + .importzp c_sp addeq0sp: ldy #0 addeqysp: clc - adc (sp),y - sta (sp),y + adc (c_sp),y + sta (c_sp),y pha iny txa - adc (sp),y - sta (sp),y + adc (c_sp),y + sta (c_sp),y tax pla rts diff --git a/libsrc/runtime/addysp.s b/libsrc/runtime/addysp.s index e0e7db1ce..d48e048bb 100644 --- a/libsrc/runtime/addysp.s +++ b/libsrc/runtime/addysp.s @@ -5,17 +5,17 @@ ; .export addysp1, addysp - .importzp sp + .importzp c_sp addysp1: iny addysp: pha ; Save A clc tya ; Get the value - adc sp ; Add low byte - sta sp ; Put it back + adc c_sp ; Add low byte + sta c_sp ; Put it back bcc @L1 ; If no carry, we're done - inc sp+1 ; Inc high byte + inc c_sp+1 ; Inc high byte @L1: pla ; Restore A rts diff --git a/libsrc/runtime/and.s b/libsrc/runtime/and.s index 8c180b580..8411660ab 100644 --- a/libsrc/runtime/and.s +++ b/libsrc/runtime/and.s @@ -6,7 +6,7 @@ .export tosanda0, tosandax .import addysp1 - .importzp sp, ptr4 + .importzp c_sp, ptr4 .macpack cpu @@ -14,16 +14,16 @@ tosanda0: ldx #$00 tosandax: .if (.cpu .bitand CPU_ISET_65SC02) - and (sp) ; 65SC02 version, saves 2 cycles and 1 byte + and (c_sp) ; 65SC02 version, saves 2 cycles and 1 byte ldy #1 .else ldy #0 - and (sp),y + and (c_sp),y iny .endif pha txa - and (sp),y + and (c_sp),y tax pla jmp addysp1 ; drop TOS, set condition codes diff --git a/libsrc/runtime/bpushbsp.s b/libsrc/runtime/bpushbsp.s index 1c6add4a9..c2cc18cf6 100644 --- a/libsrc/runtime/bpushbsp.s +++ b/libsrc/runtime/bpushbsp.s @@ -6,12 +6,12 @@ .export bpushbsp, bpushbysp .import pusha - .importzp sp + .importzp c_sp bpushbsp: ldy #0 bpushbysp: - lda (sp),y + lda (c_sp),y jmp pusha diff --git a/libsrc/runtime/decsp1.s b/libsrc/runtime/decsp1.s index 3c673664a..4fd5392bb 100644 --- a/libsrc/runtime/decsp1.s +++ b/libsrc/runtime/decsp1.s @@ -5,14 +5,14 @@ ; .export decsp1 - .importzp sp + .importzp c_sp .proc decsp1 - ldy sp + ldy c_sp bne @L1 - dec sp+1 -@L1: dec sp + dec c_sp+1 +@L1: dec c_sp rts .endproc diff --git a/libsrc/runtime/decsp2.s b/libsrc/runtime/decsp2.s index a3793e778..c6c533d83 100644 --- a/libsrc/runtime/decsp2.s +++ b/libsrc/runtime/decsp2.s @@ -5,18 +5,18 @@ ; .export decsp2 - .importzp sp + .importzp c_sp .proc decsp2 - lda sp + lda c_sp sec sbc #2 - sta sp + sta c_sp bcc @L1 rts -@L1: dec sp+1 +@L1: dec c_sp+1 rts .endproc diff --git a/libsrc/runtime/decsp3.s b/libsrc/runtime/decsp3.s index a3ad7777e..2a2b22a15 100644 --- a/libsrc/runtime/decsp3.s +++ b/libsrc/runtime/decsp3.s @@ -5,18 +5,18 @@ ; .export decsp3 - .importzp sp + .importzp c_sp .proc decsp3 - lda sp + lda c_sp sec sbc #3 - sta sp + sta c_sp bcc @L1 rts -@L1: dec sp+1 +@L1: dec c_sp+1 rts .endproc diff --git a/libsrc/runtime/decsp4.s b/libsrc/runtime/decsp4.s index 5c7e94943..c756473bd 100644 --- a/libsrc/runtime/decsp4.s +++ b/libsrc/runtime/decsp4.s @@ -5,18 +5,18 @@ ; .export decsp4 - .importzp sp + .importzp c_sp .proc decsp4 - lda sp + lda c_sp sec sbc #4 - sta sp + sta c_sp bcc @L1 rts -@L1: dec sp+1 +@L1: dec c_sp+1 rts .endproc diff --git a/libsrc/runtime/decsp5.s b/libsrc/runtime/decsp5.s index 7ff4605cf..71b2fb176 100644 --- a/libsrc/runtime/decsp5.s +++ b/libsrc/runtime/decsp5.s @@ -5,18 +5,18 @@ ; .export decsp5 - .importzp sp + .importzp c_sp .proc decsp5 - lda sp + lda c_sp sec sbc #5 - sta sp + sta c_sp bcc @L1 rts -@L1: dec sp+1 +@L1: dec c_sp+1 rts .endproc diff --git a/libsrc/runtime/decsp6.s b/libsrc/runtime/decsp6.s index 6e55e664d..1d0b93136 100644 --- a/libsrc/runtime/decsp6.s +++ b/libsrc/runtime/decsp6.s @@ -5,18 +5,18 @@ ; .export decsp6 - .importzp sp + .importzp c_sp .proc decsp6 - lda sp + lda c_sp sec sbc #6 - sta sp + sta c_sp bcc @L1 rts -@L1: dec sp+1 +@L1: dec c_sp+1 rts .endproc diff --git a/libsrc/runtime/decsp7.s b/libsrc/runtime/decsp7.s index ee82232f6..1646d9ec9 100644 --- a/libsrc/runtime/decsp7.s +++ b/libsrc/runtime/decsp7.s @@ -5,18 +5,18 @@ ; .export decsp7 - .importzp sp + .importzp c_sp .proc decsp7 - lda sp + lda c_sp sec sbc #7 - sta sp + sta c_sp bcc @L1 rts -@L1: dec sp+1 +@L1: dec c_sp+1 rts .endproc diff --git a/libsrc/runtime/decsp8.s b/libsrc/runtime/decsp8.s index 47d44593e..1726331c5 100644 --- a/libsrc/runtime/decsp8.s +++ b/libsrc/runtime/decsp8.s @@ -5,18 +5,18 @@ ; .export decsp8 - .importzp sp + .importzp c_sp .proc decsp8 - lda sp + lda c_sp sec sbc #8 - sta sp + sta c_sp bcc @L1 rts -@L1: dec sp+1 +@L1: dec c_sp+1 rts .endproc diff --git a/libsrc/runtime/enter.s b/libsrc/runtime/enter.s index c51b4f7bb..454c2a6f9 100644 --- a/libsrc/runtime/enter.s +++ b/libsrc/runtime/enter.s @@ -5,14 +5,14 @@ ; .export enter - .importzp sp + .importzp c_sp enter: tya ; get arg size - ldy sp + ldy c_sp bne L1 - dec sp+1 -L1: dec sp + dec c_sp+1 +L1: dec c_sp ldy #0 - sta (sp),y ; Store the arg count + sta (c_sp),y ; Store the arg count rts diff --git a/libsrc/runtime/eq.s b/libsrc/runtime/eq.s index c2a537a35..87cf1c085 100644 --- a/libsrc/runtime/eq.s +++ b/libsrc/runtime/eq.s @@ -6,7 +6,7 @@ .export toseq00, toseqa0, toseqax .import tosicmp, booleq - .importzp sp, tmp1 + .importzp c_sp, tmp1 toseq00: lda #$00 diff --git a/libsrc/runtime/icmp.s b/libsrc/runtime/icmp.s index 05c73bd01..eba8ce561 100644 --- a/libsrc/runtime/icmp.s +++ b/libsrc/runtime/icmp.s @@ -6,7 +6,7 @@ ; .export tosicmp, tosicmp0 - .importzp sp, sreg + .importzp c_sp, sreg tosicmp0: @@ -17,16 +17,16 @@ tosicmp: stx sreg+1 ; Save ax ldy #$00 - lda (sp),y ; Get low byte + lda (c_sp),y ; Get low byte tax - inc sp ; 5 + inc c_sp ; 5 bne @L1 ; 3 - inc sp+1 ; (5) + inc c_sp+1 ; (5) @L1: - lda (sp),y ; Get high byte - inc sp ; 5 + lda (c_sp),y ; Get high byte + inc c_sp ; 5 bne @L2 ; 3 - inc sp+1 ; (5) + inc c_sp+1 ; (5) ; Do the compare. diff --git a/libsrc/runtime/incsp1.s b/libsrc/runtime/incsp1.s index 2272e200f..dde6c47b2 100644 --- a/libsrc/runtime/incsp1.s +++ b/libsrc/runtime/incsp1.s @@ -5,13 +5,13 @@ ; .export incsp1 - .importzp sp + .importzp c_sp .proc incsp1 - inc sp + inc c_sp bne @L1 - inc sp+1 + inc c_sp+1 @L1: rts .endproc diff --git a/libsrc/runtime/incsp2.s b/libsrc/runtime/incsp2.s index 0ed0ffcdf..c3260c19d 100644 --- a/libsrc/runtime/incsp2.s +++ b/libsrc/runtime/incsp2.s @@ -5,7 +5,7 @@ ; this module also contains the popax function. .export popax, incsp2 - .importzp sp + .importzp c_sp .macpack cpu @@ -14,13 +14,13 @@ .proc popax ldy #1 - lda (sp),y ; get hi byte + lda (c_sp),y ; get hi byte tax ; into x .if (.cpu .bitand ::CPU_ISET_65SC02) - lda (sp) ; get lo byte + lda (c_sp) ; get lo byte .else dey - lda (sp),y ; get lo byte + lda (c_sp),y ; get lo byte .endif .endproc @@ -29,14 +29,14 @@ .proc incsp2 - inc sp ; 5 + inc c_sp ; 5 beq @L1 ; 2 - inc sp ; 5 + inc c_sp ; 5 beq @L2 ; 2 rts -@L1: inc sp ; 5 -@L2: inc sp+1 ; 5 +@L1: inc c_sp ; 5 +@L2: inc c_sp+1 ; 5 rts .endproc diff --git a/libsrc/runtime/ladd.s b/libsrc/runtime/ladd.s index 23b3436c0..6c187f32d 100644 --- a/libsrc/runtime/ladd.s +++ b/libsrc/runtime/ladd.s @@ -6,7 +6,7 @@ .export tosadd0ax, tosaddeax .import addysp1 - .importzp sp, sreg, tmp1 + .importzp c_sp, sreg, tmp1 .macpack cpu @@ -20,24 +20,24 @@ tosadd0ax: tosaddeax: clc .if (.cpu .bitand CPU_ISET_65SC02) - adc (sp) ; 65SC02 version - saves 2 cycles + adc (c_sp) ; 65SC02 version - saves 2 cycles ldy #1 .else ldy #0 - adc (sp),y ; lo byte + adc (c_sp),y ; lo byte iny .endif sta tmp1 ; use as temp storage txa - adc (sp),y ; byte 1 + adc (c_sp),y ; byte 1 tax iny lda sreg - adc (sp),y ; byte 2 + adc (c_sp),y ; byte 2 sta sreg iny lda sreg+1 - adc (sp),y ; byte 3 + adc (c_sp),y ; byte 3 sta sreg+1 lda tmp1 ; load byte 0 jmp addysp1 ; drop TOS diff --git a/libsrc/runtime/laddeqsp.s b/libsrc/runtime/laddeqsp.s index 46c3c1f29..13dbf8112 100644 --- a/libsrc/runtime/laddeqsp.s +++ b/libsrc/runtime/laddeqsp.s @@ -5,29 +5,29 @@ ; .export laddeq0sp, laddeqysp - .importzp sp, sreg + .importzp c_sp, sreg laddeq0sp: ldy #0 laddeqysp: clc - adc (sp),y - sta (sp),y + adc (c_sp),y + sta (c_sp),y pha iny txa - adc (sp),y - sta (sp),y + adc (c_sp),y + sta (c_sp),y tax iny lda sreg - adc (sp),y - sta (sp),y + adc (c_sp),y + sta (c_sp),y sta sreg iny lda sreg+1 - adc (sp),y - sta (sp),y + adc (c_sp),y + sta (c_sp),y sta sreg+1 pla rts diff --git a/libsrc/runtime/land.s b/libsrc/runtime/land.s index 8e21ebb60..400fede3b 100644 --- a/libsrc/runtime/land.s +++ b/libsrc/runtime/land.s @@ -7,7 +7,7 @@ .export tosand0ax, tosandeax .import addysp1 - .importzp sp, sreg, tmp1 + .importzp c_sp, sreg, tmp1 .macpack cpu @@ -23,24 +23,24 @@ tosand0ax: tosandeax: .if (.cpu .bitand ::CPU_ISET_65SC02) - and (sp) ; byte 0 + and (c_sp) ; byte 0 ldy #1 .else ldy #0 - and (sp),y ; byte 0 + and (c_sp),y ; byte 0 iny .endif sta tmp1 txa - and (sp),y ; byte 1 + and (c_sp),y ; byte 1 tax iny lda sreg - and (sp),y ; byte 2 + and (c_sp),y ; byte 2 sta sreg iny lda sreg+1 - and (sp),y ; byte 3 + and (c_sp),y ; byte 3 sta sreg+1 lda tmp1 diff --git a/libsrc/runtime/lcmp.s b/libsrc/runtime/lcmp.s index d0ba4d81f..59c02dd56 100644 --- a/libsrc/runtime/lcmp.s +++ b/libsrc/runtime/lcmp.s @@ -7,7 +7,7 @@ .export toslcmp .import incsp4 - .importzp sp, sreg, ptr1 + .importzp c_sp, sreg, ptr1 toslcmp: @@ -15,23 +15,23 @@ toslcmp: stx ptr1+1 ; EAX now in sreg:ptr1 ldy #$03 - lda (sp),y + lda (c_sp),y sec sbc sreg+1 bne L4 dey - lda (sp),y + lda (c_sp),y cmp sreg bne L1 dey - lda (sp),y + lda (c_sp),y cmp ptr1+1 bne L1 dey - lda (sp),y + lda (c_sp),y cmp ptr1 L1: php ; Save flags diff --git a/libsrc/runtime/ldau0sp.s b/libsrc/runtime/ldau0sp.s index a986d52da..a808f6f84 100644 --- a/libsrc/runtime/ldau0sp.s +++ b/libsrc/runtime/ldau0sp.s @@ -5,17 +5,17 @@ ; .export ldau00sp, ldau0ysp - .importzp sp, ptr1 + .importzp c_sp, ptr1 .macpack cpu ldau00sp: ldy #1 ldau0ysp: - lda (sp),y + lda (c_sp),y sta ptr1+1 dey - lda (sp),y + lda (c_sp),y sta ptr1 ldx #0 .if (.cpu .bitand CPU_ISET_65SC02) diff --git a/libsrc/runtime/ldauisp.s b/libsrc/runtime/ldauisp.s index 54f4d1bd1..957f245be 100644 --- a/libsrc/runtime/ldauisp.s +++ b/libsrc/runtime/ldauisp.s @@ -5,15 +5,15 @@ ; .export ldaui0sp, ldauiysp - .importzp sp, ptr1 + .importzp c_sp, ptr1 ldaui0sp: ldy #1 ldauiysp: - lda (sp),y + lda (c_sp),y sta ptr1+1 dey - lda (sp),y + lda (c_sp),y sta ptr1 txa tay diff --git a/libsrc/runtime/ldaxsp.s b/libsrc/runtime/ldaxsp.s index aa94b43cd..b744ce242 100644 --- a/libsrc/runtime/ldaxsp.s +++ b/libsrc/runtime/ldaxsp.s @@ -5,16 +5,16 @@ ; .export ldax0sp, ldaxysp - .importzp sp + .importzp c_sp ; Beware: The optimizer knows about the value in Y after return! ldax0sp: ldy #1 ldaxysp: - lda (sp),y ; get high byte + lda (c_sp),y ; get high byte tax ; and save it dey ; point to lo byte - lda (sp),y ; load low byte + lda (c_sp),y ; load low byte rts diff --git a/libsrc/runtime/ldeaxysp.s b/libsrc/runtime/ldeaxysp.s index 1d65e9c38..b6ce7254f 100644 --- a/libsrc/runtime/ldeaxysp.s +++ b/libsrc/runtime/ldeaxysp.s @@ -9,20 +9,20 @@ .export ldeax0sp, ldeaxysp - .importzp sreg, sp + .importzp sreg, c_sp ldeax0sp: ldy #3 ldeaxysp: - lda (sp),y + lda (c_sp),y sta sreg+1 dey - lda (sp),y + lda (c_sp),y sta sreg dey - lda (sp),y + lda (c_sp),y tax dey - lda (sp),y + lda (c_sp),y rts diff --git a/libsrc/runtime/leaaxsp.s b/libsrc/runtime/leaaxsp.s index 0741170ca..451d7191f 100644 --- a/libsrc/runtime/leaaxsp.s +++ b/libsrc/runtime/leaaxsp.s @@ -5,16 +5,16 @@ ; .export leaaxsp, leaa0sp - .importzp sp + .importzp c_sp leaa0sp: ldx #$00 leaaxsp: clc - adc sp + adc c_sp pha txa - adc sp+1 + adc c_sp+1 tax pla rts diff --git a/libsrc/runtime/leave.s b/libsrc/runtime/leave.s index 95dcdec9d..408fdd159 100644 --- a/libsrc/runtime/leave.s +++ b/libsrc/runtime/leave.s @@ -12,7 +12,7 @@ .export leave00, leave0, leavey00, leavey0, leavey .export leave .import addysp - .importzp sp + .importzp c_sp .macpack cpu @@ -31,24 +31,24 @@ leavey: .if (.cpu .bitand ::CPU_ISET_65SC02) leave: tay ; save A a sec - lda (sp) ; that's the pushed arg size + lda (c_sp) ; that's the pushed arg size sec ; Count the byte, the count's stored in - adc sp - sta sp + adc c_sp + sta c_sp bcc L1 - inc sp+1 + inc c_sp+1 L1: tya ; Get return value back .else leave: pha ; save A a sec ldy #0 - lda (sp),y ; that's the pushed arg size + lda (c_sp),y ; that's the pushed arg size sec ; Count the byte, the count's stored in - adc sp - sta sp + adc c_sp + sta c_sp bcc L1 - inc sp+1 + inc c_sp+1 L1: pla ; Get return value back .endif diff --git a/libsrc/runtime/lmul.s b/libsrc/runtime/lmul.s index 90d5f1e97..a68c3e5c1 100644 --- a/libsrc/runtime/lmul.s +++ b/libsrc/runtime/lmul.s @@ -7,7 +7,7 @@ .export tosumul0ax, tosumuleax, tosmul0ax, tosmuleax .import addysp1 - .importzp sp, sreg, tmp1, tmp2, tmp3, tmp4, ptr1, ptr3, ptr4 + .importzp c_sp, sreg, tmp1, tmp2, tmp3, tmp4, ptr1, ptr3, ptr4 .macpack cpu @@ -27,21 +27,21 @@ tosumuleax: mul32: sta ptr1 stx ptr1+1 ; op2 now in ptr1/sreg .if (.cpu .bitand ::CPU_ISET_65SC02) - lda (sp) + lda (c_sp) ldy #1 .else ldy #0 - lda (sp),y + lda (c_sp),y iny .endif sta ptr3 - lda (sp),y + lda (c_sp),y sta ptr3+1 iny - lda (sp),y + lda (c_sp),y sta ptr4 iny - lda (sp),y + lda (c_sp),y sta ptr4+1 ; op1 in pre3/ptr4 jsr addysp1 ; Drop TOS diff --git a/libsrc/runtime/lor.s b/libsrc/runtime/lor.s index f2204b981..888a0c611 100644 --- a/libsrc/runtime/lor.s +++ b/libsrc/runtime/lor.s @@ -7,7 +7,7 @@ .export tosor0ax, tosoreax .import addysp1 - .importzp sp, sreg, tmp1 + .importzp c_sp, sreg, tmp1 .macpack cpu @@ -23,24 +23,24 @@ tosor0ax: tosoreax: .if (.cpu .bitand ::CPU_ISET_65SC02) - ora (sp) + ora (c_sp) ldy #1 .else ldy #0 - ora (sp),y ; byte 0 + ora (c_sp),y ; byte 0 iny .endif sta tmp1 txa - ora (sp),y ; byte 1 + ora (c_sp),y ; byte 1 tax iny lda sreg - ora (sp),y ; byte 2 + ora (c_sp),y ; byte 2 sta sreg iny lda sreg+1 - ora (sp),y ; byte 3 + ora (c_sp),y ; byte 3 sta sreg+1 lda tmp1 diff --git a/libsrc/runtime/lpop.s b/libsrc/runtime/lpop.s index a90ea5fcb..9690aff24 100644 --- a/libsrc/runtime/lpop.s +++ b/libsrc/runtime/lpop.s @@ -7,24 +7,24 @@ .export popeax .import incsp4 - .importzp sp, sreg + .importzp c_sp, sreg .macpack cpu popeax: ldy #3 - lda (sp),y + lda (c_sp),y sta sreg+1 dey - lda (sp),y + lda (c_sp),y sta sreg dey - lda (sp),y + lda (c_sp),y tax .if (.cpu .bitand ::CPU_ISET_65SC02) - lda (sp) + lda (c_sp) .else dey - lda (sp),y + lda (c_sp),y .endif jmp incsp4 diff --git a/libsrc/runtime/lpush.s b/libsrc/runtime/lpush.s index 0bc67b523..ec2c865af 100644 --- a/libsrc/runtime/lpush.s +++ b/libsrc/runtime/lpush.s @@ -10,7 +10,7 @@ ; .export pushl0, push0ax, pusheax .import decsp4 - .importzp sp, sreg + .importzp c_sp, sreg .macpack cpu @@ -31,19 +31,19 @@ pusheax: jsr decsp4 ldy #3 lda sreg+1 - sta (sp),y + sta (c_sp),y dey lda sreg - sta (sp),y + sta (c_sp),y dey txa - sta (sp),y + sta (c_sp),y pla .if (.cpu .bitand ::CPU_ISET_65SC02) - sta (sp) + sta (c_sp) .else dey - sta (sp),y + sta (c_sp),y .endif rts diff --git a/libsrc/runtime/lrsub.s b/libsrc/runtime/lrsub.s index 5e8d0b543..456d8d8d5 100644 --- a/libsrc/runtime/lrsub.s +++ b/libsrc/runtime/lrsub.s @@ -10,7 +10,7 @@ ; .export tosrsub0ax, tosrsubeax .import addysp1 - .importzp sp, sreg, tmp1 + .importzp c_sp, sreg, tmp1 .macpack cpu @@ -27,24 +27,24 @@ tosrsub0ax: tosrsubeax: sec .if (.cpu .bitand ::CPU_ISET_65SC02) - sbc (sp) + sbc (c_sp) ldy #1 .else ldy #0 - sbc (sp),y ; byte 0 + sbc (c_sp),y ; byte 0 iny .endif sta tmp1 ; use as temp storage txa - sbc (sp),y ; byte 1 + sbc (c_sp),y ; byte 1 tax iny lda sreg - sbc (sp),y ; byte 2 + sbc (c_sp),y ; byte 2 sta sreg iny lda sreg+1 - sbc (sp),y ; byte 3 + sbc (c_sp),y ; byte 3 sta sreg+1 lda tmp1 jmp addysp1 ; drop TOS diff --git a/libsrc/runtime/lsub.s b/libsrc/runtime/lsub.s index 4c50ded14..17b225404 100644 --- a/libsrc/runtime/lsub.s +++ b/libsrc/runtime/lsub.s @@ -9,7 +9,7 @@ ; .export tossub0ax, tossubeax .import addysp1 - .importzp sp, sreg + .importzp c_sp, sreg .macpack cpu @@ -27,24 +27,24 @@ tossubeax: sec eor #$FF .if (.cpu .bitand ::CPU_ISET_65SC02) - adc (sp) ; 65SC02 version - saves 2 cycles + adc (c_sp) ; 65SC02 version - saves 2 cycles ldy #1 .else ldy #0 - adc (sp),y ; lo byte + adc (c_sp),y ; lo byte iny .endif pha ; Save low byte txa eor #$FF - adc (sp),y ; byte 1 + adc (c_sp),y ; byte 1 tax iny - lda (sp),y + lda (c_sp),y sbc sreg ; byte 2 sta sreg iny - lda (sp),y + lda (c_sp),y sbc sreg+1 ; byte 3 sta sreg+1 pla ; Restore byte 0 diff --git a/libsrc/runtime/lsubeqsp.s b/libsrc/runtime/lsubeqsp.s index f32930c69..6f8377484 100644 --- a/libsrc/runtime/lsubeqsp.s +++ b/libsrc/runtime/lsubeqsp.s @@ -5,31 +5,31 @@ ; .export lsubeq0sp, lsubeqysp - .importzp sp, sreg + .importzp c_sp, sreg lsubeq0sp: ldy #0 lsubeqysp: sec eor #$FF - adc (sp),y - sta (sp),y + adc (c_sp),y + sta (c_sp),y pha ; Save low byte iny txa eor #$FF - adc (sp),y - sta (sp),y + adc (c_sp),y + sta (c_sp),y tax iny - lda (sp),y + lda (c_sp),y sbc sreg - sta (sp),y + sta (c_sp),y sta sreg iny - lda (sp),y + lda (c_sp),y sbc sreg+1 - sta (sp),y + sta (c_sp),y sta sreg+1 pla rts diff --git a/libsrc/runtime/ludiv.s b/libsrc/runtime/ludiv.s index 77335d8f5..b47207222 100644 --- a/libsrc/runtime/ludiv.s +++ b/libsrc/runtime/ludiv.s @@ -7,7 +7,7 @@ .export tosudiv0ax, tosudiveax, getlop, udiv32 .import addysp1 - .importzp sp, sreg, tmp3, tmp4, ptr1, ptr2, ptr3, ptr4 + .importzp c_sp, sreg, tmp3, tmp4, ptr1, ptr2, ptr3, ptr4 .macpack cpu @@ -39,21 +39,21 @@ getlop: sta ptr3 ; Put right operand in place sta ptr4+1 .if (.cpu .bitand ::CPU_ISET_65SC02) - lda (sp) + lda (c_sp) ldy #1 .else ldy #0 ; Put left operand in place - lda (sp),y + lda (c_sp),y iny .endif sta ptr1 - lda (sp),y + lda (c_sp),y sta ptr1+1 iny - lda (sp),y + lda (c_sp),y sta sreg iny - lda (sp),y + lda (c_sp),y sta sreg+1 jmp addysp1 ; Drop parameters diff --git a/libsrc/runtime/lxor.s b/libsrc/runtime/lxor.s index a92a59959..6d9f7db3a 100644 --- a/libsrc/runtime/lxor.s +++ b/libsrc/runtime/lxor.s @@ -7,7 +7,7 @@ .export tosxor0ax, tosxoreax .import addysp1 - .importzp sp, sreg, tmp1 + .importzp c_sp, sreg, tmp1 .macpack cpu @@ -23,24 +23,24 @@ tosxor0ax: tosxoreax: .if (.cpu .bitand ::CPU_ISET_65SC02) - eor (sp) ; byte 0 + eor (c_sp) ; byte 0 ldy #1 .else ldy #0 - eor (sp),y ; byte 0 + eor (c_sp),y ; byte 0 iny .endif sta tmp1 txa - eor (sp),y ; byte 1 + eor (c_sp),y ; byte 1 tax iny lda sreg - eor (sp),y ; byte 2 + eor (c_sp),y ; byte 2 sta sreg iny lda sreg+1 - eor (sp),y ; byte 3 + eor (c_sp),y ; byte 3 sta sreg+1 lda tmp1 diff --git a/libsrc/runtime/or.s b/libsrc/runtime/or.s index 735f30f61..04389be5f 100644 --- a/libsrc/runtime/or.s +++ b/libsrc/runtime/or.s @@ -7,7 +7,7 @@ .export tosora0, tosorax .import addysp1 - .importzp sp, tmp1 + .importzp c_sp, tmp1 .macpack cpu @@ -15,16 +15,16 @@ tosora0: ldx #$00 tosorax: .if (.cpu .bitand ::CPU_ISET_65SC02) - ora (sp) + ora (c_sp) ldy #1 .else ldy #0 - ora (sp),y + ora (c_sp),y iny .endif sta tmp1 txa - ora (sp),y + ora (c_sp),y tax lda tmp1 jmp addysp1 ; drop TOS, set condition codes diff --git a/libsrc/runtime/popa.s b/libsrc/runtime/popa.s index bb74df0ca..c1700071d 100644 --- a/libsrc/runtime/popa.s +++ b/libsrc/runtime/popa.s @@ -5,23 +5,23 @@ ; .export popa - .importzp sp + .importzp c_sp .macpack cpu .proc popa .if (.cpu .bitand ::CPU_ISET_65SC02) - lda (sp) + lda (c_sp) .else ldy #0 ; (2) - lda (sp),y ; (7) Read byte + lda (c_sp),y ; (7) Read byte .endif - inc sp ; (12) + inc c_sp ; (12) beq @L1 ; (14) rts ; (20) -@L1: inc sp+1 +@L1: inc c_sp+1 rts .endproc diff --git a/libsrc/runtime/popptr1.s b/libsrc/runtime/popptr1.s index b54bb9eb3..45043dd27 100644 --- a/libsrc/runtime/popptr1.s +++ b/libsrc/runtime/popptr1.s @@ -6,19 +6,19 @@ .export popptr1 .import incsp2 - .importzp sp, ptr1 + .importzp c_sp, ptr1 .macpack cpu .proc popptr1 ; 14 bytes (four usages = at least 2 bytes saved) ldy #1 - lda (sp),y ; get hi byte + lda (c_sp),y ; get hi byte sta ptr1+1 ; into ptr hi dey ; dey even for for 65C02 here to have Y=0 at exit! .if (.cpu .bitand ::CPU_ISET_65SC02) - lda (sp) ; get lo byte + lda (c_sp) ; get lo byte .else - lda (sp),y ; get lo byte + lda (c_sp),y ; get lo byte .endif sta ptr1 ; to ptr lo jmp incsp2 diff --git a/libsrc/runtime/popsreg.s b/libsrc/runtime/popsreg.s index 47d67503a..c7f667246 100644 --- a/libsrc/runtime/popsreg.s +++ b/libsrc/runtime/popsreg.s @@ -6,20 +6,20 @@ .export popsreg .import incsp2 - .importzp sp, sreg + .importzp c_sp, sreg .macpack cpu popsreg: pha ; save A ldy #1 - lda (sp),y ; get hi byte + lda (c_sp),y ; get hi byte sta sreg+1 ; store it .if (.cpu .bitand ::CPU_ISET_65SC02) - lda (sp) ; get lo byte + lda (c_sp) ; get lo byte .else dey - lda (sp),y ; get lo byte + lda (c_sp),y ; get lo byte .endif sta sreg ; store it pla ; get A back diff --git a/libsrc/runtime/pusha.s b/libsrc/runtime/pusha.s index 04233282e..399423077 100644 --- a/libsrc/runtime/pusha.s +++ b/libsrc/runtime/pusha.s @@ -5,7 +5,7 @@ ; .export pusha0sp, pushaysp, pusha - .importzp sp + .importzp c_sp .macpack cpu @@ -14,16 +14,16 @@ pusha0sp: ldy #$00 pushaysp: - lda (sp),y -pusha: ldy sp ; (3) + lda (c_sp),y +pusha: ldy c_sp ; (3) beq @L1 ; (6) - dec sp ; (11) + dec c_sp ; (11) ldy #0 ; (13) - sta (sp),y ; (19) + sta (c_sp),y ; (19) rts ; (25) -@L1: dec sp+1 ; (11) - dec sp ; (16) - sta (sp),y ; (22) +@L1: dec c_sp+1 ; (11) + dec c_sp ; (16) + sta (c_sp),y ; (22) rts ; (28) diff --git a/libsrc/runtime/pushax.s b/libsrc/runtime/pushax.s index 27ddf641d..f77a9bcc3 100644 --- a/libsrc/runtime/pushax.s +++ b/libsrc/runtime/pushax.s @@ -5,7 +5,7 @@ ; .export push0, pusha0, pushax - .importzp sp + .importzp c_sp .macpack cpu @@ -20,21 +20,21 @@ pusha0: ldx #0 .proc pushax pha ; (3) - lda sp ; (6) + lda c_sp ; (6) sec ; (8) sbc #2 ; (10) - sta sp ; (13) + sta c_sp ; (13) bcs @L1 ; (17) - dec sp+1 ; (+5) + dec c_sp+1 ; (+5) @L1: ldy #1 ; (19) txa ; (21) - sta (sp),y ; (27) + sta (c_sp),y ; (27) pla ; (31) dey ; (33) .if (.cpu .bitand ::CPU_ISET_65SC02) - sta (sp) ; (37) + sta (c_sp) ; (37) .else - sta (sp),y ; (38) + sta (c_sp),y ; (38) .endif rts ; (44/43) diff --git a/libsrc/runtime/pushbsp.s b/libsrc/runtime/pushbsp.s index 0b5cbe854..45ad93b12 100644 --- a/libsrc/runtime/pushbsp.s +++ b/libsrc/runtime/pushbsp.s @@ -6,12 +6,12 @@ .export pushbsp, pushbysp .import pusha0 - .importzp sp + .importzp c_sp pushbsp: ldy #0 pushbysp: - lda (sp),y ; get lo byte + lda (c_sp),y ; get lo byte jmp pusha0 ; promote to unsigned and push diff --git a/libsrc/runtime/pushlysp.s b/libsrc/runtime/pushlysp.s index ca1834265..86bb87dbd 100644 --- a/libsrc/runtime/pushlysp.s +++ b/libsrc/runtime/pushlysp.s @@ -7,23 +7,23 @@ .export pushlysp .import pusheax - .importzp sreg, sp + .importzp sreg, c_sp .proc pushlysp iny iny - lda (sp),y + lda (c_sp),y iny sta sreg - lda (sp),y + lda (c_sp),y sta sreg+1 dey dey - lda (sp),y + lda (c_sp),y dey tax - lda (sp),y + lda (c_sp),y jmp pusheax .endproc diff --git a/libsrc/runtime/pushwsp.s b/libsrc/runtime/pushwsp.s index f5ebe0d7e..31c08d624 100644 --- a/libsrc/runtime/pushwsp.s +++ b/libsrc/runtime/pushwsp.s @@ -5,27 +5,27 @@ ; .export pushwysp, pushw0sp - .importzp sp + .importzp c_sp .macpack generic pushw0sp: ldy #3 pushwysp: - lda sp ; 3 + lda c_sp ; 3 sub #2 ; 4 - sta sp ; 3 + sta c_sp ; 3 bcs @L1 ; 3(+1) - dec sp+1 ; (5) -@L1: lda (sp),y ; 5 =16 + dec c_sp+1 ; (5) +@L1: lda (c_sp),y ; 5 =16 tax ; 2 dey ; 2 - lda (sp),y ; 5 + lda (c_sp),y ; 5 ldy #$00 ; 2 - sta (sp),y ; 5 + sta (c_sp),y ; 5 iny ; 2 txa ; 2 - sta (sp),y ; 5 + sta (c_sp),y ; 5 rts diff --git a/libsrc/runtime/regswap.s b/libsrc/runtime/regswap.s index 689d8d12a..17db9ee27 100644 --- a/libsrc/runtime/regswap.s +++ b/libsrc/runtime/regswap.s @@ -5,17 +5,17 @@ ; .export regswap - .importzp sp, regbank, tmp1 + .importzp c_sp, regbank, tmp1 .proc regswap sta tmp1 ; Store count @L1: lda regbank,x ; Get old value pha ; Save it - lda (sp),y ; Get stack loc + lda (c_sp),y ; Get stack loc sta regbank,x ; Store new value pla - sta (sp),y ; Store old value + sta (c_sp),y ; Store old value inx iny dec tmp1 diff --git a/libsrc/runtime/regswap1.s b/libsrc/runtime/regswap1.s index 753020acb..22cf170dc 100644 --- a/libsrc/runtime/regswap1.s +++ b/libsrc/runtime/regswap1.s @@ -5,16 +5,16 @@ ; .export regswap1 - .importzp sp, regbank + .importzp c_sp, regbank .proc regswap1 lda regbank,x ; Get old value pha ; Save it - lda (sp),y ; Get stack loc + lda (c_sp),y ; Get stack loc sta regbank,x ; Store new value pla - sta (sp),y ; Store old value + sta (c_sp),y ; Store old value rts .endproc diff --git a/libsrc/runtime/regswap2.s b/libsrc/runtime/regswap2.s index df5109dc6..07bc7c196 100644 --- a/libsrc/runtime/regswap2.s +++ b/libsrc/runtime/regswap2.s @@ -5,7 +5,7 @@ ; .export regswap2 - .importzp sp, regbank + .importzp c_sp, regbank .proc regswap2 @@ -13,20 +13,20 @@ lda regbank,x ; Get old value pha ; Save it - lda (sp),y ; Get stack loc + lda (c_sp),y ; Get stack loc sta regbank,x ; Store new value pla - sta (sp),y ; Store old value + sta (c_sp),y ; Store old value ; Second byte iny lda regbank+1,x ; Get old value pha ; Save it - lda (sp),y ; Get stack loc + lda (c_sp),y ; Get stack loc sta regbank+1,x ; Store new value pla - sta (sp),y ; Store old value + sta (c_sp),y ; Store old value rts diff --git a/libsrc/runtime/rsub.s b/libsrc/runtime/rsub.s index 69ee6da22..bacb3c7fc 100644 --- a/libsrc/runtime/rsub.s +++ b/libsrc/runtime/rsub.s @@ -7,7 +7,7 @@ .export tosrsuba0, tosrsubax .import addysp1 - .importzp sp, tmp1 + .importzp c_sp, tmp1 .macpack cpu @@ -20,16 +20,16 @@ tosrsuba0: tosrsubax: sec .if (.cpu .bitand CPU_ISET_65SC02) - sbc (sp) + sbc (c_sp) ldy #1 .else ldy #0 - sbc (sp),y ; lo byte + sbc (c_sp),y ; lo byte iny .endif sta tmp1 ; save lo byte txa - sbc (sp),y ; hi byte + sbc (c_sp),y ; hi byte tax lda tmp1 jmp addysp1 ; drop TOS, set condition codes diff --git a/libsrc/runtime/sp-compat.s b/libsrc/runtime/sp-compat.s new file mode 100644 index 000000000..77972212f --- /dev/null +++ b/libsrc/runtime/sp-compat.s @@ -0,0 +1,19 @@ +; +; Kugelfuhr, 2025-06-26 +; +; Add "sp" as an alias for "c_sp" so we don't break old code but emit a +; linker warning if it is used. Added after renaming "sp" to "c_sp". +; + +; FIXME: there must be a less ugly way to do this +.ifp4510 +.else +.ifp45GS02 +.else + +.include "zeropage.inc" +.export sp := c_sp +.assert 0, ldwarning, "Symbol 'sp' is deprecated - please use 'c_sp' instead" + +.endif +.endif diff --git a/libsrc/runtime/staspidx.s b/libsrc/runtime/staspidx.s index c8d42f34c..bd9b0c79d 100644 --- a/libsrc/runtime/staspidx.s +++ b/libsrc/runtime/staspidx.s @@ -6,17 +6,17 @@ .export staspidx .import incsp2 - .importzp sp, tmp1, ptr1 + .importzp c_sp, tmp1, ptr1 .proc staspidx pha sty tmp1 ; Save Index ldy #1 - lda (sp),y + lda (c_sp),y sta ptr1+1 dey - lda (sp),y + lda (c_sp),y sta ptr1 ; Pointer now in ptr1 ldy tmp1 ; Restore offset pla ; Restore value diff --git a/libsrc/runtime/staxsp.s b/libsrc/runtime/staxsp.s index 599e92a32..15bec22ee 100644 --- a/libsrc/runtime/staxsp.s +++ b/libsrc/runtime/staxsp.s @@ -1,20 +1,20 @@ ; ; Ullrich von Bassewitz, 31.08.1998 ; -; CC65 runtime: Store ax at (sp),y +; CC65 runtime: Store ax at (c_sp),y ; .export staxysp, stax0sp - .importzp sp + .importzp c_sp stax0sp: ldy #0 staxysp: - sta (sp),y + sta (c_sp),y iny pha txa - sta (sp),y + sta (c_sp),y pla rts diff --git a/libsrc/runtime/staxspi.s b/libsrc/runtime/staxspi.s index 3114f449c..aefed428f 100644 --- a/libsrc/runtime/staxspi.s +++ b/libsrc/runtime/staxspi.s @@ -7,7 +7,7 @@ .export staxspidx .import incsp2 - .importzp sp, tmp1, ptr1 + .importzp c_sp, tmp1, ptr1 .macpack cpu @@ -16,13 +16,13 @@ sty tmp1 ; Save Y pha ; Save A ldy #1 - lda (sp),y + lda (c_sp),y sta ptr1+1 .if (.cpu .bitand ::CPU_ISET_65SC02) - lda (sp) + lda (c_sp) .else dey - lda (sp),y + lda (c_sp),y .endif sta ptr1 ; Address now in ptr1 ldy tmp1 ; Restore Y diff --git a/libsrc/runtime/steaxsp.s b/libsrc/runtime/steaxsp.s index 6ac3891c9..33dbc04d7 100644 --- a/libsrc/runtime/steaxsp.s +++ b/libsrc/runtime/steaxsp.s @@ -1,26 +1,26 @@ ; ; Ullrich von Bassewitz, 31.08.1998 ; -; CC65 runtime: Store eax at (sp),y +; CC65 runtime: Store eax at (c_sp),y ; .export steaxysp, steax0sp - .importzp sp, sreg + .importzp c_sp, sreg steax0sp: ldy #0 steaxysp: - sta (sp),y + sta (c_sp),y iny pha txa - sta (sp),y + sta (c_sp),y iny lda sreg - sta (sp),y + sta (c_sp),y iny lda sreg+1 - sta (sp),y + sta (c_sp),y pla rts diff --git a/libsrc/runtime/stkchk.s b/libsrc/runtime/stkchk.s index ceab4c703..a7ca39f21 100644 --- a/libsrc/runtime/stkchk.s +++ b/libsrc/runtime/stkchk.s @@ -17,7 +17,7 @@ .constructor initstkchk, 25 .import __STACKSIZE__ ; Linker defined .import pusha0, _exit - .importzp sp + .importzp c_sp ; Use macros for better readability .macpack generic @@ -32,11 +32,11 @@ .proc initstkchk - lda sp + lda c_sp sta initialsp sub #<__STACKSIZE__ sta lowwater - lda sp+1 + lda c_sp+1 sta initialsp+1 sbc #>__STACKSIZE__ .if (.cpu .bitand ::CPU_ISET_65SC02) @@ -70,7 +70,7 @@ cstkchk: ; Check the high byte of the software stack @L0: lda lowwater+1 - cmp sp+1 + cmp c_sp+1 bcs @L1 rts @@ -78,7 +78,7 @@ cstkchk: @L1: bne CStackOverflow lda lowwater - cmp sp + cmp c_sp bcs CStackOverflow Done: rts @@ -87,9 +87,9 @@ Done: rts CStackOverflow: lda initialsp - sta sp + sta c_sp lda initialsp+1 - sta sp+1 + sta c_sp+1 ; Generic abort entry. We should output a diagnostic here, but this is ; difficult, since we're operating at a lower level here. diff --git a/libsrc/runtime/sub.s b/libsrc/runtime/sub.s index b41df3d91..58ffb4c91 100644 --- a/libsrc/runtime/sub.s +++ b/libsrc/runtime/sub.s @@ -6,7 +6,7 @@ .export tossuba0, tossubax .import addysp1 - .importzp sp + .importzp c_sp .macpack cpu @@ -18,17 +18,17 @@ tossubax: sec eor #$FF .if (.cpu .bitand CPU_ISET_65SC02) - adc (sp) + adc (c_sp) ldy #1 .else ldy #0 - adc (sp),y ; Subtract low byte + adc (c_sp),y ; Subtract low byte iny .endif pha ; Save high byte txa eor #$FF - adc (sp),y ; Subtract high byte + adc (c_sp),y ; Subtract high byte tax ; High byte into X pla ; Restore low byte jmp addysp1 ; drop TOS diff --git a/libsrc/runtime/subeqsp.s b/libsrc/runtime/subeqsp.s index 24080d97d..880e5f2fc 100644 --- a/libsrc/runtime/subeqsp.s +++ b/libsrc/runtime/subeqsp.s @@ -5,21 +5,21 @@ ; .export subeq0sp, subeqysp - .importzp sp + .importzp c_sp subeq0sp: ldy #0 subeqysp: sec eor #$FF - adc (sp),y - sta (sp),y + adc (c_sp),y + sta (c_sp),y pha ; Save low byte iny txa eor #$FF - adc (sp),y - sta (sp),y + adc (c_sp),y + sta (c_sp),y tax pla ; Restore low byte rts diff --git a/libsrc/runtime/subysp.s b/libsrc/runtime/subysp.s index 9fae44222..8f5bea806 100644 --- a/libsrc/runtime/subysp.s +++ b/libsrc/runtime/subysp.s @@ -6,17 +6,17 @@ ; .export subysp - .importzp sp + .importzp c_sp .proc subysp tya eor #$ff sec - adc sp - sta sp + adc c_sp + sta c_sp bcs @L1 - dec sp+1 + dec c_sp+1 @L1: rts .endproc diff --git a/libsrc/runtime/swap.s b/libsrc/runtime/swap.s index 5358e08d3..3796b0a97 100644 --- a/libsrc/runtime/swap.s +++ b/libsrc/runtime/swap.s @@ -6,7 +6,7 @@ ; .export swapstk - .importzp sp, ptr4 + .importzp c_sp, ptr4 .macpack cpu @@ -14,22 +14,22 @@ swapstk: sta ptr4 stx ptr4+1 ldy #1 ; index - lda (sp),y + lda (c_sp),y tax lda ptr4+1 - sta (sp),y + sta (c_sp),y .if (.cpu .bitand ::CPU_ISET_65SC02) - lda (sp) + lda (c_sp) tay lda ptr4 - sta (sp) + sta (c_sp) tya .else dey - lda (sp),y + lda (c_sp),y pha lda ptr4 - sta (sp),y + sta (c_sp),y pla .endif rts ; whew! diff --git a/libsrc/runtime/tosint.s b/libsrc/runtime/tosint.s index ed32298bd..2aaa19ccc 100644 --- a/libsrc/runtime/tosint.s +++ b/libsrc/runtime/tosint.s @@ -6,7 +6,7 @@ .export tosint .import incsp2 - .importzp sp + .importzp c_sp .macpack cpu @@ -16,17 +16,17 @@ pha .if (.cpu .bitand ::CPU_ISET_65SC02) - lda (sp) + lda (c_sp) .else ldy #0 - lda (sp),y ; sp+1 + lda (c_sp),y ; c_sp+1 .endif ldy #2 - sta (sp),y + sta (c_sp),y dey - lda (sp),y + lda (c_sp),y ldy #3 - sta (sp),y + sta (c_sp),y pla jmp incsp2 ; Drop 16 bit diff --git a/libsrc/runtime/toslong.s b/libsrc/runtime/toslong.s index 9065d3e6c..cf8eff031 100644 --- a/libsrc/runtime/toslong.s +++ b/libsrc/runtime/toslong.s @@ -6,7 +6,7 @@ .export tosulong, toslong .import decsp2 - .importzp sp + .importzp c_sp .macpack cpu @@ -16,25 +16,25 @@ tosulong: pha jsr decsp2 ; Make room ldy #2 - lda (sp),y + lda (c_sp),y .if (.cpu .bitand CPU_ISET_65SC02) - sta (sp) ; 65C02 version + sta (c_sp) ; 65C02 version iny ; Y = 3 .else ldy #0 - sta (sp),y + sta (c_sp),y ldy #3 .endif - lda (sp),y + lda (c_sp),y toslong1: ldy #1 - sta (sp),y + sta (c_sp),y lda #0 ; Zero extend toslong2: iny - sta (sp),y + sta (c_sp),y iny - sta (sp),y + sta (c_sp),y pla rts @@ -42,19 +42,19 @@ toslong: pha jsr decsp2 ; Make room ldy #2 - lda (sp),y + lda (c_sp),y .if (.cpu .bitand CPU_ISET_65SC02) - sta (sp) ; 65C02 version + sta (c_sp) ; 65C02 version iny ; Y = 3 .else ldy #0 - sta (sp),y + sta (c_sp),y ldy #3 .endif - lda (sp),y + lda (c_sp),y bpl toslong1 ; Jump if positive, high word is zero ldy #1 - sta (sp),y + sta (c_sp),y lda #$FF bne toslong2 ; Branch always diff --git a/libsrc/runtime/xor.s b/libsrc/runtime/xor.s index e03922926..15394413c 100644 --- a/libsrc/runtime/xor.s +++ b/libsrc/runtime/xor.s @@ -7,7 +7,7 @@ .export tosxora0, tosxorax .import addysp1 - .importzp sp, tmp1 + .importzp c_sp, tmp1 .macpack cpu @@ -15,16 +15,16 @@ tosxora0: ldx #$00 tosxorax: .if (.cpu .bitand CPU_ISET_65SC02) - eor (sp) + eor (c_sp) ldy #1 .else ldy #0 - eor (sp),y + eor (c_sp),y iny .endif sta tmp1 txa - eor (sp),y + eor (c_sp),y tax lda tmp1 jmp addysp1 ; drop TOS, set condition codes diff --git a/libsrc/runtime/zeropage.s b/libsrc/runtime/zeropage.s index 2bbe7ceee..2e2b237f6 100644 --- a/libsrc/runtime/zeropage.s +++ b/libsrc/runtime/zeropage.s @@ -10,7 +10,7 @@ .zeropage -sp: .res 2 ; Stack pointer +c_sp: .res 2 ; Stack pointer sreg: .res 2 ; Secondary register/high 16 bit for longs regsave: .res 4 ; Slot to save/restore (E)AX into ptr1: .res 2 diff --git a/libsrc/sim6502/crt0.s b/libsrc/sim6502/crt0.s index c04a2b8a6..26be7888b 100644 --- a/libsrc/sim6502/crt0.s +++ b/libsrc/sim6502/crt0.s @@ -22,8 +22,8 @@ startup:cld txs lda #<(__MAIN_START__ + __MAIN_SIZE__ + __STACKSIZE__) ldx #>(__MAIN_START__ + __MAIN_SIZE__ + __STACKSIZE__) - sta sp - stx sp+1 + sta c_sp + stx c_sp+1 jsr zerobss jsr initlib jsr callmain diff --git a/libsrc/sim6502/exehdr.s b/libsrc/sim6502/exehdr.s index 6487e5b0c..224b2af2d 100644 --- a/libsrc/sim6502/exehdr.s +++ b/libsrc/sim6502/exehdr.s @@ -5,7 +5,7 @@ ; .export __EXEHDR__ : absolute = 1 ; Linker referenced - .importzp sp + .importzp c_sp .import __MAIN_START__ .import startup @@ -24,6 +24,6 @@ .else .error Unknown CPU type. .endif - .byte sp ; sp address + .byte c_sp ; c_sp address .addr __MAIN_START__ ; load address .addr startup ; reset address diff --git a/libsrc/supervision/crt0.s b/libsrc/supervision/crt0.s index fbae1fc46..1cfba1845 100644 --- a/libsrc/supervision/crt0.s +++ b/libsrc/supervision/crt0.s @@ -33,8 +33,8 @@ reset: lda #<(__RAM_START__ + __RAM_SIZE__ + __STACKSIZE__) ldx #>(__RAM_START__ + __RAM_SIZE__ + __STACKSIZE__) - sta sp - stx sp+1 ; Set argument stack ptr + sta c_sp + stx c_sp+1 ; Set argument stack ptr jsr initlib jsr _main _exit: jsr donelib diff --git a/libsrc/sym1/crt0.s b/libsrc/sym1/crt0.s index 5d4e0449b..d20b4cf6c 100644 --- a/libsrc/sym1/crt0.s +++ b/libsrc/sym1/crt0.s @@ -33,9 +33,9 @@ _init: jsr ACCESS ; Unlock System RAM ; Set cc65 argument stack pointer lda #<(__RAM_START__ + __RAM_SIZE__) - sta sp + sta c_sp lda #>(__RAM_START__ + __RAM_SIZE__) - sta sp+1 + sta c_sp+1 ; Initialize memory storage diff --git a/libsrc/telestrat/crt0.s b/libsrc/telestrat/crt0.s index df75520ce..aa32ed0d0 100644 --- a/libsrc/telestrat/crt0.s +++ b/libsrc/telestrat/crt0.s @@ -47,7 +47,7 @@ _exit: jsr donelib ldx #zpspace - 1 L2: lda zpsave,x - sta sp,x + sta c_sp,x dex bpl L2 @@ -64,7 +64,7 @@ L2: lda zpsave,x ; Save the zero-page area that we're about to use. init: ldx #zpspace - 1 -L1: lda sp,x +L1: lda c_sp,x sta zpsave,x dex bpl L1 @@ -74,8 +74,8 @@ L1: lda sp,x lda #<(__MAIN_START__ + __MAIN_SIZE__) ldx #>(__MAIN_START__ + __MAIN_SIZE__) - sta sp - stx sp+1 ; Set argument stack ptr + sta c_sp + stx c_sp+1 ; Set argument stack ptr ; Call the module constructors. diff --git a/libsrc/telestrat/open.s b/libsrc/telestrat/open.s index f59d3d31a..08c572e23 100644 --- a/libsrc/telestrat/open.s +++ b/libsrc/telestrat/open.s @@ -2,7 +2,7 @@ .import addysp,popax - .importzp sp,tmp2,tmp3,tmp1 + .importzp c_sp,tmp2,tmp3,tmp1 .include "telestrat.inc" diff --git a/libsrc/telestrat/sysuname.s b/libsrc/telestrat/sysuname.s index 51af1d8fe..09aaff831 100644 --- a/libsrc/telestrat/sysuname.s +++ b/libsrc/telestrat/sysuname.s @@ -23,23 +23,13 @@ utsdata: .asciiz "" ; release - .byte ((.VERSION >> 8) & $0F) + '0' + .byte .string (>.version) .byte '.' - .if ((.VERSION >> 4) & $0F) > 9 - .byte ((.VERSION >> 4) & $0F) / 10 + '0' - .byte ((.VERSION >> 4) & $0F) .MOD 10 + '0' - .else - .byte ((.VERSION >> 4) & $0F) + '0' - .endif + .byte .string (<.version) .byte $00 ; version - .if (.VERSION & $0F) > 9 - .byte (.VERSION & $0F) / 10 + '0' - .byte (.VERSION & $0F) .MOD 10 + '0' - .else - .byte (.VERSION & $0F) + '0' - .endif + .byte '0' ; unused .byte $00 ; machine diff --git a/libsrc/telestrat/wherex.s b/libsrc/telestrat/wherex.s index 8616003c8..256b967c3 100644 --- a/libsrc/telestrat/wherex.s +++ b/libsrc/telestrat/wherex.s @@ -3,7 +3,7 @@ ; .export _wherex - .importzp sp + .importzp c_sp .include "telestrat.inc" diff --git a/libsrc/tgi/tgi-kernel.s b/libsrc/tgi/tgi-kernel.s index cbd655279..c2d87b002 100644 --- a/libsrc/tgi/tgi-kernel.s +++ b/libsrc/tgi/tgi-kernel.s @@ -23,7 +23,7 @@ _tgi_error: .res 1 ; Last error code _tgi_gmode: .res 1 ; Flag: Graphics mode active _tgi_curx: .res 2 ; Current drawing cursor X _tgi_cury: .res 2 ; Current drawing cursor Y -_tgi_color: .res 1 ; Current drawing color +_tgi_color: .res 1 ; Current drawing color (palette index) _tgi_font: .res 1 ; Which font to use _tgi_textdir: .res 1 ; Current text direction _tgi_vectorfont: .res 2 ; Pointer to vector font diff --git a/libsrc/tgi/tgi_getcolor.s b/libsrc/tgi/tgi_getcolor.s index c1c0022d0..95cf7d553 100644 --- a/libsrc/tgi/tgi_getcolor.s +++ b/libsrc/tgi/tgi_getcolor.s @@ -2,7 +2,7 @@ ; Ullrich von Bassewitz, 22.06.2002 ; ; unsigned char tgi_getcolor (void); -; /* Return the current drawing color */ +; /* Return the current drawing color (palette index) */ .include "tgi-kernel.inc" diff --git a/libsrc/tgi/tgi_outtextxy.s b/libsrc/tgi/tgi_outtextxy.s index 3934df871..24183396f 100644 --- a/libsrc/tgi/tgi_outtextxy.s +++ b/libsrc/tgi/tgi_outtextxy.s @@ -8,7 +8,7 @@ .include "tgi-kernel.inc" .import addysp1 - .importzp sp + .importzp c_sp .proc _tgi_outtextxy @@ -17,16 +17,16 @@ pha ; ldy #0 - lda (sp),y + lda (c_sp),y sta _tgi_cury iny - lda (sp),y + lda (c_sp),y sta _tgi_cury+1 iny - lda (sp),y + lda (c_sp),y sta _tgi_curx iny - lda (sp),y + lda (c_sp),y sta _tgi_curx+1 pla jsr addysp1 ; Drop arguments from stack diff --git a/libsrc/tgi/tgi_setcolor.s b/libsrc/tgi/tgi_setcolor.s index 16f075767..6f3bb1871 100644 --- a/libsrc/tgi/tgi_setcolor.s +++ b/libsrc/tgi/tgi_setcolor.s @@ -2,8 +2,8 @@ ; 2002-06-21, Ullrich von Bassewitz ; 2020-06-04, Greg King ; -; void __fastcall__ tgi_setcolor (unsigned char color); -; /* Set the current drawing color */ +; void __fastcall__ tgi_setcolor (unsigned char color_index); +; /* Set the current drawing color (palette index) */ .include "tgi-kernel.inc" diff --git a/libsrc/vic20/crt0.s b/libsrc/vic20/crt0.s index c5486063b..189114f5d 100644 --- a/libsrc/vic20/crt0.s +++ b/libsrc/vic20/crt0.s @@ -24,7 +24,7 @@ Start: ; Save the zero-page locations that we need. ldx #zpspace-1 -L1: lda sp,x +L1: lda c_sp,x sta zpsave,x dex bpl L1 @@ -45,8 +45,8 @@ L1: lda sp,x lda #<(__MAIN_START__ + __MAIN_SIZE__ + __STACKSIZE__) ldx #>(__MAIN_START__ + __MAIN_SIZE__ + __STACKSIZE__) - sta sp - stx sp+1 ; Set argument stack ptr + sta c_sp + stx c_sp+1 ; Set argument stack ptr ; Call the module constructors. @@ -65,7 +65,7 @@ _exit: pha ; Save the return code on stack ldx #zpspace-1 L2: lda zpsave,x - sta sp,x + sta c_sp,x dex bpl L2 diff --git a/libsrc/vic20/sysuname.s b/libsrc/vic20/sysuname.s index 18d5db9a9..43ee37896 100644 --- a/libsrc/vic20/sysuname.s +++ b/libsrc/vic20/sysuname.s @@ -23,13 +23,13 @@ utsdata: .asciiz "" ; release - .byte ((.VERSION >> 8) & $0F) + '0' + .byte .string (>.version) .byte '.' - .byte ((.VERSION >> 4) & $0F) + '0' + .byte .string (<.version) .byte $00 ; version - .byte (.VERSION & $0F) + '0' + .byte '0' ; unused .byte $00 ; machine diff --git a/libsrc/zlib/inflatemem.s b/libsrc/zlib/inflatemem.s index 80c19f223..2f2a1b295 100644 --- a/libsrc/zlib/inflatemem.s +++ b/libsrc/zlib/inflatemem.s @@ -12,7 +12,7 @@ .export _inflatemem .import incsp2 - .importzp sp, sreg, ptr1, ptr2, ptr3, ptr4 + .importzp c_sp, sreg, ptr1, ptr2, ptr3, ptr4 ; -------------------------------------------------------------------------- ; @@ -79,10 +79,10 @@ _inflatemem: stx inputPointer+1 ; outputPointer = dest ldy #1 - lda (sp),y + lda (c_sp),y sta outputPointer+1 dey - lda (sp),y + lda (c_sp),y sta outputPointer ; ldy #0 @@ -129,11 +129,11 @@ inflate_nextBlock: lda outputPointer ; ldy #0 ; sec - sbc (sp),y + sbc (c_sp),y iny pha lda outputPointer+1 - sbc (sp),y + sbc (c_sp),y tax pla ; pop dest diff --git a/samples/Makefile b/samples/Makefile index 3680f542c..3c7c3518a 100644 --- a/samples/Makefile +++ b/samples/Makefile @@ -1,3 +1,9 @@ +# ---- Display info during parsing phase ---- +SILENT:=$(findstring s,$(word 1, $(MAKEFLAGS))) +ifneq ($(SILENT),s) + $(info Using Makefile: $(realpath $(firstword $(MAKEFILE_LIST))) $(MAKECMDGOALS)) +endif + # # Makefile for cc65 samples # @@ -41,6 +47,16 @@ else LD := $(if $(wildcard ../bin/ld65*),../bin/ld65,ld65) endif +ifeq ($(SILENT),s) + QUIET = 1 +endif + +ifdef QUIET + .SILENT: + PQ = "QUIET=1" + PD = --no-print-directory +endif + ifneq ($(filter disk samples.%,$(MAKECMDGOALS)),) ifdef CC65_HOME TARGET_PATH = $(CC65_HOME)/target @@ -78,10 +94,12 @@ ifneq ($(filter disk samples.%,$(MAKECMDGOALS)),) EMD := $(wildcard $(TARGET_PATH)/$(SYS)/drv/emd/*) MOU := $(wildcard $(TARGET_PATH)/$(SYS)/drv/mou/*) TGI := $(wildcard $(TARGET_PATH)/$(SYS)/drv/tgi/*) + JOY := $(wildcard $(TARGET_PATH)/$(SYS)/drv/joy/*) EMD := $(addprefix $(SUBST_TARGET_PATH)/$(SYS)/drv/emd/,$(notdir $(filter %.emd,$(EMD)))) MOU := $(addprefix $(SUBST_TARGET_PATH)/$(SYS)/drv/mou/,$(notdir $(filter %.mou,$(MOU)))) TGI := $(addprefix $(SUBST_TARGET_PATH)/$(SYS)/drv/tgi/,$(notdir $(filter %.tgi,$(TGI)))) + JOY := $(addprefix $(SUBST_TARGET_PATH)/$(SYS)/drv/joy/,$(notdir $(filter %.joy,$(JOY)))) # This one comes with the VICE emulator. # See http://vice-emu.sourceforge.net/ @@ -99,6 +117,9 @@ DISK_apple2 = samples.dsk DISK_apple2enh = samples.dsk DISK_atari = samples.atr DISK_atarixl = samples.atr +DISK_plus4 = samples.d64 +DISK_c65 = samples.d81 +DISK_mega65 = samples.d81 # -------------------------------------------------------------------------- # System-dependent settings @@ -145,8 +166,13 @@ LDFLAGS_tgidemo_atarixl = --start-addr 0x4000 .o: ifeq ($(SYS),vic20) + $(if $(QUIET),echo $(SYS):$@) $(LD) $(LDFLAGS_$(@F)_$(SYS)) $(LDFLAGS) -o $@ -C vic20-32k.cfg -m $@.map $^ $(SYS).lib +else ifeq ($(SYS),plus4) + $(if $(QUIET),echo $(SYS):$@) + $(LD) $(LDFLAGS_$(@F)_$(SYS)) $(LDFLAGS) -o $@ -C plus4-hires.cfg -m $@.map $^ $(SYS).lib else + $(if $(QUIET),echo $(SYS):$@) $(LD) $(LDFLAGS_$(@F)_$(SYS)) $(LDFLAGS) -o $@ -t $(SYS) -m $@.map $^ $(SYS).lib endif @@ -158,6 +184,11 @@ DIRLIST = tutorial geos atari2600 atari5200 apple2 gamate lynx supervision sym1 # -------------------------------------------------------------------------- # Lists of executables +EXELIST_agat = \ + ascii \ + checkversion \ + hello \ + sieve EXELIST_apple2 = \ ascii \ @@ -166,6 +197,7 @@ EXELIST_apple2 = \ enumdevdir \ gunzip65 \ hello \ + joydemo \ mandelbrot \ mousedemo \ multdemo \ @@ -199,10 +231,14 @@ EXELIST_atari2600 = \ EXELIST_atari5200 = \ notavailable +EXELIST_atari7800 = \ + notavailable + EXELIST_atmos = \ ascii \ checkversion \ hello \ + joydemo \ mandelbrot \ sieve \ terminal \ @@ -217,6 +253,7 @@ EXELIST_c64 = \ enumdevdir \ gunzip65 \ hello \ + joydemo \ mandelbrot \ mousedemo \ multdemo \ @@ -226,12 +263,22 @@ EXELIST_c64 = \ tinyshell \ tgidemo +EXELIST_c65 = \ + ascii \ + checkversion \ + enumdevdir \ + hello \ + joydemo \ + sieve \ + tinyshell + EXELIST_c128 = \ ascii \ checkversion \ enumdevdir \ gunzip65 \ hello \ + joydemo \ mandelbrot \ mousedemo \ sieve \ @@ -244,13 +291,15 @@ EXELIST_c16 = \ checkversion \ enumdevdir \ tinyshell \ - hello + hello \ + joydemo EXELIST_cbm510 = \ ascii \ checkversion \ gunzip65 \ hello \ + joydemo \ mousedemo \ terminal \ tinyshell \ @@ -275,6 +324,7 @@ EXELIST_cx16 = \ enumdevdir \ gunzip65 \ hello \ + joydemo \ mandelbrot \ mousedemo \ sieve \ @@ -285,9 +335,7 @@ EXELIST_gamate = \ hello EXELIST_geos-cbm = \ - ascii \ - checkversion \ - diodemo + ascii EXELIST_geos-apple = \ ascii @@ -298,20 +346,32 @@ EXELIST_lunix = \ EXELIST_lynx = \ notavailable +EXELIST_mega65 = \ + ascii \ + checkversion \ + enumdevdir \ + hello \ + joydemo \ + sieve \ + tinyshell + EXELIST_nes = \ - hello + hello \ + joydemo EXELIST_osic1p = \ notavailable EXELIST_pce = \ - hello + hello \ + joydemo EXELIST_pet = \ ascii \ checkversion \ enumdevdir \ hello \ + joydemo \ tinyshell \ sieve @@ -321,9 +381,12 @@ EXELIST_plus4 = \ enumdevdir \ gunzip65 \ hello \ + joydemo \ + mandelbrot \ terminal \ tinyshell \ - sieve + sieve \ + tgidemo EXELIST_sim6502 = \ checkversion \ @@ -331,6 +394,9 @@ EXELIST_sim6502 = \ EXELIST_sim65c02 = $(EXELIST_sim6502) +EXELIST_rp6502 = \ + notavailable + EXELIST_supervision = \ notavailable @@ -345,6 +411,7 @@ EXELIST_telestrat = \ checkversion \ gunzip65 \ hello \ + joydemo \ mandelbrot \ sieve \ tgidemo @@ -354,6 +421,7 @@ EXELIST_vic20 = \ checkversion \ enumdevdir \ hello \ + joydemo \ mandelbrot \ sieve \ tgidemo @@ -367,7 +435,7 @@ endif define SUBDIR_recipe -@+$(MAKE) -C $(dir) --no-print-directory $@ +@+$(MAKE) -C $(dir) $(PD) $@ $(PQ) endef # SUBDIR_recipe @@ -390,30 +458,37 @@ all: # -------------------------------------------------------------------------- # List of every supported platform TARGETS := \ + agat \ apple2 \ apple2enh \ atari \ atarixl \ atari2600 \ atari5200 \ + atari7800 \ atmos \ bbc \ c128 \ c16 \ c64 \ + c65 \ cbm510 \ cbm610 \ creativision \ cx16 \ gamate \ + geos-apple \ + geos-cbm \ kim1 \ lunix \ lynx \ + mega65 \ nes \ osic1p \ pce \ pet \ plus4 \ + rp6502 \ sim6502 \ sim65c02 \ supervision \ @@ -421,19 +496,27 @@ TARGETS := \ telestrat \ vic20 + # -------------------------------------------------------------------------- # Rule to make the binaries for every platform +define TARGETDIR_recipe + +@+$(MAKE) -C $(dir) $(PD) $(PQ) + +endef # TARGETDIR_recipe + define TARGET_recipe @echo making samples for: $(T) -@$(MAKE) -j2 SYS:=$(T) -@$(MAKE) --no-print-directory clean SYS:=$(T) +@$(MAKE) -j2 SYS:=$(T) $(PQ) +@$(MAKE) $(PD) clean SYS:=$(T) $(PQ) endef # TARGET_recipe platforms: $(foreach T,$(TARGETS),$(TARGET_recipe)) + $(foreach dir,$(DIRLIST),$(TARGETDIR_recipe)) # -------------------------------------------------------------------------- # Overlay rules. Overlays need special ld65 configuration files. Also, the @@ -445,7 +528,15 @@ multdemo: multidemo.o ovrldemo: overlaydemo.o $(LD) $(LDFLAGS) -o $@ -C $(SYS)-overlay.cfg -m $@.map $^ $(SYS).lib -OVERLAYLIST := $(foreach I,1 2 3,multdemo.$I ovrldemo.$I) +OVERLAYLIST := + +ifneq ($(filter ovrldemo,$(EXELIST_$(SYS))),) +OVERLAYLIST += $(foreach I,1 2 3,ovrldemo.$I) +endif + +ifneq ($(filter multdemo,$(EXELIST_$(SYS))),) +OVERLAYLIST += $(foreach I,1 2 3,multdemo.$I) +endif # -------------------------------------------------------------------------- # TGI programs on the VIC-20 need a special ld65 configuration file. @@ -498,7 +589,13 @@ samples.d64: samples @$(C1541) -format "samples,00" d64 $@ >$(NULLDEV) $(foreach file,$(EXELIST_$(SYS)),$(D64_WRITE_PRG_recipe)) $(foreach file,$(OVERLAYLIST),$(D64_WRITE_PRG_recipe)) - $(foreach file,$(EMD) $(MOU) $(TGI),$(D64_WRITE_SEQ_recipe)) + $(foreach file,$(EMD) $(MOU) $(JOY) $(TGI),$(D64_WRITE_SEQ_recipe)) + +samples.d81: samples + @$(C1541) -format "samples,00" d81 $@ >$(NULLDEV) + $(foreach file,$(EXELIST_$(SYS)),$(D64_WRITE_PRG_recipe)) + $(foreach file,$(OVERLAYLIST),$(D64_WRITE_PRG_recipe)) + $(foreach file,$(EMD) $(MOU) $(JOY) $(TGI),$(D64_WRITE_SEQ_recipe)) # -------------------------------------------------------------------------- # Rule to make an Apple II disk with all samples. Needs the AppleCommander @@ -523,7 +620,7 @@ samples.dsk: samples cp prodos.dsk $@ $(foreach file,$(EXELIST_$(SYS)),$(DSK_WRITE_BIN_recipe)) $(foreach file,$(OVERLAYLIST),$(DSK_WRITE_REL_recipe)) - $(foreach file,$(EMD) $(MOU) $(TGI),$(DSK_WRITE_REL_recipe)) + $(foreach file,$(EMD) $(MOU) $(JOY) $(TGI),$(DSK_WRITE_REL_recipe)) # -------------------------------------------------------------------------- # Rule to make an Atari disk with all samples. Needs the dir2atr program @@ -542,7 +639,7 @@ samples.atr: samples cp "dup.sys" atr/dup.sys @$(foreach file,$(EXELIST_$(SYS)),$(ATR_WRITE_recipe)) @$(foreach file,$(OVERLAYLIST),$(ATR_WRITE_recipe)) - @$(foreach file,$(EMD) $(MOU) $(TGI),$(ATR_WRITE_recipe)) + @$(foreach file,$(EMD) $(MOU) $(JOY) $(TGI),$(ATR_WRITE_recipe)) $(DIR2ATR) -d -b MyDos4534 3200 $@ atr @$(RMDIR) atr diff --git a/samples/apple2/Makefile b/samples/apple2/Makefile index 55e84aed6..1f39296de 100644 --- a/samples/apple2/Makefile +++ b/samples/apple2/Makefile @@ -1,3 +1,9 @@ +# ---- Display info during parsing phase ---- +SILENT:=$(findstring s,$(word 1, $(MAKEFLAGS))) +ifneq ($(SILENT),s) + $(info Using Makefile: $(realpath $(firstword $(MAKEFILE_LIST))) $(MAKECMDGOALS)) +endif + # Run 'make SYS=<target>'; or, set a SYS env. # var. to build for another target system. @@ -34,6 +40,14 @@ else LD := $(if $(wildcard ../../bin/ld65*),../../bin/ld65,ld65) endif +ifeq ($(SILENT),s) + QUIET = 1 +endif + +ifdef QUIET + .SILENT: +endif + EXELIST_apple2 = \ hgrshow \ hgrtest \ @@ -57,6 +71,7 @@ endif disk: hgr.dsk dhgr.dsk hgr.dsk: hgrshow hgrtest + $(if $(QUIET),echo $(SYS):$@) cp prodos.dsk $@ java -jar $(AC) -as $@ hgrshow <hgrshow java -jar $(AC) -as $@ hgrtest <hgrtest @@ -69,12 +84,15 @@ hgr.dsk: hgrshow hgrtest java -jar $(AC) -p $@ winston.hgr bin 0x2000 <winston.hgr hgrshow: hgrshow.c + $(if $(QUIET),echo $(SYS):$@) $(CL) -Oirs -t apple2 --start-addr 0x4000 -m hgrshow.map $^ hgrtest: hgrtest.c werner.s + $(if $(QUIET),echo $(SYS):$@) $(CL) -Oirs -t apple2 -C apple2-hgr.cfg -m hgrtest.map $^ dhgr.dsk: dhgrshow + $(if $(QUIET),echo $(SYS):$@) cp prodos.dsk $@ java -jar $(AC) -as $@ dhgrshow <dhgrshow java -jar $(AC) -p $@ catface.dhgr bin 0x2000 <catface.dhgr @@ -85,6 +103,7 @@ dhgr.dsk: dhgrshow java -jar $(AC) -p $@ venice.dhgr bin 0x2000 <venice.dhgr dhgrshow: dhgrshow.c + $(if $(QUIET),echo $(SYS):$@) $(CL) -Oirs -t apple2enh --start-addr 0x4000 -m dhgrshow.map $^ clean: diff --git a/samples/atari2600/Makefile b/samples/atari2600/Makefile index bd2ebc41a..1573425e8 100644 --- a/samples/atari2600/Makefile +++ b/samples/atari2600/Makefile @@ -1,3 +1,9 @@ +# ---- Display info during parsing phase ---- +SILENT:=$(findstring s,$(word 1, $(MAKEFLAGS))) +ifneq ($(SILENT),s) + $(info Using Makefile: $(realpath $(firstword $(MAKEFILE_LIST))) $(MAKECMDGOALS)) +endif + # Run 'make SYS=<target>'; or, set a SYS env. # var. to build for another target system. @@ -33,6 +39,14 @@ else SP := $(if $(wildcard ../../bin/sp65*),../../bin/sp65,sp65) endif +ifeq ($(SILENT),s) + QUIET = 1 +endif + +ifdef QUIET + .SILENT: +endif + EXELIST_atari2600 = \ hello @@ -52,6 +66,7 @@ else endif hello: hello.c + $(if $(QUIET),echo $(SYS):$@) $(CL) -t $(SYS) -O -o hello -m hello.map hello.c clean: diff --git a/samples/atari5200/Makefile b/samples/atari5200/Makefile index 2fbda11d9..4ef0b07e4 100644 --- a/samples/atari5200/Makefile +++ b/samples/atari5200/Makefile @@ -1,3 +1,9 @@ +# ---- Display info during parsing phase ---- +SILENT:=$(findstring s,$(word 1, $(MAKEFLAGS))) +ifneq ($(SILENT),s) + $(info Using Makefile: $(realpath $(firstword $(MAKEFILE_LIST))) $(MAKECMDGOALS)) +endif + # Run 'make SYS=<target>'; or, set a SYS env. # var. to build for another target system. @@ -31,6 +37,14 @@ else LD := $(if $(wildcard ../../bin/ld65*),../../bin/ld65,ld65) endif +ifeq ($(SILENT),s) + QUIET = 1 +endif + +ifdef QUIET + .SILENT: +endif + EXELIST_atari5200 = \ hello @@ -50,6 +64,7 @@ else endif hello: hello.c + $(if $(QUIET),echo $(SYS):$@) $(CL) -t atari5200 -o hello hello.c clean: diff --git a/samples/cbm/Makefile b/samples/cbm/Makefile index 4b89722d2..e76ea1769 100644 --- a/samples/cbm/Makefile +++ b/samples/cbm/Makefile @@ -1,3 +1,9 @@ +# ---- Display info during parsing phase ---- +SILENT:=$(findstring s,$(word 1, $(MAKEFLAGS))) +ifneq ($(SILENT),s) + $(info Using Makefile: $(realpath $(firstword $(MAKEFILE_LIST))) $(MAKECMDGOALS)) +endif + # Run 'make SYS=<target>'; or, set a SYS env. # var. to build for another target system. @@ -33,6 +39,14 @@ else SP := $(if $(wildcard ../../bin/sp65*),../../bin/sp65,sp65) endif +ifeq ($(SILENT),s) + QUIET = 1 +endif + +ifdef QUIET + .SILENT: +endif + ifneq ($(filter disk samples.%,$(MAKECMDGOALS)),) ifdef CC65_HOME TARGET_PATH = $(CC65_HOME)/target @@ -133,12 +147,16 @@ else endif fire: fire.c + $(if $(QUIET),echo $(SYS):$@) $(CL) -t $(SYS) -O -o fire -m fire.map fire.c plasma: plasma.c + $(if $(QUIET),echo $(SYS):$@) $(CL) -t $(SYS) -O -o plasma -m plasma.map plasma.c nachtm: nachtm.c + $(if $(QUIET),echo $(SYS):$@) $(CL) -t $(SYS) -O -o nachtm -m nachtm.map nachtm.c hello: hello-asm.s + $(if $(QUIET),echo $(SYS):$@) # Use separate assembler ... $(AS) -t $(SYS) hello-asm.s # ... and linker commands ... @@ -165,6 +183,7 @@ $(C1541) -attach $@ -write "$(subst ?,$(SPACE),$(file))" $(notdir $(file)),s >$( endef # D64_WRITE_SEQ_recipe samples.d64: samples + $(if $(QUIET),echo $(SYS):$@) @$(C1541) -format "samples,00" d64 $@ >$(NULLDEV) $(foreach file,$(EXELIST_$(SYS)),$(D64_WRITE_PRG_recipe)) # $(foreach file,$(OVERLAYLIST),$(D64_WRITE_PRG_recipe)) diff --git a/samples/checkversion.c b/samples/checkversion.c index f2a9d4a49..0e2359f91 100644 --- a/samples/checkversion.c +++ b/samples/checkversion.c @@ -9,6 +9,7 @@ #include <stdio.h> #include <stdlib.h> +#include <sys/utsname.h> #if ((__CC65__ >> 8) > 3) || ((__CC65__ & 0x000f) > 0) /* compiler version is 2.19-git or higher */ @@ -29,12 +30,25 @@ int main(void) { +#if !defined(__SIM6502__) && !defined(__SIM65C02__) && !defined(__AGAT__) + struct utsname buf; + uname (&buf); + + printf("utsname.sysname: %s\n", buf.sysname); + printf("utsname.nodename: %s\n", buf.nodename); + printf("utsname.release: %s\n", buf.release); + printf("utsname.version: %s\n", buf.version); + printf("utsname.machine: %s\n", buf.machine); +#endif + printf("__CC65__ defined as %04x\n", __CC65__); printf("compiler version is %u.%u\n", VER_MAJOR, VER_MINOR); +#pragma warn (const-comparison, push, off) if (__CC65__ == VERSION) { printf("__CC65__ is defined correctly as (VER_MAJOR * 0x100) + VER_MINOR\n"); return EXIT_SUCCESS; } +#pragma warn (const-comparison, pop) printf("__CC65__ is incorrectly defined as (VER_MAJOR * 0x100) + (VER_MINOR * 0x10)\n"); return EXIT_FAILURE; } diff --git a/samples/diodemo.c b/samples/diodemo.c index 3e52f2fa9..46656246d 100644 --- a/samples/diodemo.c +++ b/samples/diodemo.c @@ -30,6 +30,7 @@ +#define DYN_BOX_DRAW #include <stddef.h> #include <stdlib.h> #include <limits.h> diff --git a/samples/disasm/Makefile b/samples/disasm/Makefile index f1d93f5da..df883fa7c 100644 --- a/samples/disasm/Makefile +++ b/samples/disasm/Makefile @@ -1,3 +1,9 @@ +# ---- Display info during parsing phase ---- +SILENT:=$(findstring s,$(word 1, $(MAKEFLAGS))) +ifneq ($(SILENT),s) + $(info Using Makefile: $(realpath $(firstword $(MAKEFILE_LIST))) $(MAKECMDGOALS)) +endif + # Sample makefile using a preprocessor against info files # and the --sync-lines option @@ -31,6 +37,14 @@ else DA := $(if $(wildcard ../../bin/da65*),../../bin/da65,da65) endif +ifeq ($(SILENT),s) + QUIET = 1 +endif + +ifdef QUIET + .SILENT: +endif + CPP = cpp #CPPFLAGS = -DTEST_ERROR @@ -50,6 +64,7 @@ $(DAIS): fixed.da $(DA) --sync-lines -o $@ -i $< image.bin image.bin: image.s image.cfg + $(if $(QUIET),echo $(SYS):$@) $(CL) -t none -C image.cfg -o image.bin image.s clean: diff --git a/samples/gamate/Makefile b/samples/gamate/Makefile index cfb8505cc..4f20f047a 100644 --- a/samples/gamate/Makefile +++ b/samples/gamate/Makefile @@ -1,3 +1,9 @@ +# ---- Display info during parsing phase ---- +SILENT:=$(findstring s,$(word 1, $(MAKEFLAGS))) +ifneq ($(SILENT),s) + $(info Using Makefile: $(realpath $(firstword $(MAKEFILE_LIST))) $(MAKECMDGOALS)) +endif + # Run 'make SYS=<target>'; or, set a SYS env. # var. to build for another target system. @@ -31,6 +37,14 @@ else LD := $(if $(wildcard ../../bin/ld65*),../../bin/ld65,ld65) endif +ifeq ($(SILENT),s) + QUIET = 1 +endif + +ifdef QUIET + .SILENT: +endif + EXELIST_gamate = \ nachtm.bin @@ -50,6 +64,7 @@ else endif nachtm.bin: nachtm.c + $(if $(QUIET),echo $(SYS):$@) $(CL) -Os -l nachtm.lst -t gamate -o nachtm.bin nachtm.c ../../util/gamate/gamate-fixcart nachtm.bin diff --git a/samples/geos/Makefile b/samples/geos/Makefile index 578927760..0ede7e78c 100644 --- a/samples/geos/Makefile +++ b/samples/geos/Makefile @@ -1,3 +1,9 @@ +# ---- Display info during parsing phase ---- +SILENT:=$(findstring s,$(word 1, $(MAKEFLAGS))) +ifneq ($(SILENT),s) + $(info Using Makefile: $(realpath $(firstword $(MAKEFILE_LIST))) $(MAKECMDGOALS)) +endif + # Run 'make SYS=<target>'; or, set a SYS env. # var. to build for another target system. @@ -11,11 +17,15 @@ C1541 ?= c1541 ifeq ($(origin SYS),command line) ifeq ($(SYS),c64) override SYS = geos-cbm - $(info GEOS: c64 -> geos-cbm) + ifneq ($(SILENT),s) + $(info GEOS: c64 -> geos-cbm) + endif endif ifeq ($(SYS),apple2enh) override SYS = geos-apple - $(info GEOS: apple2enh -> geos-apple) + ifneq ($(SILENT),s) + $(info GEOS: apple2enh -> geos-apple) + endif endif endif @@ -49,6 +59,14 @@ else SP := $(if $(wildcard ../../bin/sp65*),../../bin/sp65,sp65) endif +ifeq ($(SILENT),s) + QUIET = 1 +endif + +ifdef QUIET + .SILENT: +endif + DIRLIST = grc define SUBDIR_recipe @@ -105,36 +123,47 @@ bitmap.c: logo.pcx $(SP) -r logo.pcx -c geos-bitmap -w bitmap.c,ident=bitmap bitmap-demo.cvt: bitmap.c bitmap-demores.grc bitmap-demo.c + $(if $(QUIET),echo $(SYS):$@) $(CL) -t $(SYS) -O -o $@ -m bitmap-demo.map bitmap-demores.grc bitmap-demo.c filesel.cvt: fileselres.grc filesel.c + $(if $(QUIET),echo $(SYS):$@) $(CL) -t $(SYS) -O -o $@ -m filesel.map fileselres.grc filesel.c geosconio.cvt: geosconiores.grc geosconio.c + $(if $(QUIET),echo $(SYS):$@) $(CL) -t $(SYS) -O -o $@ -m geosconio.map geosconiores.grc geosconio.c geosver.cvt: geosverres.grc geosver.c + $(if $(QUIET),echo $(SYS):$@) $(CL) -t $(SYS) -O -o $@ -m geosver.map geosverres.grc geosver.c getid.cvt: getidres.grc getid.c + $(if $(QUIET),echo $(SYS):$@) $(CL) -t $(SYS) -O -o $@ -m getid.map getidres.grc getid.c hello1.cvt: hello1res.grc hello1.c + $(if $(QUIET),echo $(SYS):$@) $(CL) -t $(SYS) -O -o $@ -m hello1.map hello1res.grc hello1.c hello2.cvt: hello2res.grc hello2.c + $(if $(QUIET),echo $(SYS):$@) $(CL) -t $(SYS) -O -o $@ -m hello2.map hello2res.grc hello2.c overlay-demo.cvt: overlay-demores.grc overlay-demo.c + $(if $(QUIET),echo $(SYS):$@) $(CL) -t $(SYS) -O -o $@ -m overlay-demo.map overlay-demores.grc overlay-demo.c rmvprot.cvt: rmvprotres.grc rmvprot.c + $(if $(QUIET),echo $(SYS):$@) $(CL) -t $(SYS) -O -o $@ -m rmvprot.map rmvprotres.grc rmvprot.c vector-demo.cvt: vector-demores.grc vector-demo.c + $(if $(QUIET),echo $(SYS):$@) $(CL) -t $(SYS) -O -o $@ -m vector-demo.map vector-demores.grc vector-demo.c yesno.cvt: yesnores.grc yesno.c + $(if $(QUIET),echo $(SYS):$@) $(CL) -t $(SYS) -O -o $@ -m yesno.map yesnores.grc yesno.c diff --git a/samples/geos/grc/Makefile b/samples/geos/grc/Makefile index ef30a6e03..101d501e8 100644 --- a/samples/geos/grc/Makefile +++ b/samples/geos/grc/Makefile @@ -1,3 +1,9 @@ +# ---- Display info during parsing phase ---- +SILENT:=$(findstring s,$(word 1, $(MAKEFLAGS))) +ifneq ($(SILENT),s) + $(info Using Makefile: $(realpath $(firstword $(MAKEFILE_LIST))) $(MAKECMDGOALS)) +endif + # Run 'make SYS=<target>'; or, set a SYS env. # var. to build for another target system. @@ -33,6 +39,14 @@ else GRC := $(if $(wildcard ../../../bin/grc65*),../../../bin/grc65,grc65) endif +ifeq ($(SILENT),s) + QUIET = 1 +endif + +ifdef QUIET + .SILENT: +endif + EXELIST_geos-cbm = \ test.s \ vlir.cvt @@ -50,9 +64,11 @@ samples: endif test.s: test.grc + $(if $(QUIET),echo $(SYS):$@) $(GRC) -s test.s test.grc vlir.cvt: vlir.grc vlir0.s vlir1.s vlir2.s + $(if $(QUIET),echo $(SYS):$@) # using separate calls here for demonstration purposes: $(GRC) -t $(SYS) -s vlir.s vlir.grc $(AS) -t $(SYS) vlir.s diff --git a/samples/getsp.s b/samples/getsp.s index 9f169dc0b..95db689f4 100644 --- a/samples/getsp.s +++ b/samples/getsp.s @@ -1,11 +1,11 @@ .export _getsp - .importzp sp + .importzp c_sp .proc _getsp - ldx sp+1 - lda sp + ldx c_sp+1 + lda c_sp rts .endproc diff --git a/samples/hello.c b/samples/hello.c index 255dccd00..2eac0d8bb 100644 --- a/samples/hello.c +++ b/samples/hello.c @@ -7,6 +7,7 @@ +#define DYN_BOX_DRAW #include <stdlib.h> #include <string.h> #include <conio.h> diff --git a/samples/joydemo.c b/samples/joydemo.c new file mode 100644 index 000000000..7375f23d3 --- /dev/null +++ b/samples/joydemo.c @@ -0,0 +1,96 @@ + +#include <stdlib.h> +#include <stdio.h> +#include <joystick.h> + +/* define 0 to link the standard driver statically */ +/* #define DYN_DRV 0 */ + +#ifndef DYN_DRV +# define DYN_DRV 1 +#endif + +#define USECONIO + +#ifdef USECONIO +#include <conio.h> +#define PRINTF cprintf +#define CR "\n\r" +#else +#define PRINTF printf +#define CR "\n" +#endif + +int main (void) +{ + unsigned char num_joy; + unsigned char raw_value; + unsigned char i; +#if DYN_DRV + unsigned char err; +#endif +#ifdef USECONIO + unsigned char y; + clrscr(); +#endif + PRINTF("Driver init..." CR); + +#if DYN_DRV + /* Load and initialize the standard driver driver */ + if ((err = joy_load_driver (joy_stddrv))) { + PRINTF ("Driver load error (code %d)." CR + "Warning: This program needs the JOY" CR + "driver on disk!" CR, err); + exit (EXIT_FAILURE); + } + PRINTF("Driver loaded OK" CR); +#else + /* Install the standard driver */ + joy_install (joy_static_stddrv); +#endif + + num_joy = joy_count(); + + PRINTF("Driver reported %d joysticks." CR "waiting for input..." CR, num_joy); + + /* wait for something to happen on any joystick input */ + { + unsigned char wait = 1; + while (wait) { + for (i = 0; i < num_joy; ++i) { + raw_value = joy_read(i); + if (raw_value) { + wait = 0; + break; + } + } + } + } + + /* read all joysticks and print the raw value(s) */ +#ifdef USECONIO + y = wherey(); +#endif + while (1) { +#ifdef USECONIO + gotoxy(0, y); +#endif + for (i = 0; i < num_joy; ++i) { + raw_value = joy_read(i); + PRINTF("%02x ", raw_value); + } + PRINTF(CR); + } + +#if DYN_DRV + /* Unload the driver */ + joy_unload (); +#else + /* Uninstall the driver */ + joy_uninstall (); +#endif + + /* Done */ + PRINTF ("Done" CR); + return EXIT_SUCCESS; +} diff --git a/samples/kim1/Makefile b/samples/kim1/Makefile index 08bb2a780..eca7d6524 100644 --- a/samples/kim1/Makefile +++ b/samples/kim1/Makefile @@ -1,3 +1,9 @@ +# ---- Display info during parsing phase ---- +SILENT:=$(findstring s,$(word 1, $(MAKEFLAGS))) +ifneq ($(SILENT),s) + $(info Using Makefile: $(realpath $(firstword $(MAKEFILE_LIST))) $(MAKECMDGOALS)) +endif + # Run 'make SYS=<target>'; or, set a SYS env. # var. to build for another target system. @@ -31,6 +37,14 @@ else LD := $(if $(wildcard ../../bin/ld65*),../../bin/ld65,ld65) endif +ifeq ($(SILENT),s) + QUIET = 1 +endif + +ifdef QUIET + .SILENT: +endif + EXELIST_kim1 = \ kimHello.bin \ kimSieve.bin \ @@ -60,40 +74,51 @@ ramfont.o: ramfont.asm $(AS) ramfont.asm -o ramfont.o kimLife.bin: kimLife.c + $(if $(QUIET),echo $(SYS):$@) $(CL) -t kim1 -C kim1-60k.cfg -Oi -o kimLife.bin kimLife.c kimTest.bin: kimTest.c + $(if $(QUIET),echo $(SYS):$@) $(CL) -t kim1 -C kim1-60k.cfg -Oi -o kimTest.bin kimTest.c kimGFX.bin: kimGFX.c subs.o ramfont.o + $(if $(QUIET),echo $(SYS):$@) $(CL) -t kim1 --listing kimGFX.lst -C kim1-mtuE000.cfg -o kimGFX.bin kimGFX.c subs.o ramfont.o -Ln kimgfx.lbl kimSieve.bin: kimSieve.c + $(if $(QUIET),echo $(SYS):$@) $(CL) -t kim1 -C kim1-60k.cfg -O -o kimSieve.bin kimSieve.c kimHello.bin: kimHello.c + $(if $(QUIET),echo $(SYS):$@) $(CL) -t kim1 -O -o kimHello.bin kimHello.c # To build an intel-format file for the CORSHAM SD card reader kimLife.hex: kimLife.bin + $(if $(QUIET),echo $(SYS):$@) srec_cat kimLife.bin -binary -offset 0x2000 -o kimLife.hex -Intel -address-length=2 kimTest.hex: kimTest.bin + $(if $(QUIET),echo $(SYS):$@) srec_cat kimTest.bin -binary -offset 0x2000 -o kimTest.hex -Intel -address-length=2 kimGFX.hex: kimGFX.bin ramfont.o + $(if $(QUIET),echo $(SYS):$@) srec_cat kimGFX.bin -binary -offset 0x2000 -o kimGFX.hex -Intel -address-length=2 # To build a paper tape file for uploading to the KIM-1 via terminal kimLife.ptp: kimLife.bin + $(if $(QUIET),echo $(SYS):$@) srec_cat kimLife.bin -binary -offset 0x2000 -o kimLife.ptp -MOS_Technologies kimGFX.ptp: kimGFX.bin + $(if $(QUIET),echo $(SYS):$@) srec_cat kimGFX.bin -binary -offset 0x2000 -o kimGFX.ptp -MOS_Technologies kimTest.ptp: kimTest.bin + $(if $(QUIET),echo $(SYS):$@) srec_cat kimTest.bin -binary -offset 0x2000 -o kimTest.ptp -MOS_Technologies clean: diff --git a/samples/lynx/Makefile b/samples/lynx/Makefile index b4ef64af0..e27d5801a 100644 --- a/samples/lynx/Makefile +++ b/samples/lynx/Makefile @@ -1,3 +1,9 @@ +# ---- Display info during parsing phase ---- +SILENT:=$(findstring s,$(word 1, $(MAKEFLAGS))) +ifneq ($(SILENT),s) + $(info Using Makefile: $(realpath $(firstword $(MAKEFILE_LIST))) $(MAKECMDGOALS)) +endif + # Run 'make SYS=<target>'; or, set a SYS env. # var. to build for another target system. @@ -29,6 +35,14 @@ else LD := $(if $(wildcard ../../bin/ld65*),../../bin/ld65,ld65) endif +ifeq ($(SILENT),s) + QUIET = 1 +endif + +ifdef QUIET + .SILENT: +endif + EXELIST_lynx = \ hello.lnx \ mandelbrot.lnx \ @@ -53,6 +67,7 @@ endif .SUFFIXES: .c .lnx %.lnx : %.c + $(if $(QUIET),echo $(SYS):$@) $(CL) -t $(SYS) -Oris -m $*.map -o $@ $< clean: diff --git a/samples/sieve.c b/samples/sieve.c index 7c3b9cd75..5ffc97b62 100644 --- a/samples/sieve.c +++ b/samples/sieve.c @@ -12,7 +12,7 @@ /* Workaround missing clock stuff */ -#ifdef __APPLE2__ +#if defined(__APPLE2__) || defined(__AGAT__) # define clock() 0 # define CLOCKS_PER_SEC 1 #endif diff --git a/samples/sim65/Makefile b/samples/sim65/Makefile index 865594736..43783afca 100644 --- a/samples/sim65/Makefile +++ b/samples/sim65/Makefile @@ -1,3 +1,9 @@ +# ---- Display info during parsing phase ---- +SILENT:=$(findstring s,$(word 1, $(MAKEFLAGS))) +ifneq ($(SILENT),s) + $(info Using Makefile: $(realpath $(firstword $(MAKEFILE_LIST))) $(MAKECMDGOALS)) +endif + # Run 'make SYS=<target>'; or, set a SYS env. # var. to build for another target system. @@ -31,6 +37,14 @@ else LD := $(if $(wildcard ../../bin/ld65*),../../bin/ld65,ld65) endif +ifeq ($(SILENT),s) + QUIET = 1 +endif + +ifdef QUIET + .SILENT: +endif + EXELIST_sim6502 = \ cpumode_example.bin \ timer_example.bin \ @@ -55,6 +69,7 @@ endif .SUFFIXES: .c .bin %.bin : %.c + $(if $(QUIET),echo $(SYS):$@) $(CL) -t $(SYS) -Oris -m $*.map -o $@ $< clean: diff --git a/samples/supervision/Makefile b/samples/supervision/Makefile index 097329384..cae5885ff 100644 --- a/samples/supervision/Makefile +++ b/samples/supervision/Makefile @@ -1,3 +1,9 @@ +# ---- Display info during parsing phase ---- +SILENT:=$(findstring s,$(word 1, $(MAKEFLAGS))) +ifneq ($(SILENT),s) + $(info Using Makefile: $(realpath $(firstword $(MAKEFILE_LIST))) $(MAKECMDGOALS)) +endif + # Run 'make SYS=<target>'; or, set a SYS env. # var. to build for another target system. @@ -33,6 +39,14 @@ else SP := $(if $(wildcard ../../bin/sp65*),../../bin/sp65,sp65) endif +ifeq ($(SILENT),s) + QUIET = 1 +endif + +ifdef QUIET + .SILENT: +endif + EXELIST_supervision = \ hello @@ -52,6 +66,7 @@ else endif hello: hello.c + $(if $(QUIET),echo $(SYS):$@) $(CL) -t $(SYS) -O -o hello -m hello.map hello.c clean: diff --git a/samples/sym1/Makefile b/samples/sym1/Makefile index 281b5bcd0..a5b2e35b5 100644 --- a/samples/sym1/Makefile +++ b/samples/sym1/Makefile @@ -1,3 +1,9 @@ +# ---- Display info during parsing phase ---- +SILENT:=$(findstring s,$(word 1, $(MAKEFLAGS))) +ifneq ($(SILENT),s) + $(info Using Makefile: $(realpath $(firstword $(MAKEFILE_LIST))) $(MAKECMDGOALS)) +endif + # Run 'make SYS=<target>'; or, set a SYS env. # var. to build for another target system. @@ -31,6 +37,14 @@ else LD := $(if $(wildcard ../../bin/ld65*),../../bin/ld65,ld65) endif +ifeq ($(SILENT),s) + QUIET = 1 +endif + +ifdef QUIET + .SILENT: +endif + EXELIST_sym1 = \ symHello.bin symTiny.bin symDisplay.bin symIO.bin symNotepad.bin symExtendedMemory.bin @@ -50,21 +64,27 @@ else endif symHello.bin: symHello.c + $(if $(QUIET),echo $(SYS):$@) $(CL) -t sym1 -O -o symHello.bin symHello.c symTiny.bin: symTiny.c + $(if $(QUIET),echo $(SYS):$@) $(CL) -t sym1 -O -o symTiny.bin symTiny.c symDisplay.bin: symDisplay.c + $(if $(QUIET),echo $(SYS):$@) $(CL) -t sym1 -O -o symDisplay.bin symDisplay.c symIO.bin: symIO.c + $(if $(QUIET),echo $(SYS):$@) $(CL) -t sym1 -C sym1-32k.cfg -O -o symIO.bin symIO.c symNotepad.bin: symNotepad.c + $(if $(QUIET),echo $(SYS):$@) $(CL) -t sym1 -C sym1-32k.cfg -O -o symNotepad.bin symNotepad.c symExtendedMemory.bin: symExtendedMemory.c + $(if $(QUIET),echo $(SYS):$@) $(CL) -t sym1 -C sym1-32k.cfg -O -o symExtendedMemory.bin symExtendedMemory.c diff --git a/samples/tgidemo.c b/samples/tgidemo.c index f193a1b83..cdb4c3ad9 100644 --- a/samples/tgidemo.c +++ b/samples/tgidemo.c @@ -12,8 +12,10 @@ # define DYN_DRV 1 #endif -#define COLOR_BACK TGI_COLOR_BLACK -#define COLOR_FORE TGI_COLOR_WHITE + +/* Color values passed to TGI functions are indices into the default palette. */ +#define COLOR_BACK 0 +#define COLOR_FORE 1 /*****************************************************************************/ @@ -65,17 +67,39 @@ static void DoWarning (void) #endif +/* + * Note that everywhere else in the TGI API, colors are referred to via an index + * to the current palette. + * + * TGI_COLOR_ values can be used (ONLY!) for setting the palette, using them + * with other TGI functions only works by chance, on some targets. + */ +static void DoPalette (int n) +{ + static const unsigned char Palette[4][2] = { +/* FIXME: add some ifdefs with proper values for targets that need it */ +#if !defined(__APPLE2__) + { TGI_COLOR_BLACK, TGI_COLOR_BLUE }, + { TGI_COLOR_WHITE, TGI_COLOR_BLACK }, + { TGI_COLOR_RED, TGI_COLOR_BLACK }, +#else + { TGI_COLOR_WHITE, TGI_COLOR_BLACK }, + { TGI_COLOR_BLACK, TGI_COLOR_WHITE }, + { TGI_COLOR_WHITE, TGI_COLOR_BLACK }, +#endif + }; + tgi_setpalette (Palette[n]); +} + static void DoCircles (void) { - static const unsigned char Palette[2] = { TGI_COLOR_WHITE, TGI_COLOR_BLUE }; unsigned char I; unsigned char Color = COLOR_BACK; const unsigned X = MaxX / 2; const unsigned Y = MaxY / 2; const unsigned Limit = (X < Y) ? Y : X; - tgi_setpalette (Palette); tgi_setcolor (COLOR_FORE); tgi_clear (); tgi_line (0, 0, MaxX, MaxY); @@ -87,7 +111,9 @@ static void DoCircles (void) tgi_ellipse (X, Y, I, tgi_imulround (I, AspectRatio)); } } - + while (kbhit ()) { + cgetc (); + } cgetc (); } @@ -95,11 +121,9 @@ static void DoCircles (void) static void DoCheckerboard (void) { - static const unsigned char Palette[2] = { TGI_COLOR_WHITE, TGI_COLOR_BLACK }; unsigned X, Y; unsigned char Color = COLOR_BACK; - tgi_setpalette (Palette); tgi_clear (); while (1) { @@ -123,13 +147,11 @@ static void DoCheckerboard (void) static void DoDiagram (void) { - static const unsigned char Palette[2] = { TGI_COLOR_WHITE, TGI_COLOR_BLACK }; int XOrigin, YOrigin; int Amp; int X, Y; unsigned I; - tgi_setpalette (Palette); tgi_setcolor (COLOR_FORE); tgi_clear (); @@ -160,6 +182,9 @@ static void DoDiagram (void) tgi_lineto (XOrigin + X, YOrigin + Y); } + while (kbhit ()) { + cgetc (); + } cgetc (); } @@ -167,11 +192,9 @@ static void DoDiagram (void) static void DoLines (void) { - static const unsigned char Palette[2] = { TGI_COLOR_WHITE, TGI_COLOR_BLACK }; unsigned X; const unsigned Min = (MaxX < MaxY) ? MaxX : MaxY; - tgi_setpalette (Palette); tgi_setcolor (COLOR_FORE); tgi_clear (); @@ -182,6 +205,9 @@ static void DoLines (void) tgi_line (Min, Min, Min-X, 0); } + while (kbhit ()) { + cgetc (); + } cgetc (); } @@ -216,10 +242,11 @@ int main (void) Border = bordercolor (COLOR_BLACK); /* Do graphics stuff */ - DoCircles (); - DoCheckerboard (); - DoDiagram (); - DoLines (); + + /* use default palette */ DoCircles (); + DoPalette (0); DoCheckerboard (); + DoPalette (1); DoDiagram (); + DoPalette (2); DoLines (); #if DYN_DRV /* Unload the driver */ diff --git a/samples/tinyshell.c b/samples/tinyshell.c index 71e9b56e3..a8d5340d9 100644 --- a/samples/tinyshell.c +++ b/samples/tinyshell.c @@ -112,17 +112,17 @@ static void get_command(void) #ifdef CHECK_SP static char firstcall = 1; static unsigned int good_sp; - unsigned int sp; + unsigned int c_sp; if (firstcall) - sp = good_sp = getsp(); + c_sp = good_sp = getsp(); else - sp = getsp(); + c_sp = getsp(); - if (sp != good_sp) { - printf("SP: 0x%04X ***MISMATCH*** 0x%04X\n", sp, good_sp); + if (c_sp != good_sp) { + printf("SP: 0x%04X ***MISMATCH*** 0x%04X\n", c_sp, good_sp); } else if (verbose) - printf("SP: 0x%04X\n", sp); + printf("SP: 0x%04X\n", c_sp); #endif arg1 = arg2 = arg3 = NULL; diff --git a/samples/tutorial/Makefile b/samples/tutorial/Makefile index eb8627c29..3c3d1edb9 100644 --- a/samples/tutorial/Makefile +++ b/samples/tutorial/Makefile @@ -1,3 +1,9 @@ +# ---- Display info during parsing phase ---- +SILENT:=$(findstring s,$(word 1, $(MAKEFLAGS))) +ifneq ($(SILENT),s) + $(info Using Makefile: $(realpath $(firstword $(MAKEFILE_LIST))) $(MAKECMDGOALS)) +endif + # Run 'make SYS=<target>'; or, set a SYS env. # var. to build for another target system. @@ -31,12 +37,23 @@ else LD := $(if $(wildcard ../../bin/ld65*),../../bin/ld65,ld65) endif +ifeq ($(SILENT),s) + QUIET = 1 +endif + +ifdef QUIET + .SILENT: +endif + EXELIST_atari2600 = \ notavailable EXELIST_atari5200 = \ notavailable +EXELIST_atari7800 = \ + notavailable + EXELIST_bbc = \ notavailable @@ -77,9 +94,12 @@ ifndef EXELIST_$(SYS) EXELIST_$(SYS) := ${patsubst %.c,%,$(wildcard *.c)} endif +all: samples + samples: $(EXELIST_$(SYS)) hello: hello.c text.s + $(if $(QUIET),echo $(SYS):$@) $(CL) -t $(SYS) -o hello hello.c text.s # empty target used to skip systems that will not work with any program in this dir diff --git a/src/Makefile b/src/Makefile index 034a2230f..366e50183 100644 --- a/src/Makefile +++ b/src/Makefile @@ -1,11 +1,11 @@ -ifneq ($(shell echo),) - CMD_EXE = 1 +# ---- Display info during parsing phase ---- +SILENT:=$(findstring s,$(word 1, $(MAKEFLAGS))) +ifneq ($(SILENT),s) + $(info Using Makefile: $(realpath $(firstword $(MAKEFILE_LIST))) $(MAKECMDGOALS)) endif -ifneq ($(V),1) - Q=@ -else - Q= +ifneq ($(shell echo),) + CMD_EXE = 1 endif PROGS = ar65 \ @@ -46,6 +46,21 @@ else RMDIR = $(RM) -r $1 endif +ifeq ($(SILENT),s) + QUIET = 1 + NULLOUT = >$(NULLDEV) + NULLERR = 2>$(NULLDEV) +endif + +ifdef QUIET + .SILENT: + PQ = "QUIET=1" + PD = --no-print-directory +ifndef CMD_EXE + CATERR = 2> ../wrk/common/$$@.errlog || (cat ../wrk/common/$$@.errlog && false) +endif +endif + CC = $(CROSS_COMPILE)gcc AR = $(CROSS_COMPILE)ar @@ -64,7 +79,10 @@ ifndef BUILD_ID BUILD_ID := N/A endif endif -$(info BUILD_ID: $(BUILD_ID)) + +ifneq ($(SILENT),s) + $(info BUILD_ID: $(BUILD_ID)) +endif CFLAGS += -MMD -MP -O3 -I common \ -Wall -Wextra -Wno-char-subscripts $(USER_CFLAGS) \ @@ -83,6 +101,11 @@ ifdef CROSS_COMPILE endif all bin: $(PROGS) +ifeq ($(MAKELEVEL),0) +ifndef PREFIX + $(warning Warning: PREFIX is empty - make install will not work) +endif +endif mostlyclean: $(call RMDIR,../wrk) @@ -155,8 +178,8 @@ $1: ../bin/$1$(EXE_SUFFIX) endef # PROG_template ../wrk/%.o: %.c - @echo $< - $(Q)$(CC) -c $(CFLAGS) -o $@ $< + $(if $(QUIET),echo CC:$@) + $(CC) -c $(CFLAGS) -o $@ $< ../bin: @$(call MKDIR,$@) @@ -164,8 +187,25 @@ endef # PROG_template $(eval $(call OBJS_template,common)) ../wrk/common/common.a: $(common_OBJS) - $(AR) r $@ $? + $(if $(QUIET),echo AR:$@) + $(AR) r $@ $? $(CATERR) $(foreach prog,$(PROGS),$(eval $(call PROG_template,$(prog)))) + +.PHONY: dbginfo dbgsh test + +test: dbginfo dbgsh + +$(eval $(call OBJS_template,dbginfo)) + +dbginfo: $(dbginfo_OBJS) + +../wrk/dbgsh$(EXE_SUFFIX): $(dbginfo_OBJS) ../wrk/common/common.a + $(if $(QUIET),echo LINK:$@) + $(CC) $(LDFLAGS) -o $@ $^ $(LDLIBS) + +dbgsh: ../wrk/dbgsh$(EXE_SUFFIX) + + -include $(DEPS) diff --git a/src/ca65/condasm.c b/src/ca65/condasm.c index f872ec9ed..7cd3310b3 100644 --- a/src/ca65/condasm.c +++ b/src/ca65/condasm.c @@ -394,6 +394,16 @@ void DoConditionals (void) CalcOverallIfCond (); break; + case TOK_IFP02X: + D = AllocIf (".IFP02X", 1); + NextTok (); + if (IfCond) { + SetIfCond (D, GetCPU() == CPU_6502X); + } + ExpectSep (); + CalcOverallIfCond (); + break; + case TOK_IFP4510: D = AllocIf (".IFP4510", 1); NextTok (); @@ -404,6 +414,26 @@ void DoConditionals (void) CalcOverallIfCond (); break; + case TOK_IFP45GS02: + D = AllocIf (".IFP45GS02", 1); + NextTok (); + if (IfCond) { + SetIfCond (D, GetCPU() == CPU_45GS02); + } + ExpectSep (); + CalcOverallIfCond (); + break; + + case TOK_IFP6280: + D = AllocIf (".IFP6280", 1); + NextTok (); + if (IfCond) { + SetIfCond (D, GetCPU() == CPU_HUC6280); + } + ExpectSep (); + CalcOverallIfCond (); + break; + case TOK_IFP816: D = AllocIf (".IFP816", 1); NextTok (); @@ -424,6 +454,16 @@ void DoConditionals (void) CalcOverallIfCond (); break; + case TOK_IFPCE02: + D = AllocIf (".IFPCE02", 1); + NextTok (); + if (IfCond) { + SetIfCond (D, GetCPU() == CPU_65CE02); + } + ExpectSep (); + CalcOverallIfCond (); + break; + case TOK_IFPDTV: D = AllocIf (".IFPDTV", 1); NextTok (); @@ -434,6 +474,16 @@ void DoConditionals (void) CalcOverallIfCond (); break; + case TOK_IFPM740: + D = AllocIf (".IFPM740", 1); + NextTok (); + if (IfCond) { + SetIfCond (D, GetCPU() == CPU_M740); + } + ExpectSep (); + CalcOverallIfCond (); + break; + case TOK_IFPSC02: D = AllocIf (".IFPSC02", 1); NextTok (); @@ -444,6 +494,26 @@ void DoConditionals (void) CalcOverallIfCond (); break; + case TOK_IFPSWEET16: + D = AllocIf (".IFPSWEET16", 1); + NextTok (); + if (IfCond) { + SetIfCond (D, GetCPU() == CPU_SWEET16); + } + ExpectSep (); + CalcOverallIfCond (); + break; + + case TOK_IFPWC02: + D = AllocIf (".IFPWC02", 1); + NextTok (); + if (IfCond) { + SetIfCond (D, GetCPU() == CPU_W65C02); + } + ExpectSep (); + CalcOverallIfCond (); + break; + case TOK_IFREF: D = AllocIf (".IFREF", 1); NextTok (); @@ -485,11 +555,18 @@ int CheckConditionals (void) case TOK_IFNDEF: case TOK_IFNREF: case TOK_IFP02: + case TOK_IFP02X: case TOK_IFP4510: + case TOK_IFP45GS02: + case TOK_IFP6280: case TOK_IFP816: case TOK_IFPC02: + case TOK_IFPCE02: case TOK_IFPDTV: + case TOK_IFPM740: case TOK_IFPSC02: + case TOK_IFPSWEET16: + case TOK_IFPWC02: case TOK_IFREF: DoConditionals (); return 1; diff --git a/src/ca65/ea65.c b/src/ca65/ea65.c index 5bd2ba82b..898b344ca 100644 --- a/src/ca65/ea65.c +++ b/src/ca65/ea65.c @@ -101,6 +101,9 @@ void GetEA (EffAddr* A) if (TokIsSep (CurTok.Tok)) { A->AddrModeSet = AM65_IMPLICIT; + if (GetCPU () == CPU_45GS02) { + A->AddrModeSet |= AM65_Q; + } } else if (CurTok.Tok == TOK_HASH) { @@ -114,6 +117,11 @@ void GetEA (EffAddr* A) NextTok (); A->AddrModeSet = AM65_ACCU; + } else if (CurTok.Tok == TOK_Q) { + + NextTok (); + A->AddrModeSet = AM65_Q; + } else if (CurTok.Tok == IndirectEnter) { /* One of the indirect modes */ @@ -160,8 +168,19 @@ void GetEA (EffAddr* A) } } else { /* (adr) */ - A->AddrModeSet = (CPU == CPU_4510) ? AM65_ABS_IND - : AM65_ABS_IND | AM65_ABS_IND_LONG | AM65_DIR_IND; + switch (CPU) { + case CPU_4510: + A->AddrModeSet = AM65_ABS_IND; + break; + + case CPU_45GS02: + A->AddrModeSet = AM65_ABS_IND | AM65_DIR_IND; + break; + + default: + A->AddrModeSet = AM65_ABS_IND | AM65_ABS_IND_LONG | AM65_DIR_IND; + break; + } } } @@ -175,8 +194,14 @@ void GetEA (EffAddr* A) if (CurTok.Tok == TOK_COMMA) { /* [dir],y */ NextTok (); - Consume (TOK_Y, "'Y' expected"); - A->AddrModeSet = AM65_DIR_IND_LONG_Y; + if (GetCPU () == CPU_45GS02) { + Consume (TOK_Z, "'Z' expected"); + A->AddrModeSet = AM65_32BIT_BASE_IND_Z; + } + else { + Consume (TOK_Y, "'Y' expected"); + A->AddrModeSet = AM65_DIR_IND_LONG_Y; + } } else { /* [dir] */ A->AddrModeSet = AM65_DIR_IND_LONG | AM65_ABS_IND_LONG; @@ -186,10 +211,11 @@ void GetEA (EffAddr* A) /* Remaining stuff: ** - ** adr - ** adr,x - ** adr,y - ** adr,s + ** addr + ** addr, x + ** addr, y + ** addr, s + ** addr, relative addr */ A->Expr = Expression (); @@ -214,7 +240,9 @@ void GetEA (EffAddr* A) break; default: - Error ("Syntax error"); + /* FIXME: syntax error if not zp, ind */ + A->AddrModeSet = AM65_ZP_REL; + break; } diff --git a/src/ca65/instr.c b/src/ca65/instr.c index da6bd6e44..d38a42843 100644 --- a/src/ca65/instr.c +++ b/src/ca65/instr.c @@ -85,6 +85,12 @@ static void PutBlockTransfer (const InsDesc* Ins); static void PutBitBranch (const InsDesc* Ins); /* Handle 65C02 branch on bit condition */ +static void PutBitBranch_m740 (const InsDesc* Ins); +/* Handle m740 branch on bit condition */ + +static void PutLDM_m740 (const InsDesc* Ins); +/* Handle m740 LDM instruction */ + static void PutREP (const InsDesc* Ins); /* Emit a REP instruction, track register sizes */ @@ -132,6 +138,11 @@ static void PutJSR816 (const InsDesc* Ins); ** Allowing the long_jsr_jmp_rts feature to permit a long JSR. */ +static void PutJSR_m740 (const InsDesc* Ins); +/* Handle the JSR instruction for the m740 +** Allowing the special page feature. +*/ + static void PutRTS (const InsDesc* Ins attribute ((unused))); /* Handle the RTS instruction for the 816. In smart mode emit a RTL opcode if ** the enclosing scope is FAR, but only if the long_jsr_jmp_rts feature applies. @@ -143,6 +154,12 @@ static void PutAll (const InsDesc* Ins); static void Put4510 (const InsDesc* Ins); /* Handle instructions of 4510 not matching any EATab */ +static void Put45GS02 (const InsDesc* Ins); +/* Handle [adr],z instructions of 45GS02 */ + +static void Put45GS02_Q (const InsDesc* Ins); +/* Handle Q instructions of 45GS02 */ + static void PutSweet16 (const InsDesc* Ins); /* Handle a generic sweet16 instruction */ @@ -169,8 +186,10 @@ static const struct { unsigned Count; InsDesc Ins[56]; } InsTab6502 = { + /* CAUTION: table must be sorted for bsearch */ sizeof (InsTab6502.Ins) / sizeof (InsTab6502.Ins[0]), { +/* BEGIN SORTED.SH */ { "ADC", 0x080A26C, 0x60, 0, PutAll }, { "AND", 0x080A26C, 0x20, 0, PutAll }, { "ASL", 0x000006e, 0x02, 1, PutAll }, @@ -227,6 +246,7 @@ static const struct { { "TXA", 0x0000001, 0x8a, 0, PutAll }, { "TXS", 0x0000001, 0x9a, 0, PutAll }, { "TYA", 0x0000001, 0x98, 0, PutAll } +/* END SORTED.SH */ } }; @@ -235,8 +255,10 @@ static const struct { unsigned Count; InsDesc Ins[75]; } InsTab6502X = { + /* CAUTION: table must be sorted for bsearch */ sizeof (InsTab6502X.Ins) / sizeof (InsTab6502X.Ins[0]), { +/* BEGIN SORTED.SH */ { "ADC", 0x080A26C, 0x60, 0, PutAll }, { "ALR", 0x0800000, 0x4B, 0, PutAll }, /* X */ { "ANC", 0x0800000, 0x0B, 0, PutAll }, /* X */ @@ -312,6 +334,7 @@ static const struct { { "TXA", 0x0000001, 0x8a, 0, PutAll }, { "TXS", 0x0000001, 0x9a, 0, PutAll }, { "TYA", 0x0000001, 0x98, 0, PutAll } +/* END SORTED.SH */ } }; @@ -324,8 +347,10 @@ static const struct { unsigned Count; InsDesc Ins[71]; } InsTab6502DTV = { + /* CAUTION: table must be sorted for bsearch */ sizeof (InsTab6502DTV.Ins) / sizeof (InsTab6502DTV.Ins[0]), { +/* BEGIN SORTED.SH */ { "ADC", 0x080A26C, 0x60, 0, PutAll }, { "ALR", 0x0800000, 0x4B, 0, PutAll }, /* X */ { "ANC", 0x0800000, 0x0B, 0, PutAll }, /* X */ @@ -397,16 +422,19 @@ static const struct { { "TXA", 0x0000001, 0x8a, 0, PutAll }, { "TXS", 0x0000001, 0x9a, 0, PutAll }, { "TYA", 0x0000001, 0x98, 0, PutAll } +/* END SORTED.SH */ } }; -/* Instruction table for the 65SC02 */ +/* Instruction table for the 65SC02 (original CMOS) */ static const struct { unsigned Count; InsDesc Ins[66]; } InsTab65SC02 = { + /* CAUTION: table must be sorted for bsearch */ sizeof (InsTab65SC02.Ins) / sizeof (InsTab65SC02.Ins[0]), { +/* BEGIN SORTED.SH */ { "ADC", 0x080A66C, 0x60, 0, PutAll }, { "AND", 0x080A66C, 0x20, 0, PutAll }, { "ASL", 0x000006e, 0x02, 1, PutAll }, @@ -473,16 +501,130 @@ static const struct { { "TXA", 0x0000001, 0x8a, 0, PutAll }, { "TXS", 0x0000001, 0x9a, 0, PutAll }, { "TYA", 0x0000001, 0x98, 0, PutAll } +/* END SORTED.SH */ } }; -/* Instruction table for the 65C02 */ +/* Instruction table for the 65C02 (CMOS with Rockwell extensions) */ +static const struct { + unsigned Count; + InsDesc Ins[98]; +} InsTab65C02 = { + /* CAUTION: table must be sorted for bsearch */ + sizeof (InsTab65C02.Ins) / sizeof (InsTab65C02.Ins[0]), + { +/* BEGIN SORTED.SH */ + { "ADC", 0x080A66C, 0x60, 0, PutAll }, + { "AND", 0x080A66C, 0x20, 0, PutAll }, + { "ASL", 0x000006e, 0x02, 1, PutAll }, + { "BBR0", 0x0000000, 0x0F, 0, PutBitBranch }, + { "BBR1", 0x0000000, 0x1F, 0, PutBitBranch }, + { "BBR2", 0x0000000, 0x2F, 0, PutBitBranch }, + { "BBR3", 0x0000000, 0x3F, 0, PutBitBranch }, + { "BBR4", 0x0000000, 0x4F, 0, PutBitBranch }, + { "BBR5", 0x0000000, 0x5F, 0, PutBitBranch }, + { "BBR6", 0x0000000, 0x6F, 0, PutBitBranch }, + { "BBR7", 0x0000000, 0x7F, 0, PutBitBranch }, + { "BBS0", 0x0000000, 0x8F, 0, PutBitBranch }, + { "BBS1", 0x0000000, 0x9F, 0, PutBitBranch }, + { "BBS2", 0x0000000, 0xAF, 0, PutBitBranch }, + { "BBS3", 0x0000000, 0xBF, 0, PutBitBranch }, + { "BBS4", 0x0000000, 0xCF, 0, PutBitBranch }, + { "BBS5", 0x0000000, 0xDF, 0, PutBitBranch }, + { "BBS6", 0x0000000, 0xEF, 0, PutBitBranch }, + { "BBS7", 0x0000000, 0xFF, 0, PutBitBranch }, + { "BCC", 0x0020000, 0x90, 0, PutPCRel8 }, + { "BCS", 0x0020000, 0xb0, 0, PutPCRel8 }, + { "BEQ", 0x0020000, 0xf0, 0, PutPCRel8 }, + { "BIT", 0x0A0006C, 0x00, 2, PutAll }, + { "BMI", 0x0020000, 0x30, 0, PutPCRel8 }, + { "BNE", 0x0020000, 0xd0, 0, PutPCRel8 }, + { "BPL", 0x0020000, 0x10, 0, PutPCRel8 }, + { "BRA", 0x0020000, 0x80, 0, PutPCRel8 }, + { "BRK", 0x0800005, 0x00, 6, PutAll }, + { "BVC", 0x0020000, 0x50, 0, PutPCRel8 }, + { "BVS", 0x0020000, 0x70, 0, PutPCRel8 }, + { "CLC", 0x0000001, 0x18, 0, PutAll }, + { "CLD", 0x0000001, 0xd8, 0, PutAll }, + { "CLI", 0x0000001, 0x58, 0, PutAll }, + { "CLV", 0x0000001, 0xb8, 0, PutAll }, + { "CMP", 0x080A66C, 0xc0, 0, PutAll }, + { "CPX", 0x080000C, 0xe0, 1, PutAll }, + { "CPY", 0x080000C, 0xc0, 1, PutAll }, + { "DEA", 0x0000001, 0x00, 3, PutAll }, /* == DEC */ + { "DEC", 0x000006F, 0x00, 3, PutAll }, + { "DEX", 0x0000001, 0xca, 0, PutAll }, + { "DEY", 0x0000001, 0x88, 0, PutAll }, + { "EOR", 0x080A66C, 0x40, 0, PutAll }, + { "INA", 0x0000001, 0x00, 4, PutAll }, /* == INC */ + { "INC", 0x000006f, 0x00, 4, PutAll }, + { "INX", 0x0000001, 0xe8, 0, PutAll }, + { "INY", 0x0000001, 0xc8, 0, PutAll }, + { "JMP", 0x0010808, 0x4c, 6, PutAll }, + { "JSR", 0x0000008, 0x20, 7, PutAll }, + { "LDA", 0x080A66C, 0xa0, 0, PutAll }, + { "LDX", 0x080030C, 0xa2, 1, PutAll }, + { "LDY", 0x080006C, 0xa0, 1, PutAll }, + { "LSR", 0x000006F, 0x42, 1, PutAll }, + { "NOP", 0x0000001, 0xea, 0, PutAll }, + { "ORA", 0x080A66C, 0x00, 0, PutAll }, + { "PHA", 0x0000001, 0x48, 0, PutAll }, + { "PHP", 0x0000001, 0x08, 0, PutAll }, + { "PHX", 0x0000001, 0xda, 0, PutAll }, + { "PHY", 0x0000001, 0x5a, 0, PutAll }, + { "PLA", 0x0000001, 0x68, 0, PutAll }, + { "PLP", 0x0000001, 0x28, 0, PutAll }, + { "PLX", 0x0000001, 0xfa, 0, PutAll }, + { "PLY", 0x0000001, 0x7a, 0, PutAll }, + { "RMB0", 0x0000004, 0x07, 1, PutAll }, + { "RMB1", 0x0000004, 0x17, 1, PutAll }, + { "RMB2", 0x0000004, 0x27, 1, PutAll }, + { "RMB3", 0x0000004, 0x37, 1, PutAll }, + { "RMB4", 0x0000004, 0x47, 1, PutAll }, + { "RMB5", 0x0000004, 0x57, 1, PutAll }, + { "RMB6", 0x0000004, 0x67, 1, PutAll }, + { "RMB7", 0x0000004, 0x77, 1, PutAll }, + { "ROL", 0x000006F, 0x22, 1, PutAll }, + { "ROR", 0x000006F, 0x62, 1, PutAll }, + { "RTI", 0x0000001, 0x40, 0, PutAll }, + { "RTS", 0x0000001, 0x60, 0, PutAll }, + { "SBC", 0x080A66C, 0xe0, 0, PutAll }, + { "SEC", 0x0000001, 0x38, 0, PutAll }, + { "SED", 0x0000001, 0xf8, 0, PutAll }, + { "SEI", 0x0000001, 0x78, 0, PutAll }, + { "SMB0", 0x0000004, 0x87, 1, PutAll }, + { "SMB1", 0x0000004, 0x97, 1, PutAll }, + { "SMB2", 0x0000004, 0xA7, 1, PutAll }, + { "SMB3", 0x0000004, 0xB7, 1, PutAll }, + { "SMB4", 0x0000004, 0xC7, 1, PutAll }, + { "SMB5", 0x0000004, 0xD7, 1, PutAll }, + { "SMB6", 0x0000004, 0xE7, 1, PutAll }, + { "SMB7", 0x0000004, 0xF7, 1, PutAll }, + { "STA", 0x000A66C, 0x80, 0, PutAll }, + { "STX", 0x000010c, 0x82, 1, PutAll }, + { "STY", 0x000002c, 0x80, 1, PutAll }, + { "STZ", 0x000006c, 0x04, 5, PutAll }, + { "TAX", 0x0000001, 0xaa, 0, PutAll }, + { "TAY", 0x0000001, 0xa8, 0, PutAll }, + { "TRB", 0x000000c, 0x10, 1, PutAll }, + { "TSB", 0x000000c, 0x00, 1, PutAll }, + { "TSX", 0x0000001, 0xba, 0, PutAll }, + { "TXA", 0x0000001, 0x8a, 0, PutAll }, + { "TXS", 0x0000001, 0x9a, 0, PutAll }, + { "TYA", 0x0000001, 0x98, 0, PutAll }, +/* END SORTED.SH */ + } +}; + +/* Instruction table for the W65C02 (CMOS with WDC extensions) */ static const struct { unsigned Count; InsDesc Ins[100]; -} InsTab65C02 = { - sizeof (InsTab65C02.Ins) / sizeof (InsTab65C02.Ins[0]), +} InsTabW65C02 = { + /* CAUTION: table must be sorted for bsearch */ + sizeof (InsTabW65C02.Ins) / sizeof (InsTabW65C02.Ins[0]), { +/* BEGIN SORTED.SH */ { "ADC", 0x080A66C, 0x60, 0, PutAll }, { "AND", 0x080A66C, 0x20, 0, PutAll }, { "ASL", 0x000006e, 0x02, 1, PutAll }, @@ -583,6 +725,153 @@ static const struct { { "TXS", 0x0000001, 0x9a, 0, PutAll }, { "TYA", 0x0000001, 0x98, 0, PutAll }, { "WAI", 0x0000001, 0xcb, 0, PutAll } +/* END SORTED.SH */ + } +}; + +/* Instruction table for the 65CE02 */ +static const struct { + unsigned Count; + InsDesc Ins[133]; +} InsTab65CE02 = { + /* CAUTION: table must be sorted for bsearch */ + sizeof (InsTab65CE02.Ins) / sizeof (InsTab65CE02.Ins[0]), + { +/* BEGIN SORTED.SH */ + { "ADC", 0x080A66C, 0x60, 0, PutAll }, + { "AND", 0x080A66C, 0x20, 0, PutAll }, + { "ASL", 0x000006e, 0x02, 1, PutAll }, + { "ASR", 0x0000026, 0x43, 0, Put4510 }, + { "ASW", 0x0000008, 0xcb, 6, PutAll }, + { "AUG", 0x0000001, 0x5C, 0, PutAll }, + { "BBR0", 0x0000000, 0x0F, 0, PutBitBranch }, + { "BBR1", 0x0000000, 0x1F, 0, PutBitBranch }, + { "BBR2", 0x0000000, 0x2F, 0, PutBitBranch }, + { "BBR3", 0x0000000, 0x3F, 0, PutBitBranch }, + { "BBR4", 0x0000000, 0x4F, 0, PutBitBranch }, + { "BBR5", 0x0000000, 0x5F, 0, PutBitBranch }, + { "BBR6", 0x0000000, 0x6F, 0, PutBitBranch }, + { "BBR7", 0x0000000, 0x7F, 0, PutBitBranch }, + { "BBS0", 0x0000000, 0x8F, 0, PutBitBranch }, + { "BBS1", 0x0000000, 0x9F, 0, PutBitBranch }, + { "BBS2", 0x0000000, 0xAF, 0, PutBitBranch }, + { "BBS3", 0x0000000, 0xBF, 0, PutBitBranch }, + { "BBS4", 0x0000000, 0xCF, 0, PutBitBranch }, + { "BBS5", 0x0000000, 0xDF, 0, PutBitBranch }, + { "BBS6", 0x0000000, 0xEF, 0, PutBitBranch }, + { "BBS7", 0x0000000, 0xFF, 0, PutBitBranch }, + { "BCC", 0x0020000, 0x90, 0, PutPCRel8 }, + { "BCS", 0x0020000, 0xb0, 0, PutPCRel8 }, + { "BEQ", 0x0020000, 0xf0, 0, PutPCRel8 }, + { "BIT", 0x0A0006C, 0x00, 2, PutAll }, + { "BMI", 0x0020000, 0x30, 0, PutPCRel8 }, + { "BNE", 0x0020000, 0xd0, 0, PutPCRel8 }, + { "BPL", 0x0020000, 0x10, 0, PutPCRel8 }, + { "BRA", 0x0020000, 0x80, 0, PutPCRel8 }, + { "BRK", 0x0800005, 0x00, 6, PutAll }, + { "BSR", 0x0040000, 0x63, 0, PutPCRel4510 }, + { "BVC", 0x0020000, 0x50, 0, PutPCRel8 }, + { "BVS", 0x0020000, 0x70, 0, PutPCRel8 }, + { "CLC", 0x0000001, 0x18, 0, PutAll }, + { "CLD", 0x0000001, 0xd8, 0, PutAll }, + { "CLE", 0x0000001, 0x02, 0, PutAll }, + { "CLI", 0x0000001, 0x58, 0, PutAll }, + { "CLV", 0x0000001, 0xb8, 0, PutAll }, + { "CMP", 0x080A66C, 0xc0, 0, PutAll }, + { "CPX", 0x080000C, 0xe0, 1, PutAll }, + { "CPY", 0x080000C, 0xc0, 1, PutAll }, + { "CPZ", 0x080000C, 0xd0, 1, Put4510 }, + { "DEA", 0x0000001, 0x00, 3, PutAll }, /* == DEC */ + { "DEC", 0x000006F, 0x00, 3, PutAll }, + { "DEW", 0x0000004, 0xc3, 9, PutAll }, + { "DEX", 0x0000001, 0xca, 0, PutAll }, + { "DEY", 0x0000001, 0x88, 0, PutAll }, + { "DEZ", 0x0000001, 0x3B, 0, PutAll }, + { "EOM", 0x0000001, 0xea, 0, PutAll }, + { "EOR", 0x080A66C, 0x40, 0, PutAll }, + { "INA", 0x0000001, 0x00, 4, PutAll }, /* == INC */ + { "INC", 0x000006f, 0x00, 4, PutAll }, + { "INW", 0x0000004, 0xe3, 9, PutAll }, + { "INX", 0x0000001, 0xe8, 0, PutAll }, + { "INY", 0x0000001, 0xc8, 0, PutAll }, + { "INZ", 0x0000001, 0x1B, 0, PutAll }, + { "JMP", 0x0010808, 0x4c, 6, PutAll }, + { "JSR", 0x0010808, 0x20, 7, Put4510 }, + { "LBCC", 0x0040000, 0x93, 0, PutPCRel4510 }, + { "LBCS", 0x0040000, 0xb3, 0, PutPCRel4510 }, + { "LBEQ", 0x0040000, 0xf3, 0, PutPCRel4510 }, + { "LBMI", 0x0040000, 0x33, 0, PutPCRel4510 }, + { "LBNE", 0x0040000, 0xd3, 0, PutPCRel4510 }, + { "LBPL", 0x0040000, 0x13, 0, PutPCRel4510 }, + { "LBRA", 0x0040000, 0x83, 0, PutPCRel4510 }, + { "LBVC", 0x0040000, 0x53, 0, PutPCRel4510 }, + { "LBVS", 0x0040000, 0x73, 0, PutPCRel4510 }, + { "LDA", 0x090A66C, 0xa0, 0, Put4510 }, + { "LDX", 0x080030C, 0xa2, 1, PutAll }, + { "LDY", 0x080006C, 0xa0, 1, PutAll }, + { "LDZ", 0x0800048, 0xa3, 1, Put4510 }, + { "LSR", 0x000006F, 0x42, 1, PutAll }, + { "NEG", 0x0000001, 0x42, 0, PutAll }, + { "NOP", 0x0000001, 0xea, 0, PutAll }, /* == EOM */ + { "ORA", 0x080A66C, 0x00, 0, PutAll }, + { "PHA", 0x0000001, 0x48, 0, PutAll }, + { "PHD", 0x8000008, 0xf4, 1, PutAll }, /* == PHW */ + { "PHP", 0x0000001, 0x08, 0, PutAll }, + { "PHW", 0x8000008, 0xf4, 1, PutAll }, + { "PHX", 0x0000001, 0xda, 0, PutAll }, + { "PHY", 0x0000001, 0x5a, 0, PutAll }, + { "PHZ", 0x0000001, 0xdb, 0, PutAll }, + { "PLA", 0x0000001, 0x68, 0, PutAll }, + { "PLP", 0x0000001, 0x28, 0, PutAll }, + { "PLX", 0x0000001, 0xfa, 0, PutAll }, + { "PLY", 0x0000001, 0x7a, 0, PutAll }, + { "PLZ", 0x0000001, 0xfb, 0, PutAll }, + { "RMB0", 0x0000004, 0x07, 1, PutAll }, + { "RMB1", 0x0000004, 0x17, 1, PutAll }, + { "RMB2", 0x0000004, 0x27, 1, PutAll }, + { "RMB3", 0x0000004, 0x37, 1, PutAll }, + { "RMB4", 0x0000004, 0x47, 1, PutAll }, + { "RMB5", 0x0000004, 0x57, 1, PutAll }, + { "RMB6", 0x0000004, 0x67, 1, PutAll }, + { "RMB7", 0x0000004, 0x77, 1, PutAll }, + { "ROL", 0x000006F, 0x22, 1, PutAll }, + { "ROR", 0x000006F, 0x62, 1, PutAll }, + { "ROW", 0x0000008, 0xeb, 6, PutAll }, + { "RTI", 0x0000001, 0x40, 0, PutAll }, + { "RTN", 0x0800000, 0x62, 1, PutAll }, + { "RTS", 0x0000001, 0x60, 0, PutAll }, + { "SBC", 0x080A66C, 0xe0, 0, PutAll }, + { "SEC", 0x0000001, 0x38, 0, PutAll }, + { "SED", 0x0000001, 0xf8, 0, PutAll }, + { "SEE", 0x0000001, 0x03, 0, PutAll }, + { "SEI", 0x0000001, 0x78, 0, PutAll }, + { "SMB0", 0x0000004, 0x87, 1, PutAll }, + { "SMB1", 0x0000004, 0x97, 1, PutAll }, + { "SMB2", 0x0000004, 0xA7, 1, PutAll }, + { "SMB3", 0x0000004, 0xB7, 1, PutAll }, + { "SMB4", 0x0000004, 0xC7, 1, PutAll }, + { "SMB5", 0x0000004, 0xD7, 1, PutAll }, + { "SMB6", 0x0000004, 0xE7, 1, PutAll }, + { "SMB7", 0x0000004, 0xF7, 1, PutAll }, + { "STA", 0x010A66C, 0x80, 0, Put4510 }, + { "STX", 0x000030c, 0x82, 1, Put4510 }, + { "STY", 0x000006c, 0x80, 1, Put4510 }, + { "STZ", 0x000006c, 0x04, 5, PutAll }, + { "TAB", 0x0000001, 0x5b, 0, PutAll }, + { "TAX", 0x0000001, 0xaa, 0, PutAll }, + { "TAY", 0x0000001, 0xa8, 0, PutAll }, + { "TAZ", 0x0000001, 0x4b, 0, PutAll }, + { "TBA", 0x0000001, 0x7b, 0, PutAll }, + { "TRB", 0x000000c, 0x10, 1, PutAll }, + { "TSB", 0x000000c, 0x00, 1, PutAll }, + { "TSX", 0x0000001, 0xba, 0, PutAll }, + { "TSY", 0x0000001, 0x0b, 0, PutAll }, + { "TXA", 0x0000001, 0x8a, 0, PutAll }, + { "TXS", 0x0000001, 0x9a, 0, PutAll }, + { "TYA", 0x0000001, 0x98, 0, PutAll }, + { "TYS", 0x0000001, 0x2b, 0, PutAll }, + { "TZA", 0x0000001, 0x6b, 0, PutAll }, +/* END SORTED.SH */ } }; @@ -591,8 +880,10 @@ static const struct { unsigned Count; InsDesc Ins[133]; } InsTab4510 = { + /* CAUTION: table must be sorted for bsearch */ sizeof (InsTab4510.Ins) / sizeof (InsTab4510.Ins[0]), { +/* BEGIN SORTED.SH */ { "ADC", 0x080A66C, 0x60, 0, PutAll }, { "AND", 0x080A66C, 0x20, 0, PutAll }, { "ASL", 0x000006e, 0x02, 1, PutAll }, @@ -726,16 +1017,183 @@ static const struct { { "TYA", 0x0000001, 0x98, 0, PutAll }, { "TYS", 0x0000001, 0x2b, 0, PutAll }, { "TZA", 0x0000001, 0x6b, 0, PutAll }, +/* END SORTED.SH */ } }; + +/* Instruction table for the 45GS02 */ +static const struct { + unsigned Count; + InsDesc Ins[149]; +} InsTab45GS02 = { + /* CAUTION: table must be sorted for bsearch */ + sizeof (InsTab45GS02.Ins) / sizeof (InsTab45GS02.Ins[0]), + { +/* BEGIN SORTED.SH */ + { "ADC", 0x4080A66C, 0x60, 0, Put45GS02 }, + { "ADCQ", 0x0000140C, 0x60, 13, Put45GS02_Q }, + { "AND", 0x4080A66C, 0x20, 0, Put45GS02 }, + { "ANDQ", 0x0000140C, 0x20, 13, Put45GS02_Q }, + { "ASL", 0x0000006e, 0x02, 1, PutAll }, + { "ASLQ", 0x800000ee, 0x00, 14, Put45GS02_Q }, + { "ASR", 0x00000026, 0x43, 0, Put4510 }, + { "ASRQ", 0x80000026, 0x40, 15, Put45GS02_Q }, + { "ASW", 0x00000008, 0xcb, 6, PutAll }, + { "BBR0", 0x00000000, 0x0F, 0, PutBitBranch }, + { "BBR1", 0x00000000, 0x1F, 0, PutBitBranch }, + { "BBR2", 0x00000000, 0x2F, 0, PutBitBranch }, + { "BBR3", 0x00000000, 0x3F, 0, PutBitBranch }, + { "BBR4", 0x00000000, 0x4F, 0, PutBitBranch }, + { "BBR5", 0x00000000, 0x5F, 0, PutBitBranch }, + { "BBR6", 0x00000000, 0x6F, 0, PutBitBranch }, + { "BBR7", 0x00000000, 0x7F, 0, PutBitBranch }, + { "BBS0", 0x00000000, 0x8F, 0, PutBitBranch }, + { "BBS1", 0x00000000, 0x9F, 0, PutBitBranch }, + { "BBS2", 0x00000000, 0xAF, 0, PutBitBranch }, + { "BBS3", 0x00000000, 0xBF, 0, PutBitBranch }, + { "BBS4", 0x00000000, 0xCF, 0, PutBitBranch }, + { "BBS5", 0x00000000, 0xDF, 0, PutBitBranch }, + { "BBS6", 0x00000000, 0xEF, 0, PutBitBranch }, + { "BBS7", 0x00000000, 0xFF, 0, PutBitBranch }, + { "BCC", 0x00020000, 0x90, 0, PutPCRel8 }, + { "BCS", 0x00020000, 0xb0, 0, PutPCRel8 }, + { "BEQ", 0x00020000, 0xf0, 0, PutPCRel8 }, + { "BIT", 0x00A0006C, 0x00, 2, PutAll }, + { "BITQ", 0x0000000c, 0x20, 15, Put45GS02_Q }, + { "BMI", 0x00020000, 0x30, 0, PutPCRel8 }, + { "BNE", 0x00020000, 0xd0, 0, PutPCRel8 }, + { "BPL", 0x00020000, 0x10, 0, PutPCRel8 }, + { "BRA", 0x00020000, 0x80, 0, PutPCRel8 }, + { "BRK", 0x00000001, 0x00, 0, PutAll }, + { "BSR", 0x00040000, 0x63, 0, PutPCRel4510 }, + { "BVC", 0x00020000, 0x50, 0, PutPCRel8 }, + { "BVS", 0x00020000, 0x70, 0, PutPCRel8 }, + { "CLC", 0x00000001, 0x18, 0, PutAll }, + { "CLD", 0x00000001, 0xd8, 0, PutAll }, + { "CLE", 0x00000001, 0x02, 0, PutAll }, + { "CLI", 0x00000001, 0x58, 0, PutAll }, + { "CLV", 0x00000001, 0xb8, 0, PutAll }, + { "CMP", 0x4080A66C, 0xc0, 0, Put45GS02 }, + { "CMPQ", 0x0000140C, 0xC0, 13, Put45GS02_Q }, + { "CPX", 0x0080000C, 0xe0, 1, PutAll }, + { "CPY", 0x0080000C, 0xc0, 1, PutAll }, + { "CPZ", 0x0080000C, 0xd0, 1, Put4510 }, + { "DEA", 0x00000001, 0x00, 3, PutAll }, /* == DEC */ + { "DEC", 0x0000006F, 0x00, 3, PutAll }, + { "DEQ", 0x800000ee, 0xc0, 14, Put45GS02_Q }, + { "DEW", 0x00000004, 0xc3, 9, PutAll }, + { "DEX", 0x00000001, 0xca, 0, PutAll }, + { "DEY", 0x00000001, 0x88, 0, PutAll }, + { "DEZ", 0x00000001, 0x3B, 0, PutAll }, + { "EOM", 0x00000001, 0xea, 0, PutAll }, + { "EOR", 0x4080A66C, 0x40, 0, Put45GS02 }, + { "EORQ", 0x0000140C, 0x40, 13, Put45GS02_Q }, + { "INA", 0x00000001, 0x00, 4, PutAll }, /* == INC */ + { "INC", 0x0000006f, 0x00, 4, PutAll }, + { "INQ", 0x800000ee, 0xe0, 14, Put45GS02_Q }, + { "INW", 0x00000004, 0xe3, 9, PutAll }, + { "INX", 0x00000001, 0xe8, 0, PutAll }, + { "INY", 0x00000001, 0xc8, 0, PutAll }, + { "INZ", 0x00000001, 0x1B, 0, PutAll }, + { "JMP", 0x00010808, 0x4c, 6, PutAll }, + { "JSR", 0x00010808, 0x20, 7, Put4510 }, + { "LBCC", 0x00040000, 0x93, 0, PutPCRel4510 }, + { "LBCS", 0x00040000, 0xb3, 0, PutPCRel4510 }, + { "LBEQ", 0x00040000, 0xf3, 0, PutPCRel4510 }, + { "LBMI", 0x00040000, 0x33, 0, PutPCRel4510 }, + { "LBNE", 0x00040000, 0xd3, 0, PutPCRel4510 }, + { "LBPL", 0x00040000, 0x13, 0, PutPCRel4510 }, + { "LBRA", 0x00040000, 0x83, 0, PutPCRel4510 }, + { "LBVC", 0x00040000, 0x53, 0, PutPCRel4510 }, + { "LBVS", 0x00040000, 0x73, 0, PutPCRel4510 }, + { "LDA", 0x4090A66C, 0xa0, 0, Put45GS02 }, + { "LDQ", 0x4000140C, 0xa0, 13, Put45GS02_Q }, + { "LDX", 0x0080030C, 0xa2, 1, PutAll }, + { "LDY", 0x0080006C, 0xa0, 1, PutAll }, + { "LDZ", 0x00800048, 0xa3, 1, Put4510 }, + { "LSR", 0x0000006F, 0x42, 1, PutAll }, + { "LSRQ", 0x800000ee, 0x40, 14, Put45GS02_Q }, + { "MAP", 0x00000001, 0x5C, 0, PutAll }, + { "NEG", 0x00000001, 0x42, 0, PutAll }, + { "NOP", 0x00000001, 0xea, 0, PutAll }, /* == EOM */ + { "ORA", 0x4080A66C, 0x00, 0, Put45GS02 }, + { "ORQ", 0x0000140C, 0x00, 13, Put45GS02_Q }, + { "PHA", 0x00000001, 0x48, 0, PutAll }, + { "PHD", 0x08000008, 0xf4, 1, PutAll }, /* == PHW */ + { "PHP", 0x00000001, 0x08, 0, PutAll }, + { "PHW", 0x08000008, 0xf4, 1, PutAll }, + { "PHX", 0x00000001, 0xda, 0, PutAll }, + { "PHY", 0x00000001, 0x5a, 0, PutAll }, + { "PHZ", 0x00000001, 0xdb, 0, PutAll }, + { "PLA", 0x00000001, 0x68, 0, PutAll }, + { "PLP", 0x00000001, 0x28, 0, PutAll }, + { "PLX", 0x00000001, 0xfa, 0, PutAll }, + { "PLY", 0x00000001, 0x7a, 0, PutAll }, + { "PLZ", 0x00000001, 0xfb, 0, PutAll }, + { "RMB0", 0x00000004, 0x07, 1, PutAll }, + { "RMB1", 0x00000004, 0x17, 1, PutAll }, + { "RMB2", 0x00000004, 0x27, 1, PutAll }, + { "RMB3", 0x00000004, 0x37, 1, PutAll }, + { "RMB4", 0x00000004, 0x47, 1, PutAll }, + { "RMB5", 0x00000004, 0x57, 1, PutAll }, + { "RMB6", 0x00000004, 0x67, 1, PutAll }, + { "RMB7", 0x00000004, 0x77, 1, PutAll }, + { "ROL", 0x0000006F, 0x22, 1, PutAll }, + { "ROLQ", 0x800000ee, 0x20, 14, Put45GS02_Q }, + { "ROR", 0x0000006F, 0x62, 1, PutAll }, + { "RORQ", 0x800000ee, 0x60, 14, Put45GS02_Q }, + { "ROW", 0x00000008, 0xeb, 6, PutAll }, + { "RTI", 0x00000001, 0x40, 0, PutAll }, + { "RTN", 0x00800000, 0x62, 1, PutAll }, + { "RTS", 0x00000001, 0x60, 0, PutAll }, + { "SBC", 0x4080A66C, 0xe0, 0, Put45GS02 }, + { "SBCQ", 0x0000140C, 0xe0, 13, Put45GS02_Q }, + { "SEC", 0x00000001, 0x38, 0, PutAll }, + { "SED", 0x00000001, 0xf8, 0, PutAll }, + { "SEE", 0x00000001, 0x03, 0, PutAll }, + { "SEI", 0x00000001, 0x78, 0, PutAll }, + { "SMB0", 0x00000004, 0x87, 1, PutAll }, + { "SMB1", 0x00000004, 0x97, 1, PutAll }, + { "SMB2", 0x00000004, 0xA7, 1, PutAll }, + { "SMB3", 0x00000004, 0xB7, 1, PutAll }, + { "SMB4", 0x00000004, 0xC7, 1, PutAll }, + { "SMB5", 0x00000004, 0xD7, 1, PutAll }, + { "SMB6", 0x00000004, 0xE7, 1, PutAll }, + { "SMB7", 0x00000004, 0xF7, 1, PutAll }, + { "STA", 0x4010A66C, 0x80, 0, Put45GS02 }, + { "STQ", 0x0000140C, 0x80, 13, Put45GS02_Q }, + { "STX", 0x0000030c, 0x82, 1, Put4510 }, + { "STY", 0x0000006c, 0x80, 1, Put4510 }, + { "STZ", 0x0000006c, 0x04, 5, PutAll }, + { "TAB", 0x00000001, 0x5b, 0, PutAll }, + { "TAX", 0x00000001, 0xaa, 0, PutAll }, + { "TAY", 0x00000001, 0xa8, 0, PutAll }, + { "TAZ", 0x00000001, 0x4b, 0, PutAll }, + { "TBA", 0x00000001, 0x7b, 0, PutAll }, + { "TRB", 0x0000000c, 0x10, 1, PutAll }, + { "TSB", 0x0000000c, 0x00, 1, PutAll }, + { "TSX", 0x00000001, 0xba, 0, PutAll }, + { "TSY", 0x00000001, 0x0b, 0, PutAll }, + { "TXA", 0x00000001, 0x8a, 0, PutAll }, + { "TXS", 0x00000001, 0x9a, 0, PutAll }, + { "TYA", 0x00000001, 0x98, 0, PutAll }, + { "TYS", 0x00000001, 0x2b, 0, PutAll }, + { "TZA", 0x00000001, 0x6b, 0, PutAll }, +/* END SORTED.SH */ + } +}; + + /* Instruction table for the 65816 */ static const struct { unsigned Count; InsDesc Ins[100]; } InsTab65816 = { + /* CAUTION: table must be sorted for bsearch */ sizeof (InsTab65816.Ins) / sizeof (InsTab65816.Ins[0]), { +/* BEGIN SORTED.SH */ { "ADC", 0x0b8f6fc, 0x60, 0, PutAll }, { "AND", 0x0b8f6fc, 0x20, 0, PutAll }, { "ASL", 0x000006e, 0x02, 1, PutAll }, @@ -836,6 +1294,7 @@ static const struct { { "WDM", 0x0800004, 0x42, 6, PutAll }, { "XBA", 0x0000001, 0xeb, 0, PutAll }, { "XCE", 0x0000001, 0xfb, 0, PutAll } +/* END SORTED.SH */ } }; @@ -844,8 +1303,10 @@ static const struct { unsigned Count; InsDesc Ins[26]; } InsTabSweet16 = { + /* CAUTION: table must be sorted for bsearch */ sizeof (InsTabSweet16.Ins) / sizeof (InsTabSweet16.Ins[0]), { +/* BEGIN SORTED.SH */ { "ADD", AMSW16_REG, 0xA0, 0, PutSweet16 }, { "BC", AMSW16_BRA, 0x03, 0, PutSweet16Branch }, { "BK", AMSW16_IMP, 0x0A, 0, PutSweet16 }, @@ -872,6 +1333,7 @@ static const struct { { "STD", AMSW16_IND, 0x70, 0, PutSweet16 }, { "STP", AMSW16_IND, 0x90, 0, PutSweet16 }, { "SUB", AMSW16_REG, 0xB0, 0, PutSweet16 }, +/* END SORTED.SH */ } }; @@ -880,8 +1342,10 @@ static const struct { unsigned Count; InsDesc Ins[135]; } InsTabHuC6280 = { + /* CAUTION: table must be sorted for bsearch */ sizeof (InsTabHuC6280.Ins) / sizeof (InsTabHuC6280.Ins[0]), { +/* BEGIN SORTED.SH */ { "ADC", 0x080A66C, 0x60, 0, PutAll }, { "AND", 0x080A66C, 0x20, 0, PutAll }, { "ASL", 0x000006e, 0x02, 1, PutAll }, @@ -1017,10 +1481,130 @@ static const struct { { "TXA", 0x0000001, 0x8a, 0, PutAll }, { "TXS", 0x0000001, 0x9a, 0, PutAll }, { "TYA", 0x0000001, 0x98, 0, PutAll } +/* END SORTED.SH */ } }; +/* CAUTION: in the pdf $1a is dec a, and $3a is inc a - if that is really the case, + * the table below (and the handler) should be fixed and this notice removed */ +/* Instruction table for the m740 CPU */ +static const struct { + unsigned Count; + InsDesc Ins[106]; +} InsTabm740 = { + sizeof (InsTabm740.Ins) / sizeof (InsTabm740.Ins[0]), + { +/* BEGIN SORTED.SH */ + { "ADC", 0x0080A26C, 0x60, 0, PutAll }, + { "AND", 0x0080A26C, 0x20, 0, PutAll }, + { "ASL", 0x0000006e, 0x02, 1, PutAll }, + { "BBC0", 0x10000002, 0x13, 10, PutBitBranch_m740 }, + { "BBC1", 0x10000002, 0x33, 10, PutBitBranch_m740 }, + { "BBC2", 0x10000002, 0x53, 10, PutBitBranch_m740 }, + { "BBC3", 0x10000002, 0x73, 10, PutBitBranch_m740 }, + { "BBC4", 0x10000002, 0x93, 10, PutBitBranch_m740 }, + { "BBC5", 0x10000002, 0xb3, 10, PutBitBranch_m740 }, + { "BBC6", 0x10000002, 0xd3, 10, PutBitBranch_m740 }, + { "BBC7", 0x10000002, 0xf3, 10, PutBitBranch_m740 }, + { "BBS0", 0x10000002, 0x03, 10, PutBitBranch_m740 }, + { "BBS1", 0x10000002, 0x23, 10, PutBitBranch_m740 }, + { "BBS2", 0x10000002, 0x43, 10, PutBitBranch_m740 }, + { "BBS3", 0x10000002, 0x63, 10, PutBitBranch_m740 }, + { "BBS4", 0x10000002, 0x83, 10, PutBitBranch_m740 }, + { "BBS5", 0x10000002, 0xa3, 10, PutBitBranch_m740 }, + { "BBS6", 0x10000002, 0xc3, 10, PutBitBranch_m740 }, + { "BBS7", 0x10000002, 0xe3, 10, PutBitBranch_m740 }, + { "BCC", 0x00020000, 0x90, 0, PutPCRel8 }, + { "BCS", 0x00020000, 0xb0, 0, PutPCRel8 }, + { "BEQ", 0x00020000, 0xf0, 0, PutPCRel8 }, + { "BIT", 0x0000000C, 0x00, 2, PutAll }, + { "BMI", 0x00020000, 0x30, 0, PutPCRel8 }, + { "BNE", 0x00020000, 0xd0, 0, PutPCRel8 }, + { "BPL", 0x00020000, 0x10, 0, PutPCRel8 }, + { "BRA", 0x00020000, 0x80, 0, PutPCRel8 }, + { "BRK", 0x00000001, 0x00, 0, PutAll }, + { "BVC", 0x00020000, 0x50, 0, PutPCRel8 }, + { "BVS", 0x00020000, 0x70, 0, PutPCRel8 }, + { "CLB0", 0x00000006, 0x1b, 10, PutAll }, + { "CLB1", 0x00000006, 0x3b, 10, PutAll }, + { "CLB2", 0x00000006, 0x5b, 10, PutAll }, + { "CLB3", 0x00000006, 0x7b, 10, PutAll }, + { "CLB4", 0x00000006, 0x9b, 10, PutAll }, + { "CLB5", 0x00000006, 0xbb, 10, PutAll }, + { "CLB6", 0x00000006, 0xdb, 10, PutAll }, + { "CLB7", 0x00000006, 0xfb, 10, PutAll }, + { "CLC", 0x00000001, 0x18, 0, PutAll }, + { "CLD", 0x00000001, 0xd8, 0, PutAll }, + { "CLI", 0x00000001, 0x58, 0, PutAll }, + { "CLT", 0x00000001, 0x12, 0, PutAll }, + { "CLV", 0x00000001, 0xb8, 0, PutAll }, + { "CMP", 0x0080A26C, 0xc0, 0, PutAll }, + { "COM", 0x00000004, 0x44, 1, PutAll }, + { "CPX", 0x0080000C, 0xe0, 1, PutAll }, + { "CPY", 0x0080000C, 0xc0, 1, PutAll }, + { "DEC", 0x0000006F, 0x00, 3, PutAll }, + { "DEX", 0x00000001, 0xca, 0, PutAll }, + { "DEY", 0x00000001, 0x88, 0, PutAll }, + { "EOR", 0x0080A26C, 0x40, 0, PutAll }, + { "FST", 0x00000001, 0xe2, 0, PutAll }, + { "INC", 0x0000006f, 0x00, 4, PutAll }, + { "INX", 0x00000001, 0xe8, 0, PutAll }, + { "INY", 0x00000001, 0xc8, 0, PutAll }, + { "JMP", 0x00000C08, 0x00, 12, PutAll }, + { "JSR", 0x20000408, 0x00, 0, PutJSR_m740 }, + { "LDA", 0x0080A26C, 0xa0, 0, PutAll }, + { "LDM", 0x10000000, 0x3c, 0, PutLDM_m740 }, + { "LDX", 0x0080030C, 0xa2, 1, PutAll }, + { "LDY", 0x0080006C, 0xa0, 1, PutAll }, + { "LSR", 0x0000006F, 0x42, 1, PutAll }, + { "NOP", 0x00000001, 0xea, 0, PutAll }, + { "ORA", 0x0080A26C, 0x00, 0, PutAll }, + { "PHA", 0x00000001, 0x48, 0, PutAll }, + { "PHP", 0x00000001, 0x08, 0, PutAll }, + { "PLA", 0x00000001, 0x68, 0, PutAll }, + { "PLP", 0x00000001, 0x28, 0, PutAll }, + { "RMB0", 0x00000006, 0x1b, 10, PutAll }, + { "RMB1", 0x00000006, 0x3b, 10, PutAll }, + { "RMB2", 0x00000006, 0x5b, 10, PutAll }, + { "RMB3", 0x00000006, 0x7b, 10, PutAll }, + { "RMB4", 0x00000006, 0x9b, 10, PutAll }, + { "RMB5", 0x00000006, 0xbb, 10, PutAll }, + { "RMB6", 0x00000006, 0xdb, 10, PutAll }, + { "RMB7", 0x00000006, 0xfb, 10, PutAll }, + { "ROL", 0x0000006F, 0x22, 1, PutAll }, + { "ROR", 0x0000006F, 0x62, 1, PutAll }, + { "RRF", 0x00000004, 0x82, 6, PutAll }, + { "RTI", 0x00000001, 0x40, 0, PutAll }, + { "RTS", 0x00000001, 0x60, 0, PutAll }, + { "SBC", 0x0080A26C, 0xe0, 0, PutAll }, + { "SEB0", 0x00000006, 0x0b, 10, PutAll }, + { "SEB1", 0x00000006, 0x2b, 10, PutAll }, + { "SEB2", 0x00000006, 0x4b, 10, PutAll }, + { "SEB3", 0x00000006, 0x6b, 10, PutAll }, + { "SEB4", 0x00000006, 0x8b, 10, PutAll }, + { "SEB5", 0x00000006, 0xab, 10, PutAll }, + { "SEB6", 0x00000006, 0xcb, 10, PutAll }, + { "SEB7", 0x00000006, 0xeb, 10, PutAll }, + { "SEC", 0x00000001, 0x38, 0, PutAll }, + { "SED", 0x00000001, 0xf8, 0, PutAll }, + { "SEI", 0x00000001, 0x78, 0, PutAll }, + { "SET", 0x00000001, 0x32, 0, PutAll }, + { "SLW", 0x00000001, 0xC2, 0, PutAll }, + { "STA", 0x0000A26C, 0x80, 0, PutAll }, + { "STP", 0x00000001, 0x42, 0, PutAll }, + { "STX", 0x0000010c, 0x82, 1, PutAll }, + { "STY", 0x0000002c, 0x80, 1, PutAll }, + { "TAX", 0x00000001, 0xaa, 0, PutAll }, + { "TAY", 0x00000001, 0xa8, 0, PutAll }, + { "TST", 0x00000004, 0x64, 1, PutAll }, + { "TSX", 0x00000001, 0xba, 0, PutAll }, + { "TXA", 0x00000001, 0x8a, 0, PutAll }, + { "TXS", 0x00000001, 0x9a, 0, PutAll }, + { "TYA", 0x00000001, 0x98, 0, PutAll } +/* END SORTED.SH */ + } +}; /* An array with instruction tables */ static const InsTable* InsTabs[CPU_COUNT] = { @@ -1028,92 +1612,120 @@ static const InsTable* InsTabs[CPU_COUNT] = { (const InsTable*) &InsTab6502, (const InsTable*) &InsTab6502X, (const InsTable*) &InsTab6502DTV, - (const InsTable*) &InsTab65SC02, - (const InsTable*) &InsTab65C02, + (const InsTable*) &InsTab65SC02, /* original CMOS */ + (const InsTable*) &InsTab65C02, /* CMOS with Rockwell extensions */ (const InsTable*) &InsTab65816, (const InsTable*) &InsTabSweet16, (const InsTable*) &InsTabHuC6280, - 0, /* Mitsubishi 740 */ + (const InsTable*) &InsTabm740, /* Mitsubishi 740 */ (const InsTable*) &InsTab4510, + (const InsTable*) &InsTab45GS02, + (const InsTable*) &InsTabW65C02, /* CMOS with WDC extensions */ + (const InsTable*) &InsTab65CE02, /* CMOS with CSG extensions */ }; const InsTable* InsTab = (const InsTable*) &InsTab6502; /* Table to build the effective 65xx opcode from a base opcode and an ** addressing mode. (The value in the table is ORed with the base opcode) +** NOTE: each table has one entry per addressing mode! */ -static unsigned char EATab[12][AM65I_COUNT] = { - { /* Table 0 */ +static unsigned char EATab[16][AM65I_COUNT] = { + { /* Table 0 (sec, sed, seo, set, slw, sta, stp, tax, tay, tsx, txa, txs, tya) */ 0x00, 0x00, 0x05, 0x0D, 0x0F, 0x15, 0x1D, 0x1F, 0x00, 0x19, 0x12, 0x00, 0x07, 0x11, 0x17, 0x01, 0x00, 0x00, 0x00, 0x03, 0x13, 0x09, 0x00, 0x09, - 0x00, 0x00, 0x00, 0x00 + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x12, 0x00 }, - { /* Table 1 */ + { /* Table 1 (rol, ror, stx, sty, tst, cpx, cpy) */ 0x08, 0x08, 0x04, 0x0C, 0x00, 0x14, 0x1C, 0x00, 0x14, 0x1C, 0x00, 0x80, 0x00, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x80, 0x00 + 0x00, 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00 }, - { /* Table 2 */ + { /* Table 2 (bit) */ 0x00, 0x00, 0x24, 0x2C, 0x0F, 0x34, 0x3C, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x89, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00 + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 }, - { /* Table 3 */ + { /* Table 3 (dec, dea) */ 0x3A, 0x3A, 0xC6, 0xCE, 0x00, 0xD6, 0xDE, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00 + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 }, - { /* Table 4 */ + { /* Table 4 (inc) */ 0x1A, 0x1A, 0xE6, 0xEE, 0x00, 0xF6, 0xFE, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00 + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 }, - { /* Table 5 */ + { /* Table 5 (stz) */ 0x00, 0x00, 0x60, 0x98, 0x00, 0x70, 0x9E, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00 + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 }, - { /* Table 6 */ + { /* Table 6 (jmp, rrf) */ 0x00, 0x00, 0x00, 0x00, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x20, 0x00, 0x00, 0x00, 0x00, 0x30, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x90, 0x00 + 0x00, 0x00, 0x90, 0x00, 0x00, 0x00, 0x00, 0x00 }, - { /* Table 7 (Subroutine opcodes) */ + { /* Table 7 (jsr) */ 0x00, 0x00, 0x00, 0x00, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x02, 0x00, 0x00, 0x00, 0x00, 0xDC, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00 + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 }, { /* Table 8 */ 0x00, 0x40, 0x01, 0x41, 0x00, 0x09, 0x49, 0x00, 0x00, 0x00, 0x00, 0x51, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x40, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00 + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 }, - { /* Table 9 */ + { /* Table 9 (dew, inw) */ 0x00, 0x00, 0x00, 0x10, 0x00, 0x20, 0x30, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00 + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 }, - { /* Table 10 (NOPs) */ + { /* Table 10 (NOPs, clbX, sebX) */ 0xea, 0x00, 0x04, 0x0c, 0x00, 0x14, 0x1c, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, - 0x00, 0x00, 0x00, 0x00 + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 }, { /* Table 11 (LAX) */ 0x08, 0x08, 0x04, 0x0C, 0x00, 0x14, 0x1C, 0x00, 0x14, 0x1C, 0x00, 0x80, 0x00, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, - 0x00, 0x00, 0x80, 0x00 + 0x00, 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00 }, + { /* Table 12 (m740: JMP) */ + 0x00, 0x00, 0x00, 0x4c, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0xb2, 0x6c, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 + }, + { /* Table 13 (Q) */ + 0x00, 0x00, 0x05, 0x0D, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x12, 0x00, 0x12, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x12, 0x00 + }, + { /* Table 14 (45GS02: ASLQ) */ + 0x0a, 0x0a, 0x06, 0x0e, 0x00, 0x16, 0x1e, 0x00, + 0x00, 0x00, 0x12, 0x00, 0x12, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x0a + }, + { /* Table 15 (45GS02: ASRQ) */ + 0x03, 0x03, 0x04, 0x0c, 0x00, 0x14, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x03 + } }; /* Table to build the effective SWEET16 opcode from a base opcode and an @@ -1129,6 +1741,7 @@ static unsigned char Sweet16EATab[2][AMSW16I_COUNT] = { }; /* Table that encodes the additional bytes for each 65xx instruction */ +/* NOTE: one entry per addressing mode! */ unsigned char ExtBytes[AM65I_COUNT] = { 0, /* Implicit */ 0, /* Accu */ @@ -1158,6 +1771,10 @@ unsigned char ExtBytes[AM65I_COUNT] = { 7, /* Block transfer (HuC6280) */ 2, /* Absolute Indirect long */ 2, /* Immidiate word */ + 2, /* Direct, Relative short */ + 1, /* Special Page */ + 1, /* [Direct],z */ + 0, /* Q */ }; /* Table that encodes the additional bytes for each SWEET16 instruction */ @@ -1334,6 +1951,20 @@ static void EmitCode (EffAddr* A) } +static void PutLDM_m740 (const InsDesc* Ins) +{ + EffAddr A; + /* Evaluate the addressing mode */ + if (EvalEA (Ins, &A) == 0) { + /* An error occurred */ + return; + } + Emit0 (Ins->BaseCode); + EmitByte (A.Expr); + Consume (TOK_HASH, "'#' expected"); + EmitByte (Expression ()); +} + static long PutImmed8 (const InsDesc* Ins) /* Parse and emit an immediate 8 bit instruction. Return the value of the @@ -1454,6 +2085,42 @@ static void PutBitBranch (const InsDesc* Ins) EmitSigned (GenBranchExpr (1), 1); } +static void PutBitBranch_m740 (const InsDesc* Ins) +/* Handle m740 branch on bit condition */ +{ + EffAddr A; + + /* Evaluate the addressing mode used */ + GetEA(&A); + + /* From the possible addressing modes, remove the ones that are invalid + ** for this instruction or CPU. + */ + A.AddrModeSet &= Ins->AddrMode; + + /* Check if we have any adressing modes left */ + if (A.AddrModeSet == 0) { + Error ("Illegal addressing mode"); + return; + } + A.AddrMode = BitFind (A.AddrModeSet); + + A.Opcode = Ins->BaseCode; + + if (A.AddrMode == AM65I_ACCU) { + /* Accu */ + Emit0 (A.Opcode); + ConsumeComma (); + EmitSigned (GenBranchExpr (2), 1); + } else if (A.AddrMode == AM65I_ZP_REL) { + /* FIXME: hacky, the comma was already consumed here */ + A.Opcode += 0x04; + /* Zeropage */ + Emit0 (A.Opcode); + EmitByte (A.Expr); + EmitSigned (GenBranchExpr (1), 1); + } +} static void PutREP (const InsDesc* Ins) @@ -1557,7 +2224,6 @@ static void PutTMAn (const InsDesc* Ins) ** an immediate argument. */ { - /* Emit the TMA opcode itself */ Emit0 (0x43); /* Emit the argument, which is the opcode from the table */ @@ -1613,10 +2279,8 @@ static void PutJMP (const InsDesc* Ins) */ { EffAddr A; - /* Evaluate the addressing mode used */ if (EvalEA (Ins, &A)) { - /* Check for indirect addressing */ if ((A.AddrModeBit & AM65_ABS_IND) && (CPU < CPU_65SC02) && (RelaxChecks == 0)) { @@ -1674,6 +2338,57 @@ static void PutJSR816 (const InsDesc* Ins) } +static void PutJSR_m740 (const InsDesc* Ins) +/* Handle a JSR instruction for m740 */ +{ + EffAddr A; + + /* Evaluate the addressing mode used */ + GetEA (&A); + + /* From the possible addressing modes, remove the ones that are invalid + ** for this instruction or CPU. + */ + A.AddrModeSet &= Ins->AddrMode; + + /* Check if we have any adressing modes left */ + if (A.AddrModeSet == 0) { + Error ("Illegal addressing mode"); + return; + } + A.AddrMode = BitFind (A.AddrModeSet); + + /* Build the opcode */ + A.Opcode = Ins->BaseCode; + + switch (A.AddrMode) { + case AM65I_DIR_IND: + A.Opcode = 0x02; + Emit1 (A.Opcode, A.Expr); + break; + case AM65I_ABS: + /* If we have an expression and it's const, get it's value */ + if (A.Expr) { + long Val = -1; + if (IsConstExpr (A.Expr, &Val)) { + if ((Val & 0xff00) == 0xff00) { + /* direct page */ + A.Opcode = 0x22; + Emit0 (A.Opcode); + EmitByte(GenByteExpr(A.Expr)); + return; + } + } + } + A.Opcode = 0x20; + Emit2 (A.Opcode, A.Expr); + break; + default: + Internal ("Invalid Opcode 0x%02x", A.Opcode); + } + +} + static void PutRTS (const InsDesc* Ins attribute ((unused))) /* Handle the RTS instruction for the 816. In smart mode emit a RTL opcode if @@ -1703,9 +2418,7 @@ static void PutAll (const InsDesc* Ins) -static void Put4510 (const InsDesc* Ins) -/* Handle all other instructions, with modifications for 4510 */ -{ +static void Emit4510 (EffAddr* A) { /* The 4510 uses all 256 possible opcodes, so the last ones were crammed ** in where an opcode was still undefined. As a result, some of those ** don't follow any rules for encoding the addressmodes. So the EATab @@ -1725,25 +2438,91 @@ static void Put4510 (const InsDesc* Ins) ** $d0 -> $c2 : CPZ #$00 ** $fc -> $23 : JSR ($1234,X) */ + switch (A->Opcode) { + case 0x47: + A->Opcode = 0x44; + break; + case 0x57: + A->Opcode = 0x54; + break; + case 0x93: + A->Opcode = 0x82; + break; + case 0x9C: + A->Opcode = 0x8B; + break; + case 0x9E: + A->Opcode = 0x9B; + break; + case 0xAF: + A->Opcode = 0xAB; + break; + case 0xBF: + A->Opcode = 0xBB; + break; + case 0xB3: + A->Opcode = 0xE2; + break; + case 0xD0: + A->Opcode = 0xC2; + break; + case 0xFC: + A->Opcode = 0x23; + break; + default: /* Keep opcode as it is */ break; + } + + /* No error, output code */ + EmitCode (A); +} + + + +static void Put4510 (const InsDesc* Ins) +/* Handle all other instructions, with modifications for 4510 */ +{ EffAddr A; /* Evaluate the addressing mode used */ if (EvalEA (Ins, &A)) { - switch (A.Opcode) { - case 0x47: A.Opcode = 0x44; break; - case 0x57: A.Opcode = 0x54; break; - case 0x93: A.Opcode = 0x82; break; - case 0x9C: A.Opcode = 0x8B; break; - case 0x9E: A.Opcode = 0x9B; break; - case 0xAF: A.Opcode = 0xAB; break; - case 0xBF: A.Opcode = 0xBB; break; - case 0xB3: A.Opcode = 0xE2; break; - case 0xD0: A.Opcode = 0xC2; break; - case 0xFC: A.Opcode = 0x23; break; - default: /* Keep opcode as it is */ break; - } + Emit4510 (&A); + } +} - /* No error, output code */ + + +static void Put45GS02 (const InsDesc* Ins) +/* Handle all other instructions, with modifications for 45GS02 */ +{ + EffAddr A; + + if (EvalEA (Ins, &A)) { + if (A.AddrModeSet == AM65_32BIT_BASE_IND_Z) { + Emit0 (0xEA); /* NOP prefix */ + } + Emit4510 (&A); + } +} + + + +static void Put45GS02_Q (const InsDesc* Ins) +{ + EffAddr A; + + if (EvalEA (Ins, &A)) { + Emit0 (0x42); + Emit0 (0x42); + if ((A.AddrModeBit == AM65_DIR_IND_LONG) || + (A.AddrModeBit == AM65_32BIT_BASE_IND_Z)) { + Emit0 (0xEA); /* NOP prefix */ + } + if (A.Opcode == 0xea) { + A.Opcode = 0x1a; + } + else if (A.Opcode == 0xca) { + A.Opcode = 0x3a; + } EmitCode (&A); } } diff --git a/src/ca65/instr.h b/src/ca65/instr.h index fe18d2110..9c91fd0cf 100644 --- a/src/ca65/instr.h +++ b/src/ca65/instr.h @@ -58,34 +58,38 @@ ** When assembling for the 6502 or 65C02, all addressing modes that are not ** available on these CPUs are removed before doing any checks. */ -#define AM65_IMPLICIT 0x00000003UL -#define AM65_ACCU 0x00000002UL -#define AM65_DIR 0x00000004UL -#define AM65_ABS 0x00000008UL -#define AM65_ABS_LONG 0x00000010UL -#define AM65_DIR_X 0x00000020UL -#define AM65_ABS_X 0x00000040UL -#define AM65_ABS_LONG_X 0x00000080UL -#define AM65_DIR_Y 0x00000100UL -#define AM65_ABS_Y 0x00000200UL -#define AM65_DIR_IND 0x00000400UL -#define AM65_ABS_IND 0x00000800UL -#define AM65_DIR_IND_LONG 0x00001000UL -#define AM65_DIR_IND_Y 0x00002000UL -#define AM65_DIR_IND_LONG_Y 0x00004000UL -#define AM65_DIR_X_IND 0x00008000UL -#define AM65_ABS_X_IND 0x00010000UL -#define AM65_REL 0x00020000UL -#define AM65_REL_LONG 0x00040000UL -#define AM65_STACK_REL 0x00080000UL -#define AM65_STACK_REL_IND_Y 0x00100000UL +#define AM65_IMPLICIT 0x00000003UL /* IMP */ +#define AM65_ACCU 0x00000002UL /* A */ +#define AM65_DIR 0x00000004UL /* ZP */ +#define AM65_ABS 0x00000008UL /* ABS */ +#define AM65_ABS_LONG 0x00000010UL /* adr */ +#define AM65_DIR_X 0x00000020UL /* ZP,X */ +#define AM65_ABS_X 0x00000040UL /* ABS, X */ +#define AM65_ABS_LONG_X 0x00000080UL /* adr,x */ +#define AM65_DIR_Y 0x00000100UL /* ZP, Y */ +#define AM65_ABS_Y 0x00000200UL /* ABS, Y */ +#define AM65_DIR_IND 0x00000400UL /* (ZP) or (ZP),z (4510 / 45GS02) */ +#define AM65_ABS_IND 0x00000800UL /* (ABS) */ +#define AM65_DIR_IND_LONG 0x00001000UL /* [ABS] (65816) */ +#define AM65_DIR_IND_Y 0x00002000UL /* (ZP),y */ +#define AM65_DIR_IND_LONG_Y 0x00004000UL /* [adr],y (not 45GS02) */ +#define AM65_DIR_X_IND 0x00008000UL /* (ZP,x) */ +#define AM65_ABS_X_IND 0x00010000UL /* (ABS,x) */ +#define AM65_REL 0x00020000UL /* REL */ +#define AM65_REL_LONG 0x00040000UL /* LONGREL */ +#define AM65_STACK_REL 0x00080000UL /* adr,s */ +#define AM65_STACK_REL_IND_Y 0x00100000UL /* (rel,s),y */ #define AM65_IMM_ACCU 0x00200000UL #define AM65_IMM_INDEX 0x00400000UL -#define AM65_IMM_IMPLICIT 0x00800000UL +#define AM65_IMM_IMPLICIT 0x00800000UL /* IMM */ #define AM65_BLOCKMOVE 0x01000000UL #define AM65_BLOCKXFER 0x02000000UL -#define AM65_ABS_IND_LONG 0x04000000UL +#define AM65_ABS_IND_LONG 0x04000000UL /* (adr) [dir] */ #define AM65_IMM_IMPLICIT_WORD 0x08000000UL /* PHW #$1234 (4510 only) */ +#define AM65_ZP_REL 0x10000000UL /* ZP, REL (m740) */ +#define AM65_SPECIAL_PAGE 0x20000000UL /* $FFxx (m740) */ +#define AM65_32BIT_BASE_IND_Z 0x40000000UL /* LDA [$nn],Z (45GS02 only) */ +#define AM65_Q 0x80000000UL /* Q (45GS02 only) */ /* Bitmask for all ZP operations that have correspondent ABS ops */ #define AM65_SET_ZP (AM65_DIR | AM65_DIR_X | AM65_DIR_Y | AM65_DIR_IND | AM65_DIR_X_IND) @@ -106,11 +110,39 @@ #define AM65_ALL_IMM (AM65_IMM_ACCU | AM65_IMM_INDEX | AM65_IMM_IMPLICIT | AM65_IMM_IMPLICIT_WORD) /* Bit numbers and count */ -#define AM65I_IMM_ACCU 21 -#define AM65I_IMM_INDEX 22 -#define AM65I_IMM_IMPLICIT 23 -#define AM65I_IMM_IMPLICIT_WORD 27 -#define AM65I_COUNT 28 +#define AM65I_IMPLICIT 0 +#define AM65I_ACCU 1 +#define AM65I_DIR 2 +#define AM65I_ABS 3 +#define AM65I_ABS_LONG 4 +#define AM65I_DIR_X 5 +#define AM65I_ABS_X 6 +#define AM65I_ABS_LONG_X 7 +#define AM65I_DIR_Y 8 +#define AM65I_ABS_Y 9 +#define AM65I_DIR_IND 10 +#define AM65I_ABS_IND 11 +#define AM65I_DIR_IND_LONG 12 +#define AM65I_DIR_IND_Y 13 +#define AM65I_DIR_IND_LONG_Y 14 +#define AM65I_DIR_X_IND 15 +#define AM65I_ABS_X_IND 16 +#define AM65I_REL 17 +#define AM65I_REL_LONG 18 +#define AM65I_STACK_REL 19 +#define AM65I_STACK_REL_IND_Y 20 +#define AM65I_IMM_ACCU 21 +#define AM65I_IMM_INDEX 22 +#define AM65I_IMM_IMPLICIT 23 +#define AM65I_BLOCKMOVE 24 +#define AM65I_BLOCKXFER 25 +#define AM65I_ABS_IND_LONG 26 +#define AM65I_IMM_IMPLICIT_WORD 27 +#define AM65I_ZP_REL 28 +#define AM65I_SPECIAL_PAGE 29 +#define AM65I_32BIT_BASE_IND_Z 30 +#define AM65I_Q 31 +#define AM65I_COUNT 32 diff --git a/src/ca65/main.c b/src/ca65/main.c index f3100162a..f113bc812 100644 --- a/src/ca65/main.c +++ b/src/ca65/main.c @@ -342,6 +342,10 @@ static void SetSys (const char* Sys) NewSymbol ("__SYM1__", 1); break; + case TGT_MEGA65: + CBMSystem ("__MEGA65__"); + break; + case TGT_KIM1: NewSymbol ("__KIM1__", 1); break; @@ -350,6 +354,10 @@ static void SetSys (const char* Sys) NewSymbol ("__RP6502__", 1); break; + case TGT_AGAT: + NewSymbol ("__AGAT__", 1); + break; + default: AbEnd ("Invalid target name: '%s'", Sys); diff --git a/src/ca65/pseudo.c b/src/ca65/pseudo.c index 2ce1ae087..e6e10df2c 100644 --- a/src/ca65/pseudo.c +++ b/src/ca65/pseudo.c @@ -1562,6 +1562,14 @@ static void DoP02 (void) +static void DoP02X (void) +/* Switch to 6502X CPU */ +{ + SetCPU (CPU_6502X); +} + + + static void DoPC02 (void) /* Switch to 65C02 CPU */ { @@ -1570,10 +1578,18 @@ static void DoPC02 (void) -static void DoP816 (void) -/* Switch to 65816 CPU */ +static void DoPWC02 (void) +/* Switch to W65C02 CPU */ { - SetCPU (CPU_65816); + SetCPU (CPU_W65C02); +} + + + +static void DoPCE02 (void) +/* Switch to 65CE02 CPU */ +{ + SetCPU (CPU_65CE02); } @@ -1586,6 +1602,30 @@ static void DoP4510 (void) +static void DoP45GS02 (void) +/* Switch to 45GS02 CPU */ +{ + SetCPU (CPU_45GS02); +} + + + +static void DoP6280 (void) +/* Switch to HuC6280 CPU */ +{ + SetCPU (CPU_HUC6280); +} + + + +static void DoP816 (void) +/* Switch to 65816 CPU */ +{ + SetCPU (CPU_65816); +} + + + static void DoPDTV (void) /* Switch to C64DTV CPU */ { @@ -1594,6 +1634,14 @@ static void DoPDTV (void) +static void DoPM740 (void) +/* Switch to M740 CPU */ +{ + SetCPU (CPU_M740); +} + + + static void DoPageLength (void) /* Set the page length for the listing */ { @@ -1704,6 +1752,14 @@ static void DoPSC02 (void) +static void DoPSweet16 (void) +/* Switch to Sweet16 CPU */ +{ + SetCPU (CPU_SWEET16); +} + + + static void DoPushCharmap (void) /* Save the current charmap */ { @@ -2057,70 +2113,72 @@ struct CtrlDesc { void (*Handler) (void); /* Command handler */ }; +/* NOTE: .AND, .BITAND, .BITNOT, .BITOR, .BITXOR, .MOD, .NOT, .OR, .SHL, .SHR + and .XOR do NOT go into this table */ #define PSEUDO_COUNT (sizeof (CtrlCmdTab) / sizeof (CtrlCmdTab [0])) static CtrlDesc CtrlCmdTab [] = { - { ccNone, DoA16 }, - { ccNone, DoA8 }, + { ccNone, DoA16 }, /* .A16 */ + { ccNone, DoA8 }, /* .A8 */ { ccNone, DoAddr }, /* .ADDR */ { ccNone, DoUnexpected }, /* .ADDRSIZE */ - { ccNone, DoAlign }, - { ccNone, DoASCIIZ }, + { ccNone, DoAlign }, /* .ALIGN */ + { ccNone, DoASCIIZ }, /* .ASCIIZ */ { ccNone, DoUnexpected }, /* .ASIZE */ - { ccNone, DoAssert }, - { ccNone, DoAutoImport }, + { ccNone, DoAssert }, /* .ASSERT */ + { ccNone, DoAutoImport }, /* .AUTOIMPORT */ { ccNone, DoUnexpected }, /* .BANK */ { ccNone, DoUnexpected }, /* .BANKBYTE */ - { ccNone, DoBankBytes }, + { ccNone, DoBankBytes }, /* .BANKBYTES */ { ccNone, DoUnexpected }, /* .BLANK */ - { ccNone, DoBss }, - { ccNone, DoByte }, - { ccNone, DoCase }, - { ccNone, DoCharMap }, - { ccNone, DoCode }, + { ccNone, DoBss }, /* .BSS */ + { ccNone, DoByte }, /* .BYT, .BYTE */ + { ccNone, DoCase }, /* .CASE */ + { ccNone, DoCharMap }, /* .CHARMAP */ + { ccNone, DoCode }, /* .CODE */ { ccNone, DoUnexpected, }, /* .CONCAT */ - { ccNone, DoConDes }, + { ccNone, DoConDes }, /* .CONDES */ { ccNone, DoUnexpected }, /* .CONST */ - { ccNone, DoConstructor }, + { ccNone, DoConstructor }, /* .CONSTRUCTOR */ { ccNone, DoUnexpected }, /* .CPU */ - { ccNone, DoData }, - { ccNone, DoDbg, }, - { ccNone, DoDByt }, - { ccNone, DoDebugInfo }, - { ccKeepToken, DoDefine }, + { ccNone, DoData }, /* .DATA */ + { ccNone, DoDbg, }, /* .DBG */ + { ccNone, DoDByt }, /* .DBYT */ + { ccNone, DoDebugInfo }, /* .DEBUGINFO */ + { ccKeepToken, DoDefine }, /* .DEF, .DEFINE */ { ccNone, DoUnexpected }, /* .DEFINED */ { ccNone, DoUnexpected }, /* .DEFINEDMACRO */ - { ccNone, DoDelMac }, - { ccNone, DoDestructor }, - { ccNone, DoDWord }, + { ccNone, DoDelMac }, /* .DELMAC, .DELMACRO */ + { ccNone, DoDestructor }, /* .DESTRUCTOR */ + { ccNone, DoDWord }, /* .DWORD */ { ccKeepToken, DoConditionals }, /* .ELSE */ { ccKeepToken, DoConditionals }, /* .ELSEIF */ - { ccKeepToken, DoEnd }, + { ccKeepToken, DoEnd }, /* .END */ { ccNone, DoUnexpected }, /* .ENDENUM */ { ccKeepToken, DoConditionals }, /* .ENDIF */ - { ccNone, DoUnexpected }, /* .ENDMACRO */ - { ccNone, DoEndProc }, - { ccNone, DoUnexpected }, /* .ENDREPEAT */ - { ccNone, DoEndScope }, + { ccNone, DoUnexpected }, /* .ENDMAC, .ENDMACRO */ + { ccNone, DoEndProc }, /* .ENDPROC */ + { ccNone, DoUnexpected }, /* .ENDREP, .ENDREPEAT */ + { ccNone, DoEndScope }, /* .ENDSCOPE */ { ccNone, DoUnexpected }, /* .ENDSTRUCT */ { ccNone, DoUnexpected }, /* .ENDUNION */ - { ccNone, DoEnum }, - { ccNone, DoError }, - { ccNone, DoExitMacro }, - { ccNone, DoExport }, - { ccNone, DoExportZP }, - { ccNone, DoFarAddr }, - { ccNone, DoFatal }, - { ccNone, DoFeature }, - { ccNone, DoFileOpt }, - { ccNone, DoForceImport }, + { ccNone, DoEnum }, /* .ENUM */ + { ccNone, DoError }, /* .ERROR */ + { ccNone, DoExitMacro }, /* .EXITMAC, .EXITMACRO */ + { ccNone, DoExport }, /* .EXPORT */ + { ccNone, DoExportZP }, /* .EXPORTZP */ + { ccNone, DoFarAddr }, /* .FARADDR */ + { ccNone, DoFatal }, /* .FATAL */ + { ccNone, DoFeature }, /* .FEATURE */ + { ccNone, DoFileOpt }, /* .FOPT, .FILEOPT */ + { ccNone, DoForceImport }, /* .FORCEIMPORT */ { ccNone, DoUnexpected }, /* .FORCEWORD */ - { ccNone, DoGlobal }, - { ccNone, DoGlobalZP }, + { ccNone, DoGlobal }, /* .GLOBAL */ + { ccNone, DoGlobalZP }, /* .GLOBALZP */ { ccNone, DoUnexpected }, /* .HIBYTE */ - { ccNone, DoHiBytes }, + { ccNone, DoHiBytes }, /* .HIBYTES */ { ccNone, DoUnexpected }, /* .HIWORD */ - { ccNone, DoI16 }, - { ccNone, DoI8 }, + { ccNone, DoI16 }, /* .I16 */ + { ccNone, DoI8 }, /* .I8 */ { ccNone, DoUnexpected }, /* .IDENT */ { ccKeepToken, DoConditionals }, /* .IF */ { ccKeepToken, DoConditionals }, /* .IFBLANK */ @@ -2131,81 +2189,95 @@ static CtrlDesc CtrlCmdTab [] = { { ccKeepToken, DoConditionals }, /* .IFNDEF */ { ccKeepToken, DoConditionals }, /* .IFNREF */ { ccKeepToken, DoConditionals }, /* .IFP02 */ + { ccKeepToken, DoConditionals }, /* .IFP02X */ { ccKeepToken, DoConditionals }, /* .IFP4510 */ + { ccKeepToken, DoConditionals }, /* .IFP45GS02 */ + { ccKeepToken, DoConditionals }, /* .IFP6280 */ { ccKeepToken, DoConditionals }, /* .IFP816 */ { ccKeepToken, DoConditionals }, /* .IFPC02 */ + { ccKeepToken, DoConditionals }, /* .IFPCE02 */ { ccKeepToken, DoConditionals }, /* .IFPDTV */ + { ccKeepToken, DoConditionals }, /* .IFPM740 */ { ccKeepToken, DoConditionals }, /* .IFPSC02 */ + { ccKeepToken, DoConditionals }, /* .IFPSWEET16 */ + { ccKeepToken, DoConditionals }, /* .IFPWC02 */ { ccKeepToken, DoConditionals }, /* .IFREF */ - { ccNone, DoImport }, - { ccNone, DoImportZP }, - { ccNone, DoIncBin }, - { ccNone, DoInclude }, - { ccNone, DoInterruptor }, + { ccNone, DoImport }, /* .IMPORT */ + { ccNone, DoImportZP }, /* .IMPORTZP */ + { ccNone, DoIncBin }, /* .INCBIN */ + { ccNone, DoInclude }, /* .INCLUDE */ + { ccNone, DoInterruptor }, /* .INTERRUPTPOR */ { ccNone, DoUnexpected }, /* .ISIZE */ { ccNone, DoUnexpected }, /* .ISMNEMONIC */ { ccNone, DoInvalid }, /* .LEFT */ - { ccNone, DoLineCont }, - { ccNone, DoList }, - { ccNone, DoListBytes }, - { ccNone, DoLiteral }, + { ccNone, DoLineCont }, /* .LINECONT */ + { ccNone, DoList }, /* .LIST */ + { ccNone, DoListBytes }, /* .LISTBYTES */ + { ccNone, DoLiteral }, /* .LITERAL */ { ccNone, DoUnexpected }, /* .LOBYTE */ - { ccNone, DoLoBytes }, + { ccNone, DoLoBytes }, /* .LOBYTES */ { ccNone, DoUnexpected }, /* .LOCAL */ - { ccNone, DoLocalChar }, + { ccNone, DoLocalChar }, /* .LOCALCHAR */ { ccNone, DoUnexpected }, /* .LOWORD */ - { ccNone, DoMacPack }, - { ccNone, DoMacro }, + { ccNone, DoMacPack }, /* .MACPACK */ + { ccNone, DoMacro }, /* .MAC, .MACRO */ { ccNone, DoUnexpected }, /* .MATCH */ { ccNone, DoUnexpected }, /* .MAX */ { ccNone, DoInvalid }, /* .MID */ { ccNone, DoUnexpected }, /* .MIN */ - { ccNone, DoNull }, - { ccNone, DoOrg }, - { ccNone, DoOut }, - { ccNone, DoP02 }, - { ccNone, DoP4510 }, - { ccNone, DoP816 }, - { ccNone, DoPageLength }, + { ccNone, DoNull }, /* .NULL */ + { ccNone, DoOrg }, /* .ORG */ + { ccNone, DoOut }, /* .OUT */ + { ccNone, DoP02 }, /* .P02 */ + { ccNone, DoP02X }, /* .P02X */ + { ccNone, DoP4510 }, /* .P4510 */ + { ccNone, DoP45GS02 }, /* .P45GS02 */ + { ccNone, DoP6280 }, /* .P6280 */ + { ccNone, DoP816 }, /* .P816 */ + { ccNone, DoPageLength }, /* .PAGELEN, .PAGELENGTH */ { ccNone, DoUnexpected }, /* .PARAMCOUNT */ - { ccNone, DoPC02 }, - { ccNone, DoPDTV }, - { ccNone, DoPopCharmap }, - { ccNone, DoPopCPU }, - { ccNone, DoPopSeg }, - { ccNone, DoProc }, - { ccNone, DoPSC02 }, - { ccNone, DoPushCharmap }, - { ccNone, DoPushCPU }, - { ccNone, DoPushSeg }, - { ccNone, DoUnexpected }, /* .REFERENCED */ - { ccNone, DoReferTo }, /* .REFERTO */ - { ccNone, DoReloc }, - { ccNone, DoRepeat }, - { ccNone, DoRes }, + { ccNone, DoPC02 }, /* .PC02 */ + { ccNone, DoPCE02 }, /* .PCE02 */ + { ccNone, DoPDTV }, /* .PDTV */ + { ccNone, DoPM740 }, /* .PM740 */ + { ccNone, DoPopCharmap }, /* .POPCHARMAP */ + { ccNone, DoPopCPU }, /* .POPCPU */ + { ccNone, DoPopSeg }, /* .POPSEG */ + { ccNone, DoProc }, /* .PROC */ + { ccNone, DoPSC02 }, /* .PSC02 */ + { ccNone, DoPSweet16 }, /* .PSWEET16 */ + { ccNone, DoPushCharmap }, /* .PUSHCHARMAP */ + { ccNone, DoPushCPU }, /* .PUSHCPU */ + { ccNone, DoPushSeg }, /* .PUSHSEG */ + { ccNone, DoPWC02 }, /* .PWC02 */ + { ccNone, DoUnexpected }, /* .REF, .REFERENCED */ + { ccNone, DoReferTo }, /* .REFTO, .REFERTO */ + { ccNone, DoReloc }, /* .RELOC */ + { ccNone, DoRepeat }, /* .REPEAT */ + { ccNone, DoRes }, /* .RES */ { ccNone, DoInvalid }, /* .RIGHT */ - { ccNone, DoROData }, - { ccNone, DoScope }, - { ccNone, DoSegment }, + { ccNone, DoROData }, /* .RODATA */ + { ccNone, DoScope }, /* .SCOPE */ + { ccNone, DoSegment }, /* .SEGMENT */ { ccNone, DoUnexpected }, /* .SET */ - { ccNone, DoSetCPU }, + { ccNone, DoSetCPU }, /* .SETCPU */ { ccNone, DoUnexpected }, /* .SIZEOF */ - { ccNone, DoSmart }, + { ccNone, DoSmart }, /* .SMART */ { ccNone, DoUnexpected }, /* .SPRINTF */ { ccNone, DoUnexpected }, /* .STRAT */ { ccNone, DoUnexpected }, /* .STRING */ { ccNone, DoUnexpected }, /* .STRLEN */ - { ccNone, DoStruct }, - { ccNone, DoTag }, + { ccNone, DoStruct }, /* .STRUCT */ + { ccNone, DoTag }, /* .TAG */ { ccNone, DoUnexpected }, /* .TCOUNT */ { ccNone, DoUnexpected }, /* .TIME */ - { ccKeepToken, DoUnDef }, - { ccNone, DoUnion }, + { ccKeepToken, DoUnDef }, /* .UNDEF, .UNDEFINE */ + { ccNone, DoUnion }, /* .UNION */ { ccNone, DoUnexpected }, /* .VERSION */ - { ccNone, DoWarning }, - { ccNone, DoWord }, + { ccNone, DoWarning }, /* .WARNING */ + { ccNone, DoWord }, /* .WORD */ { ccNone, DoUnexpected }, /* .XMATCH */ - { ccNone, DoZeropage }, + { ccNone, DoZeropage }, /* .ZEROPAGE */ }; diff --git a/src/ca65/scanner.c b/src/ca65/scanner.c index 8b910e672..f3892d32e 100644 --- a/src/ca65/scanner.c +++ b/src/ca65/scanner.c @@ -131,10 +131,12 @@ static int C = 0; /* Current input character */ int ForcedEnd = 0; /* List of dot keywords with the corresponding tokens */ +/* CAUTION: table must be sorted for bsearch */ struct DotKeyword { const char* Key; /* MUST be first field */ token_t Tok; } DotKeywords [] = { +/* BEGIN SORTED.SH */ { ".A16", TOK_A16 }, { ".A8", TOK_A8 }, { ".ADDR", TOK_ADDR }, @@ -219,11 +221,18 @@ struct DotKeyword { { ".IFNDEF", TOK_IFNDEF }, { ".IFNREF", TOK_IFNREF }, { ".IFP02", TOK_IFP02 }, + { ".IFP02X", TOK_IFP02X }, { ".IFP4510", TOK_IFP4510 }, + { ".IFP45GS02", TOK_IFP45GS02 }, + { ".IFP6280", TOK_IFP6280 }, { ".IFP816", TOK_IFP816 }, { ".IFPC02", TOK_IFPC02 }, + { ".IFPCE02", TOK_IFPCE02 }, { ".IFPDTV", TOK_IFPDTV }, + { ".IFPM740", TOK_IFPM740 }, { ".IFPSC02", TOK_IFPSC02 }, + { ".IFPSWEET16", TOK_IFPSWEET16 }, + { ".IFPWC02", TOK_IFPWC02 }, { ".IFREF", TOK_IFREF }, { ".IMPORT", TOK_IMPORT }, { ".IMPORTZP", TOK_IMPORTZP }, @@ -257,21 +266,28 @@ struct DotKeyword { { ".ORG", TOK_ORG }, { ".OUT", TOK_OUT }, { ".P02", TOK_P02 }, + { ".P02X", TOK_P02X }, { ".P4510", TOK_P4510 }, + { ".P45GS02", TOK_P45GS02 }, + { ".P6280", TOK_P6280 }, { ".P816", TOK_P816 }, { ".PAGELEN", TOK_PAGELENGTH }, { ".PAGELENGTH", TOK_PAGELENGTH }, { ".PARAMCOUNT", TOK_PARAMCOUNT }, { ".PC02", TOK_PC02 }, + { ".PCE02", TOK_PCE02 }, { ".PDTV", TOK_PDTV }, + { ".PM740", TOK_PM740 }, { ".POPCHARMAP", TOK_POPCHARMAP }, { ".POPCPU", TOK_POPCPU }, { ".POPSEG", TOK_POPSEG }, { ".PROC", TOK_PROC }, { ".PSC02", TOK_PSC02 }, + { ".PSWEET16", TOK_PSWEET16 }, { ".PUSHCHARMAP", TOK_PUSHCHARMAP }, { ".PUSHCPU", TOK_PUSHCPU }, { ".PUSHSEG", TOK_PUSHSEG }, + { ".PWC02", TOK_PWC02 }, { ".REF", TOK_REFERENCED }, { ".REFERENCED", TOK_REFERENCED }, { ".REFERTO", TOK_REFERTO }, @@ -306,6 +322,7 @@ struct DotKeyword { { ".XMATCH", TOK_XMATCH }, { ".XOR", TOK_BOOLXOR }, { ".ZEROPAGE", TOK_ZEROPAGE }, +/* END SORTED.SH */ }; @@ -1272,12 +1289,19 @@ Again: break; case 'S': - if ((CPU == CPU_4510) || (CPU == CPU_65816)) { + if ((CPU == CPU_65CE02) || (CPU == CPU_4510) || (CPU == CPU_45GS02) || (CPU == CPU_65816)) { CurTok.Tok = TOK_S; return; } break; + case 'Q': + if (CPU == CPU_45GS02) { + CurTok.Tok = TOK_Q; + return; + } + break; + case 'X': CurTok.Tok = TOK_X; return; @@ -1292,7 +1316,7 @@ Again: CurTok.Tok = TOK_OVERRIDE_ZP; return; } else { - if (CPU == CPU_4510) { + if ((CPU == CPU_65CE02) || (CPU == CPU_4510) || (CPU == CPU_45GS02)) { CurTok.Tok = TOK_Z; return; } @@ -1304,7 +1328,8 @@ Again: } break; case 2: - if ((CPU == CPU_4510) && + /* FIXME: make sure we only alias "sp" to "s" when its really needed */ + if (((CPU == CPU_65CE02) || (CPU == CPU_4510) || (CPU == CPU_45GS02)) && (toupper (SB_AtUnchecked (&CurTok.SVal, 0)) == 'S') && (toupper (SB_AtUnchecked (&CurTok.SVal, 1)) == 'P')) { @@ -1550,7 +1575,6 @@ CharAgain: ** string later. */ ReadStringConst ('\''); - TgtTranslateStrBuf(&CurTok.SVal); if (SB_GetLen (&CurTok.SVal) == 1) { CurTok.IVal = SB_AtUnchecked (&CurTok.SVal, 0); CurTok.Tok = TOK_CHARCON; @@ -1562,7 +1586,6 @@ CharAgain: ** Hack: Pass 0 to ReadStringConst for special handling. */ ReadStringConst(0); - TgtTranslateStrBuf(&CurTok.SVal); if (SB_GetLen(&CurTok.SVal) != 1) { Error ("Illegal character constant"); goto CharAgain; diff --git a/src/ca65/studyexpr.c b/src/ca65/studyexpr.c index 40e9b7aab..f4376e221 100644 --- a/src/ca65/studyexpr.c +++ b/src/ca65/studyexpr.c @@ -610,12 +610,13 @@ static void StudySymbol (ExprNode* Expr, ExprDesc* D) DumpExpr (Expr, SymResolve); } - /* If the symbol has an explicit address size, use it. This may - ** lead to range errors later (maybe even in the linker stage), if - ** the user lied about the address size, but for now we trust him. + /* If the symbol has an explicit address size that is smaller than + ** the one found, use it. This may lead to range errors later + ** (maybe even in the linker stage) if the user lied about the + ** address size, but for now we trust him. */ AddrSize = GetSymAddrSize (Sym); - if (AddrSize != ADDR_SIZE_DEFAULT) { + if (AddrSize != ADDR_SIZE_DEFAULT && AddrSize < D->AddrSize) { D->AddrSize = AddrSize; } } diff --git a/src/ca65/symentry.c b/src/ca65/symentry.c index 1048bfbc2..c57fcff2a 100644 --- a/src/ca65/symentry.c +++ b/src/ca65/symentry.c @@ -211,6 +211,8 @@ static void SymReplaceExprRefs (SymEntry* S) void SymDef (SymEntry* S, ExprNode* Expr, unsigned char AddrSize, unsigned Flags) /* Define a new symbol */ { + int Redef = 0; /* Flag for symbol redefinition */ + if (S->Flags & SF_IMPORT) { /* Defined symbol is marked as imported external symbol */ Error ("Symbol '%m%p' is already an import", GetSymName (S)); @@ -238,6 +240,7 @@ void SymDef (SymEntry* S, ExprNode* Expr, unsigned char AddrSize, unsigned Flags */ FreeExpr (S->Expr); S->Expr = 0; + Redef = 1; } } @@ -291,8 +294,10 @@ void SymDef (SymEntry* S, ExprNode* Expr, unsigned char AddrSize, unsigned Flags } } - /* If this is not a local symbol, remember it as the last global one */ - if ((S->Flags & SF_LOCAL) == 0) { + /* If this is not a local symbol and not a redefinition for a variable + ** symbol, remember it as the last global one. + */ + if ((S->Flags & SF_LOCAL) == 0 && !Redef) { SymLast = S; } } diff --git a/src/ca65/token.h b/src/ca65/token.h index 8f935f7a1..e2b223880 100644 --- a/src/ca65/token.h +++ b/src/ca65/token.h @@ -68,6 +68,7 @@ typedef enum token_t { TOK_Y, /* Y register */ TOK_Z, /* Z register */ TOK_S, /* S register */ + TOK_Q, /* Q pseudo register */ TOK_REG, /* Sweet16 R.. register (in sweet16 mode) */ TOK_ASSIGN, /* := */ @@ -193,11 +194,18 @@ typedef enum token_t { TOK_IFNDEF, TOK_IFNREF, TOK_IFP02, + TOK_IFP02X, TOK_IFP4510, + TOK_IFP45GS02, + TOK_IFP6280, TOK_IFP816, TOK_IFPC02, + TOK_IFPCE02, TOK_IFPDTV, + TOK_IFPM740, TOK_IFPSC02, + TOK_IFPSWEET16, + TOK_IFPWC02, TOK_IFREF, TOK_IMPORT, TOK_IMPORTZP, @@ -226,20 +234,27 @@ typedef enum token_t { TOK_ORG, TOK_OUT, TOK_P02, + TOK_P02X, TOK_P4510, + TOK_P45GS02, + TOK_P6280, TOK_P816, TOK_PAGELENGTH, TOK_PARAMCOUNT, TOK_PC02, + TOK_PCE02, TOK_PDTV, + TOK_PM740, TOK_POPCHARMAP, TOK_POPCPU, TOK_POPSEG, TOK_PROC, TOK_PSC02, + TOK_PSWEET16, TOK_PUSHCHARMAP, TOK_PUSHCPU, TOK_PUSHSEG, + TOK_PWC02, TOK_REFERENCED, TOK_REFERTO, TOK_RELOC, diff --git a/src/cc65/codegen.c b/src/cc65/codegen.c index e55a318d6..04340af67 100644 --- a/src/cc65/codegen.c +++ b/src/cc65/codegen.c @@ -200,8 +200,12 @@ void g_preamble (void) case CPU_6502DTV: AddTextLine ("\t.setcpu\t\t\"6502DTV\""); break; case CPU_65SC02: AddTextLine ("\t.setcpu\t\t\"65SC02\""); break; case CPU_65C02: AddTextLine ("\t.setcpu\t\t\"65C02\""); break; + case CPU_W65C02: AddTextLine ("\t.setcpu\t\t\"W65C02\""); break; + case CPU_65CE02: AddTextLine ("\t.setcpu\t\t\"65CE02\""); break; case CPU_65816: AddTextLine ("\t.setcpu\t\t\"65816\""); break; case CPU_HUC6280: AddTextLine ("\t.setcpu\t\t\"HUC6280\""); break; + case CPU_4510: AddTextLine ("\t.setcpu\t\t\"4510\""); break; + case CPU_45GS02: AddTextLine ("\t.setcpu\t\t\"45GS02\""); break; default: Internal ("Unknown CPU: %d", CPU); } @@ -218,7 +222,10 @@ void g_preamble (void) AddTextLine ("\t.debuginfo\t%s", (DebugInfo != 0)? "on" : "off"); /* Import zero page variables */ - AddTextLine ("\t.importzp\tsp, sreg, regsave, regbank"); + AddTextLine ("\t.importzp\t" "c_sp, sreg, regsave, regbank"); + /* The space above is intentional, to ease replacement of the name of + ** the stack pointer. Don't worry, the preprocessor will concatenate them. + */ AddTextLine ("\t.importzp\ttmp1, tmp2, tmp3, tmp4, ptr1, ptr2, ptr3, ptr4"); /* Define long branch macros */ @@ -569,11 +576,11 @@ void g_swap_regvars (int StackOffs, int RegOffs, unsigned Bytes) AddCodeLine ("ldx #$%02X", RegOffs & 0xFF); AddCodeLine ("jsr regswap1"); } else { - AddCodeLine ("lda (sp),y"); + AddCodeLine ("lda (c_sp),y"); AddCodeLine ("ldx regbank%+d", RegOffs); AddCodeLine ("sta regbank%+d", RegOffs); AddCodeLine ("txa"); - AddCodeLine ("sta (sp),y"); + AddCodeLine ("sta (c_sp),y"); } } else if (Bytes == 2) { @@ -615,7 +622,7 @@ void g_save_regvars (int RegOffs, unsigned Bytes) AddCodeLine ("ldx #$%02X", (unsigned char) Bytes); g_defcodelabel (Label); AddCodeLine ("lda regbank%+d,x", RegOffs-1); - AddCodeLine ("sta (sp),y"); + AddCodeLine ("sta (c_sp),y"); AddCodeLine ("dey"); AddCodeLine ("dex"); AddCodeLine ("bne %s", LocalLabelName (Label)); @@ -639,28 +646,28 @@ void g_restore_regvars (int StackOffs, int RegOffs, unsigned Bytes) if (Bytes == 1) { AddCodeLine ("ldy #$%02X", StackOffs); - AddCodeLine ("lda (sp),y"); + AddCodeLine ("lda (c_sp),y"); AddCodeLine ("sta regbank%+d", RegOffs); } else if (Bytes == 2) { AddCodeLine ("ldy #$%02X", StackOffs); - AddCodeLine ("lda (sp),y"); + AddCodeLine ("lda (c_sp),y"); AddCodeLine ("sta regbank%+d", RegOffs); AddCodeLine ("iny"); - AddCodeLine ("lda (sp),y"); + AddCodeLine ("lda (c_sp),y"); AddCodeLine ("sta regbank%+d", RegOffs+1); } else if (Bytes == 3 && IS_Get (&CodeSizeFactor) >= 133) { AddCodeLine ("ldy #$%02X", StackOffs); - AddCodeLine ("lda (sp),y"); + AddCodeLine ("lda (c_sp),y"); AddCodeLine ("sta regbank%+d", RegOffs); AddCodeLine ("iny"); - AddCodeLine ("lda (sp),y"); + AddCodeLine ("lda (c_sp),y"); AddCodeLine ("sta regbank%+d", RegOffs+1); AddCodeLine ("iny"); - AddCodeLine ("lda (sp),y"); + AddCodeLine ("lda (c_sp),y"); AddCodeLine ("sta regbank%+d", RegOffs+2); } else if (StackOffs <= RegOffs) { @@ -672,7 +679,7 @@ void g_restore_regvars (int StackOffs, int RegOffs, unsigned Bytes) unsigned Label = GetLocalLabel (); AddCodeLine ("ldy #$%02X", StackOffs); g_defcodelabel (Label); - AddCodeLine ("lda (sp),y"); + AddCodeLine ("lda (c_sp),y"); AddCodeLine ("sta regbank%+d,y", RegOffs - StackOffs); AddCodeLine ("iny"); AddCodeLine ("cpy #$%02X", StackOffs + Bytes); @@ -688,7 +695,7 @@ void g_restore_regvars (int StackOffs, int RegOffs, unsigned Bytes) AddCodeLine ("ldy #$%02X", (unsigned char) (StackOffs + Bytes - 1)); AddCodeLine ("ldx #$%02X", (unsigned char) (Bytes - 1)); g_defcodelabel (Label); - AddCodeLine ("lda (sp),y"); + AddCodeLine ("lda (c_sp),y"); AddCodeLine ("sta regbank%+d,x", RegOffs); AddCodeLine ("dey"); AddCodeLine ("dex"); @@ -834,11 +841,11 @@ void g_getlocal (unsigned Flags, int Offs) CheckLocalOffs (Offs); if ((Flags & CF_FORCECHAR) || (Flags & CF_TEST)) { AddCodeLine ("ldy #$%02X", Offs); - AddCodeLine ("lda (sp),y"); + AddCodeLine ("lda (c_sp),y"); } else { AddCodeLine ("ldy #$%02X", Offs); AddCodeLine ("ldx #$00"); - AddCodeLine ("lda (sp),y"); + AddCodeLine ("lda (c_sp),y"); if ((Flags & CF_UNSIGNED) == 0) { unsigned L = GetLocalLabel(); AddCodeLine ("bpl %s", LocalLabelName (L)); @@ -852,9 +859,9 @@ void g_getlocal (unsigned Flags, int Offs) CheckLocalOffs (Offs + 1); AddCodeLine ("ldy #$%02X", (unsigned char) (Offs+1)); if (Flags & CF_TEST) { - AddCodeLine ("lda (sp),y"); + AddCodeLine ("lda (c_sp),y"); AddCodeLine ("dey"); - AddCodeLine ("ora (sp),y"); + AddCodeLine ("ora (c_sp),y"); } else { AddCodeLine ("jsr ldaxysp"); } @@ -935,7 +942,7 @@ void g_leasp (int Offs) { unsigned char Lo, Hi; - /* Calculate the offset relative to sp */ + /* Calculate the offset relative to c_sp */ Offs -= StackPtr; /* Get low and high byte */ @@ -945,17 +952,17 @@ void g_leasp (int Offs) /* Generate code */ if (Lo == 0) { if (Hi <= 3) { - AddCodeLine ("lda sp"); - AddCodeLine ("ldx sp+1"); + AddCodeLine ("lda c_sp"); + AddCodeLine ("ldx c_sp+1"); while (Hi--) { AddCodeLine ("inx"); } } else { - AddCodeLine ("lda sp+1"); + AddCodeLine ("lda c_sp+1"); AddCodeLine ("clc"); AddCodeLine ("adc #$%02X", Hi); AddCodeLine ("tax"); - AddCodeLine ("lda sp"); + AddCodeLine ("lda c_sp"); } } else if (Hi == 0) { /* 8 bit offset */ @@ -966,8 +973,8 @@ void g_leasp (int Offs) } else { /* 8 bit offset inlined */ unsigned L = GetLocalLabel (); - AddCodeLine ("lda sp"); - AddCodeLine ("ldx sp+1"); + AddCodeLine ("lda c_sp"); + AddCodeLine ("ldx c_sp+1"); AddCodeLine ("clc"); AddCodeLine ("adc #$%02X", Lo); AddCodeLine ("bcc %s", LocalLabelName (L)); @@ -981,11 +988,11 @@ void g_leasp (int Offs) AddCodeLine ("jsr leaaxsp"); } else { /* Full 16 bit offset inlined */ - AddCodeLine ("lda sp"); + AddCodeLine ("lda c_sp"); AddCodeLine ("clc"); AddCodeLine ("adc #$%02X", Lo); AddCodeLine ("pha"); - AddCodeLine ("lda sp+1"); + AddCodeLine ("lda c_sp+1"); AddCodeLine ("adc #$%02X", Hi); AddCodeLine ("tax"); AddCodeLine ("pla"); @@ -1001,10 +1008,10 @@ void g_leavariadic (int Offs) { unsigned ArgSizeOffs; - /* Calculate the offset relative to sp */ + /* Calculate the offset relative to c_sp */ Offs -= StackPtr; - /* Get the offset of the parameter which is stored at sp+0 on function + /* Get the offset of the parameter which is stored at c_sp+0 on function ** entry and check if this offset is reachable with a byte offset. */ CHECK (StackPtr <= 0); @@ -1013,14 +1020,14 @@ void g_leavariadic (int Offs) /* Get the size of all parameters. */ AddCodeLine ("ldy #$%02X", ArgSizeOffs); - AddCodeLine ("lda (sp),y"); + AddCodeLine ("lda (c_sp),y"); /* Add the value of the stackpointer */ if (IS_Get (&CodeSizeFactor) > 250) { unsigned L = GetLocalLabel(); - AddCodeLine ("ldx sp+1"); + AddCodeLine ("ldx c_sp+1"); AddCodeLine ("clc"); - AddCodeLine ("adc sp"); + AddCodeLine ("adc c_sp"); AddCodeLine ("bcc %s", LocalLabelName (L)); AddCodeLine ("inx"); g_defcodelabel (L); @@ -1092,14 +1099,14 @@ void g_putlocal (unsigned Flags, int Offs, long Val) AddCodeLine ("lda #$%02X", (unsigned char) Val); } AddCodeLine ("ldy #$%02X", Offs); - AddCodeLine ("sta (sp),y"); + AddCodeLine ("sta (c_sp),y"); break; case CF_INT: if (Flags & CF_CONST) { AddCodeLine ("ldy #$%02X", Offs+1); AddCodeLine ("lda #$%02X", (unsigned char) (Val >> 8)); - AddCodeLine ("sta (sp),y"); + AddCodeLine ("sta (c_sp),y"); if ((Flags & CF_NOKEEP) == 0) { /* Place high byte into X */ AddCodeLine ("tax"); @@ -1112,16 +1119,16 @@ void g_putlocal (unsigned Flags, int Offs, long Val) AddCodeLine ("dey"); AddCodeLine ("lda #$%02X", (unsigned char) Val); } - AddCodeLine ("sta (sp),y"); + AddCodeLine ("sta (c_sp),y"); } else { AddCodeLine ("ldy #$%02X", Offs); if ((Flags & CF_NOKEEP) == 0 || IS_Get (&CodeSizeFactor) < 160) { AddCodeLine ("jsr staxysp"); } else { - AddCodeLine ("sta (sp),y"); + AddCodeLine ("sta (c_sp),y"); AddCodeLine ("iny"); AddCodeLine ("txa"); - AddCodeLine ("sta (sp),y"); + AddCodeLine ("sta (c_sp),y"); } } break; @@ -1161,12 +1168,12 @@ void g_putind (unsigned Flags, unsigned Offs) AddCodeLine ("pha"); } AddCodeLine ("lda #$%02X", Offs & 0xFF); - AddCodeLine ("adc (sp),y"); - AddCodeLine ("sta (sp),y"); + AddCodeLine ("adc (c_sp),y"); + AddCodeLine ("sta (c_sp),y"); AddCodeLine ("iny"); AddCodeLine ("lda #$%02X", (Offs >> 8) & 0xFF); - AddCodeLine ("adc (sp),y"); - AddCodeLine ("sta (sp),y"); + AddCodeLine ("adc (c_sp),y"); + AddCodeLine ("sta (c_sp),y"); if ((Flags & CF_NOKEEP) == 0) { AddCodeLine ("pla"); } @@ -1183,8 +1190,8 @@ void g_putind (unsigned Flags, unsigned Offs) AddCodeLine ("pha"); } AddCodeLine ("lda #$%02X", (Offs >> 8) & 0xFF); - AddCodeLine ("adc (sp),y"); - AddCodeLine ("sta (sp),y"); + AddCodeLine ("adc (c_sp),y"); + AddCodeLine ("sta (c_sp),y"); if ((Flags & CF_NOKEEP) == 0) { AddCodeLine ("pla"); } @@ -1618,7 +1625,7 @@ void g_addlocal (unsigned flags, int offs) L = GetLocalLabel(); AddCodeLine ("ldy #$%02X", NewOff & 0xFF); AddCodeLine ("clc"); - AddCodeLine ("adc (sp),y"); + AddCodeLine ("adc (c_sp),y"); AddCodeLine ("bcc %s", LocalLabelName (L)); AddCodeLine ("inx"); g_defcodelabel (L); @@ -1627,11 +1634,11 @@ void g_addlocal (unsigned flags, int offs) case CF_INT: AddCodeLine ("ldy #$%02X", NewOff & 0xFF); AddCodeLine ("clc"); - AddCodeLine ("adc (sp),y"); + AddCodeLine ("adc (c_sp),y"); AddCodeLine ("pha"); AddCodeLine ("txa"); AddCodeLine ("iny"); - AddCodeLine ("adc (sp),y"); + AddCodeLine ("adc (c_sp),y"); AddCodeLine ("tax"); AddCodeLine ("pla"); break; @@ -1839,12 +1846,12 @@ void g_addeqlocal (unsigned flags, int Offs, unsigned long val) if (flags & CF_CONST) { AddCodeLine ("clc"); AddCodeLine ("lda #$%02X", (int)(val & 0xFF)); - AddCodeLine ("adc (sp),y"); - AddCodeLine ("sta (sp),y"); + AddCodeLine ("adc (c_sp),y"); + AddCodeLine ("sta (c_sp),y"); } else { AddCodeLine ("clc"); - AddCodeLine ("adc (sp),y"); - AddCodeLine ("sta (sp),y"); + AddCodeLine ("adc (c_sp),y"); + AddCodeLine ("sta (c_sp),y"); } if ((flags & CF_UNSIGNED) == 0) { unsigned L = GetLocalLabel(); @@ -1862,16 +1869,16 @@ void g_addeqlocal (unsigned flags, int Offs, unsigned long val) if (IS_Get (&CodeSizeFactor) >= 400) { AddCodeLine ("clc"); AddCodeLine ("lda #$%02X", (int)(val & 0xFF)); - AddCodeLine ("adc (sp),y"); - AddCodeLine ("sta (sp),y"); + AddCodeLine ("adc (c_sp),y"); + AddCodeLine ("sta (c_sp),y"); AddCodeLine ("iny"); AddCodeLine ("lda #$%02X", (int) ((val >> 8) & 0xFF)); - AddCodeLine ("adc (sp),y"); - AddCodeLine ("sta (sp),y"); + AddCodeLine ("adc (c_sp),y"); + AddCodeLine ("sta (c_sp),y"); if ((flags & CF_NOKEEP) == 0) { AddCodeLine ("tax"); AddCodeLine ("dey"); - AddCodeLine ("lda (sp),y"); + AddCodeLine ("lda (c_sp),y"); } } else { g_getimmed (flags, val, 0); @@ -1923,7 +1930,7 @@ void g_addeqind (unsigned flags, unsigned offs, unsigned long val) case CF_INT: case CF_LONG: AddCodeLine ("jsr pushax"); /* Push the address */ - push (CF_PTR); /* Correct the internal sp */ + push (CF_PTR); /* Correct the internal c_sp */ g_getind (flags, offs); /* Fetch the value */ g_inc (flags, val); /* Increment value in primary */ g_putind (flags, offs); /* Store the value back */ @@ -2089,15 +2096,15 @@ void g_subeqlocal (unsigned flags, int Offs, unsigned long val) AddCodeLine ("ldy #$%02X", Offs); AddCodeLine ("ldx #$00"); if (flags & CF_CONST) { - AddCodeLine ("lda (sp),y"); + AddCodeLine ("lda (c_sp),y"); AddCodeLine ("sec"); AddCodeLine ("sbc #$%02X", (unsigned char)val); } else { AddCodeLine ("eor #$FF"); AddCodeLine ("sec"); - AddCodeLine ("adc (sp),y"); + AddCodeLine ("adc (c_sp),y"); } - AddCodeLine ("sta (sp),y"); + AddCodeLine ("sta (c_sp),y"); if ((flags & CF_UNSIGNED) == 0) { unsigned L = GetLocalLabel(); AddCodeLine ("bpl %s", LocalLabelName (L)); @@ -2157,7 +2164,7 @@ void g_subeqind (unsigned flags, unsigned offs, unsigned long val) case CF_INT: case CF_LONG: AddCodeLine ("jsr pushax"); /* Push the address */ - push (CF_PTR); /* Correct the internal sp */ + push (CF_PTR); /* Correct the internal c_sp */ g_getind (flags, offs); /* Fetch the value */ g_dec (flags, val); /* Increment value in primary */ g_putind (flags, offs); /* Store the value back */ @@ -2208,10 +2215,10 @@ void g_addaddr_local (unsigned flags attribute ((unused)), int offs) /* Label was used above */ g_defcodelabel (L); } - AddCodeLine ("adc sp"); + AddCodeLine ("adc c_sp"); AddCodeLine ("tay"); AddCodeLine ("txa"); - AddCodeLine ("adc sp+1"); + AddCodeLine ("adc c_sp+1"); AddCodeLine ("tax"); AddCodeLine ("tya"); } @@ -2512,10 +2519,10 @@ void g_callind (unsigned Flags, unsigned ArgSize, int Offs) CheckLocalOffs (Offs); AddCodeLine ("pha"); AddCodeLine ("ldy #$%02X", Offs); - AddCodeLine ("lda (sp),y"); + AddCodeLine ("lda (c_sp),y"); AddCodeLine ("sta jmpvec+1"); AddCodeLine ("iny"); - AddCodeLine ("lda (sp),y"); + AddCodeLine ("lda (c_sp),y"); AddCodeLine ("sta jmpvec+2"); AddCodeLine ("pla"); AddCodeLine ("jsr jmpvec"); @@ -2573,11 +2580,11 @@ void g_lateadjustSP (unsigned label) AddCodeLine ("pha"); AddCodeLine ("lda %s", LocalDataLabelName (label)); AddCodeLine ("clc"); - AddCodeLine ("adc sp"); - AddCodeLine ("sta sp"); + AddCodeLine ("adc c_sp"); + AddCodeLine ("sta c_sp"); AddCodeLine ("lda %s+1", LocalDataLabelName (label)); - AddCodeLine ("adc sp+1"); - AddCodeLine ("sta sp+1"); + AddCodeLine ("adc c_sp+1"); + AddCodeLine ("sta c_sp+1"); AddCodeLine ("pla"); } @@ -2591,11 +2598,11 @@ void g_drop (unsigned Space) AddCodeLine ("pha"); AddCodeLine ("lda #$%02X", (unsigned char) Space); AddCodeLine ("clc"); - AddCodeLine ("adc sp"); - AddCodeLine ("sta sp"); + AddCodeLine ("adc c_sp"); + AddCodeLine ("sta c_sp"); AddCodeLine ("lda #$%02X", (unsigned char) (Space >> 8)); - AddCodeLine ("adc sp+1"); - AddCodeLine ("sta sp+1"); + AddCodeLine ("adc c_sp+1"); + AddCodeLine ("sta c_sp+1"); AddCodeLine ("pla"); } else if (Space > 8) { AddCodeLine ("ldy #$%02X", Space); @@ -2618,13 +2625,13 @@ void g_space (int Space) ** overhead. */ AddCodeLine ("pha"); - AddCodeLine ("lda sp"); + AddCodeLine ("lda c_sp"); AddCodeLine ("sec"); AddCodeLine ("sbc #$%02X", (unsigned char) Space); - AddCodeLine ("sta sp"); - AddCodeLine ("lda sp+1"); + AddCodeLine ("sta c_sp"); + AddCodeLine ("lda c_sp+1"); AddCodeLine ("sbc #$%02X", (unsigned char) (Space >> 8)); - AddCodeLine ("sta sp+1"); + AddCodeLine ("sta c_sp+1"); AddCodeLine ("pla"); } else if (Space > 8) { AddCodeLine ("ldy #$%02X", Space); @@ -4584,14 +4591,14 @@ void g_initauto (unsigned Label, unsigned Size) AddCodeLine ("ldy #$%02X", Size-1); g_defcodelabel (CodeLabel); AddCodeLine ("lda %s,y", GetLabelName (CF_STATIC, Label, 0)); - AddCodeLine ("sta (sp),y"); + AddCodeLine ("sta (c_sp),y"); AddCodeLine ("dey"); AddCodeLine ("bpl %s", LocalLabelName (CodeLabel)); } else if (Size <= 256) { AddCodeLine ("ldy #$00"); g_defcodelabel (CodeLabel); AddCodeLine ("lda %s,y", GetLabelName (CF_STATIC, Label, 0)); - AddCodeLine ("sta (sp),y"); + AddCodeLine ("sta (c_sp),y"); AddCodeLine ("iny"); AddCmpCodeIfSizeNot256 ("cpy #$%02X", Size); AddCodeLine ("bne %s", LocalLabelName (CodeLabel)); diff --git a/src/cc65/codeinfo.c b/src/cc65/codeinfo.c index 435794613..25712d546 100644 --- a/src/cc65/codeinfo.c +++ b/src/cc65/codeinfo.c @@ -90,7 +90,9 @@ struct FuncInfo { ** routines are marked to use only the A register. The remainder is ignored ** anyway. */ +/* CAUTION: table must be sorted for bsearch */ static const FuncInfo FuncInfoTable[] = { +/* BEGIN SORTED.SH */ { "addeq0sp", SLV_TOP | REG_AX, PSTATE_ALL | REG_AXY }, { "addeqysp", SLV_IND | REG_AXY, PSTATE_ALL | REG_AXY }, { "addysp", REG_SP | REG_Y, PSTATE_ALL | REG_SP }, @@ -190,12 +192,12 @@ static const FuncInfo FuncInfoTable[] = { { "ldeaxysp", SLV_IND | REG_Y, PSTATE_ALL | REG_EAXY }, { "leaa0sp", REG_SP | REG_A, PSTATE_ALL | REG_AX }, { "leaaxsp", REG_SP | REG_AX, PSTATE_ALL | REG_AX }, - { "leave00", REG_SP, PSTATE_ALL | REG_SP | REG_AXY }, - { "leave0", REG_SP, PSTATE_ALL | REG_SP | REG_XY }, { "leave", REG_SP, PSTATE_ALL | REG_SP | REG_Y }, - { "leavey00", REG_SP, PSTATE_ALL | REG_SP | REG_AXY }, - { "leavey0", REG_SP, PSTATE_ALL | REG_SP | REG_XY }, + { "leave0", REG_SP, PSTATE_ALL | REG_SP | REG_XY }, + { "leave00", REG_SP, PSTATE_ALL | REG_SP | REG_AXY }, { "leavey", REG_SP | REG_Y, PSTATE_ALL | REG_SP | REG_Y }, + { "leavey0", REG_SP, PSTATE_ALL | REG_SP | REG_XY }, + { "leavey00", REG_SP, PSTATE_ALL | REG_SP | REG_AXY }, { "lsubeq", REG_EAXY | REG_PTR1_LO, PSTATE_ALL | REG_EAXY | REG_PTR1_HI }, { "lsubeq0sp", SLV_TOP | REG_EAX, PSTATE_ALL | REG_EAXY }, { "lsubeq1", REG_Y | REG_PTR1_LO, PSTATE_ALL | REG_EAXY | REG_PTR1_HI }, @@ -376,11 +378,16 @@ static const FuncInfo FuncInfoTable[] = { { "tosxoreax", SLV_TOP | REG_EAX, PSTATE_ALL | REG_SP | REG_EAXY | REG_TMP1 }, { "tsteax", REG_EAX, PSTATE_ALL | REG_Y }, { "utsteax", REG_EAX, PSTATE_ALL | REG_Y }, +/* END SORTED.SH */ }; #define FuncInfoCount (sizeof(FuncInfoTable) / sizeof(FuncInfoTable[0])) /* Table with names of zero page locations used by the compiler */ +/* CAUTION: table must be sorted for bsearch */ static const ZPInfo ZPInfoTable[] = { +/* BEGIN SORTED.SH */ + { 0, "c_sp", 2, REG_SP_LO, REG_SP }, + { 0, "c_sp+1", 1, REG_SP_HI, REG_SP }, { 0, "ptr1", 2, REG_PTR1_LO, REG_PTR1 }, { 0, "ptr1+1", 1, REG_PTR1_HI, REG_PTR1 }, { 0, "ptr2", 2, REG_PTR2_LO, REG_PTR2 }, @@ -390,14 +397,13 @@ static const ZPInfo ZPInfoTable[] = { { 7, "regbank", 6, REG_NONE, REG_NONE }, { 0, "regsave", 4, REG_SAVE_LO, REG_SAVE }, { 0, "regsave+1", 3, REG_SAVE_HI, REG_SAVE }, - { 0, "sp", 2, REG_SP_LO, REG_SP }, - { 0, "sp+1", 1, REG_SP_HI, REG_SP }, { 0, "sreg", 2, REG_SREG_LO, REG_SREG }, { 0, "sreg+1", 1, REG_SREG_HI, REG_SREG }, { 0, "tmp1", 1, REG_TMP1, REG_TMP1 }, { 0, "tmp2", 1, REG_NONE, REG_NONE }, { 0, "tmp3", 1, REG_NONE, REG_NONE }, { 0, "tmp4", 1, REG_NONE, REG_NONE }, +/* END SORTED.SH */ }; #define ZPInfoCount (sizeof(ZPInfoTable) / sizeof(ZPInfoTable[0])) diff --git a/src/cc65/codeinfo.h b/src/cc65/codeinfo.h index c57908dad..d03962343 100644 --- a/src/cc65/codeinfo.h +++ b/src/cc65/codeinfo.h @@ -75,8 +75,8 @@ struct RegContents; #define REG_SP_HI 0x2000U /* Defines for some special register usage */ -#define SLV_IND 0x00010000U /* Accesses (sp),y */ -#define SLV_TOP 0x00020000U /* Accesses (sp),0 */ +#define SLV_IND 0x00010000U /* Accesses (c_sp),y */ +#define SLV_TOP 0x00020000U /* Accesses (c_sp),0 */ #define SLV_SP65 0x00200000U /* Accesses 6502 stack pointer */ #define SLV_PH65 0x00400000U /* Pushes onto 6502 stack */ #define SLV_PL65 0x00800000U /* Pops from 6502 stack */ @@ -122,7 +122,7 @@ struct RegContents; typedef struct ZPInfo ZPInfo; struct ZPInfo { unsigned char Len; /* Length of the following string */ - char Name[10]; /* Name of zero page symbol */ + char Name[64]; /* Name of zero page symbol */ unsigned char Size; /* Maximum buffer size of this register */ unsigned short ByteUse; /* Register info for this symbol */ unsigned short WordUse; /* Register info for 16 bit access */ diff --git a/src/cc65/codeopt.c b/src/cc65/codeopt.c index a716ad431..988e2d770 100644 --- a/src/cc65/codeopt.c +++ b/src/cc65/codeopt.c @@ -102,6 +102,8 @@ struct OptFunc { /* A list of all the function descriptions */ +/* CAUTION: should be sorted by "name" */ +/* BEGIN DECL SORTED_CODEOPT.SH */ static OptFunc DOpt65C02BitOps = { Opt65C02BitOps, "Opt65C02BitOps", 66, 0, 0, 0, 0, 0 }; static OptFunc DOpt65C02Ind = { Opt65C02Ind, "Opt65C02Ind", 100, 0, 0, 0, 0, 0 }; static OptFunc DOpt65C02Stores = { Opt65C02Stores, "Opt65C02Stores", 100, 0, 0, 0, 0, 0 }; @@ -117,7 +119,8 @@ static OptFunc DOptBNegAX1 = { OptBNegAX1, "OptBNegAX1", 100, 0, static OptFunc DOptBNegAX2 = { OptBNegAX2, "OptBNegAX2", 100, 0, 0, 0, 0, 0 }; static OptFunc DOptBNegAX3 = { OptBNegAX3, "OptBNegAX3", 100, 0, 0, 0, 0, 0 }; static OptFunc DOptBNegAX4 = { OptBNegAX4, "OptBNegAX4", 100, 0, 0, 0, 0, 0 }; -static OptFunc DOptBinOps = { OptBinOps, "OptBinOps", 0, 0, 0, 0, 0, 0 }; +static OptFunc DOptBinOps1 = { OptBinOps1, "OptBinOps1", 0, 0, 0, 0, 0, 0 }; +static OptFunc DOptBinOps2 = { OptBinOps2, "OptBinOps2", 0, 0, 0, 0, 0, 0 }; static OptFunc DOptBoolCmp = { OptBoolCmp, "OptBoolCmp", 100, 0, 0, 0, 0, 0 }; static OptFunc DOptBoolTrans = { OptBoolTrans, "OptBoolTrans", 100, 0, 0, 0, 0, 0 }; static OptFunc DOptBoolUnary1 = { OptBoolUnary1, "OptBoolUnary1", 40, 0, 0, 0, 0, 0 }; @@ -130,6 +133,7 @@ static OptFunc DOptCmp2 = { OptCmp2, "OptCmp2", 85, 0, static OptFunc DOptCmp3 = { OptCmp3, "OptCmp3", 75, 0, 0, 0, 0, 0 }; static OptFunc DOptCmp4 = { OptCmp4, "OptCmp4", 75, 0, 0, 0, 0, 0 }; static OptFunc DOptCmp5 = { OptCmp5, "OptCmp5", 100, 0, 0, 0, 0, 0 }; +static OptFunc DOptCmp6 = { OptCmp6, "OptCmp6", 33, 0, 0, 0, 0, 0 }; static OptFunc DOptCmp7 = { OptCmp7, "OptCmp7", 85, 0, 0, 0, 0, 0 }; static OptFunc DOptCmp8 = { OptCmp8, "OptCmp8", 50, 0, 0, 0, 0, 0 }; static OptFunc DOptCmp9 = { OptCmp9, "OptCmp9", 85, 0, 0, 0, 0, 0 }; @@ -152,18 +156,15 @@ static OptFunc DOptJumpTarget3 = { OptJumpTarget3, "OptJumpTarget3", 100, 0, static OptFunc DOptLoad1 = { OptLoad1, "OptLoad1", 100, 0, 0, 0, 0, 0 }; static OptFunc DOptLoad2 = { OptLoad2, "OptLoad2", 200, 0, 0, 0, 0, 0 }; static OptFunc DOptLoad3 = { OptLoad3, "OptLoad3", 0, 0, 0, 0, 0, 0 }; +static OptFunc DOptLoadStore1 = { OptLoadStore1, "OptLoadStore1", 0, 0, 0, 0, 0, 0 }; +static OptFunc DOptLoadStore2 = { OptLoadStore2, "OptLoadStore2", 0, 0, 0, 0, 0, 0 }; +static OptFunc DOptLoadStoreLoad= { OptLoadStoreLoad,"OptLoadStoreLoad", 0, 0, 0, 0, 0, 0 }; static OptFunc DOptLongAssign = { OptLongAssign, "OptLongAssign", 100, 0, 0, 0, 0, 0 }; static OptFunc DOptLongCopy = { OptLongCopy, "OptLongCopy", 100, 0, 0, 0, 0, 0 }; static OptFunc DOptNegAX1 = { OptNegAX1, "OptNegAX1", 165, 0, 0, 0, 0, 0 }; static OptFunc DOptNegAX2 = { OptNegAX2, "OptNegAX2", 200, 0, 0, 0, 0, 0 }; static OptFunc DOptPrecalc = { OptPrecalc, "OptPrecalc", 100, 0, 0, 0, 0, 0 }; static OptFunc DOptPtrLoad1 = { OptPtrLoad1, "OptPtrLoad1", 100, 0, 0, 0, 0, 0 }; -static OptFunc DOptPtrLoad2 = { OptPtrLoad2, "OptPtrLoad2", 100, 0, 0, 0, 0, 0 }; -static OptFunc DOptPtrLoad3 = { OptPtrLoad3, "OptPtrLoad3", 100, 0, 0, 0, 0, 0 }; -static OptFunc DOptPtrLoad4 = { OptPtrLoad4, "OptPtrLoad4", 100, 0, 0, 0, 0, 0 }; -static OptFunc DOptPtrLoad5 = { OptPtrLoad5, "OptPtrLoad5", 50, 0, 0, 0, 0, 0 }; -static OptFunc DOptPtrLoad6 = { OptPtrLoad6, "OptPtrLoad6", 60, 0, 0, 0, 0, 0 }; -static OptFunc DOptPtrLoad7 = { OptPtrLoad7, "OptPtrLoad7", 140, 0, 0, 0, 0, 0 }; static OptFunc DOptPtrLoad11 = { OptPtrLoad11, "OptPtrLoad11", 92, 0, 0, 0, 0, 0 }; static OptFunc DOptPtrLoad12 = { OptPtrLoad12, "OptPtrLoad12", 50, 0, 0, 0, 0, 0 }; static OptFunc DOptPtrLoad13 = { OptPtrLoad13, "OptPtrLoad13", 65, 0, 0, 0, 0, 0 }; @@ -173,6 +174,12 @@ static OptFunc DOptPtrLoad16 = { OptPtrLoad16, "OptPtrLoad16", 100, 0, static OptFunc DOptPtrLoad17 = { OptPtrLoad17, "OptPtrLoad17", 190, 0, 0, 0, 0, 0 }; static OptFunc DOptPtrLoad18 = { OptPtrLoad18, "OptPtrLoad18", 100, 0, 0, 0, 0, 0 }; static OptFunc DOptPtrLoad19 = { OptPtrLoad19, "OptPtrLoad19", 65, 0, 0, 0, 0, 0 }; +static OptFunc DOptPtrLoad2 = { OptPtrLoad2, "OptPtrLoad2", 100, 0, 0, 0, 0, 0 }; +static OptFunc DOptPtrLoad3 = { OptPtrLoad3, "OptPtrLoad3", 100, 0, 0, 0, 0, 0 }; +static OptFunc DOptPtrLoad4 = { OptPtrLoad4, "OptPtrLoad4", 100, 0, 0, 0, 0, 0 }; +static OptFunc DOptPtrLoad5 = { OptPtrLoad5, "OptPtrLoad5", 50, 0, 0, 0, 0, 0 }; +static OptFunc DOptPtrLoad6 = { OptPtrLoad6, "OptPtrLoad6", 60, 0, 0, 0, 0, 0 }; +static OptFunc DOptPtrLoad7 = { OptPtrLoad7, "OptPtrLoad7", 140, 0, 0, 0, 0, 0 }; static OptFunc DOptPtrStore1 = { OptPtrStore1, "OptPtrStore1", 65, 0, 0, 0, 0, 0 }; static OptFunc DOptPtrStore2 = { OptPtrStore2, "OptPtrStore2", 65, 0, 0, 0, 0, 0 }; static OptFunc DOptPtrStore3 = { OptPtrStore3, "OptPtrStore3", 100, 0, 0, 0, 0, 0 }; @@ -202,7 +209,6 @@ static OptFunc DOptStore3 = { OptStore3, "OptStore3", 120, 0, static OptFunc DOptStore4 = { OptStore4, "OptStore4", 50, 0, 0, 0, 0, 0 }; static OptFunc DOptStore5 = { OptStore5, "OptStore5", 100, 0, 0, 0, 0, 0 }; static OptFunc DOptStoreLoad = { OptStoreLoad, "OptStoreLoad", 0, 0, 0, 0, 0, 0 }; -static OptFunc DOptLoadStoreLoad= { OptLoadStoreLoad,"OptLoadStoreLoad", 0, 0, 0, 0, 0, 0 }; static OptFunc DOptSub1 = { OptSub1, "OptSub1", 100, 0, 0, 0, 0, 0 }; static OptFunc DOptSub2 = { OptSub2, "OptSub2", 100, 0, 0, 0, 0, 0 }; static OptFunc DOptSub3 = { OptSub3, "OptSub3", 100, 0, 0, 0, 0, 0 }; @@ -214,10 +220,13 @@ static OptFunc DOptTransfers3 = { OptTransfers3, "OptTransfers3", 65, 0, static OptFunc DOptTransfers4 = { OptTransfers4, "OptTransfers4", 65, 0, 0, 0, 0, 0 }; static OptFunc DOptUnusedLoads = { OptUnusedLoads, "OptUnusedLoads", 0, 0, 0, 0, 0, 0 }; static OptFunc DOptUnusedStores = { OptUnusedStores, "OptUnusedStores", 0, 0, 0, 0, 0, 0 }; +/* END DECL SORTED_CODEOPT.SH */ /* Table containing all the steps in alphabetical order */ +/* CAUTION: table must be sorted for bsearch */ static OptFunc* OptFuncs[] = { +/* BEGIN SORTED_CODEOPT.SH */ &DOpt65C02BitOps, &DOpt65C02Ind, &DOpt65C02Stores, @@ -233,7 +242,8 @@ static OptFunc* OptFuncs[] = { &DOptBNegAX2, &DOptBNegAX3, &DOptBNegAX4, - &DOptBinOps, + &DOptBinOps1, + &DOptBinOps2, &DOptBoolCmp, &DOptBoolTrans, &DOptBoolUnary1, @@ -246,6 +256,7 @@ static OptFunc* OptFuncs[] = { &DOptCmp3, &DOptCmp4, &DOptCmp5, + &DOptCmp6, &DOptCmp7, &DOptCmp8, &DOptCmp9, @@ -268,6 +279,9 @@ static OptFunc* OptFuncs[] = { &DOptLoad1, &DOptLoad2, &DOptLoad3, + &DOptLoadStore1, + &DOptLoadStore2, + &DOptLoadStoreLoad, &DOptLongAssign, &DOptLongCopy, &DOptNegAX1, @@ -318,7 +332,6 @@ static OptFunc* OptFuncs[] = { &DOptStore4, &DOptStore5, &DOptStoreLoad, - &DOptLoadStoreLoad, &DOptSub1, &DOptSub2, &DOptSub3, @@ -330,6 +343,7 @@ static OptFunc* OptFuncs[] = { &DOptTransfers4, &DOptUnusedLoads, &DOptUnusedStores, +/* END SORTED_CODEOPT.SH */ }; #define OPTFUNC_COUNT (sizeof(OptFuncs) / sizeof(OptFuncs[0])) @@ -643,6 +657,7 @@ static unsigned RunOptGroup1 (CodeSeg* S) Changes += RunOptFunc (S, &DOptSub1, 1); Changes += RunOptFunc (S, &DOptSub3, 1); Changes += RunOptFunc (S, &DOptLongAssign, 1); + Changes += RunOptFunc (S, &DOptLoadStore2, 1); Changes += RunOptFunc (S, &DOptStore4, 1); Changes += RunOptFunc (S, &DOptStore5, 1); Changes += RunOptFunc (S, &DOptShift1, 1); @@ -716,6 +731,7 @@ static unsigned RunOptGroup3 (CodeSeg* S) C += RunOptFunc (S, &DOptCondBranch3, 1); C += RunOptFunc (S, &DOptCondBranchC, 1); C += RunOptFunc (S, &DOptRTSJumps1, 1); + C += RunOptFunc (S, &DOptCmp6, 1); /* After OptRTSJumps1 */ C += RunOptFunc (S, &DOptBoolCmp, 1); C += RunOptFunc (S, &DOptBoolTrans, 1); C += RunOptFunc (S, &DOptBNegA2, 1); /* After OptCondBranch's */ @@ -735,9 +751,10 @@ static unsigned RunOptGroup3 (CodeSeg* S) C += RunOptFunc (S, &DOptJumpTarget3, 1); /* After OptCondBranches2 */ C += RunOptFunc (S, &DOptUnusedLoads, 1); C += RunOptFunc (S, &DOptUnusedStores, 1); - C += RunOptFunc (S, &DOptDupLoads, 1); C += RunOptFunc (S, &DOptStoreLoad, 1); C += RunOptFunc (S, &DOptLoadStoreLoad, 1); + C += RunOptFunc (S, &DOptDupLoads, 1); + C += RunOptFunc (S, &DOptLoadStore1, 1); C += RunOptFunc (S, &DOptTransfers1, 1); C += RunOptFunc (S, &DOptTransfers3, 1); C += RunOptFunc (S, &DOptTransfers4, 1); @@ -749,7 +766,8 @@ static unsigned RunOptGroup3 (CodeSeg* S) C += RunOptFunc (S, &DOptPrecalc, 1); C += RunOptFunc (S, &DOptShiftBack, 1); C += RunOptFunc (S, &DOptSignExtended, 1); - C += RunOptFunc (S, &DOptBinOps, 1); + C += RunOptFunc (S, &DOptBinOps1, 1); + C += RunOptFunc (S, &DOptBinOps2, 1); Changes += C; @@ -810,7 +828,7 @@ static unsigned RunOptGroup5 (CodeSeg* S) static unsigned RunOptGroup6 (CodeSeg* S) -/* This one is quite special. It tries to replace "lda (sp),y" by "lda (sp,x)". +/* This one is quite special. It tries to replace "lda (c_sp),y" by "lda (c_sp,x)". ** The latter is ony cycle slower, but if we're able to remove the necessary ** load of the Y register, because X is zero anyway, we gain 1 cycle and ** shorten the code by one (transfer) or two bytes (load). So what we do is diff --git a/src/cc65/codeoptutil.c b/src/cc65/codeoptutil.c index 43b1dee22..0d3dba95c 100644 --- a/src/cc65/codeoptutil.c +++ b/src/cc65/codeoptutil.c @@ -333,14 +333,14 @@ static int Affected (LoadRegInfo* LRI, const CodeEntry* E) */ if (E->AM == AM65_ABS || E->AM == AM65_ZP || - (E->AM == AM65_ZP_INDY && strcmp (E->ArgBase, "sp") == 0) + (E->AM == AM65_ZP_INDY && strcmp (E->ArgBase, "c_sp") == 0) ) { if ((LRI->Flags & LI_CHECK_ARG) != 0) { if (AE == 0 || (AE->AM != AM65_ABS && AE->AM != AM65_ZP && (AE->AM != AM65_ZP_INDY || - strcmp (AE->ArgBase, "sp") != 0)) || + strcmp (AE->ArgBase, "c_sp") != 0)) || (AE->ArgOff == E->ArgOff && strcmp (AE->ArgBase, E->ArgBase) == 0)) { @@ -445,7 +445,7 @@ void PrepairLoadRegInfoForArgCheck (CodeSeg* S, LoadRegInfo* LRI, CodeEntry* E) /* These insns are replaceable only if they are not modified later */ LRI->Flags |= LI_CHECK_ARG | LI_CHECK_Y; } else if ((E->AM == AM65_ZP_INDY) && - strcmp (E->Arg, "sp") == 0) { + strcmp (E->Arg, "c_sp") == 0) { /* A load from the stack with known offset is also ok, but in this ** case we must reload the index register later. Please note that ** a load indirect via other zero page locations is not ok, since @@ -556,7 +556,7 @@ unsigned int TrackLoads (LoadInfo* LI, CodeSeg* S, int I) /* These insns are replaceable only if they are not modified later */ LRI->Flags |= LI_CHECK_ARG | LI_CHECK_Y; } else if (E->AM == AM65_ZP_INDY && - strcmp (E->Arg, "sp") == 0) { + strcmp (E->Arg, "c_sp") == 0) { /* A load from the stack with known offset is also ok, but in this ** case we must reload the index register later. Please note that ** a load indirect via other zero page locations is not ok, since @@ -839,7 +839,7 @@ void AdjustStackOffset (StackOpData* D, unsigned Offs) if (E->OPC != OP65_JSR) { /* Check against some things that should not happen */ CHECK (E->AM == AM65_ZP_INDY && E->RI->In.RegY >= (short) Offs); - CHECK (strcmp (E->Arg, "sp") == 0); + CHECK (strcmp (E->Arg, "c_sp") == 0); /* We need to correct this one */ Correction = 2; @@ -1056,8 +1056,8 @@ void AddOpLow (StackOpData* D, opc_t OPC, LoadInfo* LI) InsertEntry (D, X, D->IP++); if (LI->A.LoadEntry->OPC == OP65_JSR) { - /* opc (sp),y */ - X = NewCodeEntry (OPC, AM65_ZP_INDY, "sp", 0, D->OpEntry->LI); + /* opc (c_sp),y */ + X = NewCodeEntry (OPC, AM65_ZP_INDY, "c_sp", 0, D->OpEntry->LI); } else { /* opc src,y */ X = NewCodeEntry (OPC, LI->A.LoadEntry->AM, LI->A.LoadEntry->Arg, 0, D->OpEntry->LI); @@ -1119,8 +1119,8 @@ void AddOpHigh (StackOpData* D, opc_t OPC, LoadInfo* LI, int KeepResult) InsertEntry (D, X, D->IP++); if (LI->X.LoadEntry->OPC == OP65_JSR) { - /* opc (sp),y */ - X = NewCodeEntry (OPC, AM65_ZP_INDY, "sp", 0, D->OpEntry->LI); + /* opc (c_sp),y */ + X = NewCodeEntry (OPC, AM65_ZP_INDY, "c_sp", 0, D->OpEntry->LI); } else { /* opc src,y */ X = NewCodeEntry (OPC, LI->X.LoadEntry->AM, LI->X.LoadEntry->Arg, 0, D->OpEntry->LI); @@ -1225,6 +1225,12 @@ static int CmpHarmless (const void* Key, const void* Entry) } +/* CAUTION: table must be sorted for bsearch */ +static const char* const Tab[] = { +/* BEGIN SORTED.SH */ + "_abs", +/* END SORTED.SH */ +}; int HarmlessCall (const CodeEntry* E, int PushedBytes) /* Check if this is a call to a harmless subroutine that will not interrupt @@ -1252,10 +1258,6 @@ int HarmlessCall (const CodeEntry* E, int PushedBytes) } return 1; } else { - static const char* const Tab[] = { - "_abs", - }; - void* R = bsearch (E->Arg, Tab, sizeof (Tab) / sizeof (Tab[0]), @@ -1310,10 +1312,10 @@ const char* GetZPName (unsigned ZPLoc) return "save+1"; } if ((ZPLoc & REG_SP_LO) != 0) { - return "sp"; + return "c_sp"; } if ((ZPLoc & REG_SP_HI) != 0) { - return "sp+1"; + return "c_sp+1"; } return 0; diff --git a/src/cc65/compile.c b/src/cc65/compile.c index e08a829e6..9083891aa 100644 --- a/src/cc65/compile.c +++ b/src/cc65/compile.c @@ -496,6 +496,14 @@ void Compile (const char* FileName) while (PreprocessNextLine ()) { /* Nothing */ } + /* Output macros if requested by the user */ + if (DumpPredefMacros) { + OutputPredefMacros (); + } + if (DumpUserMacros) { + OutputUserMacros (); + } + /* Close the output file */ CloseOutputFile (); diff --git a/src/cc65/coptadd.c b/src/cc65/coptadd.c index bc67f7a74..3636e0e20 100644 --- a/src/cc65/coptadd.c +++ b/src/cc65/coptadd.c @@ -62,15 +62,15 @@ unsigned OptAdd1 (CodeSeg* S) ** and replace it by: ** ** ldy #xx-1 -** lda (sp),y +** lda (c_sp),y ** ldy #yy-3 ** clc -** adc (sp),y +** adc (c_sp),y ** pha ** ldy #xx -** lda (sp),y +** lda (c_sp),y ** ldy #yy-2 -** adc (sp),y +** adc (c_sp),y ** tax ** pla */ @@ -104,8 +104,8 @@ unsigned OptAdd1 (CodeSeg* S) /* Correct the stack of the first Y register load */ CE_SetNumArg (L[0], L[0]->Num - 1); - /* lda (sp),y */ - X = NewCodeEntry (OP65_LDA, AM65_ZP_INDY, "sp", 0, L[1]->LI); + /* lda (c_sp),y */ + X = NewCodeEntry (OP65_LDA, AM65_ZP_INDY, "c_sp", 0, L[1]->LI); CS_InsertEntry (S, X, I+1); /* ldy #yy-3 */ @@ -117,8 +117,8 @@ unsigned OptAdd1 (CodeSeg* S) X = NewCodeEntry (OP65_CLC, AM65_IMP, 0, 0, L[5]->LI); CS_InsertEntry (S, X, I+3); - /* adc (sp),y */ - X = NewCodeEntry (OP65_ADC, AM65_ZP_INDY, "sp", 0, L[5]->LI); + /* adc (c_sp),y */ + X = NewCodeEntry (OP65_ADC, AM65_ZP_INDY, "c_sp", 0, L[5]->LI); CS_InsertEntry (S, X, I+4); /* pha */ @@ -130,8 +130,8 @@ unsigned OptAdd1 (CodeSeg* S) X = NewCodeEntry (OP65_LDY, AM65_IMM, Arg, 0, L[1]->LI); CS_InsertEntry (S, X, I+6); - /* lda (sp),y */ - X = NewCodeEntry (OP65_LDA, AM65_ZP_INDY, "sp", 0, L[1]->LI); + /* lda (c_sp),y */ + X = NewCodeEntry (OP65_LDA, AM65_ZP_INDY, "c_sp", 0, L[1]->LI); CS_InsertEntry (S, X, I+7); /* ldy #yy-2 */ @@ -139,8 +139,8 @@ unsigned OptAdd1 (CodeSeg* S) X = NewCodeEntry (OP65_LDY, AM65_IMM, Arg, 0, L[4]->LI); CS_InsertEntry (S, X, I+8); - /* adc (sp),y */ - X = NewCodeEntry (OP65_ADC, AM65_ZP_INDY, "sp", 0, L[5]->LI); + /* adc (c_sp),y */ + X = NewCodeEntry (OP65_ADC, AM65_ZP_INDY, "c_sp", 0, L[5]->LI); CS_InsertEntry (S, X, I+9); /* tax */ @@ -181,16 +181,16 @@ unsigned OptAdd2 (CodeSeg* S) ** and replace it by: ** ** ldy #xx-1 -** lda (sp),y +** lda (c_sp),y ** ldy #yy ** clc -** adc (sp),y -** sta (sp),y +** adc (c_sp),y +** sta (c_sp),y ** ldy #xx -** lda (sp),y +** lda (c_sp),y ** ldy #yy+1 -** adc (sp),y -** sta (sp),y +** adc (c_sp),y +** sta (c_sp),y ** ** provided that a/x is not used later. */ @@ -226,8 +226,8 @@ unsigned OptAdd2 (CodeSeg* S) X = NewCodeEntry (OP65_LDY, AM65_IMM, Arg, 0, L[0]->LI); CS_InsertEntry (S, X, I+4); - /* lda (sp),y */ - X = NewCodeEntry (OP65_LDA, AM65_ZP_INDY, "sp", 0, L[1]->LI); + /* lda (c_sp),y */ + X = NewCodeEntry (OP65_LDA, AM65_ZP_INDY, "c_sp", 0, L[1]->LI); CS_InsertEntry (S, X, I+5); /* ldy #yy */ @@ -238,20 +238,20 @@ unsigned OptAdd2 (CodeSeg* S) X = NewCodeEntry (OP65_CLC, AM65_IMP, 0, 0, L[3]->LI); CS_InsertEntry (S, X, I+7); - /* adc (sp),y */ - X = NewCodeEntry (OP65_ADC, AM65_ZP_INDY, "sp", 0, L[3]->LI); + /* adc (c_sp),y */ + X = NewCodeEntry (OP65_ADC, AM65_ZP_INDY, "c_sp", 0, L[3]->LI); CS_InsertEntry (S, X, I+8); - /* sta (sp),y */ - X = NewCodeEntry (OP65_STA, AM65_ZP_INDY, "sp", 0, L[3]->LI); + /* sta (c_sp),y */ + X = NewCodeEntry (OP65_STA, AM65_ZP_INDY, "c_sp", 0, L[3]->LI); CS_InsertEntry (S, X, I+9); /* ldy #xx */ X = NewCodeEntry (OP65_LDY, AM65_IMM, L[0]->Arg, 0, L[0]->LI); CS_InsertEntry (S, X, I+10); - /* lda (sp),y */ - X = NewCodeEntry (OP65_LDA, AM65_ZP_INDY, "sp", 0, L[1]->LI); + /* lda (c_sp),y */ + X = NewCodeEntry (OP65_LDA, AM65_ZP_INDY, "c_sp", 0, L[1]->LI); CS_InsertEntry (S, X, I+11); /* ldy #yy+1 */ @@ -259,12 +259,12 @@ unsigned OptAdd2 (CodeSeg* S) X = NewCodeEntry (OP65_LDY, AM65_IMM, Arg, 0, L[2]->LI); CS_InsertEntry (S, X, I+12); - /* adc (sp),y */ - X = NewCodeEntry (OP65_ADC, AM65_ZP_INDY, "sp", 0, L[3]->LI); + /* adc (c_sp),y */ + X = NewCodeEntry (OP65_ADC, AM65_ZP_INDY, "c_sp", 0, L[3]->LI); CS_InsertEntry (S, X, I+13); - /* sta (sp),y */ - X = NewCodeEntry (OP65_STA, AM65_ZP_INDY, "sp", 0, L[3]->LI); + /* sta (c_sp),y */ + X = NewCodeEntry (OP65_STA, AM65_ZP_INDY, "c_sp", 0, L[3]->LI); CS_InsertEntry (S, X, I+14); /* Delete the old code */ diff --git a/src/cc65/coptadd.h b/src/cc65/coptadd.h index e4df3b304..d29783305 100644 --- a/src/cc65/coptadd.h +++ b/src/cc65/coptadd.h @@ -55,14 +55,14 @@ unsigned OptAdd1 (CodeSeg* S); ** jsr pushax ** ldy xxx ** ldx #$00 -** lda (sp),y +** lda (c_sp),y ** jsr tosaddax ** ** and replace it by: ** ** ldy xxx-2 ** clc -** adc (sp),y +** adc (c_sp),y ** bcc L ** inx ** L: @@ -72,26 +72,26 @@ unsigned OptAdd2 (CodeSeg* S); /* Search for the sequence ** ** ldy #xx -** lda (sp),y +** lda (c_sp),y ** tax ** dey -** lda (sp),y +** lda (c_sp),y ** ldy #$yy ** jsr addeqysp ** ** and replace it by: ** ** ldy #xx-1 -** lda (sp),y +** lda (c_sp),y ** ldy #yy ** clc -** adc (sp),y -** sta (sp),y +** adc (c_sp),y +** sta (c_sp),y ** ldy #xx -** lda (sp),y +** lda (c_sp),y ** ldy #yy+1 -** adc (sp),y -** sta (sp),y +** adc (c_sp),y +** sta (c_sp),y ** ** provided that a/x is not used later. */ diff --git a/src/cc65/coptbool.c b/src/cc65/coptbool.c index 3a3b3fa7c..e0a79238e 100644 --- a/src/cc65/coptbool.c +++ b/src/cc65/coptbool.c @@ -743,9 +743,9 @@ unsigned OptBNegAX2 (CodeSeg* S) ** and replace it by ** ** ldy #xx -** lda (sp),y +** lda (c_sp),y ** dey -** ora (sp),y +** ora (c_sp),y ** jeq/jne ... */ { @@ -772,16 +772,16 @@ unsigned OptBNegAX2 (CodeSeg* S) CodeEntry* X; - /* lda (sp),y */ - X = NewCodeEntry (OP65_LDA, AM65_ZP_INDY, "sp", 0, L[1]->LI); + /* lda (c_sp),y */ + X = NewCodeEntry (OP65_LDA, AM65_ZP_INDY, "c_sp", 0, L[1]->LI); CS_InsertEntry (S, X, I+1); /* dey */ X = NewCodeEntry (OP65_DEY, AM65_IMP, 0, 0, L[1]->LI); CS_InsertEntry (S, X, I+2); - /* ora (sp),y */ - X = NewCodeEntry (OP65_ORA, AM65_ZP_INDY, "sp", 0, L[1]->LI); + /* ora (c_sp),y */ + X = NewCodeEntry (OP65_ORA, AM65_ZP_INDY, "c_sp", 0, L[1]->LI); CS_InsertEntry (S, X, I+3); /* Invert the branch */ diff --git a/src/cc65/coptcmp.c b/src/cc65/coptcmp.c index 2970b363b..41245b58d 100644 --- a/src/cc65/coptcmp.c +++ b/src/cc65/coptcmp.c @@ -431,22 +431,22 @@ unsigned OptCmp5 (CodeSeg* S) /* The value is zero, we may use the simple code version: ** ldy #o-1 - ** lda (sp),y + ** lda (c_sp),y ** ldy #o - ** ora (sp),y + ** ora (c_sp),y ** jne/jeq ... */ sprintf (Buf, "$%02X", (int)(L[0]->Num-1)); X = NewCodeEntry (OP65_LDY, AM65_IMM, Buf, 0, L[0]->LI); CS_InsertEntry (S, X, I+1); - X = NewCodeEntry (OP65_LDA, AM65_ZP_INDY, "sp", 0, L[1]->LI); + X = NewCodeEntry (OP65_LDA, AM65_ZP_INDY, "c_sp", 0, L[1]->LI); CS_InsertEntry (S, X, I+2); X = NewCodeEntry (OP65_LDY, AM65_IMM, L[0]->Arg, 0, L[0]->LI); CS_InsertEntry (S, X, I+3); - X = NewCodeEntry (OP65_ORA, AM65_ZP_INDY, "sp", 0, L[1]->LI); + X = NewCodeEntry (OP65_ORA, AM65_ZP_INDY, "c_sp", 0, L[1]->LI); CS_InsertEntry (S, X, I+4); CS_DelEntries (S, I+5, 3); /* cpx/bne/cmp */ @@ -461,18 +461,18 @@ unsigned OptCmp5 (CodeSeg* S) ** of the low byte after the first branch if possible: ** ** ldy #o - ** lda (sp),y + ** lda (c_sp),y ** cmp #a ** bne L1 ** ldy #o-1 - ** lda (sp),y + ** lda (c_sp),y ** cmp #b ** jne/jeq ... */ X = NewCodeEntry (OP65_LDY, AM65_IMM, L[0]->Arg, 0, L[0]->LI); CS_InsertEntry (S, X, I+3); - X = NewCodeEntry (OP65_LDA, AM65_ZP_INDY, "sp", 0, L[1]->LI); + X = NewCodeEntry (OP65_LDA, AM65_ZP_INDY, "c_sp", 0, L[1]->LI); CS_InsertEntry (S, X, I+4); X = NewCodeEntry (OP65_CMP, L[2]->AM, L[2]->Arg, 0, L[2]->LI); @@ -482,7 +482,7 @@ unsigned OptCmp5 (CodeSeg* S) X = NewCodeEntry (OP65_LDY, AM65_IMM, Buf, 0, L[0]->LI); CS_InsertEntry (S, X, I+7); - X = NewCodeEntry (OP65_LDA, AM65_ZP_INDY, "sp", 0, L[1]->LI); + X = NewCodeEntry (OP65_LDA, AM65_ZP_INDY, "c_sp", 0, L[1]->LI); CS_InsertEntry (S, X, I+8); CS_DelEntries (S, I, 3); /* ldy/jsr/cpx */ @@ -503,6 +503,51 @@ unsigned OptCmp5 (CodeSeg* S) +unsigned OptCmp6 (CodeSeg* S) +/* Remove compare instructions before an RTS or an subroutine call that doesn't +** use the flags. +*/ +{ + unsigned Changes = 0; + unsigned I; + + /* Walk over the entries */ + I = 0; + while (I < CS_GetEntryCount (S)) { + + CodeEntry* N; + + /* Get next entry */ + CodeEntry* E = CS_GetEntry (S, I); + + /* Check for a compare followed by something else. + ** Note: The test could be improved by checking the flag usage of the + ** function explicitly against the flags set by the compare instruction. + ** For current code generation this makes no difference, however. + */ + if ((E->Info & OF_CMP) != 0 && + (N = CS_GetNextEntry (S, I)) != 0 && + (N->OPC == OP65_RTS || /* Either RTS, or ... */ + (N->OPC == OP65_JSR && /* ... or JSR ... */ + N->JumpTo == 0 && /* ... to external ... */ + (N->Use & PSTATE_ALL) == 0 && /* ... with no flags used ... */ + (N->Chg & PSTATE_ALL) == PSTATE_ALL))) { /* ... but all destroyed */ + + /* Found, remove the compare */ + CS_DelEntry (S, I); + ++Changes; + } + + /* Next entry */ + ++I; + } + + /* Return the number of changes made */ + return Changes; +} + + + unsigned OptCmp7 (CodeSeg* S) /* Search for a sequence ldx/txa/branch and remove the txa if A is not ** used later. diff --git a/src/cc65/coptcmp.h b/src/cc65/coptcmp.h index dd188f7fc..268e55be2 100644 --- a/src/cc65/coptcmp.h +++ b/src/cc65/coptcmp.h @@ -113,16 +113,21 @@ unsigned OptCmp5 (CodeSeg* S); /* Optimize compares of local variables: ** ** ldy #o -** lda (sp),y +** lda (c_sp),y ** tax ** dey -** lda (sp),y +** lda (c_sp),y ** cpx #a ** bne L1 ** cmp #b ** jne/jeq L2 */ +unsigned OptCmp6 (CodeSeg* S); +/* Remove compare instructions before an RTS or an exit by jumping to some +** other function. +*/ + unsigned OptCmp7 (CodeSeg* S); /* Search for a sequence ldx/txa/branch and remove the txa if A is not ** used later. diff --git a/src/cc65/coptind.c b/src/cc65/coptind.c index 52c47481e..99fc101a9 100644 --- a/src/cc65/coptind.c +++ b/src/cc65/coptind.c @@ -590,6 +590,49 @@ unsigned OptStoreLoad (CodeSeg* S) +unsigned OptLoadStore1 (CodeSeg* S) +/* Remove an 8 bit load followed by a store into the same location. */ +{ + unsigned Changes = 0; + + /* Walk over the entries */ + unsigned I = 0; + while (I < CS_GetEntryCount (S)) { + + CodeEntry* N; + + /* Get next entry */ + CodeEntry* E = CS_GetEntry (S, I); + + /* Check if it is a load instruction followed by a store into the + ** same address. + */ + if ((E->Info & OF_LOAD) != 0 && + (N = CS_GetNextEntry (S, I)) != 0 && + !CE_HasLabel (N) && + E->AM == N->AM && + ((E->OPC == OP65_LDA && N->OPC == OP65_STA) || + (E->OPC == OP65_LDX && N->OPC == OP65_STX) || + (E->OPC == OP65_LDY && N->OPC == OP65_STY)) && + strcmp (E->Arg, N->Arg) == 0) { + + /* Memory cell has already the correct value, remove the store */ + CS_DelEntry (S, I+1); + + /* Remember, we had changes */ + ++Changes; + } + + /* Next entry */ + ++I; + } + + /* Return the number of changes made */ + return Changes; +} + + + unsigned OptLoadStoreLoad (CodeSeg* S) /* Search for the sequence ** @@ -626,7 +669,7 @@ unsigned OptLoadStoreLoad (CodeSeg* S) strcmp (L[0]->Arg, L[2]->Arg) == 0) { /* Remove the second load */ - CS_DelEntries (S, I+2, 1); + CS_DelEntry (S, I+2); /* Remember, we had changes */ ++Changes; diff --git a/src/cc65/coptind.h b/src/cc65/coptind.h index 3493543a4..e54ba37d2 100644 --- a/src/cc65/coptind.h +++ b/src/cc65/coptind.h @@ -66,6 +66,9 @@ unsigned OptDupLoads (CodeSeg* S); unsigned OptStoreLoad (CodeSeg* S); /* Remove a store followed by a load from the same location. */ +unsigned OptLoadStore1 (CodeSeg* S); +/* Remove an 8 bit load followed by a store into the same location. */ + unsigned OptLoadStoreLoad (CodeSeg* S); /* Remove a load, store followed by a reload of the same location. */ diff --git a/src/cc65/coptmisc.c b/src/cc65/coptmisc.c index e48d469a1..a2cda7495 100644 --- a/src/cc65/coptmisc.c +++ b/src/cc65/coptmisc.c @@ -492,9 +492,9 @@ unsigned OptGotoSPAdj (CodeSeg* S) L[1]->AM == AM65_ABS && L[2]->OPC == OP65_CLC && L[3]->OPC == OP65_ADC && - strcmp (L[3]->Arg, "sp") == 0 && + strcmp (L[3]->Arg, "c_sp") == 0 && L[6]->OPC == OP65_ADC && - strcmp (L[6]->Arg, "sp+1") == 0 && + strcmp (L[6]->Arg, "c_sp+1") == 0 && L[9]->OPC == OP65_JMP) { adjustment = FindSPAdjustment (L[1]->Arg); @@ -582,11 +582,57 @@ unsigned OptGotoSPAdj (CodeSeg* S) /*****************************************************************************/ -/* Optimize stack load ops */ +/* Optimize stack load/store ops */ /*****************************************************************************/ +unsigned OptLoadStore2 (CodeSeg* S) +/* Remove 16 bit stack loads followed by a store into the same location. */ +{ + unsigned Changes = 0; + + /* Walk over the entries */ + unsigned I = 0; + while (I < CS_GetEntryCount (S)) { + + CodeEntry* N; + + /* Get next entry */ + CodeEntry* E = CS_GetEntry (S, I); + + /* Check if this is a 16 bit load followed by a store into the same + ** address. + */ + if (CE_IsCallTo (E, "ldaxysp") && /* Stack load ... */ + RegValIsKnown (E->RI->In.RegY) && /* ... with known offs */ + (N = CS_GetNextEntry (S, I)) != 0 && /* Next insn ... */ + !CE_HasLabel (N) && /* ... without label ... */ + N->OPC == OP65_LDY && /* ... is LDY */ + CE_IsKnownImm (N, E->RI->In.RegY-1) && /* Same offset as load */ + (N = CS_GetNextEntry (S, I+1)) != 0 && /* Next insn ... */ + !CE_HasLabel (N) && /* ... without label ... */ + CE_IsCallTo (N, "staxysp")) { /* ... is store */ + + /* Found - remove it. Leave the load in place. If it's unused, it + ** will get removed by later steps. + */ + CS_DelEntries (S, I+1, 2); + + /* Remember, we had changes */ + ++Changes; + } + + /* Next entry */ + ++I; + } + + /* Return the number of changes made */ + return Changes; +} + + + unsigned OptLoad1 (CodeSeg* S) /* Search for a call to ldaxysp where X is not used later and replace it by ** a load of just the A register. @@ -617,7 +663,7 @@ unsigned OptLoad1 (CodeSeg* S) CS_InsertEntry (S, X, I+1); /* Load from stack */ - X = NewCodeEntry (OP65_LDA, AM65_ZP_INDY, "sp", 0, E->LI); + X = NewCodeEntry (OP65_LDA, AM65_ZP_INDY, "c_sp", 0, E->LI); CS_InsertEntry (S, X, I+2); /* Now remove the call to the subroutine */ @@ -673,8 +719,8 @@ unsigned OptLoad2 (CodeSeg* S) ** later */ - /* lda (sp),y */ - X = NewCodeEntry (OP65_LDA, AM65_ZP_INDY, "sp", 0, L[0]->LI); + /* lda (c_sp),y */ + X = NewCodeEntry (OP65_LDA, AM65_ZP_INDY, "c_sp", 0, L[0]->LI); CS_InsertEntry (S, X, I+3); /* sta abs */ @@ -685,8 +731,8 @@ unsigned OptLoad2 (CodeSeg* S) X = NewCodeEntry (OP65_DEY, AM65_IMP, 0, 0, L[0]->LI); CS_InsertEntry (S, X, I+5); - /* lda (sp),y */ - X = NewCodeEntry (OP65_LDA, AM65_ZP_INDY, "sp", 0, L[0]->LI); + /* lda (c_sp),y */ + X = NewCodeEntry (OP65_LDA, AM65_ZP_INDY, "c_sp", 0, L[0]->LI); CS_InsertEntry (S, X, I+6); /* sta abs */ @@ -700,8 +746,8 @@ unsigned OptLoad2 (CodeSeg* S) /* Standard replacement */ - /* lda (sp),y */ - X = NewCodeEntry (OP65_LDA, AM65_ZP_INDY, "sp", 0, L[0]->LI); + /* lda (c_sp),y */ + X = NewCodeEntry (OP65_LDA, AM65_ZP_INDY, "c_sp", 0, L[0]->LI); CS_InsertEntry (S, X, I+1); /* tax */ @@ -712,8 +758,8 @@ unsigned OptLoad2 (CodeSeg* S) X = NewCodeEntry (OP65_DEY, AM65_IMP, 0, 0, L[0]->LI); CS_InsertEntry (S, X, I+3); - /* lda (sp),y */ - X = NewCodeEntry (OP65_LDA, AM65_ZP_INDY, "sp", 0, L[0]->LI); + /* lda (c_sp),y */ + X = NewCodeEntry (OP65_LDA, AM65_ZP_INDY, "c_sp", 0, L[0]->LI); CS_InsertEntry (S, X, I+4); /* Now remove the call to the subroutine */ @@ -736,7 +782,7 @@ unsigned OptLoad2 (CodeSeg* S) -unsigned OptBinOps (CodeSeg* S) +unsigned OptBinOps1 (CodeSeg* S) /* Search for an AND/EOR/ORA where the value of A or the operand is known and ** replace it by something simpler. */ @@ -902,3 +948,59 @@ unsigned OptBinOps (CodeSeg* S) /* Return the number of changes made */ return Changes; } + + + +unsigned OptBinOps2 (CodeSeg* S) +/* Search for an AND/EOR/ORA for identical memory locations and replace it +** by something simpler. +*/ +{ + unsigned Changes = 0; + + /* Walk over the entries */ + unsigned I = 0; + while (I < CS_GetEntryCount (S)) { + + CodeEntry* N; + + /* Get next entry */ + CodeEntry* E = CS_GetEntry (S, I); + + /* Check if this is an 8 bit load followed by a bit operation with the + ** same memory cell. + */ + if (E->OPC == OP65_LDA && + (N = CS_GetNextEntry (S, I)) != 0 && /* Next insn ... */ + !CE_HasLabel (N) && /* ... without label ... */ + (N->OPC == OP65_AND || /* ... is AND/EOR/ORA ... */ + N->OPC == OP65_EOR || + N->OPC == OP65_ORA) && + E->AM == N->AM && /* ... with same addr mode ... */ + strcmp (E->Arg, N->Arg) == 0) { /* ... and same argument */ + + /* For an EOR, the result is zero. For the other instructions, the + ** result doesn't change so they can be removed. + */ + if (N->OPC == OP65_EOR) { + /* Simply insert a load of the now known value. The flags will + ** be correct because of the load and the preceeding + ** instructions will be removed by later steps. + */ + CodeEntry* X = NewCodeEntry (OP65_LDA, AM65_IMM, "$00", 0, N->LI); + CS_InsertEntry (S, X, I+2); + } else { + CS_DelEntry (S, I+1); + } + + /* Remember, we had changes */ + ++Changes; + } + + /* Next entry */ + ++I; + } + + /* Return the number of changes made */ + return Changes; +} diff --git a/src/cc65/coptmisc.h b/src/cc65/coptmisc.h index 418b61e94..aceaa55d3 100644 --- a/src/cc65/coptmisc.h +++ b/src/cc65/coptmisc.h @@ -99,6 +99,9 @@ unsigned OptStackPtrOps (CodeSeg* S); unsigned OptGotoSPAdj (CodeSeg* S); /* Optimize SP adjustment for forward 'goto' */ +unsigned OptLoadStore2 (CodeSeg* S); +/* Remove 16 bit stack loads followed by a store into the same location. */ + unsigned OptLoad1 (CodeSeg* S); /* Search for a call to ldaxysp where X is not used later and replace it by ** a load of just the A register. @@ -107,11 +110,16 @@ unsigned OptLoad1 (CodeSeg* S); unsigned OptLoad2 (CodeSeg* S); /* Replace calls to ldaxysp by inline code */ -unsigned OptBinOps (CodeSeg* S); +unsigned OptBinOps1 (CodeSeg* S); /* Search for an AND/EOR/ORA where the value of A or the operand is known and ** replace it by something simpler. */ +unsigned OptBinOps2 (CodeSeg* S); +/* Search for an AND/EOR/ORA for identical memory locations and replace it +** by something simpler. +*/ + /* End of coptmisc.h */ diff --git a/src/cc65/coptptrload.c b/src/cc65/coptptrload.c index 046e65d79..e28bf5d39 100644 --- a/src/cc65/coptptrload.c +++ b/src/cc65/coptptrload.c @@ -359,7 +359,7 @@ unsigned OptPtrLoad4 (CodeSeg* S) ** ldx #>(label+0) ** ldy #$xx ** clc -** adc (sp),y +** adc (c_sp),y ** bcc L ** inx ** L: ldy #$00 @@ -368,7 +368,7 @@ unsigned OptPtrLoad4 (CodeSeg* S) ** and replace it by: ** ** ldy #$xx -** lda (sp),y +** lda (c_sp),y ** tay ** ldx #$00 ** lda label,y @@ -553,7 +553,7 @@ unsigned OptPtrLoad6 (CodeSeg* S) ** jsr pushax ** ldy #xxx ** ldx #$00 -** lda (sp),y +** lda (c_sp),y ** jsr tosaddax ** ldy #$00 ** jsr ldauidx @@ -563,7 +563,7 @@ unsigned OptPtrLoad6 (CodeSeg* S) ** sta ptr1 ** stx ptr1+1 ** ldy #xxx-2 -** lda (sp),y +** lda (c_sp),y ** tay ** ldx #$00 ** lda (ptr1),y @@ -613,7 +613,7 @@ unsigned OptPtrLoad6 (CodeSeg* S) X = NewCodeEntry (OP65_LDY, AM65_IMM, Arg, 0, L[1]->LI); CS_InsertEntry (S, X, I+9); - /* lda (sp),y */ + /* lda (c_sp),y */ X = NewCodeEntry (OP65_LDA, L[3]->AM, L[3]->Arg, 0, L[3]->LI); CS_InsertEntry (S, X, I+10); diff --git a/src/cc65/coptptrload.h b/src/cc65/coptptrload.h index d4e0e2ed4..259d1587b 100644 --- a/src/cc65/coptptrload.h +++ b/src/cc65/coptptrload.h @@ -127,7 +127,7 @@ unsigned OptPtrLoad4 (CodeSeg* S); ** ldx #>(label+0) ** ldy #$xx ** clc -** adc (sp),y +** adc (c_sp),y ** bcc L ** inx ** L: ldy #$00 @@ -136,7 +136,7 @@ unsigned OptPtrLoad4 (CodeSeg* S); ** and replace it by: ** ** ldy #$xx -** lda (sp),y +** lda (c_sp),y ** tay ** ldx #$00 ** lda label,y @@ -166,7 +166,7 @@ unsigned OptPtrLoad6 (CodeSeg* S); ** jsr pushax ** ldy xxx ** ldx #$00 -** lda (sp),y +** lda (c_sp),y ** jsr tosaddax ** ldy #$00 ** jsr ldauidx @@ -176,7 +176,7 @@ unsigned OptPtrLoad6 (CodeSeg* S); ** sta ptr1 ** stx ptr1+1 ** ldy xxx -** lda (sp),y +** lda (c_sp),y ** tay ** lda (ptr1),y */ diff --git a/src/cc65/coptptrstore.c b/src/cc65/coptptrstore.c index 11832910f..721775380 100644 --- a/src/cc65/coptptrstore.c +++ b/src/cc65/coptptrstore.c @@ -396,7 +396,7 @@ unsigned OptPtrStore2 (CodeSeg* S) ** L: jsr pushax ** ldy yyy ** ldx #$00 -** lda (sp),y +** lda (c_sp),y ** ldy #$00 ** jsr staspidx ** @@ -406,7 +406,7 @@ unsigned OptPtrStore2 (CodeSeg* S) ** stx ptr1+1 ** ldy yyy-2 ** ldx #$00 -** lda (sp),y +** lda (c_sp),y ** ldy xxx ** sta (ptr1),y ** @@ -414,7 +414,7 @@ unsigned OptPtrStore2 (CodeSeg* S) ** ** ldy yyy-2 ** ldx #$00 -** lda (sp),y +** lda (c_sp),y ** ldy xxx ** sta (zp),y ** @@ -422,7 +422,7 @@ unsigned OptPtrStore2 (CodeSeg* S) ** ** ldy yyy-2 ** ldx #$00 -** lda (sp),y +** lda (c_sp),y ** ldy xxx ** sta label,y ** @@ -430,7 +430,7 @@ unsigned OptPtrStore2 (CodeSeg* S) ** ** ldy yyy-2 ** ldx #$00 -** lda (sp),y +** lda (c_sp),y ** ldy xxx ** sta $xxxx,y ** @@ -468,7 +468,7 @@ unsigned OptPtrStore2 (CodeSeg* S) L[6]->OPC == OP65_LDX && L[7]->OPC == OP65_LDA && L[7]->AM == AM65_ZP_INDY && - strcmp (L[7]->Arg, "sp") == 0 && + strcmp (L[7]->Arg, "c_sp") == 0 && L[8]->OPC == OP65_LDY && (L[8]->AM == AM65_ABS || L[8]->AM == AM65_ZP || diff --git a/src/cc65/coptptrstore.h b/src/cc65/coptptrstore.h index 3f8fc91f9..fd36eddba 100644 --- a/src/cc65/coptptrstore.h +++ b/src/cc65/coptptrstore.h @@ -105,7 +105,7 @@ unsigned OptPtrStore2 (CodeSeg* S); ** L: jsr pushax ** ldy yyy ** ldx #$00 -** lda (sp),y +** lda (c_sp),y ** ldy #$00 ** jsr staspidx ** @@ -115,7 +115,7 @@ unsigned OptPtrStore2 (CodeSeg* S); ** stx ptr1+1 ** ldy yyy-2 ** ldx #$00 -** lda (sp),y +** lda (c_sp),y ** ldy xxx ** sta (ptr1),y ** @@ -123,7 +123,7 @@ unsigned OptPtrStore2 (CodeSeg* S); ** ** ldy yyy-2 ** ldx #$00 -** lda (sp),y +** lda (c_sp),y ** ldy xxx ** sta (zp),y ** @@ -131,7 +131,7 @@ unsigned OptPtrStore2 (CodeSeg* S); ** ** ldy yyy-2 ** ldx #$00 -** lda (sp),y +** lda (c_sp),y ** ldy xxx ** sta label,y ** @@ -139,7 +139,7 @@ unsigned OptPtrStore2 (CodeSeg* S); ** ** ldy yyy-2 ** ldx #$00 -** lda (sp),y +** lda (c_sp),y ** ldy xxx ** sta $xxxx,y ** diff --git a/src/cc65/coptstop.c b/src/cc65/coptstop.c index 402f16b97..7a9416b51 100644 --- a/src/cc65/coptstop.c +++ b/src/cc65/coptstop.c @@ -1292,10 +1292,10 @@ static unsigned Opt_a_tosicmp (StackOpData* D) } InsertEntry (D, X, D->IP++); - /* cmp src,y OR cmp (sp),y */ + /* cmp src,y OR cmp (c_sp),y */ if (D->Rhs.A.LoadEntry->OPC == OP65_JSR) { - /* opc (sp),y */ - X = NewCodeEntry (OP65_CMP, AM65_ZP_INDY, "sp", 0, D->OpEntry->LI); + /* opc (c_sp),y */ + X = NewCodeEntry (OP65_CMP, AM65_ZP_INDY, "c_sp", 0, D->OpEntry->LI); } else { /* opc src,y */ X = NewCodeEntry (OP65_CMP, D->Rhs.A.LoadEntry->AM, D->Rhs.A.LoadEntry->Arg, 0, D->OpEntry->LI); @@ -1464,7 +1464,9 @@ static unsigned Opt_a_tosxor (StackOpData* D) /* The first column of these two tables must be sorted in lexical order */ +/* CAUTION: table must be sorted for bsearch */ static const OptFuncDesc FuncTable[] = { +/* BEGIN SORTED.SH */ { "___bzero", Opt___bzero, REG_NONE, OP_X_ZERO | OP_A_KNOWN }, { "staspidx", Opt_staspidx, REG_NONE, OP_NONE }, { "staxspidx", Opt_staxspidx, REG_AX, OP_NONE }, @@ -1485,9 +1487,12 @@ static const OptFuncDesc FuncTable[] = { { "tosuleax", Opt_tosuleax, REG_NONE, OP_RHS_REMOVE_DIRECT | OP_RHS_LOAD_DIRECT }, { "tosultax", Opt_tosultax, REG_NONE, OP_RHS_REMOVE_DIRECT | OP_RHS_LOAD_DIRECT }, { "tosxorax", Opt_tosxorax, REG_NONE, OP_NONE }, +/* END SORTED.SH */ }; +/* CAUTION: table must be sorted for bsearch */ static const OptFuncDesc FuncRegATable[] = { +/* BEGIN SORTED.SH */ { "tosandax", Opt_a_tosand, REG_NONE, OP_RHS_REMOVE_DIRECT | OP_RHS_LOAD_DIRECT }, { "toseqax", Opt_a_toseq, REG_NONE, OP_NONE }, { "tosgeax", Opt_a_tosuge, REG_NONE, OP_NONE }, @@ -1503,6 +1508,7 @@ static const OptFuncDesc FuncRegATable[] = { { "tosuleax", Opt_a_tosule, REG_NONE, OP_NONE }, { "tosultax", Opt_a_tosult, REG_NONE, OP_NONE }, { "tosxorax", Opt_a_tosxor, REG_NONE, OP_RHS_REMOVE_DIRECT | OP_RHS_LOAD_DIRECT }, +/* END SORTED.SH */ }; #define FUNC_COUNT(Table) (sizeof(Table) / sizeof(Table[0])) diff --git a/src/cc65/coptstore.c b/src/cc65/coptstore.c index b0dfe3b6d..2fc83b5fb 100644 --- a/src/cc65/coptstore.c +++ b/src/cc65/coptstore.c @@ -48,7 +48,7 @@ static void InsertStore (CodeSeg* S, unsigned* IP, LineInfo* LI) { - CodeEntry* X = NewCodeEntry (OP65_STA, AM65_ZP_INDY, "sp", 0, LI); + CodeEntry* X = NewCodeEntry (OP65_STA, AM65_ZP_INDY, "c_sp", 0, LI); CS_InsertEntry (S, X, (*IP)++); } diff --git a/src/cc65/error.c b/src/cc65/error.c index db0debf8c..ae2d6f27d 100644 --- a/src/cc65/error.c +++ b/src/cc65/error.c @@ -39,6 +39,7 @@ /* common */ #include "coll.h" +#include "debugflag.h" #include "print.h" #include "strbuf.h" @@ -183,11 +184,15 @@ static unsigned GetDiagnosticLineNum (void) -void Fatal (const char* Format, ...) +void Fatal_ (const char *file, int line, const char* Format, ...) /* Print a message about a fatal error and die */ { va_list ap; + if (Debug) { + fprintf(stderr, "[%s:%d] ", file, line); + } + fprintf (stderr, "%s:%u: Fatal: ", GetDiagnosticFileName (), GetDiagnosticLineNum ()); va_start (ap, Format); @@ -203,11 +208,15 @@ void Fatal (const char* Format, ...) -void Internal (const char* Format, ...) +void Internal_ (const char *file, int line, const char* Format, ...) /* Print a message about an internal compiler error and die */ { va_list ap; + if (Debug) { + fprintf(stderr, "[%s:%d] ", file, line); + } + fprintf (stderr, "%s:%u: Internal compiler error:\n", GetDiagnosticFileName (), GetDiagnosticLineNum ()); @@ -270,10 +279,15 @@ static void IntError (errcat_t EC, LineInfo* LI, const char* Msg, va_list ap) -void LIError (errcat_t EC, LineInfo* LI, const char* Format, ...) +void LIError_ (const char *file, int line, errcat_t EC, LineInfo* LI, const char* Format, ...) /* Print an error message with the line info given explicitly */ { va_list ap; + + if (Debug) { + fprintf(stderr, "[%s:%d] ", file, line); + } + va_start (ap, Format); IntError (EC, LI, Format, ap); va_end (ap); @@ -281,10 +295,15 @@ void LIError (errcat_t EC, LineInfo* LI, const char* Format, ...) -void Error (const char* Format, ...) +void Error_ (const char *file, int line, const char* Format, ...) /* Print an error message */ { va_list ap; + + if (Debug) { + fprintf(stderr, "[%s:%d] ", file, line); + } + va_start (ap, Format); IntError (EC_PARSER, GetDiagnosticLI (), Format, ap); va_end (ap); @@ -292,10 +311,15 @@ void Error (const char* Format, ...) -void PPError (const char* Format, ...) +void PPError_ (const char *file, int line, const char* Format, ...) /* Print an error message. For use within the preprocessor */ { va_list ap; + + if (Debug) { + fprintf(stderr, "[%s:%d] ", file, line); + } + va_start (ap, Format); IntError (EC_PP, GetCurLineInfo (), Format, ap); va_end (ap); @@ -346,10 +370,15 @@ static void IntWarning (errcat_t EC, LineInfo* LI, const char* Msg, va_list ap) -void LIWarning (errcat_t EC, LineInfo* LI, const char* Format, ...) +void LIWarning_ (const char *file, int line, errcat_t EC, LineInfo* LI, const char* Format, ...) /* Print a warning message with the line info given explicitly */ { va_list ap; + + if (Debug) { + fprintf(stderr, "[%s:%d] ", file, line); + } + va_start (ap, Format); IntWarning (EC, LI, Format, ap); va_end (ap); @@ -357,10 +386,15 @@ void LIWarning (errcat_t EC, LineInfo* LI, const char* Format, ...) -void Warning (const char* Format, ...) +void Warning_ (const char *file, int line, const char* Format, ...) /* Print a warning message */ { va_list ap; + + if (Debug) { + fprintf(stderr, "[%s:%d] ", file, line); + } + va_start (ap, Format); IntWarning (EC_PARSER, GetDiagnosticLI (), Format, ap); va_end (ap); @@ -368,10 +402,15 @@ void Warning (const char* Format, ...) -void PPWarning (const char* Format, ...) +void PPWarning_ (const char *file, int line, const char* Format, ...) /* Print a warning message. For use within the preprocessor */ { va_list ap; + + if (Debug) { + fprintf(stderr, "[%s:%d] ", file, line); + } + va_start (ap, Format); IntWarning (EC_PP, GetCurLineInfo (), Format, ap); va_end (ap); @@ -436,10 +475,15 @@ static void IntNote (const LineInfo* LI, const char* Msg, va_list ap) -void LINote (const LineInfo* LI, const char* Format, ...) +void LINote_ (const char *file, int line, const LineInfo* LI, const char* Format, ...) /* Print a note message with the line info given explicitly */ { va_list ap; + + if (Debug) { + fprintf(stderr, "[%s:%d] ", file, line); + } + va_start (ap, Format); IntNote (LI, Format, ap); va_end (ap); @@ -447,10 +491,15 @@ void LINote (const LineInfo* LI, const char* Format, ...) -void Note (const char* Format, ...) +void Note_ (const char *file, int line, const char* Format, ...) /* Print a note message */ { va_list ap; + + if (Debug) { + fprintf(stderr, "[%s:%d] ", file, line); + } + va_start (ap, Format); IntNote (GetDiagnosticLI (), Format, ap); va_end (ap); @@ -458,10 +507,15 @@ void Note (const char* Format, ...) -void PPNote (const char* Format, ...) +void PPNote_ (const char *file, int line, const char* Format, ...) /* Print a note message. For use within the preprocessor */ { va_list ap; + + if (Debug) { + fprintf(stderr, "[%s:%d] ", file, line); + } + va_start (ap, Format); IntNote (GetDiagnosticLI (), Format, ap); va_end (ap); diff --git a/src/cc65/error.h b/src/cc65/error.h index b3cdc49ab..0a18d51a4 100644 --- a/src/cc65/error.h +++ b/src/cc65/error.h @@ -103,28 +103,36 @@ struct StrBuf; void PrintFileInclusionInfo (const LineInfo* LI); /* Print hierarchy of file inclusion */ -void Fatal (const char* Format, ...) attribute ((noreturn, format (printf, 1, 2))); +void Fatal_ (const char *file, int line, const char* Format, ...) attribute ((noreturn, format (printf, 3, 4))); +#define Fatal(...) Fatal_(__FILE__, __LINE__, __VA_ARGS__) /* Print a message about a fatal error and die */ -void Internal (const char* Format, ...) attribute ((noreturn, format (printf, 1, 2))); +void Internal_ (const char *file, int line, const char* Format, ...) attribute ((noreturn, format (printf, 3, 4))); +#define Internal(...) Internal_(__FILE__, __LINE__, __VA_ARGS__) /* Print a message about an internal compiler error and die */ -void Error (const char* Format, ...) attribute ((format (printf, 1, 2))); +void Error_ (const char *file, int line, const char* Format, ...) attribute ((format (printf, 3, 4))); +#define Error(...) Error_(__FILE__, __LINE__, __VA_ARGS__) /* Print an error message */ -void LIError (errcat_t EC, LineInfo* LI, const char* Format, ...) attribute ((format (printf, 3, 4))); +void LIError_ (const char *file, int line, errcat_t EC, LineInfo* LI, const char* Format, ...) attribute ((format (printf, 5, 6))); +#define LIError(...) LIError_(__FILE__, __LINE__, __VA_ARGS__) /* Print an error message with the line info given explicitly */ -void PPError (const char* Format, ...) attribute ((format (printf, 1, 2))); +void PPError_ (const char *file, int line, const char* Format, ...) attribute ((format (printf, 3, 4))); +#define PPError(...) PPError_(__FILE__, __LINE__, __VA_ARGS__) /* Print an error message. For use within the preprocessor */ -void Warning (const char* Format, ...) attribute ((format (printf, 1, 2))); +void Warning_ (const char *file, int line, const char* Format, ...) attribute ((format (printf, 3, 4))); +#define Warning(...) Warning_(__FILE__, __LINE__, __VA_ARGS__) /* Print a warning message */ -void LIWarning (errcat_t EC, LineInfo* LI, const char* Format, ...) attribute ((format (printf, 3, 4))); +void LIWarning_ (const char *file, int line, errcat_t EC, LineInfo* LI, const char* Format, ...) attribute ((format (printf, 5, 6))); +#define LIWarning(...) LIWarning_(__FILE__, __LINE__, __VA_ARGS__) /* Print a warning message with the line info given explicitly */ -void PPWarning (const char* Format, ...) attribute ((format (printf, 1, 2))); +void PPWarning_ (const char *file, int line, const char* Format, ...) attribute ((format (printf, 3, 4))); +#define PPWarning(...) PPWarning_(__FILE__, __LINE__, __VA_ARGS__) /* Print a warning message. For use within the preprocessor */ void UnreachableCodeWarning (void); @@ -140,13 +148,16 @@ IntStack* FindWarning (const char* Name); void ListWarnings (FILE* F); /* Print a list of warning types/names to the given file */ -void Note (const char* Format, ...) attribute ((format (printf, 1, 2))); +void Note_ (const char *file, int line, const char* Format, ...) attribute ((format (printf, 3, 4))); +#define Note(...) Note_(__FILE__, __LINE__, __VA_ARGS__) /* Print a note message */ -void LINote (const LineInfo* LI, const char* Format, ...) attribute ((format (printf, 2, 3))); +void LINote_ (const char *file, int line, const LineInfo* LI, const char* Format, ...) attribute ((format (printf, 4, 5))); +#define LINote(...) LINote_(__FILE__, __LINE__, __VA_ARGS__) /* Print a note message with the line info given explicitly */ -void PPNote (const char* Format, ...) attribute ((format (printf, 1, 2))); +void PPNote_ (const char *file, int line, const char* Format, ...) attribute ((format (printf, 3, 4))); +#define PPNote(...) PPNote_(__FILE__, __LINE__, __VA_ARGS__) /* Print a note message. For use within the preprocessor */ unsigned GetTotalErrors (void); diff --git a/src/cc65/global.c b/src/cc65/global.c index b2c3ef0a0..64278df77 100644 --- a/src/cc65/global.c +++ b/src/cc65/global.c @@ -44,12 +44,14 @@ unsigned char AddSource = 0; /* Add source lines as comments */ +unsigned char AllowNewComments = 0; /* Allow new style comments in C89 mode */ unsigned char AutoCDecl = 0; /* Make functions default to __cdecl__ */ unsigned char DebugInfo = 0; /* Add debug info to the obj */ +unsigned char DumpPredefMacros = 0; /* Output predefined macros */ +unsigned char DumpUserMacros = 0; /* Output user macros */ unsigned char PreprocessOnly = 0; /* Just preprocess the input */ unsigned char DebugOptOutput = 0; /* Output debug stuff */ unsigned RegisterSpace = 6; /* Space available for register vars */ -unsigned AllowNewComments = 0; /* Allow new style comments in C89 mode */ /* Stackable options */ IntStack WritableStrings = INTSTACK(0); /* Literal strings are r/w */ diff --git a/src/cc65/global.h b/src/cc65/global.h index ba7105130..c781f6de4 100644 --- a/src/cc65/global.h +++ b/src/cc65/global.h @@ -52,12 +52,14 @@ /* Options */ extern unsigned char AddSource; /* Add source lines as comments */ +extern unsigned char AllowNewComments; /* Allow new style comments in C89 mode */ extern unsigned char AutoCDecl; /* Make functions default to __cdecl__ */ extern unsigned char DebugInfo; /* Add debug info to the obj */ +extern unsigned char DumpPredefMacros; /* Output predefined macros */ +extern unsigned char DumpUserMacros; /* Output user macros */ extern unsigned char PreprocessOnly; /* Just preprocess the input */ extern unsigned char DebugOptOutput; /* Output debug stuff */ extern unsigned RegisterSpace; /* Space available for register vars */ -extern unsigned AllowNewComments; /* Allow new style comments in C89 mode */ /* Stackable options */ extern IntStack WritableStrings; /* Literal strings are r/w */ diff --git a/src/cc65/input.c b/src/cc65/input.c index fcf7f32f3..4faf2aa87 100644 --- a/src/cc65/input.c +++ b/src/cc65/input.c @@ -40,6 +40,7 @@ /* common */ #include "check.h" #include "coll.h" +#include "debugflag.h" #include "filestat.h" #include "fname.h" #include "print.h" @@ -77,17 +78,6 @@ char NextC = '\0'; /* Maximum count of nested includes */ #define MAX_INC_NESTING 16 -/* Struct that describes an input file */ -typedef struct IFile IFile; -struct IFile { - unsigned Index; /* File index */ - unsigned Usage; /* Usage counter */ - unsigned long Size; /* File size */ - unsigned long MTime; /* Time of last modification */ - InputType Type; /* Type of input file */ - char Name[1]; /* Name of file (dynamically allocated) */ -}; - /* Struct that describes an active input file */ typedef struct AFile AFile; struct AFile { @@ -132,11 +122,13 @@ static IFile* NewIFile (const char* Name, InputType Type) IFile* IF = (IFile*) xmalloc (sizeof (IFile) + Len); /* Initialize the fields */ - IF->Index = CollCount (&IFiles) + 1; - IF->Usage = 0; - IF->Size = 0; - IF->MTime = 0; - IF->Type = Type; + IF->Index = CollCount (&IFiles) + 1; + IF->Usage = 0; + IF->Size = 0; + IF->MTime = 0; + IF->Type = Type; + IF->GFlags = IG_NONE; + SB_Init (&IF->GuardMacro); memcpy (IF->Name, Name, Len+1); /* Insert the new structure into the IFile collection */ @@ -280,7 +272,7 @@ void OpenMainFile (const char* Name) SetPPIfStack (&MainFile->IfStack); /* Begin PP for this file */ - PreprocessBegin (); + PreprocessBegin (IF); /* Allocate the input line buffer */ Line = NewStrBuf (); @@ -318,11 +310,21 @@ void OpenIncludeFile (const char* Name, InputType IT) } /* Search the list of all input files for this file. If we don't find - ** it, create a new IFile object. + ** it, create a new IFile object. If we do already know the file and it + ** has an include guard, check for the include guard before opening the + ** file. */ IF = FindFile (N); if (IF == 0) { IF = NewIFile (N, IT); + } else if ((IF->GFlags & IG_ISGUARDED) != 0 && + IsMacro (SB_GetConstBuf (&IF->GuardMacro))) { + if (Debug) { + printf ("Include guard %s found for \"%s\" - won't include it again\n", + SB_GetConstBuf (&IF->GuardMacro), + Name); + } + return; } /* We don't need N any longer, since we may now use IF->Name */ @@ -346,7 +348,7 @@ void OpenIncludeFile (const char* Name, InputType IT) SetPPIfStack (&AF->IfStack); /* Begin PP for this file */ - PreprocessBegin (); + PreprocessBegin (IF); } @@ -356,27 +358,24 @@ void CloseIncludeFile (void) ** NULL if this was the main file. */ { - AFile* Input; + /* Get the currently active input file and remove it from set of active + ** files. CollPop will FAIL if the collection is empty so no need to + ** check this here. + */ + AFile* Input = CollPop (&AFiles); - /* Get the number of active input files */ - unsigned AFileCount = CollCount (&AFiles); + /* Determine the file that is active after closing this one. We never + ** actually close the main file, since it is needed for errors found after + ** compilation is completed. + */ + AFile* NextInput = (CollCount (&AFiles) > 0)? CollLast (&AFiles) : Input; - /* Must have an input file when called */ - PRECONDITION (AFileCount > 0); - - /* End preprocessor in this file */ - PreprocessEnd (); - - /* Get the current active input file */ - Input = CollLast (&AFiles); + /* End preprocessing for the current input file */ + PreprocessEnd (NextInput->Input); /* Close the current input file (we're just reading so no error check) */ fclose (Input->F); - /* Delete the last active file from the active file collection */ - --AFileCount; - CollDelete (&AFiles, AFileCount); - /* If we had added an extra search path for this AFile, remove it */ if (Input->SearchPath) { PopSearchPath (UsrIncSearchPath); @@ -385,10 +384,9 @@ void CloseIncludeFile (void) /* Delete the active file structure */ FreeAFile (Input); - /* Use previous file with PP if it is not the main file */ - if (AFileCount > 0) { - Input = CollLast (&AFiles); - SetPPIfStack (&Input->IfStack); + /* If we've switched files, use the if stack from the previous file */ + if (Input != NextInput) { + SetPPIfStack (&NextInput->IfStack); } } diff --git a/src/cc65/input.h b/src/cc65/input.h index 9a5a76949..5d7d051e8 100644 --- a/src/cc65/input.h +++ b/src/cc65/input.h @@ -65,6 +65,28 @@ typedef enum { IT_USRINC = 0x04, /* User include file (using "") */ } InputType; +/* A bitmapped set of flags for include guard processing in the preprocessor */ +typedef enum { + IG_NONE = 0x00, + IG_NEWFILE = 0x01, /* File processing started */ + IG_ISGUARDED = 0x02, /* File contains an include guard */ + IG_GUARDCLOSED = 0x04, /* Include guard was closed */ + IG_COMPLETE = IG_ISGUARDED | IG_GUARDCLOSED, +} GuardFlags; + +/* Struct that describes an input file */ +typedef struct IFile IFile; +struct IFile { + unsigned Index; /* File index */ + unsigned Usage; /* Usage counter */ + unsigned long Size; /* File size */ + unsigned long MTime; /* Time of last modification */ + InputType Type; /* Type of input file */ + GuardFlags GFlags; /* Flags for include guard processing */ + StrBuf GuardMacro; /* Include guard macro name */ + char Name[1]; /* Name of file (dynamically allocated) */ +}; + /* The current input line */ extern StrBuf* Line; diff --git a/src/cc65/locals.c b/src/cc65/locals.c index 08e41918e..08fe83b75 100644 --- a/src/cc65/locals.c +++ b/src/cc65/locals.c @@ -269,7 +269,7 @@ static void ParseAutoDecl (Declarator* Decl) Sym->V.Offs = F_ReserveLocalSpace (CurrentFunc, Size); /* Next, allocate the space on the stack. This means that the - ** variable is now located at offset 0 from the current sp. + ** variable is now located at offset 0 from the current c_sp. */ F_AllocLocalSpace (CurrentFunc); diff --git a/src/cc65/macrotab.c b/src/cc65/macrotab.c index 3bfae0811..2817403c1 100644 --- a/src/cc65/macrotab.c +++ b/src/cc65/macrotab.c @@ -1,4 +1,4 @@ -/*****************************************************************************/ + /* */ /* macrotab.h */ /* */ @@ -42,6 +42,7 @@ /* cc65 */ #include "error.h" +#include "output.h" #include "preproc.h" #include "macrotab.h" @@ -60,6 +61,70 @@ static Macro* MacroTab[MACRO_TAB_SIZE]; /* The undefined macros list head */ static Macro* UndefinedMacrosListHead; +/* Some defines for better readability when calling OutputMacros() */ +#define USER_MACROS 0 +#define PREDEF_MACROS 1 +#define NAME_ONLY 0 +#define FULL_DEFINITION 1 + + + +/*****************************************************************************/ +/* helpers */ +/*****************************************************************************/ + + + +static void OutputMacro (const Macro* M, int Full) +/* Output one macro. If Full is true, the replacement is also output. */ +{ + WriteOutput ("#define %s", M->Name); + int ParamCount = M->ParamCount; + if (M->ParamCount >= 0) { + int I; + if (M->Variadic) { + CHECK (ParamCount > 0); + --ParamCount; + } + WriteOutput ("("); + for (I = 0; I < ParamCount; ++I) { + const char* Name = CollConstAt (&M->Params, I); + WriteOutput ("%s%s", (I == 0)? "" : ",", Name); + } + if (M->Variadic) { + WriteOutput ("%s...", (ParamCount == 0)? "" : ","); + } + WriteOutput (")"); + } + WriteOutput (" "); + if (Full) { + WriteOutput ("%.*s", + SB_GetLen (&M->Replacement), + SB_GetConstBuf (&M->Replacement)); + } + WriteOutput ("\n"); +} + + + +static void OutputMacros (int Predefined, int Full) +/* Output macros to the output file depending on the flags given. */ +{ + /* Note: The Full flag is currently not used by any callers but is left in + ** place for possible future changes. + */ + unsigned I; + for (I = 0; I < MACRO_TAB_SIZE; ++I) { + const Macro* M = MacroTab [I]; + while (M) { + if ((Predefined != 0) == (M->Predefined != 0)) { + OutputMacro (M, Full); + } + M = M->Next; + } + } +} + /*****************************************************************************/ @@ -68,7 +133,7 @@ static Macro* UndefinedMacrosListHead; -Macro* NewMacro (const char* Name) +Macro* NewMacro (const char* Name, unsigned char Predefined) /* Allocate a macro structure with the given name. The structure is not ** inserted into the macro table. */ @@ -84,6 +149,7 @@ Macro* NewMacro (const char* Name) M->ParamCount = -1; /* Flag: Not a function-like macro */ InitCollection (&M->Params); SB_Init (&M->Replacement); + M->Predefined = Predefined; M->Variadic = 0; memcpy (M->Name, Name, Len+1); @@ -116,7 +182,7 @@ Macro* CloneMacro (const Macro* M) ** Use FreeMacro for that. */ { - Macro* New = NewMacro (M->Name); + Macro* New = NewMacro (M->Name, M->Predefined); unsigned I; for (I = 0; I < CollCount (&M->Params); ++I) { @@ -134,7 +200,7 @@ Macro* CloneMacro (const Macro* M) void DefineNumericMacro (const char* Name, long Val) -/* Define a macro for a numeric constant */ +/* Define a predefined macro for a numeric constant */ { char Buf[64]; @@ -148,10 +214,10 @@ void DefineNumericMacro (const char* Name, long Val) void DefineTextMacro (const char* Name, const char* Val) -/* Define a macro for a textual constant */ +/* Define a predefined macro for a textual constant */ { /* Create a new macro */ - Macro* M = NewMacro (Name); + Macro* M = NewMacro (Name, 1); /* Set the value as replacement text */ SB_CopyStr (&M->Replacement, Val); @@ -350,3 +416,19 @@ void PrintMacroStats (FILE* F) } } } + + + +void OutputPredefMacros (void) +/* Output all predefined macros to the output file */ +{ + OutputMacros (PREDEF_MACROS, FULL_DEFINITION); +} + + + +void OutputUserMacros (void) +/* Output all user defined macros to the output file */ +{ + OutputMacros (USER_MACROS, FULL_DEFINITION); +} diff --git a/src/cc65/macrotab.h b/src/cc65/macrotab.h index 52b812b2f..00fb1d55a 100644 --- a/src/cc65/macrotab.h +++ b/src/cc65/macrotab.h @@ -58,6 +58,7 @@ struct Macro { int ParamCount; /* Number of parameters, -1 = no parens */ Collection Params; /* Parameter list (char*) */ StrBuf Replacement; /* Replacement text */ + unsigned char Predefined; /* True if this is a predefined macro */ unsigned char Variadic; /* C99 variadic macro */ char Name[1]; /* Name, dynamically allocated */ }; @@ -70,7 +71,7 @@ struct Macro { -Macro* NewMacro (const char* Name); +Macro* NewMacro (const char* Name, unsigned char Predefined); /* Allocate a macro structure with the given name. The structure is not ** inserted into the macro table. */ @@ -87,10 +88,10 @@ Macro* CloneMacro (const Macro* M); */ void DefineNumericMacro (const char* Name, long Val); -/* Define a macro for a numeric constant */ +/* Define a predefined macro for a numeric constant */ void DefineTextMacro (const char* Name, const char* Val); -/* Define a macro for a textual constant */ +/* Define a predefined macro for a textual constant */ void InsertMacro (Macro* M); /* Insert the given macro into the macro table. */ @@ -132,6 +133,12 @@ int MacroCmp (const Macro* M1, const Macro* M2); void PrintMacroStats (FILE* F); /* Print macro statistics to the given text file. */ +void OutputPredefMacros (void); +/* Output all predefined macros to the output file */ + +void OutputUserMacros (void); +/* Output all user defined macros to the output file */ + /* End of macrotab.h */ diff --git a/src/cc65/main.c b/src/cc65/main.c index 47435757c..5fc6ea343 100644 --- a/src/cc65/main.c +++ b/src/cc65/main.c @@ -93,6 +93,8 @@ static void Usage (void) " -V\t\t\t\tPrint the compiler version number\n" " -W [-+]warning[,...]\t\tControl warnings ('-' disables, '+' enables)\n" " -d\t\t\t\tDebug mode\n" + " -dM\t\t\t\tOutput all user macros (needs -E)\n" + " -dP\t\t\t\tOutput all predefined macros (needs -E)\n" " -g\t\t\t\tAdd debug info to object file\n" " -h\t\t\t\tHelp (this text)\n" " -j\t\t\t\tDefault characters are signed\n" @@ -299,6 +301,14 @@ static void SetSys (const char* Sys) DefineNumericMacro ("__SYM1__", 1); break; + case TGT_C65: + cbmsys ("__C65__"); + break; + + case TGT_MEGA65: + cbmsys ("__MEGA65__"); + break; + case TGT_KIM1: DefineNumericMacro ("__KIM1__", 1); break; @@ -307,6 +317,10 @@ static void SetSys (const char* Sys) DefineNumericMacro ("__RP6502__", 1); break; + case TGT_AGAT: + DefineNumericMacro ("__AGAT__", 1); + break; + default: AbEnd ("Unknown target system '%s'", Sys); } @@ -317,6 +331,100 @@ static void SetSys (const char* Sys) +static void DefineCpuMacros (void) +/* Define macros for the target CPU */ +{ + const char* CPUName; + + /* Note: The list of CPUs handled here must match the one checked in + ** OptCPU(). + */ + switch (CPU) { + + /* The following ones are legal CPUs as far as the assembler is + ** concerned but are ruled out earlier in the compiler, so this + ** function should never see them. + */ + case CPU_NONE: + case CPU_SWEET16: + case CPU_M740: + case CPU_UNKNOWN: + CPUName = (CPU == CPU_UNKNOWN)? "unknown" : CPUNames[CPU]; + Internal ("Invalid CPU \"%s\"", CPUName); + break; + + case CPU_6502: + DefineNumericMacro ("__CPU_6502__", 1); + break; + + case CPU_6502X: + DefineNumericMacro ("__CPU_6502X__", 1); + break; + + case CPU_6502DTV: + DefineNumericMacro ("__CPU_6502DTV__", 1); + break; + + case CPU_65SC02: + DefineNumericMacro ("__CPU_65SC02__", 1); + break; + + case CPU_65C02: + DefineNumericMacro ("__CPU_65C02__", 1); + break; + + case CPU_65CE02: + DefineNumericMacro ("__CPU_65CE02__", 1); + break; + + case CPU_65816: + DefineNumericMacro ("__CPU_65816__", 1); + break; + + case CPU_W65C02: + DefineNumericMacro ("__CPU_W65C02__", 1); + break; + + case CPU_HUC6280: + DefineNumericMacro ("__CPU_HUC6280__", 1); + break; + + case CPU_4510: + DefineNumericMacro ("__CPU_4510__", 1); + break; + + case CPU_45GS02: + DefineNumericMacro ("__CPU_45GS02__", 1); + break; + + default: + FAIL ("Unexpected value in switch"); + break; + } + + /* Define the macros for instruction sets. We only include the ones for + ** the available CPUs. + */ + DefineNumericMacro ("__CPU_ISET_6502__", CPU_ISET_6502); + DefineNumericMacro ("__CPU_ISET_6502X__", CPU_ISET_6502X); + DefineNumericMacro ("__CPU_ISET_6502DTV__", CPU_ISET_6502DTV); + DefineNumericMacro ("__CPU_ISET_65SC02__", CPU_ISET_65SC02); + DefineNumericMacro ("__CPU_ISET_65C02__", CPU_ISET_65C02); + DefineNumericMacro ("__CPU_ISET_W65C02__", CPU_ISET_W65C02); + DefineNumericMacro ("__CPU_ISET_65CE02__", CPU_ISET_65CE02); + DefineNumericMacro ("__CPU_ISET_65816__", CPU_ISET_65816); + DefineNumericMacro ("__CPU_ISET_HUC6280__", CPU_ISET_HUC6280); + DefineNumericMacro ("__CPU_ISET_4510__", CPU_ISET_4510); + DefineNumericMacro ("__CPU_ISET_45GS02__", CPU_ISET_45GS02); + + /* Now define the macro that contains the bit set with the available + ** cpu instructions. + */ + DefineNumericMacro ("__CPU__", CPUIsets[CPU]); +} + + + static void FileNameOption (const char* Opt, const char* Arg, StrBuf* Name) /* Handle an option that remembers a file name for later */ { @@ -477,7 +585,9 @@ static void OptCreateFullDep (const char* Opt attribute ((unused)), static void OptCPU (const char* Opt, const char* Arg) /* Handle the --cpu option */ { - /* Find the CPU from the given name */ + /* Find the CPU from the given name. We do only accept a certain number + ** of CPUs. If the list is changed, be sure to adjust SetCpuMacros(). + */ CPU = FindCPU (Arg); if (CPU != CPU_6502 && CPU != CPU_6502X && CPU != CPU_65SC02 && CPU != CPU_65C02 && CPU != CPU_65816 && CPU != CPU_HUC6280 && @@ -945,7 +1055,25 @@ int main (int argc, char* argv[]) break; case 'd': - OptDebug (Arg, 0); + P = Arg + 2; + if (*P == '\0') { + OptDebug (Arg, 0); + } else { + while (*P) { + switch (*P) { + case 'M': + DumpUserMacros = 1; + break; + case 'P': + DumpPredefMacros = 1; + break; + default: + UnknownOption (Arg); + break; + } + ++P; + } + } break; case 'h': @@ -1057,13 +1185,20 @@ int main (int argc, char* argv[]) AbEnd ("No input files"); } + /* The options to output macros can only be used with -E */ + if ((DumpPredefMacros || DumpUserMacros) && !PreprocessOnly) { + AbEnd ("Preprocessor macro output can only be used together with -E"); + } + /* Add the default include search paths. */ FinishIncludePaths (); /* Create the output file name if it was not explicitly given */ MakeDefaultOutputName (InputFile); - /* If no CPU given, use the default CPU for the target */ + /* If no CPU given, use the default CPU for the target. Define macros that + ** allow to query the CPU. + */ if (CPU == CPU_UNKNOWN) { if (Target != TGT_UNKNOWN) { CPU = GetTargetProperties (Target)->DefaultCPU; @@ -1071,6 +1206,7 @@ int main (int argc, char* argv[]) CPU = CPU_6502; } } + DefineCpuMacros (); /* If no memory model was given, use the default */ if (MemoryModel == MMODEL_UNKNOWN) { diff --git a/src/cc65/opcodes.c b/src/cc65/opcodes.c index aeea0297b..49363769e 100644 --- a/src/cc65/opcodes.c +++ b/src/cc65/opcodes.c @@ -55,9 +55,12 @@ /* Opcode description table */ +/* CAUTION: table must be sorted by mnemonic for bsearch */ const OPCDesc OPCTable[OP65_COUNT] = { /* 65XX opcodes */ + +/* BEGIN SORTED_OPCODES.SH */ { OP65_ADC, /* opcode */ "adc", /* mnemonic */ 0, /* size */ @@ -586,6 +589,7 @@ const OPCDesc OPCTable[OP65_COUNT] = { REG_Y, /* use */ REG_A | PSTATE_ZN /* chg */ }, +/* END SORTED_OPCODES.SH */ }; diff --git a/src/cc65/pragma.c b/src/cc65/pragma.c index ee71b42d8..49754fbe8 100644 --- a/src/cc65/pragma.c +++ b/src/cc65/pragma.c @@ -89,10 +89,12 @@ typedef enum { } pragma_t; /* Pragma table */ +/* CAUTION: table must be sorted for bsearch */ static const struct Pragma { const char* Key; /* Keyword */ pragma_t Tok; /* Token */ } Pragmas[] = { +/* BEGIN SORTED.SH */ { "align", PRAGMA_ALIGN }, { "allow-eager-inline", PRAGMA_ALLOW_EAGER_INLINE }, { "allow_eager_inline", PRAGMA_ALLOW_EAGER_INLINE }, @@ -127,6 +129,7 @@ static const struct Pragma { { "writable-strings", PRAGMA_WRITABLE_STRINGS }, { "writable_strings", PRAGMA_WRITABLE_STRINGS }, { "zpsym", PRAGMA_ZPSYM }, +/* END SORTED.SH */ }; #define PRAGMA_COUNT (sizeof (Pragmas) / sizeof (Pragmas[0])) @@ -433,12 +436,7 @@ static void ApplySegNamePragma (pragma_t Token, int PushPop, const char* Name, u SetSegAddrSize (Name, AddrSize); } - /* BSS variables are output at the end of the compilation. Don't - ** bother to change their segment, now. - */ - if (Seg != SEG_BSS) { - g_segname (Seg); - } + g_segname (Seg); } diff --git a/src/cc65/preproc.c b/src/cc65/preproc.c index 5cdec3142..bc21a69d1 100644 --- a/src/cc65/preproc.c +++ b/src/cc65/preproc.c @@ -93,6 +93,10 @@ #define IFCOND_SKIP 0x01U #define IFCOND_ELSE 0x02U #define IFCOND_NEEDTERM 0x04U +#define IFCOND_ISGUARD 0x08U + +/* Current input file */ +static IFile* CurInput = 0; /* Current PP if stack */ static PPIfStack* PPStack; @@ -216,10 +220,12 @@ typedef enum { /* Preprocessor directive tokens mapping table */ +/* CAUTION: table must be sorted for bsearch */ static const struct PPDType { const char* Tok; /* Token */ ppdirective_t Type; /* Type */ } PPDTypes[] = { +/* BEGIN SORTED.SH */ { "define", PPD_DEFINE }, { "elif", PPD_ELIF }, { "else", PPD_ELSE }, @@ -233,6 +239,7 @@ static const struct PPDType { { "pragma", PPD_PRAGMA }, { "undef", PPD_UNDEF }, { "warning", PPD_WARNING }, +/* END SORTED.SH */ }; /* Number of preprocessor directive types */ @@ -2572,7 +2579,7 @@ static void DoDefine (void) CheckForBadIdent (Ident, Std, 0); /* Create a new macro definition */ - M = NewMacro (Ident); + M = NewMacro (Ident, 0); /* Check if this is a function-like macro */ if (CurC == '(') { @@ -2698,7 +2705,7 @@ Error_Handler: -static int PushIf (int Skip, int Invert, int Cond) +static int PushIf (int Skip, int Invert, int Cond, unsigned Flags) /* Push a new if level onto the if stack */ { /* Check for an overflow of the if stack */ @@ -2710,10 +2717,10 @@ static int PushIf (int Skip, int Invert, int Cond) /* Push the #if condition */ ++PPStack->Index; if (Skip) { - PPStack->Stack[PPStack->Index] = IFCOND_SKIP | IFCOND_NEEDTERM; + PPStack->Stack[PPStack->Index] = IFCOND_SKIP | IFCOND_NEEDTERM | Flags; return 1; } else { - PPStack->Stack[PPStack->Index] = IFCOND_NONE | IFCOND_NEEDTERM; + PPStack->Stack[PPStack->Index] = IFCOND_NONE | IFCOND_NEEDTERM | Flags; return (Invert ^ Cond); } } @@ -2791,29 +2798,40 @@ static int DoIf (int Skip) } /* Set the #if condition according to the expression result */ - return PushIf (Skip, 1, Expr.IVal != 0); + return PushIf (Skip, 1, Expr.IVal != 0, IFCOND_NONE); } -static int DoIfDef (int skip, int flag) -/* Process #ifdef if flag == 1, or #ifndef if flag == 0. */ +static int DoIfDef (int Skip, int Flag) +/* Process #ifdef if Flag == 1, or #ifndef if Flag == 0. */ { - int Value = 0; + int IsDef = 0; + unsigned GuardFlag = IFCOND_NONE; - if (!skip) { + if (!Skip) { ident Ident; SkipWhitespace (0); if (MacName (Ident)) { CheckForBadIdent (Ident, IS_Get (&Standard), 0); - Value = IsMacro (Ident); + IsDef = IsMacro (Ident); /* Check for extra tokens */ - CheckExtraTokens (flag ? "ifdef" : "ifndef"); + CheckExtraTokens (Flag ? "ifdef" : "ifndef"); + /* Check if this is an include guard. This is the case if we have + ** a #ifndef directive at the start of a new file and the macro + ** is not defined. If so, remember it. + */ + if (Flag == 0 && (CurInput->GFlags & IG_NEWFILE) != 0 && !IsDef) { + CurInput->GFlags |= IG_ISGUARDED; + SB_CopyStr (&CurInput->GuardMacro, Ident); + SB_Terminate (&CurInput->GuardMacro); + GuardFlag = IFCOND_ISGUARD; + } } } - return PushIf (skip, flag, Value); + return PushIf (Skip, Flag, IsDef, GuardFlag); } @@ -3067,18 +3085,31 @@ static int ParseDirectives (unsigned ModeFlags) int PPSkip = 0; ident Directive; - /* Skip white space at the beginning of the first line */ + /* Skip white space at the beginning of the line */ int Whitespace = SkipWhitespace (0); /* Check for stuff to skip */ while (CurC == '\0' || CurC == '#' || PPSkip) { + /* If a #ifndef that was assumed to be an include guard was closed + ** recently, we may not have anything else following in the file + ** besides whitespace otherwise the assumption was false and we don't + ** actually have an include guard. + */ + if (CurC != '\0' && (CurInput->GFlags & IG_COMPLETE) == IG_COMPLETE) { + CurInput->GFlags &= ~IG_ISGUARDED; + } + /* Check for preprocessor lines lines */ if (CurC == '#') { + unsigned IfCond; + /* Skip the hash and following white space */ NextChar (); SkipWhitespace (0); + if (CurC == '\0') { /* Ignore the empty preprocessor directive */ + CurInput->GFlags &= ~IG_NEWFILE; continue; } if (!IsSym (Directive)) { @@ -3086,145 +3117,175 @@ static int ParseDirectives (unsigned ModeFlags) PPError ("Preprocessor directive expected"); } ClearLine (); - } else { - switch (FindPPDirectiveType (Directive)) { + CurInput->GFlags &= ~IG_NEWFILE; + continue; + } + switch (FindPPDirectiveType (Directive)) { - case PPD_DEFINE: - if (!PPSkip) { - DoDefine (); - } - break; + case PPD_DEFINE: + CurInput->GFlags &= ~IG_NEWFILE; + if (!PPSkip) { + DoDefine (); + } + break; - case PPD_ELIF: - if (PPStack->Index >= 0) { - if ((PPStack->Stack[PPStack->Index] & IFCOND_ELSE) == 0) { - /* Handle as #else/#if combination */ - if ((PPStack->Stack[PPStack->Index] & IFCOND_SKIP) == 0) { - PPSkip = !PPSkip; - } - PPStack->Stack[PPStack->Index] |= IFCOND_ELSE; - PPSkip = DoIf (PPSkip); + case PPD_ELIF: + CurInput->GFlags &= ~IG_NEWFILE; + if (PPStack->Index >= 0) { + unsigned char PPCond = PPStack->Stack[PPStack->Index]; + if ((PPCond & IFCOND_ELSE) == 0) { + /* Handle as #else/#if combination */ + if ((PPCond & IFCOND_SKIP) == 0) { + PPSkip = !PPSkip; + } + PPStack->Stack[PPStack->Index] |= IFCOND_ELSE; + PPSkip = DoIf (PPSkip); - /* #elif doesn't need a terminator */ - PPStack->Stack[PPStack->Index] &= ~IFCOND_NEEDTERM; - } else { - PPError ("Duplicate #else/#elif"); + /* #elif doesn't need a terminator */ + PPStack->Stack[PPStack->Index] &= ~IFCOND_NEEDTERM; + + /* An include guard cannot have a #elif */ + if (PPCond & IFCOND_ISGUARD) { + CurInput->GFlags &= ~IG_ISGUARDED; } } else { - PPError ("Unexpected #elif"); + PPError ("Duplicate #else/#elif"); } - break; + } else { + PPError ("Unexpected #elif"); + } + break; - case PPD_ELSE: - if (PPStack->Index >= 0) { - if ((PPStack->Stack[PPStack->Index] & IFCOND_ELSE) == 0) { - if ((PPStack->Stack[PPStack->Index] & IFCOND_SKIP) == 0) { - PPSkip = !PPSkip; - } - PPStack->Stack[PPStack->Index] |= IFCOND_ELSE; - - /* Check for extra tokens */ - CheckExtraTokens ("else"); - } else { - PPError ("Duplicate #else"); + case PPD_ELSE: + CurInput->GFlags &= ~IG_NEWFILE; + if (PPStack->Index >= 0) { + unsigned char PPCond = PPStack->Stack[PPStack->Index]; + if ((PPCond & IFCOND_ELSE) == 0) { + if ((PPCond & IFCOND_SKIP) == 0) { + PPSkip = !PPSkip; } - } else { - PPError ("Unexpected '#else'"); - } - break; + PPStack->Stack[PPStack->Index] |= IFCOND_ELSE; - case PPD_ENDIF: - if (PPStack->Index >= 0) { - /* Remove any clauses on top of stack that do not - ** need a terminating #endif. - */ - while (PPStack->Index >= 0 && - (PPStack->Stack[PPStack->Index] & IFCOND_NEEDTERM) == 0) { - --PPStack->Index; + /* An include guard cannot have a #else */ + if (PPCond & IFCOND_ISGUARD) { + CurInput->GFlags &= ~IG_ISGUARDED; } - /* Stack may not be empty here or something is wrong */ - CHECK (PPStack->Index >= 0); - - /* Remove the clause that needs a terminator */ - PPSkip = (PPStack->Stack[PPStack->Index--] & IFCOND_SKIP) != 0; - /* Check for extra tokens */ - CheckExtraTokens ("endif"); + CheckExtraTokens ("else"); } else { - PPError ("Unexpected '#endif'"); + PPError ("Duplicate #else"); } - break; + } else { + PPError ("Unexpected '#else'"); + } + break; - case PPD_ERROR: - if (!PPSkip) { - DoError (); + case PPD_ENDIF: + CurInput->GFlags &= ~IG_NEWFILE; + if (PPStack->Index >= 0) { + /* Remove any clauses on top of stack that do not + ** need a terminating #endif. + */ + while (PPStack->Index >= 0 && + (PPStack->Stack[PPStack->Index] & IFCOND_NEEDTERM) == 0) { + --PPStack->Index; } - break; - case PPD_IF: - PPSkip = DoIf (PPSkip); - break; + /* Stack may not be empty here or something is wrong */ + CHECK (PPStack->Index >= 0); - case PPD_IFDEF: - PPSkip = DoIfDef (PPSkip, 1); - break; - - case PPD_IFNDEF: - PPSkip = DoIfDef (PPSkip, 0); - break; - - case PPD_INCLUDE: - if (!PPSkip) { - DoInclude (); + /* Remove the clause that needs a terminator */ + IfCond = PPStack->Stack[PPStack->Index--]; + PPSkip = (IfCond & IFCOND_SKIP) != 0; + if (IfCond & IFCOND_ISGUARD) { + CurInput->GFlags |= IG_GUARDCLOSED; } - break; - case PPD_LINE: - if (!PPSkip) { - DoLine (); - } - break; + /* Check for extra tokens */ + CheckExtraTokens ("endif"); + } else { + PPError ("Unexpected '#endif'"); + } + break; - case PPD_PRAGMA: - if (!PPSkip) { - if ((ModeFlags & MSM_IN_ARG_LIST) == 0) { - DoPragma (); - return Whitespace; - } else { - PPError ("Embedded #pragma directive within macro arguments is unsupported"); - } - } - break; + case PPD_ERROR: + CurInput->GFlags &= ~IG_NEWFILE; + if (!PPSkip) { + DoError (); + } + break; - case PPD_UNDEF: - if (!PPSkip) { - DoUndef (); - } - break; + case PPD_IF: + CurInput->GFlags &= ~IG_NEWFILE; + PPSkip = DoIf (PPSkip); + break; - case PPD_WARNING: - /* #warning is a non standard extension */ - if (IS_Get (&Standard) > STD_C99) { - if (!PPSkip) { - DoWarning (); - } + case PPD_IFDEF: + CurInput->GFlags &= ~IG_NEWFILE; + PPSkip = DoIfDef (PPSkip, 1); + break; + + case PPD_IFNDEF: + PPSkip = DoIfDef (PPSkip, 0); + CurInput->GFlags &= ~IG_NEWFILE; + break; + + case PPD_INCLUDE: + CurInput->GFlags &= ~IG_NEWFILE; + if (!PPSkip) { + DoInclude (); + } + break; + + case PPD_LINE: + CurInput->GFlags &= ~IG_NEWFILE; + if (!PPSkip) { + DoLine (); + } + break; + + case PPD_PRAGMA: + CurInput->GFlags &= ~IG_NEWFILE; + if (!PPSkip) { + if ((ModeFlags & MSM_IN_ARG_LIST) == 0) { + DoPragma (); + return Whitespace; } else { - if (!PPSkip) { - PPError ("Preprocessor directive expected"); - } - ClearLine (); + PPError ("Embedded #pragma directive within macro arguments is unsupported"); } - break; + } + break; - default: + case PPD_UNDEF: + CurInput->GFlags &= ~IG_NEWFILE; + if (!PPSkip) { + DoUndef (); + } + break; + + case PPD_WARNING: + CurInput->GFlags &= ~IG_NEWFILE; + /* #warning is a non standard extension */ + if (IS_Get (&Standard) > STD_C99) { + if (!PPSkip) { + DoWarning (); + } + } else { if (!PPSkip) { PPError ("Preprocessor directive expected"); } ClearLine (); - } - } + } + break; + default: + CurInput->GFlags &= ~IG_NEWFILE; + if (!PPSkip) { + PPError ("Preprocessor directive expected"); + } + ClearLine (); + } } if (NextLine () == 0) { break; @@ -3233,6 +3294,15 @@ static int ParseDirectives (unsigned ModeFlags) Whitespace = SkipWhitespace (0) || Whitespace; } + /* If a #ifndef that was assumed to be an include guard was closed + ** recently, we may not have anything else following in the file + ** besides whitespace otherwise the assumption was false and we don't + ** actually have an include guard. + */ + if (CurC != '\0' && (CurInput->GFlags & IG_COMPLETE) == IG_COMPLETE) { + CurInput->GFlags &= ~IG_ISGUARDED; + } + return Whitespace; } @@ -3343,6 +3413,7 @@ void Preprocess (void) OLine = PLine; ParseDirectives (MSM_MULTILINE); OLine = 0; + CurInput->GFlags &= ~IG_NEWFILE; /* Add the source info to preprocessor output if needed */ AddPreLine (PLine); @@ -3411,9 +3482,13 @@ void ContinueLine (void) -void PreprocessBegin (void) -/* Initialize preprocessor with current file */ +void PreprocessBegin (IFile* Input) +/* Initialize the preprocessor for a new input file */ { + /* Remember the new input file and flag it as new */ + CurInput = Input; + CurInput->GFlags |= IG_NEWFILE; + /* Reset #if depth */ PPStack->Index = -1; @@ -3426,9 +3501,14 @@ void PreprocessBegin (void) -void PreprocessEnd (void) -/* Preprocessor done with current file */ +void PreprocessEnd (IFile* Input) +/* Preprocessor done with current file. The parameter is the file we're +** switching back to. +*/ { + /* Switch back to the old input file */ + CurInput = Input; + /* Check for missing #endif */ while (PPStack->Index >= 0) { if ((PPStack->Stack[PPStack->Index] & IFCOND_NEEDTERM) != 0) { diff --git a/src/cc65/preproc.h b/src/cc65/preproc.h index e2a1b073c..44e35f30e 100644 --- a/src/cc65/preproc.h +++ b/src/cc65/preproc.h @@ -54,6 +54,9 @@ struct PPIfStack { int Index; }; +/* Forward */ +struct IFile; + /*****************************************************************************/ @@ -62,29 +65,31 @@ struct PPIfStack { +void HandleSpecialMacro (Macro* M, const char* Name); +/* Handle special "magic" macros that may change */ + void Preprocess (void); /* Preprocess a line */ -void SetPPIfStack (PPIfStack* Stack); -/* Specify which PP #if stack to use */ - -void ContinueLine (void); -/* Continue the current line ended with a '\\' */ - -void PreprocessBegin (void); -/* Initialize preprocessor with current file */ - -void PreprocessEnd (void); -/* Preprocessor done with current file */ - void InitPreprocess (void); /* Init preprocessor */ void DonePreprocess (void); /* Done with preprocessor */ -void HandleSpecialMacro (Macro* M, const char* Name); -/* Handle special "magic" macros that may change */ +void SetPPIfStack (PPIfStack* Stack); +/* Specify which PP #if stack to use */ + +void ContinueLine (void); +/* Continue the current line ended with a '\\' */ + +void PreprocessBegin (struct IFile* Input); +/* Initialize the preprocessor for a new input file */ + +void PreprocessEnd (struct IFile* Input); +/* Preprocessor done with current file. The parameter is the file we're +** switching back to. +*/ diff --git a/src/cc65/scanner.c b/src/cc65/scanner.c index f0ff664fd..dda857f07 100644 --- a/src/cc65/scanner.c +++ b/src/cc65/scanner.c @@ -87,11 +87,13 @@ enum { }; /* Token table */ +/* CAUTION: table must be sorted for bsearch */ static const struct Keyword { char* Key; /* Keyword name */ unsigned char Tok; /* The token */ unsigned char Std; /* Token supported in which standards? */ } Keywords [] = { +/* BEGIN SORTED.SH */ { "_Pragma", TOK_PRAGMA, TT_C89 | TT_C99 | TT_CC65 }, /* !! */ { "_Static_assert", TOK_STATIC_ASSERT, TT_CC65 }, /* C11 */ { "__AX__", TOK_AX, TT_C89 | TT_C99 | TT_CC65 }, @@ -145,6 +147,7 @@ static const struct Keyword { { "void", TOK_VOID, TT_C89 | TT_C99 | TT_CC65 }, { "volatile", TOK_VOLATILE, TT_C89 | TT_C99 | TT_CC65 }, { "while", TOK_WHILE, TT_C89 | TT_C99 | TT_CC65 }, +/* END SORTED.SH */ }; #define KEY_COUNT (sizeof (Keywords) / sizeof (Keywords [0])) diff --git a/src/cc65/stdfunc.c b/src/cc65/stdfunc.c index 2889a176e..1597380e8 100644 --- a/src/cc65/stdfunc.c +++ b/src/cc65/stdfunc.c @@ -78,19 +78,20 @@ static void StdFunc_strlen (FuncDesc*, ExprDesc*); -/* Table with all known functions and their handlers. Must be sorted -** alphabetically! +/* Table with all known functions and their handlers. +** CAUTION: table must be alphabetically sorted for bsearch */ static struct StdFuncDesc { const char* Name; void (*Handler) (FuncDesc*, ExprDesc*); } StdFuncs[] = { +/* BEGIN SORTED.SH */ { "memcpy", StdFunc_memcpy }, { "memset", StdFunc_memset }, { "strcmp", StdFunc_strcmp }, { "strcpy", StdFunc_strcpy }, { "strlen", StdFunc_strlen }, - +/* END SORTED.SH */ }; #define FUNC_COUNT (sizeof (StdFuncs) / sizeof (StdFuncs[0])) @@ -370,7 +371,7 @@ static void StdFunc_memcpy (FuncDesc* F attribute ((unused)), ExprDesc* Expr) AddCodeLine ("ldy #$%02X", (unsigned char) (Offs + Arg3.Expr.IVal - 1)); g_defcodelabel (Label); AddCodeLine ("lda %s,y", ED_GetLabelName (&Arg2.Expr, -Offs)); - AddCodeLine ("sta (sp),y"); + AddCodeLine ("sta (c_sp),y"); AddCodeLine ("dey"); AddCodeLine ("bpl %s", LocalLabelName (Label)); } else { @@ -378,7 +379,7 @@ static void StdFunc_memcpy (FuncDesc* F attribute ((unused)), ExprDesc* Expr) AddCodeLine ("ldy #$%02X", (unsigned char) (Offs + Arg3.Expr.IVal - 1)); g_defcodelabel (Label); AddCodeLine ("lda %s,x", ED_GetLabelName (&Arg2.Expr, 0)); - AddCodeLine ("sta (sp),y"); + AddCodeLine ("sta (c_sp),y"); AddCodeLine ("dey"); AddCodeLine ("dex"); AddCodeLine ("bpl %s", LocalLabelName (Label)); @@ -390,7 +391,7 @@ static void StdFunc_memcpy (FuncDesc* F attribute ((unused)), ExprDesc* Expr) AddCodeLine ("ldy #$%02X", (unsigned char) Offs); g_defcodelabel (Label); AddCodeLine ("lda %s,y", ED_GetLabelName (&Arg2.Expr, -Offs)); - AddCodeLine ("sta (sp),y"); + AddCodeLine ("sta (c_sp),y"); AddCodeLine ("iny"); AddCmpCodeIfSizeNot256 ("cpy #$%02X", Offs + Arg3.Expr.IVal); AddCodeLine ("bne %s", LocalLabelName (Label)); @@ -399,7 +400,7 @@ static void StdFunc_memcpy (FuncDesc* F attribute ((unused)), ExprDesc* Expr) AddCodeLine ("ldy #$%02X", (unsigned char) Offs); g_defcodelabel (Label); AddCodeLine ("lda %s,x", ED_GetLabelName (&Arg2.Expr, 0)); - AddCodeLine ("sta (sp),y"); + AddCodeLine ("sta (c_sp),y"); AddCodeLine ("iny"); AddCodeLine ("inx"); AddCmpCodeIfSizeNot256 ("cpx #$%02X", Arg3.Expr.IVal); @@ -447,7 +448,7 @@ static void StdFunc_memcpy (FuncDesc* F attribute ((unused)), ExprDesc* Expr) if (Offs == 0) { AddCodeLine ("ldy #$%02X", (unsigned char) (Arg3.Expr.IVal - 1)); g_defcodelabel (Label); - AddCodeLine ("lda (sp),y"); + AddCodeLine ("lda (c_sp),y"); AddCodeLine ("sta %s,y", ED_GetLabelName (&Arg1.Expr, 0)); AddCodeLine ("dey"); AddCodeLine ("bpl %s", LocalLabelName (Label)); @@ -455,7 +456,7 @@ static void StdFunc_memcpy (FuncDesc* F attribute ((unused)), ExprDesc* Expr) AddCodeLine ("ldx #$%02X", (unsigned char) (Arg3.Expr.IVal-1)); AddCodeLine ("ldy #$%02X", (unsigned char) (Offs + Arg3.Expr.IVal - 1)); g_defcodelabel (Label); - AddCodeLine ("lda (sp),y"); + AddCodeLine ("lda (c_sp),y"); AddCodeLine ("sta %s,x", ED_GetLabelName (&Arg1.Expr, 0)); AddCodeLine ("dey"); AddCodeLine ("dex"); @@ -467,7 +468,7 @@ static void StdFunc_memcpy (FuncDesc* F attribute ((unused)), ExprDesc* Expr) if (Offs == 0 || AllowOneIndex) { AddCodeLine ("ldy #$%02X", (unsigned char) Offs); g_defcodelabel (Label); - AddCodeLine ("lda (sp),y"); + AddCodeLine ("lda (c_sp),y"); AddCodeLine ("sta %s,y", ED_GetLabelName (&Arg1.Expr, -Offs)); AddCodeLine ("iny"); AddCmpCodeIfSizeNot256 ("cpy #$%02X", Offs + Arg3.Expr.IVal); @@ -476,7 +477,7 @@ static void StdFunc_memcpy (FuncDesc* F attribute ((unused)), ExprDesc* Expr) AddCodeLine ("ldx #$00"); AddCodeLine ("ldy #$%02X", (unsigned char) Offs); g_defcodelabel (Label); - AddCodeLine ("lda (sp),y"); + AddCodeLine ("lda (c_sp),y"); AddCodeLine ("sta %s,x", ED_GetLabelName (&Arg1.Expr, 0)); AddCodeLine ("iny"); AddCodeLine ("inx"); @@ -511,14 +512,14 @@ static void StdFunc_memcpy (FuncDesc* F attribute ((unused)), ExprDesc* Expr) if (Arg3.Expr.IVal <= 129) { AddCodeLine ("ldy #$%02X", (unsigned char) (Arg3.Expr.IVal - 1)); g_defcodelabel (Label); - AddCodeLine ("lda (sp),y"); + AddCodeLine ("lda (c_sp),y"); AddCodeLine ("sta (ptr1),y"); AddCodeLine ("dey"); AddCodeLine ("bpl %s", LocalLabelName (Label)); } else { AddCodeLine ("ldy #$00"); g_defcodelabel (Label); - AddCodeLine ("lda (sp),y"); + AddCodeLine ("lda (c_sp),y"); AddCodeLine ("sta (ptr1),y"); AddCodeLine ("iny"); AddCmpCodeIfSizeNot256 ("cpy #$%02X", Arg3.Expr.IVal); @@ -702,7 +703,7 @@ static void StdFunc_memset (FuncDesc* F attribute ((unused)), ExprDesc* Expr) AddCodeLine ("ldy #$%02X", (unsigned char) Offs); AddCodeLine ("lda #$%02X", (unsigned char) Arg2.Expr.IVal); g_defcodelabel (Label); - AddCodeLine ("sta (sp),y"); + AddCodeLine ("sta (c_sp),y"); AddCodeLine ("iny"); AddCmpCodeIfSizeNot256 ("cpy #$%02X", Offs + Arg3.Expr.IVal); AddCodeLine ("bne %s", LocalLabelName (Label)); @@ -856,7 +857,7 @@ static void StdFunc_strcmp (FuncDesc* F attribute ((unused)), ExprDesc* Expr) /* Generate code */ AddCodeLine ("ldy #$%02X", Offs); AddCodeLine ("ldx #$00"); - AddCodeLine ("lda (sp),y"); + AddCodeLine ("lda (c_sp),y"); } else if (IsArray && ED_IsLocConst (&Arg1.Expr)) { /* Drop the generated code */ RemoveCode (&Arg1.Load); @@ -1089,14 +1090,14 @@ static void StdFunc_strcpy (FuncDesc* F attribute ((unused)), ExprDesc* Expr) if (Offs == 0 || AllowOneIndex) { g_defcodelabel (L1); AddCodeLine ("iny"); - AddCodeLine ("lda (sp),y"); + AddCodeLine ("lda (c_sp),y"); AddCodeLine ("sta %s,y", ED_GetLabelName (&Arg1.Expr, -Offs)); } else { AddCodeLine ("ldx #$FF"); g_defcodelabel (L1); AddCodeLine ("iny"); AddCodeLine ("inx"); - AddCodeLine ("lda (sp),y"); + AddCodeLine ("lda (c_sp),y"); AddCodeLine ("sta %s,x", ED_GetLabelName (&Arg1.Expr, 0)); } AddCodeLine ("bne %s", LocalLabelName (L1)); @@ -1137,14 +1138,14 @@ static void StdFunc_strcpy (FuncDesc* F attribute ((unused)), ExprDesc* Expr) g_defcodelabel (L1); AddCodeLine ("iny"); AddCodeLine ("lda %s,y", ED_GetLabelName (&Arg2.Expr, -Offs)); - AddCodeLine ("sta (sp),y"); + AddCodeLine ("sta (c_sp),y"); } else { AddCodeLine ("ldx #$FF"); g_defcodelabel (L1); AddCodeLine ("iny"); AddCodeLine ("inx"); AddCodeLine ("lda %s,x", ED_GetLabelName (&Arg2.Expr, 0)); - AddCodeLine ("sta (sp),y"); + AddCodeLine ("sta (c_sp),y"); } AddCodeLine ("bne %s", LocalLabelName (L1)); @@ -1284,7 +1285,7 @@ static void StdFunc_strlen (FuncDesc* F attribute ((unused)), ExprDesc* Expr) g_defcodelabel (L); AddCodeLine ("inx"); AddCodeLine ("iny"); - AddCodeLine ("lda (sp),y"); + AddCodeLine ("lda (c_sp),y"); AddCodeLine ("bne %s", LocalLabelName (L)); AddCodeLine ("txa"); AddCodeLine ("ldx #$00"); diff --git a/src/cl65/main.c b/src/cl65/main.c index 31d805181..6f2fe03df 100644 --- a/src/cl65/main.c +++ b/src/cl65/main.c @@ -122,6 +122,11 @@ static int DoAssemble = 1; /* The name of the output file, NULL if none given */ static const char* OutputName = 0; +/* The path part of the output file, NULL if none given +** or the OutputName is just a filename with no path +** information. */ +static char *OutputDirectory = 0; + /* The name of the linker configuration file if given */ static const char* LinkerConfig = 0; @@ -378,6 +383,14 @@ static void CmdSetOutput (CmdDesc* Cmd, const char* File) +static void CmdSetAsmOutput (CmdDesc* Cmd, const char* File) +/* Set the output asm file in a command desc for grc65 */ +{ + CmdAddArg2 (Cmd, "-s", File); +} + + + static void CmdSetTarget (CmdDesc* Cmd, target_t Target) /* Set the output file in a command desc */ { @@ -526,12 +539,15 @@ static void Link (void) -static void AssembleFile (const char* File, unsigned ArgCount) +static void AssembleFile (const char* File, const char* TmpFile, unsigned ArgCount) /* Common routine to assemble a file. Will be called by Assemble() and ** AssembleIntermediate(). Adds options common for both routines and ** assembles the file. Will remove excess arguments after assembly. */ { + /* ObjName may be used for temporary or real filename */ + char *ObjName; + /* Set the target system */ CmdSetTarget (&CA65, Target); @@ -541,7 +557,12 @@ static void AssembleFile (const char* File, unsigned ArgCount) ** to the file list of the linker. The name of the output ** file is that of the input file with ".s" replaced by ".o". */ - char* ObjName = MakeFilename (File, ".o"); + if (TmpFile) { + ObjName = MakeFilename (TmpFile, ".o"); + } else { + ObjName = MakeTmpFilename (OutputDirectory, File, ".o"); + } + CmdSetOutput (&CA65, ObjName); CmdAddFile (&LD65, ObjName); /* This is just a temporary file, schedule it for removal */ CmdAddFile (&RM, ObjName); @@ -550,11 +571,15 @@ static void AssembleFile (const char* File, unsigned ArgCount) /* This is the final step. If an output name is given, set it */ if (OutputName) { CmdSetOutput (&CA65, OutputName); + } else { + ObjName = MakeFilename (File, ".o"); + CmdSetOutput (&CA65, ObjName); + xfree (ObjName); } } /* Add the file as argument for the assembler */ - CmdAddArg (&CA65, File); + CmdAddArg (&CA65, TmpFile ? TmpFile : File); /* Add a NULL pointer to terminate the argument list */ CmdAddArg (&CA65, 0); @@ -568,7 +593,7 @@ static void AssembleFile (const char* File, unsigned ArgCount) -static void AssembleIntermediate (const char* SourceFile) +static void AssembleIntermediate (const char* SourceFile, const char* TmpFile) /* Assemble an intermediate file which was generated by a previous processing ** step with SourceFile as input. The -dep options won't be added and ** the intermediate assembler file is removed after assembly. @@ -578,18 +603,20 @@ static void AssembleIntermediate (const char* SourceFile) ** name. It's the same name with the extension replaced by ".s" */ char* AsmName = MakeFilename (SourceFile, ".s"); + char* AsmTmpName = TmpFile ? MakeFilename(TmpFile, ".s") : NULL; /* Assemble the intermediate assembler file */ - AssembleFile (AsmName, CA65.ArgCount); + AssembleFile (AsmName, AsmTmpName, CA65.ArgCount); /* Remove the input file */ - if (remove (AsmName) < 0) { + if (remove (AsmTmpName ? AsmTmpName : AsmName) < 0) { Warning ("Cannot remove temporary file '%s': %s", - AsmName, strerror (errno)); + AsmTmpName ? AsmTmpName : AsmName, strerror (errno)); } /* Free the assembler file name which was allocated from the heap */ xfree (AsmName); + xfree (AsmTmpName); } @@ -612,7 +639,7 @@ static void Assemble (const char* File) } /* Use the common routine */ - AssembleFile (File, ArgCount); + AssembleFile (File, NULL, ArgCount); } @@ -620,6 +647,9 @@ static void Assemble (const char* File) static void Compile (const char* File) /* Compile the given file */ { + /* A temporary file name passed to the assembler */ + char *TmpFile = NULL; + /* Remember the current compiler argument count */ unsigned ArgCount = CC65.ArgCount; @@ -657,6 +687,12 @@ static void Compile (const char* File) /* Add the file as argument for the compiler */ CmdAddArg (&CC65, File); + if (DoAssemble) { + /* set a temporary output file name */ + TmpFile = MakeTmpFilename(OutputDirectory, File, ".s"); + CmdSetOutput (&CC65, TmpFile); + } + /* Add a NULL pointer to terminate the argument list */ CmdAddArg (&CC65, 0); @@ -671,7 +707,10 @@ static void Compile (const char* File) */ if (DoAssemble) { /* Assemble the intermediate file and remove it */ - AssembleIntermediate (File); + AssembleIntermediate (File, TmpFile); + if (TmpFile) { + xfree(TmpFile); + } } } @@ -680,6 +719,9 @@ static void Compile (const char* File) static void CompileRes (const char* File) /* Compile the given geos resource file */ { + /* tmp Asm file name, if needed */ + char* AsmName = NULL; + /* Remember the current assembler argument count */ unsigned ArgCount = GRC.ArgCount; @@ -688,6 +730,14 @@ static void CompileRes (const char* File) */ CmdSetTarget (&GRC, Target); + /* Changes to output file name must come + ** BEFORE adding the file + */ + if (DoAssemble && DoLink) { + AsmName = MakeTmpFilename(OutputDirectory, File, ".s"); + CmdSetAsmOutput(&GRC, AsmName); + } + /* Add the file as argument for the resource compiler */ CmdAddArg (&GRC, File); @@ -705,7 +755,10 @@ static void CompileRes (const char* File) */ if (DoAssemble) { /* Assemble the intermediate file and remove it */ - AssembleIntermediate (File); + AssembleIntermediate (File, AsmName); + if (AsmName) { + xfree(AsmName); + } } } @@ -741,7 +794,7 @@ static void ConvertO65 (const char* File) */ if (DoAssemble) { /* Assemble the intermediate file and remove it */ - AssembleIntermediate (File); + AssembleIntermediate (File, NULL); } } @@ -1575,6 +1628,7 @@ int main (int argc, char* argv []) case 'o': /* Name the output file */ OutputName = GetArg (&I, 2); + OutputDirectory = GetFileDirectory(OutputName); break; case 'r': @@ -1661,10 +1715,17 @@ int main (int argc, char* argv []) /* Link the given files if requested and if we have any */ if (DoLink && LD65.FileCount > 0) { + /* + ** Link() may not return if there's an error, so we install + ** RemoveTempFiles() as an atexit() handler. + */ + atexit (RemoveTempFiles); Link (); } - RemoveTempFiles (); + if (OutputDirectory != NULL) { + xfree(OutputDirectory); + } /* Return an apropriate exit code */ return EXIT_SUCCESS; diff --git a/src/common/cpu.c b/src/common/cpu.c index b55a5ab00..252283211 100644 --- a/src/common/cpu.c +++ b/src/common/cpu.c @@ -56,28 +56,38 @@ const char* CPUNames[CPU_COUNT] = { "6502", "6502X", "6502DTV", - "65SC02", - "65C02", + "65SC02", /* the original CMOS instruction set */ + "65C02", /* CMOS with Rockwell extensions */ "65816", "sweet16", "huc6280", "m740", "4510", + "45GS02", + "W65C02", /* CMOS with WDC extensions */ + "65CE02", /* CMOS with CSG extensions */ }; -/* Tables with CPU instruction sets */ +/* Tables with CPU instruction sets + * NOTE: make sure to only combine the instruction sets that are 100% compatible + */ const unsigned CPUIsets[CPU_COUNT] = { CPU_ISET_NONE, CPU_ISET_6502, - CPU_ISET_6502 | CPU_ISET_6502X, - CPU_ISET_6502 | CPU_ISET_6502DTV, - CPU_ISET_6502 | CPU_ISET_65SC02, - CPU_ISET_6502 | CPU_ISET_65SC02 | CPU_ISET_65C02, - CPU_ISET_6502 | CPU_ISET_65SC02 | CPU_ISET_65C02 | CPU_ISET_65816, + CPU_ISET_6502X | CPU_ISET_6502, + CPU_ISET_6502DTV | CPU_ISET_6502, + CPU_ISET_65SC02 | CPU_ISET_6502, + CPU_ISET_65C02 | CPU_ISET_6502 | CPU_ISET_65SC02, + /* 65816 has wai/stp and NO bit manipulation */ + CPU_ISET_65816 | CPU_ISET_6502 | CPU_ISET_65SC02, CPU_ISET_SWEET16, - CPU_ISET_6502 | CPU_ISET_65SC02 | CPU_ISET_65C02 | CPU_ISET_HUC6280, - CPU_ISET_6502 | CPU_ISET_M740, - CPU_ISET_6502 | CPU_ISET_65SC02 | CPU_ISET_65C02 | CPU_ISET_4510, + CPU_ISET_HUC6280 | CPU_ISET_6502 | CPU_ISET_65SC02 | CPU_ISET_65C02, + CPU_ISET_M740 | CPU_ISET_6502, + /* 4510 does NOT have indirect-zp (without z), so we can not use 65SC02 */ + CPU_ISET_4510 | CPU_ISET_6502 | CPU_ISET_65C02 | CPU_ISET_65CE02, + CPU_ISET_45GS02 | CPU_ISET_6502 | CPU_ISET_65C02 | CPU_ISET_65CE02 | CPU_ISET_4510, + CPU_ISET_W65C02 | CPU_ISET_6502 | CPU_ISET_65SC02 | CPU_ISET_65C02, + CPU_ISET_65CE02 | CPU_ISET_6502 | CPU_ISET_65C02, }; diff --git a/src/common/cpu.h b/src/common/cpu.h index 2e75feaaf..4202ed573 100644 --- a/src/common/cpu.h +++ b/src/common/cpu.h @@ -47,21 +47,24 @@ /* CPUs */ typedef enum { CPU_UNKNOWN = -1, /* Not specified or invalid target */ - CPU_NONE, /* No CPU - for assembler */ + CPU_NONE = 0, /* No CPU - for assembler */ CPU_6502, CPU_6502X, /* "Extended", that is: with illegal opcodes */ CPU_6502DTV, /* CPU_6502 + DTV extra and illegal opcodes */ - CPU_65SC02, - CPU_65C02, + CPU_65SC02, /* the original CMOS instruction set */ + CPU_65C02, /* CMOS with Rockwell extensions */ CPU_65816, CPU_SWEET16, CPU_HUC6280, /* Used in PC engine */ CPU_M740, /* Mitsubishi 740 series MCUs */ CPU_4510, /* CPU of C65 */ + CPU_45GS02, /* CPU of MEGA65 */ + CPU_W65C02, /* CMOS with WDC extensions */ + CPU_65CE02, /* CMOS with CSG extensions */ CPU_COUNT /* Number of different CPUs */ } cpu_t; -/* CPU instruction sets */ +/* CPU instruction sets (make sure this matches asminc/cpu.mac) */ enum { CPU_ISET_NONE = 1 << CPU_NONE, CPU_ISET_6502 = 1 << CPU_6502, @@ -74,6 +77,9 @@ enum { CPU_ISET_HUC6280 = 1 << CPU_HUC6280, CPU_ISET_M740 = 1 << CPU_M740, CPU_ISET_4510 = 1 << CPU_4510, + CPU_ISET_45GS02 = 1 << CPU_45GS02, + CPU_ISET_W65C02 = 1 << CPU_W65C02, + CPU_ISET_65CE02 = 1 << CPU_65CE02 }; /* CPU used */ diff --git a/src/common/filetype.c b/src/common/filetype.c index ae8b636dc..074f8800a 100644 --- a/src/common/filetype.c +++ b/src/common/filetype.c @@ -48,8 +48,10 @@ +/* CAUTION: table must be sorted for bsearch */ static const FileId TypeTable[] = { /* Upper case stuff for obsolete operating systems */ +/* BEGIN SORTED.SH */ { "A", FILETYPE_LIB }, { "A65", FILETYPE_ASM }, { "ASM", FILETYPE_ASM }, @@ -65,7 +67,6 @@ static const FileId TypeTable[] = { { "S", FILETYPE_ASM }, { "SER", FILETYPE_O65 }, { "TGI", FILETYPE_O65 }, - { "a", FILETYPE_LIB }, { "a65", FILETYPE_ASM }, { "asm", FILETYPE_ASM }, @@ -81,6 +82,7 @@ static const FileId TypeTable[] = { { "s", FILETYPE_ASM }, { "ser", FILETYPE_O65 }, { "tgi", FILETYPE_O65 }, +/* END SORTED.SH */ }; #define FILETYPE_COUNT (sizeof (TypeTable) / sizeof (TypeTable[0])) diff --git a/src/common/fname.c b/src/common/fname.c index 4e4f7c7fa..10d38f38a 100644 --- a/src/common/fname.c +++ b/src/common/fname.c @@ -33,7 +33,17 @@ +#include <errno.h> +#include <stdio.h> +#include <stdlib.h> #include <string.h> +#include <time.h> + +#if defined(_MSC_VER) +# include <process.h> +#else +# include <unistd.h> +#endif #include "xmalloc.h" #include "fname.h" @@ -92,7 +102,28 @@ const char* FindName (const char* Path) return Path + Len; } +char *GetFileDirectory (const char* File) +/* Return a copy of the path part of a File, or NULL if there is none. */ +{ + char *Out, *P; + if (File == NULL) { + return NULL; + } + + Out = xmalloc (strlen (File) + 1); + strcpy(Out, File); + + P = (char *)FindName (Out); + if (P == Out) { + /* This is a simple filename. */ + xfree (Out); + return NULL; + } + *P = '\0'; + + return Out; +} char* MakeFilename (const char* Origin, const char* Ext) /* Make a new file name from Origin and Ext. If Origin has an extension, it @@ -115,3 +146,32 @@ char* MakeFilename (const char* Origin, const char* Ext) } return Out; } + + + +char* MakeTmpFilename (const char *Directory, const char *Origin, const char* Ext) +/* Make a new temporary file name from Origin and Ext. +** The result is placed in a malloc'ed buffer and returned. +*/ +{ + char* Out; + size_t Len = 0; + static unsigned int Counter = 0; + + /* Allocate enough for the directory, ... */ + if (Directory != NULL) { + Len = strlen (Directory); + } + + /* ... plus the the original name, the maximum length of the PID, the + * maximum length of the counter, the extension, and the terminator. + */ + Len += strlen (Origin) + (strlen (".2147483648") * 2) + strlen (Ext) + 1; + Out = xmalloc (Len); + + snprintf (Out, Len, "%s%s.%u.%u%s", (Directory != NULL ? Directory : ""), + FindName(Origin), getpid(), Counter, Ext); + Counter++; + + return Out; +} diff --git a/src/common/fname.h b/src/common/fname.h index 1b94d270c..ede34152d 100644 --- a/src/common/fname.h +++ b/src/common/fname.h @@ -52,6 +52,9 @@ const char* FindName (const char* Path); ** the file, the function returns Path as name. */ +char *GetFileDirectory (const char* File); +/* Return a copy of the path part of a File, or NULL if there is none. */ + char* MakeFilename (const char* Origin, const char* Ext); /* Make a new file name from Origin and Ext. If Origin has an extension, it ** is removed and Ext is appended. If Origin has no extension, Ext is simply @@ -59,6 +62,13 @@ char* MakeFilename (const char* Origin, const char* Ext); ** The function may be used to create "foo.o" from "foo.s". */ +char* MakeTmpFilename (const char *Directory, const char *Origin, const char* Ext); +/* Make a new temporary file name from Directory, Origin, and Ext. +** A temporary path is generated from the Directory, +** the Origin filename, the compiler's PID and the Extension. +** The result is placed in a malloc'ed buffer and returned. +*/ + /* End of fname.h */ diff --git a/src/common/target.c b/src/common/target.c index b50478e16..a12f69bf9 100644 --- a/src/common/target.c +++ b/src/common/target.c @@ -129,7 +129,25 @@ static const unsigned char CTPET[256] = { 0xF0,0xF1,0xF2,0xF3,0xF4,0xF5,0xF6,0xF7,0xF8,0xF9,0xFA,0xFB,0xFC,0xFD,0xFE,0xFF, }; - +/* Translation table KOI8-R -> Agat-9 */ +static unsigned char CTAgat[256] = { + 0x00,0x01,0x02,0x03,0x04,0x05,0x06,0x07,0x08,0x09,0x0A,0x0B,0x0C,0x0D,0x0E,0x0F, + 0x10,0x11,0x12,0x13,0x14,0x15,0x16,0x17,0x18,0x19,0x1A,0x1B,0x1C,0x1D,0x1E,0x1F, + 0xA0,0xA1,0xA2,0xA3,0xA4,0xA5,0xA6,0xA7,0xA8,0xA9,0xAA,0xAB,0xAC,0xAD,0xAE,0xAF, + 0xB0,0xB1,0xB2,0xB3,0xB4,0xB5,0xB6,0xB7,0xB8,0xB9,0xBA,0xBB,0xBC,0xBD,0xBE,0xBF, + 0xC0,0xC1,0xC2,0xC3,0xC4,0xC5,0xC6,0xC7,0xC8,0xC9,0xCA,0xCB,0xCC,0xCD,0xCE,0xCF, + 0xD0,0xD1,0xD2,0xD3,0xD4,0xD5,0xD6,0xD7,0xD8,0xD9,0xDA,0xDB,0xDC,0xDD,0xDE,0xDF, + 0x40,0x41,0x42,0x43,0x44,0x45,0x46,0x47,0x48,0x49,0x4A,0x4B,0x4C,0x4D,0x4E,0x4F, + 0x50,0x51,0x52,0x53,0x54,0x55,0x56,0x57,0x58,0x59,0x5A,0x5B,0x5C,0x5D,0x5E,0xA0, + 0x1B,0x5C,0x10,0x12,0x1D,0x1F,0x13,0x1C,0x11,0x1E,0x14,0xA0,0x02,0x5F,0xA0,0xA0, + 0xA0,0xA0,0xA0,0xA0,0xA0,0x9E,0x04,0xA0,0x3C,0x3E,0xA0,0xA0,0x30,0x32,0xA0,0x2F, + 0xA0,0xA0,0xA0,0x0F,0xA0,0xA0,0xA0,0xA0,0xA0,0xA0,0xA0,0xA0,0xA0,0xA0,0xA0,0xA0, + 0xA0,0xA0,0xA0,0x9F,0xA0,0xA0,0xA0,0xA0,0xA0,0xA0,0xA0,0xA0,0xA0,0xA0,0xA0,0xA0, + 0x60,0x61,0x62,0x63,0x64,0x65,0x66,0x67,0x68,0x69,0x6A,0x6B,0x6C,0x6D,0x6E,0x6F, + 0x70,0x71,0x72,0x73,0x74,0x75,0x76,0x77,0x78,0x79,0x7A,0x7B,0x7C,0x7D,0x7E,0x7F, + 0xE0,0xE1,0xE2,0xE3,0xE4,0xE5,0xE6,0xE7,0xE8,0xE9,0xEA,0xEB,0xEC,0xED,0xEE,0xEF, + 0xF0,0xF1,0xF2,0xF3,0xF4,0xF5,0xF6,0xF7,0xF8,0xF9,0xFA,0xFB,0xFC,0xFD,0xFE,0xFF, +}; /* One entry in the target map */ typedef struct TargetEntry TargetEntry; @@ -138,10 +156,13 @@ struct TargetEntry { target_t Id; /* Target ID */ }; -/* Table that maps target names to IDs. Sorted alphabetically for bsearch(). +/* Table that maps target names to IDs. ** Allows multiple entries for one target ID (target name aliases). +** CAUTION: must be alphabetically for bsearch(). */ static const TargetEntry TargetMap[] = { +/* BEGIN SORTED.SH */ + { "agat", TGT_AGAT }, { "apple2", TGT_APPLE2 }, { "apple2enh", TGT_APPLE2ENH }, { "atari", TGT_ATARI }, @@ -166,6 +187,7 @@ static const TargetEntry TargetMap[] = { { "kim1", TGT_KIM1 }, { "lunix", TGT_LUNIX }, { "lynx", TGT_LYNX }, + { "mega65", TGT_MEGA65, }, { "module", TGT_MODULE }, { "nes", TGT_NES }, { "none", TGT_NONE }, @@ -180,6 +202,7 @@ static const TargetEntry TargetMap[] = { { "sym1", TGT_SYM1 }, { "telestrat", TGT_TELESTRAT }, { "vic20", TGT_VIC20 }, +/* END SORTED.SH */ }; #define MAP_ENTRY_COUNT (sizeof (TargetMap) / sizeof (TargetMap[0])) @@ -221,8 +244,10 @@ static const TargetProperties PropertyTable[TGT_COUNT] = { { "c65", CPU_4510, BINFMT_BINARY, CTPET }, { "cx16", CPU_65C02, BINFMT_BINARY, CTPET }, { "sym1", CPU_6502, BINFMT_BINARY, CTNone }, + { "mega65", CPU_45GS02, BINFMT_BINARY, CTPET }, { "kim1", CPU_6502, BINFMT_BINARY, CTNone }, - { "rp6502", CPU_65C02, BINFMT_BINARY, CTNone }, + { "rp6502", CPU_W65C02, BINFMT_BINARY, CTNone }, + { "agat", CPU_6502, BINFMT_BINARY, CTAgat }, }; /* Target system */ diff --git a/src/common/target.h b/src/common/target.h index 730b8211e..c5c8455a0 100644 --- a/src/common/target.h +++ b/src/common/target.h @@ -87,8 +87,10 @@ typedef enum { TGT_C65, TGT_CX16, TGT_SYM1, + TGT_MEGA65, TGT_KIM1, TGT_RP6502, + TGT_AGAT, TGT_COUNT /* Number of target systems */ } target_t; diff --git a/src/da65.vcxproj b/src/da65.vcxproj index 9d2b0ded6..65dc3fccf 100644 --- a/src/da65.vcxproj +++ b/src/da65.vcxproj @@ -94,12 +94,15 @@ <ClCompile Include="da65\labels.c" /> <ClCompile Include="da65\main.c" /> <ClCompile Include="da65\opc4510.c" /> + <ClCompile Include="da65\opc45GS02.c" /> <ClCompile Include="da65\opc6502.c" /> <ClCompile Include="da65\opc6502x.c" /> <ClCompile Include="da65\opc6502dtv.c" /> <ClCompile Include="da65\opc65816.c" /> <ClCompile Include="da65\opc65c02.c" /> <ClCompile Include="da65\opc65sc02.c" /> + <ClCompile Include="da65\opc65ce02.c" /> + <ClCompile Include="da65\opcw65c02.c" /> <ClCompile Include="da65\opchuc6280.c" /> <ClCompile Include="da65\opcm740.c" /> <ClCompile Include="da65\opctable.c" /> @@ -119,6 +122,7 @@ <ClInclude Include="da65\infofile.h" /> <ClInclude Include="da65\labels.h" /> <ClInclude Include="da65\opc4510.h" /> + <ClInclude Include="da65\opc45GS02.h" /> <ClInclude Include="da65\opc6502.h" /> <ClInclude Include="da65\opc6502x.h" /> <ClInclude Include="da65\opc6502dtv.h" /> @@ -136,4 +140,4 @@ <Import Project="$(VCTargetsPath)\Microsoft.Cpp.targets" /> <ImportGroup Label="ExtensionTargets"> </ImportGroup> -</Project> \ No newline at end of file +</Project> diff --git a/src/da65/attrtab.c b/src/da65/attrtab.c index e35530afd..1ba694038 100644 --- a/src/da65/attrtab.c +++ b/src/da65/attrtab.c @@ -33,6 +33,11 @@ +#include <inttypes.h> + +/* common */ +#include "xmalloc.h" + /* da65 */ #include "cpu.h" #include "error.h" @@ -46,14 +51,78 @@ -/* Attribute table */ -static unsigned short AttrTab[0x10000]; +/* Attribute structure how it is found in the attribute table */ +typedef struct Attribute Attribute; +struct Attribute { + struct Attribute* Next; /* Next entry in linked list */ + uint32_t Addr; /* The full address */ + attr_t Attr; /* Actual attribute */ +}; -/* 65816 attribute table */ -#define MAX_LONG_ATTRS 256 -static unsigned short LongAttrVal[MAX_LONG_ATTRS]; -static unsigned LongAttrAddr[MAX_LONG_ATTRS]; -static unsigned LongAttrsUsed; +/* Attributes use a hash table and a linear list for collision resolution. The +** hash function is easy and effective. It evaluates just the lower bits of +** the address. +*/ +#define ATTR_HASH_SIZE 8192u /* Must be power of two */ +static Attribute* AttributeTab[ATTR_HASH_SIZE]; + + + +/*****************************************************************************/ +/* struct Attribute */ +/*****************************************************************************/ + + + +static Attribute* NewAttribute (uint32_t Addr, attr_t Attr) +/* Create a new attribute structure and return it */ +{ + /* Create a new attribute */ + Attribute* A = xmalloc (sizeof (Attribute)); + + /* Fill in the data */ + A->Next = 0; + A->Addr = Addr; + A->Attr = Attr; + + /* Return the attribute just created */ + return A; +} + + + +static uint32_t GetAttributeHash (uint32_t Addr) +/* Get the hash for an attribute at the given address */ +{ + return (Addr & (ATTR_HASH_SIZE - 1)); +} + + + +static Attribute* FindAttribute (uint32_t Addr) +/* Search for an attribute for the given address and return it. Returns NULL +** if no attribute exists for the address. +*/ +{ + Attribute* A = AttributeTab[GetAttributeHash (Addr)]; + while (A) { + if (A->Addr == Addr) { + break; + } + A = A->Next; + } + return A; +} + + + +static void InsertAttribute (Attribute* A) +/* Insert an attribute into the hash table */ +{ + uint32_t Hash = GetAttributeHash (A->Addr); + A->Next = AttributeTab[Hash]; + AttributeTab[Hash] = A; +} @@ -63,51 +132,43 @@ static unsigned LongAttrsUsed; -void AddrCheck (unsigned Addr) +void AddrCheck (uint32_t Addr) /* Check if the given address has a valid range */ { if (Addr >= 0x10000 && CPU != CPU_65816) { - Error ("Address out of range: %08X", Addr); + Error ("Address out of range: $%04" PRIX32, Addr); } } -unsigned char IsLongAddr (unsigned Addr) -/* Is it 24-bit? */ -{ - return Addr >= 0x10000 && CPU == CPU_65816; -} - - -attr_t GetAttr (unsigned Addr) +attr_t GetAttr (uint32_t Addr) /* Return the attribute for the given address */ { + /* As a small optimization we cache the last used attribute so when the + ** function is called several times with the same address we do already + ** know it. + */ + static const Attribute* A = 0; + if (A != 0 && A->Addr == Addr) { + return A->Attr; + } + /* Check the given address */ AddrCheck (Addr); - if (IsLongAddr (Addr)) { - unsigned i; - for (i = 0; i < LongAttrsUsed; i++) { - if (LongAttrAddr[i] == Addr) { - return LongAttrVal[i]; - } - } - - return 0; - } - /* Return the attribute */ - return AttrTab[Addr]; + A = FindAttribute (Addr); + return A? A->Attr : atDefault; } -int SegmentDefined (unsigned Start, unsigned End) +int SegmentDefined (uint32_t Start, uint32_t End) /* Return true if the atSegment bit is set somewhere in the given range */ { while (Start <= End) { - if (AttrTab[Start++] & atSegment) { + if (GetAttr (Start++) & atSegment) { return 1; } } @@ -116,7 +177,7 @@ int SegmentDefined (unsigned Start, unsigned End) -int IsSegmentEnd (unsigned Addr) +int IsSegmentEnd (uint32_t Addr) /* Return true if a segment ends at the given address */ { return (GetAttr (Addr) & atSegmentEnd) != 0x0000; @@ -124,7 +185,7 @@ int IsSegmentEnd (unsigned Addr) -int IsSegmentStart (unsigned Addr) +int IsSegmentStart (uint32_t Addr) /* Return true if a segment starts at the given address */ { return (GetAttr (Addr) & atSegmentStart) != 0x0000; @@ -146,8 +207,7 @@ unsigned GetGranularity (attr_t Style) case atAddrTab: return 2; case atRtsTab: return 2; case atTextTab: return 1; - - case atSkip: + case atSkip: return 1; default: Internal ("GetGranularity called for style = %d", Style); return 0; @@ -156,7 +216,7 @@ unsigned GetGranularity (attr_t Style) -void MarkRange (unsigned Start, unsigned End, attr_t Attr) +void MarkRange (uint32_t Start, uint32_t End, attr_t Attr) /* Mark a range with the given attribute */ { /* Do it easy here... */ @@ -167,53 +227,33 @@ void MarkRange (unsigned Start, unsigned End, attr_t Attr) -void MarkAddr (unsigned Addr, attr_t Attr) +void MarkAddr (uint32_t Addr, attr_t Attr) /* Mark an address with an attribute */ { /* Check the given address */ AddrCheck (Addr); - if (IsLongAddr (Addr)) { - unsigned i; - for (i = 0; i < LongAttrsUsed; i++) { - if (LongAttrAddr[i] == Addr) { - - /* We must not have more than one style bit */ - if (Attr & atStyleMask) { - if (LongAttrVal[i] & atStyleMask) { - Error ("Duplicate style for long address %06X", Addr); - } - } - LongAttrVal[i] |= Attr; - - return; - } - } - - if (LongAttrsUsed >= MAX_LONG_ATTRS) { - Error ("Too many long addresses"); - } - LongAttrVal[LongAttrsUsed] |= Attr; - LongAttrAddr[LongAttrsUsed] = Addr; - LongAttrsUsed++; - - return; - } + /* Get an existing attribute entry */ + Attribute* A = FindAttribute (Addr); /* We must not have more than one style bit */ - if (Attr & atStyleMask) { - if (AttrTab[Addr] & atStyleMask) { - Error ("Duplicate style for address %04X", Addr); + if (A != 0 && (Attr & atStyleMask) != 0) { + if ((A->Attr & atStyleMask) != 0) { + Error ("Duplicate style for address %04" PRIX32, Addr); } } /* Set the style */ - AttrTab[Addr] |= Attr; + if (A) { + A->Attr |= Attr; + } else { + InsertAttribute (NewAttribute (Addr, Attr)); + } } -attr_t GetStyleAttr (unsigned Addr) +attr_t GetStyleAttr (uint32_t Addr) /* Return the style attribute for the given address */ { /* Check the given address */ @@ -225,7 +265,7 @@ attr_t GetStyleAttr (unsigned Addr) -attr_t GetLabelAttr (unsigned Addr) +attr_t GetLabelAttr (uint32_t Addr) /* Return the label attribute for the given address */ { /* Check the given address */ diff --git a/src/da65/attrtab.h b/src/da65/attrtab.h index 4a0ea8225..ec44fd3b3 100644 --- a/src/da65/attrtab.h +++ b/src/da65/attrtab.h @@ -38,6 +38,10 @@ +#include <stdint.h> + + + /*****************************************************************************/ /* Data */ /*****************************************************************************/ @@ -95,37 +99,37 @@ typedef enum attr_t { -void AddrCheck (unsigned Addr); +void AddrCheck (uint32_t Addr); /* Check if the given address has a valid range */ -unsigned char IsLongAddr (unsigned Addr); +unsigned char IsLongAddr (uint32_t Addr); /* Check if the given address is 24-bit */ -attr_t GetAttr (unsigned Addr); +attr_t GetAttr (uint32_t Addr); /* Return the attribute for the given address */ -int SegmentDefined (unsigned Start, unsigned End); +int SegmentDefined (uint32_t Start, unsigned End); /* Return true if the atSegment bit is set somewhere in the given range */ -int IsSegmentEnd (unsigned Addr); +int IsSegmentEnd (uint32_t Addr); /* Return true if a segment ends at the given address */ -int IsSegmentStart (unsigned Addr); +int IsSegmentStart (uint32_t Addr); /* Return true if a segment starts at the given address */ unsigned GetGranularity (attr_t Style); /* Get the granularity for the given style */ -void MarkRange (unsigned Start, unsigned End, attr_t Attr); +void MarkRange (uint32_t Start, uint32_t End, attr_t Attr); /* Mark a range with the given attribute */ -void MarkAddr (unsigned Addr, attr_t Attr); +void MarkAddr (uint32_t Addr, attr_t Attr); /* Mark an address with an attribute */ -attr_t GetStyleAttr (unsigned Addr); +attr_t GetStyleAttr (uint32_t Addr); /* Return the style attribute for the given address */ -attr_t GetLabelAttr (unsigned Addr); +attr_t GetLabelAttr (uint32_t Addr); /* Return the label attribute for the given address */ diff --git a/src/da65/code.c b/src/da65/code.c index a162e6482..6045e83c5 100644 --- a/src/da65/code.c +++ b/src/da65/code.c @@ -53,10 +53,10 @@ -unsigned char CodeBuf [0x10000]; /* Code buffer */ -unsigned long CodeStart; /* Start address */ -unsigned long CodeEnd; /* End address */ -unsigned long PC; /* Current PC */ +uint8_t CodeBuf[0x10000]; /* Code buffer */ +uint32_t CodeStart; /* Start address */ +uint32_t CodeEnd; /* End address */ +uint32_t PC; /* Current PC */ @@ -117,12 +117,13 @@ void LoadCode (void) ** 0x10000 - Size. This is a reasonable default assuming that the file ** is a ROM that contains the hardware vectors at $FFFA. */ - if (StartAddr < 0) { + if (!HaveStartAddr) { if (Size > 0x10000) { StartAddr = 0; } else { StartAddr = 0x10000 - Size; } + HaveStartAddr = 1; } /* Calculate the maximum code size */ @@ -155,7 +156,7 @@ void LoadCode (void) -unsigned char GetCodeByte (unsigned Addr) +uint8_t GetCodeByte (uint32_t Addr) /* Get a byte from the given address */ { PRECONDITION (Addr <= CodeEnd); @@ -164,48 +165,48 @@ unsigned char GetCodeByte (unsigned Addr) -unsigned GetCodeDByte (unsigned Addr) +uint16_t GetCodeDByte (uint32_t Addr) /* Get a dbyte from the given address */ { - unsigned Lo = GetCodeByte (Addr); - unsigned Hi = GetCodeByte (Addr+1); + uint16_t Lo = GetCodeByte (Addr); + uint16_t Hi = GetCodeByte (Addr+1); return (Lo <<8) | Hi; } -unsigned GetCodeWord (unsigned Addr) +uint16_t GetCodeWord (uint32_t Addr) /* Get a word from the given address */ { - unsigned Lo = GetCodeByte (Addr); - unsigned Hi = GetCodeByte (Addr+1); + uint16_t Lo = GetCodeByte (Addr); + uint16_t Hi = GetCodeByte (Addr+1); return Lo | (Hi << 8); } -unsigned long GetCodeDWord (unsigned Addr) +uint32_t GetCodeDWord (uint32_t Addr) /* Get a dword from the given address */ { - unsigned long Lo = GetCodeWord (Addr); - unsigned long Hi = GetCodeWord (Addr+2); + uint32_t Lo = GetCodeWord (Addr); + uint32_t Hi = GetCodeWord (Addr+2); return Lo | (Hi << 16); } -unsigned GetCodeLongAddr (unsigned Addr) +uint32_t GetCodeLongAddr (uint32_t Addr) /* Get a word from the given address */ { - unsigned Lo = GetCodeByte (Addr); - unsigned Mid = GetCodeByte (Addr+1); - unsigned Hi = GetCodeByte (Addr+2); + uint32_t Lo = GetCodeByte (Addr); + uint32_t Mid = GetCodeByte (Addr+1); + uint32_t Hi = GetCodeByte (Addr+2); return Lo | (Mid << 8) | (Hi << 16); } -unsigned GetRemainingBytes (void) +uint32_t GetRemainingBytes (void) /* Return the number of remaining code bytes */ { if (CodeEnd >= PC) { diff --git a/src/da65/code.h b/src/da65/code.h index aa3c6a290..1a4cce2c8 100644 --- a/src/da65/code.h +++ b/src/da65/code.h @@ -38,16 +38,20 @@ +#include <stdint.h> + + + /*****************************************************************************/ /* Data */ /*****************************************************************************/ -extern unsigned char CodeBuf [0x10000]; /* Code buffer */ -extern unsigned long CodeStart; /* Start address */ -extern unsigned long CodeEnd; /* End address */ -extern unsigned long PC; /* Current PC */ +extern uint8_t CodeBuf[0x10000]; /* Code buffer */ +extern uint32_t CodeStart; /* Start address */ +extern uint32_t CodeEnd; /* End address */ +extern uint32_t PC; /* Current PC */ @@ -60,22 +64,22 @@ extern unsigned long PC; /* Current PC */ void LoadCode (void); /* Load the code from the given file */ -unsigned char GetCodeByte (unsigned Addr); +uint8_t GetCodeByte (uint32_t Addr); /* Get a byte from the given address */ -unsigned GetCodeDByte (unsigned Addr); +uint16_t GetCodeDByte (uint32_t Addr); /* Get a dbyte from the given address */ -unsigned GetCodeWord (unsigned Addr); +uint16_t GetCodeWord (uint32_t Addr); /* Get a word from the given address */ -unsigned long GetCodeDWord (unsigned Addr); +uint32_t GetCodeDWord (uint32_t Addr); /* Get a dword from the given address */ -unsigned GetCodeLongAddr (unsigned Addr); +uint32_t GetCodeLongAddr (uint32_t Addr); /* Get a 24-bit address from the given address */ -unsigned GetRemainingBytes (void); +uint32_t GetRemainingBytes (void); /* Return the number of remaining code bytes */ int CodeLeft (void); diff --git a/src/da65/comments.c b/src/da65/comments.c index f136ae3d2..f1295d486 100644 --- a/src/da65/comments.c +++ b/src/da65/comments.c @@ -33,6 +33,9 @@ +#include <inttypes.h> +#include <string.h> + /* common */ #include "xmalloc.h" @@ -49,13 +52,82 @@ -/* Comment table */ -static const char* CommentTab[0x10000]; +/* Comment structure how it is found in the comment table */ +typedef struct Comment Comment; +struct Comment { + struct Comment* Next; /* Next entry in linked list */ + uint32_t Addr; /* The full address */ + char Text[1]; /* Text, dynamically allocated */ +}; -#define MAX_LONG_COMMENTS 256 -static const char* LongCommentVal[MAX_LONG_COMMENTS]; -static unsigned LongCommentAddr[MAX_LONG_COMMENTS]; -static unsigned LongCommentsUsed; +/* Comments use a hash table and a linear list for collision resolution. The +** hash function is easy and effective. It evaluates just the lower bits of +** the address. Since we don't expect many comments, we can keep the table +** small. +*/ +#define COMMENT_HASH_SIZE 256u /* Must be power of two */ +static Comment* CommentTab[COMMENT_HASH_SIZE]; + + + +/*****************************************************************************/ +/* struct Comment */ +/*****************************************************************************/ + + + +static Comment* NewComment (uint32_t Addr, const char* Text) +/* Create a new comment structure and return it */ +{ + /* Get the length of the text */ + unsigned Len = strlen (Text); + + /* Create a new comment */ + Comment* C = xmalloc (sizeof (Comment) + Len); + + /* Fill in the data */ + C->Next = 0; + C->Addr = Addr; + memcpy (C->Text, Text, Len + 1); + + /* Return the comment just created */ + return C; +} + + + +static uint32_t GetCommentHash (uint32_t Addr) +/* Get the hash for a comment at the given address */ +{ + return (Addr & (COMMENT_HASH_SIZE - 1)); +} + + + +static Comment* FindComment (uint32_t Addr) +/* Search for a comment for the given address and return it. Returns NULL if +** no comment exists for the address. +*/ +{ + Comment* C = CommentTab[GetCommentHash (Addr)]; + while (C) { + if (C->Addr == Addr) { + break; + } + C = C->Next; + } + return C; +} + + + +static void InsertComment (Comment* C) +/* Insert a comment into the hash table */ +{ + uint32_t Hash = GetCommentHash (C->Addr); + C->Next = CommentTab[Hash]; + CommentTab[Hash] = C; +} @@ -65,62 +137,30 @@ static unsigned LongCommentsUsed; -static unsigned FindLongIndex (unsigned Addr) -{ - unsigned i; - for (i = 0; i < LongCommentsUsed; i++) { - if (LongCommentAddr[i] == Addr) { - return i; - } - } - return -1; -} - - - -void SetComment (unsigned Addr, const char* Comment) +void SetComment (uint32_t Addr, const char* Text) /* Set a comment for the given address */ { /* Check the given address */ AddrCheck (Addr); - if (IsLongAddr (Addr)) { - if (FindLongIndex (Addr)) { - Warning ("Duplicate comment for address $%06X", Addr); - } else { - if (LongCommentsUsed >= MAX_LONG_COMMENTS) { - Error("Too many long-address comments"); - } - LongCommentVal[LongCommentsUsed] = xstrdup (Comment); - LongCommentAddr[LongCommentsUsed] = Addr; - LongCommentsUsed++; - } + /* If we do already have a comment, warn and ignore the new one */ + Comment* C = FindComment (Addr); + if (C) { + Warning ("Duplicate comment for address $%04" PRIX32, Addr); } else { - /* If we do already have a comment, warn and ignore the new one */ - if (CommentTab[Addr]) { - Warning ("Duplicate comment for address $%04X", Addr); - } else { - CommentTab[Addr] = xstrdup (Comment); - } + InsertComment (NewComment (Addr, Text)); } } -const char* GetComment (unsigned Addr) +const char* GetComment (uint32_t Addr) /* Return the comment for an address */ { /* Check the given address */ AddrCheck (Addr); - if (IsLongAddr (Addr)) { - const unsigned i = FindLongIndex (Addr); - if (i < LongCommentsUsed) { - return LongCommentVal[i]; - } - return NULL; - } - - /* Return the label if any */ - return CommentTab[Addr]; + /* Check for a comment and return it */ + const Comment* C = FindComment (Addr); + return C? C->Text : 0; } diff --git a/src/da65/comments.h b/src/da65/comments.h index 1d95111a9..dfa1654ab 100644 --- a/src/da65/comments.h +++ b/src/da65/comments.h @@ -38,6 +38,9 @@ +#include <stdint.h> + +/* da65 */ #include "attrtab.h" @@ -48,10 +51,10 @@ -void SetComment (unsigned Addr, const char* Comment); +void SetComment (uint32_t Addr, const char* Text); /* Set a comment for the given address */ -const char* GetComment (unsigned Addr); +const char* GetComment (uint32_t Addr); /* Return the comment for an address */ diff --git a/src/da65/data.c b/src/da65/data.c index f85cd327d..c359e5684 100644 --- a/src/da65/data.c +++ b/src/da65/data.c @@ -50,20 +50,20 @@ -static unsigned GetSpan (attr_t Style) +static uint32_t GetSpan (attr_t Style) /* Get the number of bytes for a given style */ { /* Get the number of bytes still available */ - unsigned RemainingBytes = GetRemainingBytes (); + uint32_t RemainingBytes = GetRemainingBytes (); /* Count how many bytes are available. This number is limited by the ** number of remaining bytes, a label, a segment change, or the end of ** the given Style attribute. */ - unsigned Count = 1; + uint32_t Count = 1; while (Count < RemainingBytes) { attr_t Attr; - if (MustDefLabel(PC+Count)) { + if (MustDefLabel (PC+Count)) { break; } Attr = GetAttr (PC+Count); @@ -85,10 +85,10 @@ static unsigned GetSpan (attr_t Style) static unsigned DoTable (attr_t Style, unsigned MemberSize, void (*TableFunc) (unsigned)) /* Output a table of bytes */ { - unsigned BytesLeft; + uint32_t BytesLeft; /* Count how many bytes may be output. */ - unsigned Count = GetSpan (Style); + uint32_t Count = GetSpan (Style); /* If the count is less than the member size, print a row of Count data ** bytes. We assume here that there is no member with a size that is less @@ -108,7 +108,7 @@ static unsigned DoTable (attr_t Style, unsigned MemberSize, void (*TableFunc) (u while (BytesLeft > 0) { /* Calculate the number of bytes for the next line */ - unsigned Chunk = (BytesLeft > BytesPerLine)? BytesPerLine : BytesLeft; + uint32_t Chunk = (BytesLeft > BytesPerLine)? BytesPerLine : BytesLeft; /* Output a line with these bytes */ TableFunc (Chunk); @@ -119,7 +119,7 @@ static unsigned DoTable (attr_t Style, unsigned MemberSize, void (*TableFunc) (u } /* If the next line is not the same style, add a separator */ - if (CodeLeft() && GetStyleAttr (PC) != Style) { + if (CodeLeft () && GetStyleAttr (PC) != Style) { SeparatorLine (); } @@ -129,7 +129,7 @@ static unsigned DoTable (attr_t Style, unsigned MemberSize, void (*TableFunc) (u -unsigned ByteTable (void) +uint32_t ByteTable (void) /* Output a table of bytes */ { /* Call the low level function */ @@ -138,7 +138,7 @@ unsigned ByteTable (void) -unsigned DByteTable (void) +uint32_t DByteTable (void) /* Output a table of dbytes */ { /* Call the low level function */ @@ -147,7 +147,7 @@ unsigned DByteTable (void) -unsigned WordTable (void) +uint32_t WordTable (void) /* Output a table of words */ { /* Call the low level function */ @@ -156,7 +156,7 @@ unsigned WordTable (void) -unsigned DWordTable (void) +uint32_t DWordTable (void) /* Output a table of double words */ { /* Call the low level function */ @@ -165,18 +165,18 @@ unsigned DWordTable (void) -unsigned AddrTable (void) +uint32_t AddrTable (void) /* Output a table of addresses */ { - unsigned long BytesLeft = GetRemainingBytes (); - unsigned long Start = PC; + uint32_t BytesLeft = GetRemainingBytes (); + uint32_t Start = PC; /* Loop while table bytes left and we don't need to create a label at the ** current position. */ while (BytesLeft && GetStyleAttr (PC) == atAddrTab) { - unsigned Addr; + uint32_t Addr; /* If just one byte is left, define it and bail out */ if (BytesLeft == 1 || GetStyleAttr (PC+1) != atAddrTab) { @@ -221,7 +221,7 @@ unsigned AddrTable (void) } /* If the next line is not an address table line, add a separator */ - if (CodeLeft() && GetStyleAttr (PC) != atAddrTab) { + if (CodeLeft () && GetStyleAttr (PC) != atAddrTab) { SeparatorLine (); } @@ -231,18 +231,18 @@ unsigned AddrTable (void) -unsigned RtsTable (void) +uint32_t RtsTable (void) /* Output a table of RTS addresses (address - 1) */ { - unsigned long BytesLeft = GetRemainingBytes (); - unsigned long Start = PC; + uint32_t BytesLeft = GetRemainingBytes (); + uint32_t Start = PC; /* Loop while table bytes left and we don't need to create a label at the ** current position. */ while (BytesLeft && GetStyleAttr (PC) == atRtsTab) { - unsigned Addr; + uint32_t Addr; /* If just one byte is left, define it and bail out */ if (BytesLeft == 1 || GetStyleAttr (PC+1) != atRtsTab) { @@ -287,7 +287,7 @@ unsigned RtsTable (void) } /* If the next line is not a return address table line, add a separator */ - if (CodeLeft() && GetStyleAttr (PC) != atRtsTab) { + if (CodeLeft () && GetStyleAttr (PC) != atRtsTab) { SeparatorLine (); } @@ -297,14 +297,14 @@ unsigned RtsTable (void) -unsigned TextTable (void) +uint32_t TextTable (void) /* Output a table of text messages */ { /* Count how many bytes may be output. */ - unsigned ByteCount = GetSpan (atTextTab); + uint32_t ByteCount = GetSpan (atTextTab); /* Output as many data bytes lines as needed. */ - unsigned BytesLeft = ByteCount; + uint32_t BytesLeft = ByteCount; while (BytesLeft > 0) { unsigned I; @@ -312,7 +312,7 @@ unsigned TextTable (void) /* Count the number of characters that can be output as such */ unsigned Count = 0; while (Count < BytesLeft && Count < BytesPerLine*4-1) { - unsigned char C = GetCodeByte (PC + Count); + uint8_t C = GetCodeByte (PC + Count); if (C >= 0x20 && C <= 0x7E && C != '\"') { ++Count; } else { @@ -348,7 +348,7 @@ unsigned TextTable (void) /* Count the number of bytes that must be output as bytes */ Count = 0; while (Count < BytesLeft && Count < BytesPerLine) { - unsigned char C = GetCodeByte (PC + Count); + uint8_t C = GetCodeByte (PC + Count); if (C < 0x20 || C > 0x7E || C == '\"') { ++Count; } else { @@ -366,7 +366,7 @@ unsigned TextTable (void) } /* If the next line is not a byte table line, add a separator */ - if (CodeLeft() && GetStyleAttr (PC) != atTextTab) { + if (CodeLeft () && GetStyleAttr (PC) != atTextTab) { SeparatorLine (); } diff --git a/src/da65/data.h b/src/da65/data.h index 4cec14a03..d9885b780 100644 --- a/src/da65/data.h +++ b/src/da65/data.h @@ -44,25 +44,25 @@ -unsigned ByteTable (void); +uint32_t ByteTable (void); /* Output a table of bytes */ -unsigned DByteTable (void); +uint32_t DByteTable (void); /* Output a table of dbytes */ -unsigned WordTable (void); +uint32_t WordTable (void); /* Output a table of words */ -unsigned DWordTable (void); +uint32_t DWordTable (void); /* Output a table of double words */ -unsigned AddrTable (void); +uint32_t AddrTable (void); /* Output a table of addresses */ -unsigned RtsTable (void); +uint32_t RtsTable (void); /* Output a table of RTS addresses (address - 1) */ -unsigned TextTable (void); +uint32_t TextTable (void); /* Output a table of text messages */ diff --git a/src/da65/global.c b/src/da65/global.c index e258aecdd..74f70b6fd 100644 --- a/src/da65/global.c +++ b/src/da65/global.c @@ -54,11 +54,12 @@ const char CfgExt[] = ".cfg"; /* Config file extension */ /* Flags and other command line stuff */ unsigned char DebugInfo = 0; /* Add debug info to the object file */ unsigned char FormFeeds = 0; /* Add form feeds to the output? */ +unsigned char MultiPass = 0; /* Run several passes to resolve labels */ unsigned char UseHexOffs = 0; /* Use hexadecimal label offsets */ -unsigned char PassCount = 2; /* How many passed do we do? */ signed char NewlineAfterJMP = -1; /* Add a newline after a JMP insn? */ signed char NewlineAfterRTS = -1; /* Add a newline after a RTS insn? */ -long StartAddr = -1L; /* Start/load address of the program */ +unsigned char HaveStartAddr = 0; /* Flag for start address given */ +uint32_t StartAddr = 0; /* Start/load address of the program */ unsigned char SyncLines = 0; /* Accept line markers in the info file */ long InputOffs = -1L; /* Offset into input file */ long InputSize = -1L; /* Number of bytes to read from input */ diff --git a/src/da65/global.h b/src/da65/global.h index c85c7a79e..8e3fe90ee 100644 --- a/src/da65/global.h +++ b/src/da65/global.h @@ -38,6 +38,10 @@ +#include <stdint.h> + + + /*****************************************************************************/ /* Data */ /*****************************************************************************/ @@ -55,16 +59,19 @@ extern const char CfgExt[]; /* Config file extension */ /* Flags and other command line stuff */ extern unsigned char DebugInfo; /* Add debug info to the object file */ extern unsigned char FormFeeds; /* Add form feeds to the output? */ +extern unsigned char MultiPass; /* Run several passes to resolve labels */ extern unsigned char UseHexOffs; /* Use hexadecimal label offsets */ -extern unsigned char PassCount; /* How many passed do we do? */ extern signed char NewlineAfterJMP;/* Add a newline after a JMP insn? */ extern signed char NewlineAfterRTS;/* Add a newline after a RTS insn? */ -extern long StartAddr; /* Start/load address of the program */ +extern unsigned char HaveStartAddr; /* Flag for start address given */ +extern uint32_t StartAddr; /* Start/load address of the program */ extern unsigned char SyncLines; /* Accept line markers in the info file */ extern long InputOffs; /* Offset into input file */ extern long InputSize; /* Number of bytes to read from input */ /* Stuff needed by many routines */ +#define PASS_PREP 1 /* Preparation pass */ +#define PASS_FINAL 2 /* Final pass generating output */ extern unsigned Pass; /* Disassembler pass */ extern char Now[128]; /* Current time as string */ diff --git a/src/da65/handler.c b/src/da65/handler.c index 79b3192de..1624e6fd4 100644 --- a/src/da65/handler.c +++ b/src/da65/handler.c @@ -33,6 +33,7 @@ +#include <inttypes.h> #include <stdarg.h> /* common */ @@ -47,6 +48,7 @@ #include "handler.h" #include "labels.h" #include "opctable.h" +#include "opc45GS02.h" #include "output.h" @@ -94,7 +96,7 @@ static void OneLine (const OpcDesc* D, const char* Arg, ...) -static const char* GetAbsOverride (unsigned Flags, unsigned Addr) +static const char* GetAbsOverride (unsigned Flags, uint32_t Addr) /* If the instruction requires an abs override modifier, return the necessary ** string, otherwise return the empty string. */ @@ -110,7 +112,7 @@ static const char* GetAbsOverride (unsigned Flags, unsigned Addr) -static const char* GetAddrArg (unsigned Flags, unsigned Addr) +static const char* GetAddrArg (unsigned Flags, uint32_t Addr) /* Return an address argument - a label if we have one, or the address itself */ { const char* Label = 0; @@ -122,11 +124,9 @@ static const char* GetAddrArg (unsigned Flags, unsigned Addr) } else { static char Buf [32]; if (Addr < 0x100) { - xsprintf (Buf, sizeof (Buf), "$%02X", Addr); - } else if (Addr < 0x10000) { - xsprintf (Buf, sizeof (Buf), "$%04X", Addr); + xsprintf (Buf, sizeof (Buf), "$%02" PRIX32, Addr); } else { - xsprintf (Buf, sizeof (Buf), "$%06X", Addr); + xsprintf (Buf, sizeof (Buf), "$%04" PRIX32, Addr); } return Buf; } @@ -134,7 +134,7 @@ static const char* GetAddrArg (unsigned Flags, unsigned Addr) -static void GenerateLabel (unsigned Flags, unsigned Addr) +static void GenerateLabel (unsigned Flags, uint32_t Addr) /* Generate a label in pass one if requested */ { /* Generate labels in pass #1, and only if we don't have a label already */ @@ -226,9 +226,85 @@ void OH_Implicit (const OpcDesc* D) +void OH_Implicit_ea_45GS02 (const OpcDesc* D) +/* handle disassembling EOM prefixed opcodes, $ea $xx */ +{ + /* Get byte after EOM */ + unsigned opc = GetCodeByte (PC+1); + static const char *mnemonics[8] = { + "ora", "and", "eor", "adc", "sta", "lda", "cmp", "sbc" + }; + + if ((opc & 0x1f) == 0x12) { + unsigned zp = GetCodeByte (PC+2); + + Indent (MCol); + Output ("%s", mnemonics[(opc >> 5) & 7]); + + Indent (ACol); + Output ("[$%02X],z", zp); + + /* Add the code stuff as comment */ + LineComment (PC, 3); + + /* End the line */ + LineFeed (); + } else { + OH_Implicit (D); + } +} + + + +void OH_Implicit_42_45GS02 (const OpcDesc* D) +/* handle disassembling NEG NEG prefixed opcodes, $42 42 ($ea) $xx */ +{ + /* Get bytes after NEG */ + unsigned n1 = GetCodeByte (PC+1); + unsigned opc = GetCodeByte (PC+2); + /* NEG:NEG:NOP (42 42 ea) prefix */ + static const char *mnemonics[8] = { + "orq", "andq", "eorq", "adcq", "stq", "ldq", "cmpq", "sbcq" + }; + + if (n1 == 0x42) { + /* detected 0x42 0x42 */ + if (opc == 0xea) { + /* detected 0x42 0x42 0xea */ + unsigned opc = GetCodeByte (PC+3); + if ((opc & 0x1f) == 0x12) { + unsigned zp = GetCodeByte (PC+4); + + Indent (MCol); + Output ("%s", mnemonics[(opc >> 5) & 7]); + + Indent (ACol); + Output ("[$%02X]", zp); /* with or without ,z ? */ + + /* Add the code stuff as comment */ + LineComment (PC, 5); + + /* End the line */ + LineFeed (); + return; + } + } else { + /* use another table for these */ + const OpcDesc* NewDesc = &OpcTable_45GS02_extended[opc]; + NewDesc->Handler (NewDesc); + return; + } + } + + /* no prefix detected */ + OH_Implicit (D); +} + + + void OH_Immediate (const OpcDesc* D) { - OneLine (D, "#$%02X", GetCodeByte (PC+1)); + OneLine (D, "#$%02" PRIX8, GetCodeByte (PC+1)); } @@ -236,9 +312,9 @@ void OH_Immediate (const OpcDesc* D) void OH_Immediate65816M (const OpcDesc* D) { if (GetAttr (PC) & atMem16) { - OneLine (D, "#$%04X", GetCodeWord (PC+1)); + OneLine (D, "#$%04" PRIX16, GetCodeWord (PC+1)); } else { - OneLine (D, "#$%02X", GetCodeByte (PC+1)); + OneLine (D, "#$%02" PRIX8, GetCodeByte (PC+1)); } } @@ -247,9 +323,9 @@ void OH_Immediate65816M (const OpcDesc* D) void OH_Immediate65816X (const OpcDesc* D) { if (GetAttr (PC) & atIdx16) { - OneLine (D, "#$%04X", GetCodeWord (PC+1)); + OneLine (D, "#$%04" PRIX16, GetCodeWord (PC+1)); } else { - OneLine (D, "#$%02X", GetCodeByte (PC+1)); + OneLine (D, "#$%02" PRIX8, GetCodeByte (PC+1)); } } @@ -257,7 +333,7 @@ void OH_Immediate65816X (const OpcDesc* D) void OH_ImmediateWord (const OpcDesc* D) { - OneLine (D, "#$%04X", GetCodeWord (PC+1)); + OneLine (D, "#$%04" PRIX16, GetCodeWord (PC+1)); } @@ -265,7 +341,21 @@ void OH_ImmediateWord (const OpcDesc* D) void OH_Direct (const OpcDesc* D) { /* Get the operand */ - unsigned Addr = GetCodeByte (PC+1); + uint32_t Addr = GetCodeByte (PC+1); + + /* Generate a label in pass 1 */ + GenerateLabel (D->Flags, Addr); + + /* Output the line */ + OneLine (D, "%s", GetAddrArg (D->Flags, Addr)); +} + + + +void OH_Direct_Q (const OpcDesc* D) +{ + /* Get the operand */ + unsigned Addr = GetCodeByte (PC+3); /* Generate a label in pass 1 */ GenerateLabel (D->Flags, Addr); @@ -279,7 +369,21 @@ void OH_Direct (const OpcDesc* D) void OH_DirectX (const OpcDesc* D) { /* Get the operand */ - unsigned Addr = GetCodeByte (PC+1); + uint32_t Addr = GetCodeByte (PC+1); + + /* Generate a label in pass 1 */ + GenerateLabel (D->Flags, Addr); + + /* Output the line */ + OneLine (D, "%s,x", GetAddrArg (D->Flags, Addr)); +} + + + +void OH_DirectX_Q (const OpcDesc* D) +{ + /* Get the operand */ + unsigned Addr = GetCodeByte (PC+3); /* Generate a label in pass 1 */ GenerateLabel (D->Flags, Addr); @@ -293,7 +397,7 @@ void OH_DirectX (const OpcDesc* D) void OH_DirectY (const OpcDesc* D) { /* Get the operand */ - unsigned Addr = GetCodeByte (PC+1); + uint32_t Addr = GetCodeByte (PC+1); /* Generate a label in pass 1 */ GenerateLabel (D->Flags, Addr); @@ -307,7 +411,21 @@ void OH_DirectY (const OpcDesc* D) void OH_Absolute (const OpcDesc* D) { /* Get the operand */ - unsigned Addr = GetCodeWord (PC+1); + uint32_t Addr = GetCodeWord (PC+1); + + /* Generate a label in pass 1 */ + GenerateLabel (D->Flags, Addr); + + /* Output the line */ + OneLine (D, "%s%s", GetAbsOverride (D->Flags, Addr), GetAddrArg (D->Flags, Addr)); +} + + + +void OH_Absolute_Q (const OpcDesc* D) +{ + /* Get the operand */ + unsigned Addr = GetCodeWord (PC+3); /* Generate a label in pass 1 */ GenerateLabel (D->Flags, Addr); @@ -321,7 +439,21 @@ void OH_Absolute (const OpcDesc* D) void OH_AbsoluteX (const OpcDesc* D) { /* Get the operand */ - unsigned Addr = GetCodeWord (PC+1); + uint32_t Addr = GetCodeWord (PC+1); + + /* Generate a label in pass 1 */ + GenerateLabel (D->Flags, Addr); + + /* Output the line */ + OneLine (D, "%s%s,x", GetAbsOverride (D->Flags, Addr), GetAddrArg (D->Flags, Addr)); +} + + + +void OH_AbsoluteX_Q (const OpcDesc* D) +{ + /* Get the operand */ + unsigned Addr = GetCodeWord (PC+3); /* Generate a label in pass 1 */ GenerateLabel (D->Flags, Addr); @@ -335,7 +467,7 @@ void OH_AbsoluteX (const OpcDesc* D) void OH_AbsoluteY (const OpcDesc* D) { /* Get the operand */ - unsigned Addr = GetCodeWord (PC+1); + uint32_t Addr = GetCodeWord (PC+1); /* Generate a label in pass 1 */ GenerateLabel (D->Flags, Addr); @@ -349,7 +481,7 @@ void OH_AbsoluteY (const OpcDesc* D) void OH_AbsoluteLong (const OpcDesc* D attribute ((unused))) { /* Get the operand */ - unsigned Addr = GetCodeLongAddr (PC+1); + uint32_t Addr = GetCodeLongAddr (PC+1); /* Generate a label in pass 1 */ GenerateLabel (D->Flags, Addr); @@ -363,7 +495,7 @@ void OH_AbsoluteLong (const OpcDesc* D attribute ((unused))) void OH_AbsoluteLongX (const OpcDesc* D attribute ((unused))) { /* Get the operand */ - unsigned Addr = GetCodeLongAddr (PC+1); + uint32_t Addr = GetCodeLongAddr (PC+1); /* Generate a label in pass 1 */ GenerateLabel (D->Flags, Addr); @@ -380,17 +512,17 @@ void OH_Relative (const OpcDesc* D) signed char Offs = GetCodeByte (PC+1); /* Calculate the target address */ - unsigned Addr = (((int) PC+2) + Offs) & 0xFFFF; + uint32_t Addr = (((int) PC+2) + Offs) & 0xFFFF; /* Generate a label in pass 1 */ GenerateLabel (D->Flags, Addr); /* Output the line */ - if (HaveLabel(Addr)) { + if (HaveLabel (Addr)) { OneLine (D, "%s", GetAddrArg (D->Flags, Addr)); } else { /* No label -- make a relative address expression */ - OneLine (D, "* + (%d)", (int) Offs + 2); + OneLine (D, "*%+d", (int) Offs + 2); } } @@ -402,7 +534,7 @@ void OH_RelativeLong (const OpcDesc* D attribute ((unused))) signed short Offs = GetCodeWord (PC+1); /* Calculate the target address */ - unsigned Addr = (((int) PC+3) + Offs) & 0xFFFF; + uint32_t Addr = (((int) PC+3) + Offs) & 0xFFFF; /* Generate a label in pass 1 */ GenerateLabel (D->Flags, Addr); @@ -419,7 +551,7 @@ void OH_RelativeLong4510 (const OpcDesc* D attribute ((unused))) signed short Offs = GetCodeWord (PC+1); /* Calculate the target address */ - unsigned Addr = (((int) PC+2) + Offs) & 0xFFFF; + uint32_t Addr = (((int) PC+2) + Offs) & 0xFFFF; /* Generate a label in pass 1 */ GenerateLabel (D->Flags, Addr); @@ -433,7 +565,7 @@ void OH_RelativeLong4510 (const OpcDesc* D attribute ((unused))) void OH_DirectIndirect (const OpcDesc* D) { /* Get the operand */ - unsigned Addr = GetCodeByte (PC+1); + uint32_t Addr = GetCodeByte (PC+1); /* Generate a label in pass 1 */ GenerateLabel (D->Flags, Addr); @@ -447,7 +579,7 @@ void OH_DirectIndirect (const OpcDesc* D) void OH_DirectIndirectY (const OpcDesc* D) { /* Get the operand */ - unsigned Addr = GetCodeByte (PC+1); + uint32_t Addr = GetCodeByte (PC+1); /* Generate a label in pass 1 */ GenerateLabel (D->Flags, Addr); @@ -461,7 +593,21 @@ void OH_DirectIndirectY (const OpcDesc* D) void OH_DirectIndirectZ (const OpcDesc* D) { /* Get the operand */ - unsigned Addr = GetCodeByte (PC+1); + uint32_t Addr = GetCodeByte (PC+1); + + /* Generate a label in pass 1 */ + GenerateLabel (D->Flags, Addr); + + /* Output the line */ + OneLine (D, "(%s),z", GetAddrArg (D->Flags, Addr)); +} + + + +void OH_DirectIndirectZ_Q (const OpcDesc* D) +{ + /* Get the operand */ + unsigned Addr = GetCodeByte (PC+3); /* Generate a label in pass 1 */ GenerateLabel (D->Flags, Addr); @@ -475,7 +621,7 @@ void OH_DirectIndirectZ (const OpcDesc* D) void OH_DirectXIndirect (const OpcDesc* D) { /* Get the operand */ - unsigned Addr = GetCodeByte (PC+1); + uint32_t Addr = GetCodeByte (PC+1); /* Generate a label in pass 1 */ GenerateLabel (D->Flags, Addr); @@ -489,7 +635,7 @@ void OH_DirectXIndirect (const OpcDesc* D) void OH_AbsoluteIndirect (const OpcDesc* D) { /* Get the operand */ - unsigned Addr = GetCodeWord (PC+1); + uint32_t Addr = GetCodeWord (PC+1); /* Generate a label in pass 1 */ GenerateLabel (D->Flags, Addr); @@ -505,11 +651,11 @@ void OH_BitBranch (const OpcDesc* D) char* BranchLabel; /* Get the operands */ - unsigned char TestAddr = GetCodeByte (PC+1); - signed char BranchOffs = GetCodeByte (PC+2); + uint32_t TestAddr = GetCodeByte (PC+1); + int8_t BranchOffs = GetCodeByte (PC+2); /* Calculate the target address for the branch */ - unsigned BranchAddr = (((int) PC+3) + BranchOffs) & 0xFFFF; + uint32_t BranchAddr = (((int) PC+3) + BranchOffs) & 0xFFFF; /* Generate labels in pass 1. The bit branch codes are special in that ** they don't really match the remainder of the 6502 instruction set (they @@ -533,10 +679,32 @@ void OH_BitBranch (const OpcDesc* D) +void OH_BitBranch_m740 (const OpcDesc* D) +/* <bit> zp, rel +** NOTE: currently <bit> is part of the instruction +*/ +{ + /* unsigned Bit = GetCodeByte (PC) >> 5; */ + uint32_t Addr = GetCodeByte (PC+1); + int8_t BranchOffs = (int8_t) GetCodeByte (PC+2); + + /* Calculate the target address for the branch */ + uint32_t BranchAddr = (((int) PC+3) + BranchOffs) & 0xFFFF; + + /* Generate a label in pass 1 */ + GenerateLabel (D->Flags, Addr); + GenerateLabel (flLabel, BranchAddr); + + /* Output the line */ + OneLine (D, "%s, %s", GetAddrArg (D->Flags, Addr), GetAddrArg (flLabel, BranchAddr)); +} + + + void OH_ImmediateDirect (const OpcDesc* D) { /* Get the operand */ - unsigned Addr = GetCodeByte (PC+2); + uint32_t Addr = GetCodeByte (PC+2); /* Generate a label in pass 1 */ GenerateLabel (D->Flags, Addr); @@ -550,7 +718,7 @@ void OH_ImmediateDirect (const OpcDesc* D) void OH_ImmediateDirectX (const OpcDesc* D) { /* Get the operand */ - unsigned Addr = GetCodeByte (PC+2); + uint32_t Addr = GetCodeByte (PC+2); /* Generate a label in pass 1 */ GenerateLabel (D->Flags, Addr); @@ -564,7 +732,7 @@ void OH_ImmediateDirectX (const OpcDesc* D) void OH_ImmediateAbsolute (const OpcDesc* D) { /* Get the operand */ - unsigned Addr = GetCodeWord (PC+2); + uint32_t Addr = GetCodeWord (PC+2); /* Generate a label in pass 1 */ GenerateLabel (D->Flags, Addr); @@ -578,7 +746,7 @@ void OH_ImmediateAbsolute (const OpcDesc* D) void OH_ImmediateAbsoluteX (const OpcDesc* D) { /* Get the operand */ - unsigned Addr = GetCodeWord (PC+2); + uint32_t Addr = GetCodeWord (PC+2); /* Generate a label in pass 1 */ GenerateLabel (D->Flags, Addr); @@ -623,7 +791,7 @@ void OH_StackRelativeIndirectY4510 (const OpcDesc* D attribute ((unused))) void OH_DirectIndirectLong (const OpcDesc* D attribute ((unused))) { /* Get the operand */ - unsigned Addr = GetCodeByte (PC+1); + uint32_t Addr = GetCodeByte (PC+1); /* Generate a label in pass 1 */ GenerateLabel (D->Flags, Addr); @@ -637,7 +805,7 @@ void OH_DirectIndirectLong (const OpcDesc* D attribute ((unused))) void OH_DirectIndirectLongY (const OpcDesc* D attribute ((unused))) { /* Get the operand */ - unsigned Addr = GetCodeByte (PC+1); + uint32_t Addr = GetCodeByte (PC+1); /* Generate a label in pass 1 */ GenerateLabel (D->Flags, Addr); @@ -653,9 +821,9 @@ void OH_BlockMove (const OpcDesc* D) char* DstLabel; /* Get source operand */ - unsigned Src = GetCodeWord (PC+1); + uint32_t Src = GetCodeWord (PC+1); /* Get destination operand */ - unsigned Dst = GetCodeWord (PC+3); + uint32_t Dst = GetCodeWord (PC+3); /* Generate a label in pass 1 */ GenerateLabel (D->Flags, Src); @@ -668,7 +836,7 @@ void OH_BlockMove (const OpcDesc* D) DstLabel = xstrdup (GetAddrArg (D->Flags, Dst)); /* Output the line */ - OneLine (D, "%s%s,%s%s,$%04X", + OneLine (D, "%s%s,%s%s,$%04" PRIX16, GetAbsOverride (D->Flags, Src), GetAddrArg (D->Flags, Src), GetAbsOverride (D->Flags, Dst), DstLabel, GetCodeWord (PC+5)); @@ -681,12 +849,12 @@ void OH_BlockMove (const OpcDesc* D) void OH_BlockMove65816 (const OpcDesc* D) { /* Get source operand */ - unsigned Src = GetCodeByte (PC+2); + uint8_t Src = GetCodeByte (PC+2); /* Get destination operand */ - unsigned Dst = GetCodeByte (PC+1); + uint8_t Dst = GetCodeByte (PC+1); /* Output the line */ - OneLine (D, "#$%02X, #$%02X", Src, Dst); + OneLine (D, "#$%02" PRIX8 ", #$%02" PRIX8, Src, Dst); } @@ -694,7 +862,7 @@ void OH_BlockMove65816 (const OpcDesc* D) void OH_AbsoluteXIndirect (const OpcDesc* D attribute ((unused))) { /* Get the operand */ - unsigned Addr = GetCodeWord (PC+1); + uint32_t Addr = GetCodeWord (PC+1); /* Generate a label in pass 1 */ GenerateLabel (D->Flags, Addr); @@ -708,7 +876,7 @@ void OH_AbsoluteXIndirect (const OpcDesc* D attribute ((unused))) void OH_DirectImmediate (const OpcDesc* D) { /* Get the operand */ - unsigned Addr = GetCodeByte (PC+1); + uint32_t Addr = GetCodeByte (PC+1); /* Generate a label in pass 1 */ GenerateLabel (D->Flags, Addr); @@ -720,42 +888,46 @@ void OH_DirectImmediate (const OpcDesc* D) void OH_ZeroPageBit (const OpcDesc* D) +/* <bit> zp +** NOTE: currently <bit> is part of the instruction +*/ { - unsigned Bit = GetCodeByte (PC) >> 5; - unsigned Addr = GetCodeByte (PC+1); + uint32_t Addr = GetCodeByte (PC+1); /* Generate a label in pass 1 */ GenerateLabel (D->Flags, Addr); /* Output the line */ - OneLine (D, "%01X,%s", Bit, GetAddrArg (D->Flags, Addr)); + OneLine (D, "%s", GetAddrArg (D->Flags, Addr)); } void OH_AccumulatorBit (const OpcDesc* D) +/* <bit> A +** NOTE: currently <bit> is part of the instruction +*/ { - unsigned Bit = GetCodeByte (PC) >> 5; - /* Output the line */ - OneLine (D, "%01X,a", Bit); + OneLine (D, "a"); } - void OH_AccumulatorBitBranch (const OpcDesc* D) +/* <bit> A, rel +** NOTE: currently <bit> is part of the instruction +*/ { - unsigned Bit = GetCodeByte (PC) >> 5; - signed char BranchOffs = GetCodeByte (PC+1); + int8_t BranchOffs = GetCodeByte (PC+1); /* Calculate the target address for the branch */ - unsigned BranchAddr = (((int) PC+3) + BranchOffs) & 0xFFFF; + uint32_t BranchAddr = (((int) PC+3) + BranchOffs) & 0xFFFF; /* Generate labels in pass 1 */ GenerateLabel (flLabel, BranchAddr); /* Output the line */ - OneLine (D, "%01X,a,%s", Bit, GetAddrArg (flLabel, BranchAddr)); + OneLine (D, "a, %s", GetAddrArg (flLabel, BranchAddr)); } @@ -770,17 +942,16 @@ void OH_JmpDirectIndirect (const OpcDesc* D) } - void OH_SpecialPage (const OpcDesc* D) +/* m740 "special page" address mode */ { - /* Get the operand */ - unsigned Addr = 0xFF00 + GetCodeByte (PC+1); + /* Get the operand */ + uint32_t Addr = 0xFF00 + GetCodeByte (PC+1); - /* Generate a label in pass 1 */ - GenerateLabel (D->Flags, Addr); + /* Generate a label in pass 1 */ + GenerateLabel (D->Flags, Addr); - /* OneLine (D, "$FF%02X", (CodeByte (PC+1)); */ - OneLine (D, "%s", GetAddrArg (D->Flags, Addr)); + OneLine (D, "%s", GetAddrArg (D->Flags, Addr)); } @@ -791,7 +962,7 @@ void OH_Rts (const OpcDesc* D) if (NewlineAfterRTS) { LineFeed (); } - SeparatorLine(); + SeparatorLine (); } @@ -834,16 +1005,13 @@ void OH_JsrAbsolute (const OpcDesc* D) unsigned ParamSize = SubroutineParamSize[GetCodeWord (PC+1)]; OH_Absolute (D); if (ParamSize > 0) { - unsigned RemainingBytes; - unsigned BytesLeft; + uint32_t RemainingBytes; + uint32_t BytesLeft; PC += D->Size; RemainingBytes = GetRemainingBytes (); - if (RemainingBytes < ParamSize) { - ParamSize = RemainingBytes; - } - BytesLeft = ParamSize; + BytesLeft = (RemainingBytes < ParamSize)? RemainingBytes : ParamSize; while (BytesLeft > 0) { - unsigned Chunk = (BytesLeft > BytesPerLine) ? BytesPerLine : BytesLeft; + uint32_t Chunk = (BytesLeft > BytesPerLine) ? BytesPerLine : BytesLeft; DataByteLine (Chunk); BytesLeft -= Chunk; PC += Chunk; @@ -854,7 +1022,7 @@ void OH_JsrAbsolute (const OpcDesc* D) -void SetSubroutineParamSize (unsigned Addr, unsigned Size) +void SetSubroutineParamSize (uint32_t Addr, unsigned Size) { SubroutineParamSize[Addr] = Size; } diff --git a/src/da65/handler.h b/src/da65/handler.h index ee9b18bbc..91c1562cd 100644 --- a/src/da65/handler.h +++ b/src/da65/handler.h @@ -38,6 +38,8 @@ +#include <stdint.h> + /* common */ #include "attrib.h" @@ -78,6 +80,7 @@ void OH_DirectXIndirect (const OpcDesc*); void OH_AbsoluteIndirect (const OpcDesc*); void OH_BitBranch (const OpcDesc*); +void OH_BitBranch_m740 (const OpcDesc*); void OH_ImmediateDirect (const OpcDesc*); void OH_ImmediateDirectX (const OpcDesc*); @@ -102,6 +105,15 @@ void OH_AccumulatorBitBranch (const OpcDesc*); void OH_JmpDirectIndirect (const OpcDesc* D); void OH_SpecialPage (const OpcDesc*); +/* 45GS02 */ +void OH_Direct_Q (const OpcDesc*); +void OH_DirectIndirectZ_Q (const OpcDesc* D); +void OH_Absolute_Q (const OpcDesc* D); +void OH_AbsoluteX_Q (const OpcDesc* D); +void OH_DirectX_Q (const OpcDesc* D); +void OH_Implicit_ea_45GS02 (const OpcDesc* D); +void OH_Implicit_42_45GS02 (const OpcDesc* D); + /* Handlers for special instructions */ void OH_Rts (const OpcDesc*); void OH_JmpAbsolute (const OpcDesc*); @@ -109,7 +121,7 @@ void OH_JmpAbsoluteIndirect (const OpcDesc* D); void OH_JmpAbsoluteXIndirect (const OpcDesc* D); void OH_JsrAbsolute (const OpcDesc*); -void SetSubroutineParamSize (unsigned Addr, unsigned Size); +void SetSubroutineParamSize (uint32_t Addr, unsigned Size); /* End of handler.h */ diff --git a/src/da65/infofile.c b/src/da65/infofile.c index fbf367cc9..bfbd3eb66 100644 --- a/src/da65/infofile.c +++ b/src/da65/infofile.c @@ -219,7 +219,7 @@ static void GlobalSection (void) case INFOTOK_ARGUMENT_COLUMN: InfoNextTok (); InfoAssureInt (); - InfoRangeCheck (MIN_ACOL, MAX_ACOL); + InfoRangeCheck ("ARGUMENTCOLUMN", MIN_ACOL, MAX_ACOL); ACol = InfoIVal; InfoNextTok (); break; @@ -227,7 +227,7 @@ static void GlobalSection (void) case INFOTOK_COMMENT_COLUMN: InfoNextTok (); InfoAssureInt (); - InfoRangeCheck (MIN_CCOL, MAX_CCOL); + InfoRangeCheck ("COMMENTCOLUMN", MIN_CCOL, MAX_CCOL); CCol = InfoIVal; InfoNextTok (); break; @@ -235,7 +235,7 @@ static void GlobalSection (void) case INFOTOK_COMMENTS: InfoNextTok (); InfoAssureInt (); - InfoRangeCheck (MIN_COMMENTS, MAX_COMMENTS); + InfoRangeCheck ("COMMENTS", MIN_COMMENTS, MAX_COMMENTS); Comments = InfoIVal; InfoNextTok (); break; @@ -281,7 +281,7 @@ static void GlobalSection (void) case INFOTOK_INPUTSIZE: InfoNextTok (); InfoAssureInt (); - InfoRangeCheck (1, 0x10000); + InfoRangeCheck ("INPUTSIZE", 1, 0x10000); InputSize = InfoIVal; InfoNextTok (); break; @@ -289,7 +289,7 @@ static void GlobalSection (void) case INFOTOK_LABELBREAK: InfoNextTok (); InfoAssureInt (); - InfoRangeCheck (0, UCHAR_MAX); + InfoRangeCheck ("LABELBREAK", 0, UCHAR_MAX); LBreak = (unsigned char) InfoIVal; InfoNextTok (); break; @@ -297,7 +297,7 @@ static void GlobalSection (void) case INFOTOK_MNEMONIC_COLUMN: InfoNextTok (); InfoAssureInt (); - InfoRangeCheck (MIN_MCOL, MAX_MCOL); + InfoRangeCheck ("MNEMONICCOLUMN", MIN_MCOL, MAX_MCOL); MCol = InfoIVal; InfoNextTok (); break; @@ -336,7 +336,7 @@ static void GlobalSection (void) InfoNextTok (); InfoAssureInt (); if (InfoIVal != 0) { - InfoRangeCheck (MIN_PAGE_LEN, MAX_PAGE_LEN); + InfoRangeCheck ("PAGELENGTH", MIN_PAGE_LEN, MAX_PAGE_LEN); } PageLength = InfoIVal; InfoNextTok (); @@ -345,15 +345,16 @@ static void GlobalSection (void) case INFOTOK_STARTADDR: InfoNextTok (); InfoAssureInt (); - InfoRangeCheck (0x0000, 0xFFFF); + InfoRangeCheck ("STARTADDR", 0x0000, 0xFFFF); StartAddr = InfoIVal; + HaveStartAddr = 1; InfoNextTok (); break; case INFOTOK_TEXT_COLUMN: InfoNextTok (); InfoAssureInt (); - InfoRangeCheck (MIN_TCOL, MAX_TCOL); + InfoRangeCheck ("TEXTCOLUMN", MIN_TCOL, MAX_TCOL); TCol = InfoIVal; InfoNextTok (); break; @@ -413,7 +414,7 @@ static void LabelSection (void) InfoError ("Value already given"); } InfoAssureInt (); - InfoRangeCheck (0, 0xFFFF); + InfoRangeCheck ("ADDR", 0, 0xFFFF); Value = InfoIVal; InfoNextTok (); break; @@ -447,7 +448,7 @@ static void LabelSection (void) InfoError ("Size already given"); } InfoAssureInt (); - InfoRangeCheck (1, 0x10000); + InfoRangeCheck ("SIZE", 1, 0x10000); Size = InfoIVal; InfoNextTok (); break; @@ -458,7 +459,7 @@ static void LabelSection (void) InfoError ("ParamSize already given"); } InfoAssureInt (); - InfoRangeCheck (1, 0x10000); + InfoRangeCheck ("PARAMSIZE", 1, 0x10000); ParamSize = InfoIVal; InfoNextTok (); break; @@ -554,13 +555,13 @@ static void RangeSection (void) tComment = 0x10, tAddrMode = 0x20, tUnit = 0x40, - tNeeded = (tStart | tEnd | tType) + tNeeded = (tStart | tEnd | tType) }; unsigned Attributes = tNone; /* Locals - initialize to avoid gcc warnings */ - unsigned Start = 0; - unsigned End = 0; + uint32_t Start = 0; + uint32_t End = 0; unsigned char Type = 0; unsigned AddrMode = 0; char* Name = 0; @@ -599,17 +600,18 @@ static void RangeSection (void) case INFOTOK_END: AddAttr ("END", &Attributes, tEnd); InfoNextTok (); - if (InfoTok == INFOTOK_OFFSET_INTCON) { - InfoRangeCheck (0x0000, 0xFFFF); - if (!(Attributes & tStart)) + InfoRangeCheck ("END", 0x0000, 0xFFFF); + if ((Attributes & tStart) == 0) { InfoError ("When using End with an offset, Start must be specified before"); + } End = Start + InfoIVal - 1; - if (End > 0xFFFF) + if (End > 0xFFFF) { InfoError ("Range error"); + } } else { InfoAssureInt (); - InfoRangeCheck (0x0000, 0xFFFF); + InfoRangeCheck ("END", 0x0000, 0xFFFF); End = InfoIVal; } InfoNextTok (); @@ -631,7 +633,7 @@ static void RangeSection (void) AddAttr ("START", &Attributes, tStart); InfoNextTok (); InfoAssureInt (); - InfoRangeCheck (0x0000, 0xFFFF); + InfoRangeCheck ("START", 0x0000, 0xFFFF); Start = InfoIVal; InfoNextTok (); break; @@ -664,7 +666,7 @@ static void RangeSection (void) if (InfoSVal[1] == '\0') { InfoError ("AddrMode must be two characters long"); } - if (tolower(InfoSVal[0]) == 'm') { + if (tolower (InfoSVal[0]) == 'm') { if (InfoSVal[0] == 'm') { AddrMode = atMem16; } else { @@ -673,7 +675,7 @@ static void RangeSection (void) } else { InfoError ("AddrMode syntax: mx"); } - if (tolower(InfoSVal[1]) == 'x') { + if (tolower (InfoSVal[1]) == 'x') { if (InfoSVal[1] == 'x') { AddrMode |= atIdx16; } else { @@ -689,7 +691,7 @@ static void RangeSection (void) AddAttr ("UNIT", &Attributes, tUnit); InfoNextTok (); InfoAssureInt (); - InfoRangeCheck (0x0002, 0xFFFF); + InfoRangeCheck ("UNIT", 0x0002, 0xFFFF); Unit = InfoIVal; InfoNextTok (); break; @@ -733,7 +735,7 @@ static void RangeSection (void) if (Attributes & tUnit) { unsigned i; for (i = Start; i < End; i += Unit) { - MarkAddr(i, atTableUnit); + MarkAddr (i, atTableUnit); } } @@ -807,7 +809,7 @@ static void SegmentSection (void) InfoError ("Value already given"); } InfoAssureInt (); - InfoRangeCheck (0, 0xFFFF); + InfoRangeCheck ("END", 0, 0xFFFF); End = InfoIVal; InfoNextTok (); break; @@ -828,7 +830,7 @@ static void SegmentSection (void) InfoError ("Value already given"); } InfoAssureInt (); - InfoRangeCheck (0, 0xFFFF); + InfoRangeCheck ("START", 0, 0xFFFF); Start = InfoIVal; InfoNextTok (); break; @@ -926,7 +928,7 @@ void ReadInfoFile (void) /* Read the info file */ { /* Check if we have a info file given */ - if (InfoAvail()) { + if (InfoAvail ()) { /* Open the config file */ InfoOpenInput (); diff --git a/src/da65/labels.c b/src/da65/labels.c index 4cae0316a..a2c027705 100644 --- a/src/da65/labels.c +++ b/src/da65/labels.c @@ -33,15 +33,17 @@ +#include <inttypes.h> #include <stdio.h> #include <string.h> /* common */ +#include "coll.h" +#include "strbuf.h" #include "xmalloc.h" #include "xsprintf.h" /* da65 */ -#include "attrtab.h" #include "code.h" #include "comments.h" #include "error.h" @@ -57,14 +59,85 @@ -/* Symbol table */ -static const char* SymTab[0x10000]; +/* Label structure how it is found in the label table */ +typedef struct Label Label; +struct Label { + struct Label* Next; /* Next entry in linked list */ + uint32_t Addr; /* The full address */ + char Name[1]; /* Symbol name, dynamically allocated */ +}; -/* 65816 symbol table */ -#define MAX_LONG_LABELS 256 -static const char* LongSymVal[MAX_LONG_LABELS]; -static unsigned LongSymAddr[MAX_LONG_LABELS]; -static unsigned LongLabelsUsed; +/* Labels use a hash table and a linear list for collision resolution. The +** hash function is easy and effective. It evaluates just the lower bits of +** the address. +*/ +#define LABEL_HASH_SIZE 4096u /* Must be power of two */ +static Label* LabelTab[LABEL_HASH_SIZE]; + +/* Total number of labels */ +static unsigned long LabelCount = 0; + + + +/*****************************************************************************/ +/* struct Label */ +/*****************************************************************************/ + + + +static Label* NewLabel (uint32_t Addr, const char* Name) +/* Create a new label structure and return it */ +{ + /* Get the length of the name */ + unsigned Len = strlen (Name); + + /* Create a new label */ + Label* L = xmalloc (sizeof (Label) + Len); + + /* Fill in the data */ + L->Next = 0; + L->Addr = Addr; + memcpy (L->Name, Name, Len + 1); + + /* Return the label just created */ + return L; +} + + + +static uint32_t GetLabelHash (uint32_t Addr) +/* Get the hash for a label at the given address */ +{ + return (Addr & (LABEL_HASH_SIZE - 1)); +} + + + +static Label* FindLabel (uint32_t Addr) +/* Search for a label for the given address and return it. Returns NULL if +** no label exists for the address. +*/ +{ + Label* L = LabelTab[GetLabelHash (Addr)]; + while (L) { + if (L->Addr == Addr) { + break; + } + L = L->Next; + } + return L; +} + + + +static void InsertLabel (Label* L) +/* Insert a label into the tables */ +{ + /* Insert into hash table */ + uint32_t Hash = GetLabelHash (L->Addr); + L->Next = LabelTab[Hash]; + LabelTab[Hash] = L; +} @@ -74,34 +147,19 @@ static unsigned LongLabelsUsed; -static const char* MakeLabelName (unsigned Addr) +static const char* MakeLabelName (uint32_t Addr) /* Make the default label name from the given address and return it in a ** static buffer. */ { static char LabelBuf [32]; - xsprintf (LabelBuf, sizeof (LabelBuf), - IsLongAddr (Addr) ? "L%06X" : "L%04X", Addr); + xsprintf (LabelBuf, sizeof (LabelBuf), "L%04" PRIX32, Addr); return LabelBuf; } -static unsigned FindLongIndex (unsigned Addr) -{ - unsigned i; - for (i = 0; i < LongLabelsUsed; i++) { - if (LongSymAddr[i] == Addr) { - return i; - } - } - - return -1; -} - - - -static void AddLabel (unsigned Addr, attr_t Attr, const char* Name) +static void AddLabel (uint32_t Addr, attr_t Attr, const char* Name) /* Add a label */ { /* Get an existing label attribute */ @@ -109,52 +167,37 @@ static void AddLabel (unsigned Addr, attr_t Attr, const char* Name) /* Must not have two symbols for one address */ if (ExistingAttr != atNoLabel) { - /* Allow redefinition if identical. Beware: Unnamed labels don't - ** have a name (you guessed that, didn't you?). + /* Allow redefinition if identical. Beware: Unnamed labels do not + ** have an entry in the label table. */ - if (IsLongAddr (Addr)) { - const unsigned i = FindLongIndex (Addr); - if (ExistingAttr == Attr && - ((Name == 0 && LongSymVal[i] == 0) || - (Name != 0 && LongSymVal[i] != 0 && - strcmp (LongSymVal[i], Name) == 0))) { - return; - } - Error ("Duplicate label for address $%06X (%s): '%s'", Addr, - LongSymVal[i] == 0 ? "<unnamed label>" : LongSymVal[i], - Name == 0 ? "<unnamed label>" : Name); - } else { - if (ExistingAttr == Attr && - ((Name == 0 && SymTab[Addr] == 0) || - (Name != 0 && SymTab[Addr] != 0 && - strcmp (SymTab[Addr], Name) == 0))) { - return; - } - Error ("Duplicate label for address $%04X (%s): '%s'", Addr, - SymTab[Addr] == 0 ? "<unnamed label>" : SymTab[Addr], - Name == 0 ? "<unnamed label>" : Name); + Label* L = FindLabel (Addr); + if (ExistingAttr == Attr && + ((Name == 0 && L == 0) || + (Name != 0 && L != 0 && strcmp (Name, L->Name) == 0))) { + return; } + Error ("Duplicate label for address $%04X (%s): '%s'", Addr, + L? L->Name : "<unnamed label>", + Name? Name : "<unnamed label>"); } - /* Create a new label (xstrdup will return NULL if input NULL) */ - if (IsLongAddr (Addr)) { - if (LongLabelsUsed >= MAX_LONG_LABELS) { - Error ("Too many long labels"); - } - LongSymAddr[LongLabelsUsed] = Addr; - LongSymVal[LongLabelsUsed] = xstrdup (Name); - LongLabelsUsed++; - } else { - SymTab[Addr] = xstrdup (Name); + /* If this is not an unnamed label, create a new label entry and + ** insert it. + */ + if (Name != 0) { + InsertLabel (NewLabel (Addr, Name)); } /* Remember the attribute */ MarkAddr (Addr, Attr); + + /* Count labels */ + ++LabelCount; } -void AddIntLabel (unsigned Addr) +void AddIntLabel (uint32_t Addr) /* Add an internal label using the address to generate the name. */ { AddLabel (Addr, atIntLabel, MakeLabelName (Addr)); @@ -162,7 +205,7 @@ void AddIntLabel (unsigned Addr) -void AddExtLabel (unsigned Addr, const char* Name) +void AddExtLabel (uint32_t Addr, const char* Name) /* Add an external label */ { AddLabel (Addr, atExtLabel, Name); @@ -170,7 +213,7 @@ void AddExtLabel (unsigned Addr, const char* Name) -void AddUnnamedLabel (unsigned Addr) +void AddUnnamedLabel (uint32_t Addr) /* Add an unnamed label */ { AddLabel (Addr, atUnnamedLabel, 0); @@ -178,11 +221,27 @@ void AddUnnamedLabel (unsigned Addr) -void AddDepLabel (unsigned Addr, attr_t Attr, const char* BaseName, unsigned Offs) +void AddDepLabel (uint32_t Addr, attr_t Attr, const char* BaseName, unsigned Offs) /* Add a dependent label at the given address using "basename+Offs" as the new ** name. */ { + /* Create the new name in the buffer */ + StrBuf Name = AUTO_STRBUF_INITIALIZER; + if (UseHexOffs) { + SB_Printf (&Name, "%s+$%02X", BaseName, Offs); + } else { + SB_Printf (&Name, "%s+%u", BaseName, Offs); + } + + /* Define the labels */ + AddLabel (Addr, Attr | atDepLabel, SB_GetConstBuf (&Name)); + + /* Free the name buffer */ + SB_Done (&Name); + + + /* Allocate memory for the dependent label name */ unsigned NameLen = strlen (BaseName); char* DepName = xmalloc (NameLen + 7); /* "+$ABCD\0" */ @@ -203,7 +262,7 @@ void AddDepLabel (unsigned Addr, attr_t Attr, const char* BaseName, unsigned Off -static void AddLabelRange (unsigned Addr, attr_t Attr, +static void AddLabelRange (uint32_t Addr, attr_t Attr, const char* Name, unsigned Count) /* Add a label for a range. The first entry gets the label "Name" while the ** others get "Name+offs". @@ -241,7 +300,7 @@ static void AddLabelRange (unsigned Addr, attr_t Attr, -void AddIntLabelRange (unsigned Addr, const char* Name, unsigned Count) +void AddIntLabelRange (uint32_t Addr, const char* Name, unsigned Count) /* Add an internal label for a range. The first entry gets the label "Name" ** while the others get "Name+offs". */ @@ -252,7 +311,7 @@ void AddIntLabelRange (unsigned Addr, const char* Name, unsigned Count) -void AddExtLabelRange (unsigned Addr, const char* Name, unsigned Count) +void AddExtLabelRange (uint32_t Addr, const char* Name, unsigned Count) /* Add an external label for a range. The first entry gets the label "Name" ** while the others get "Name+offs". */ @@ -263,7 +322,7 @@ void AddExtLabelRange (unsigned Addr, const char* Name, unsigned Count) -int HaveLabel (unsigned Addr) +int HaveLabel (uint32_t Addr) /* Check if there is a label for the given address */ { /* Check for a label */ @@ -272,7 +331,7 @@ int HaveLabel (unsigned Addr) -int MustDefLabel (unsigned Addr) +int MustDefLabel (uint32_t Addr) /* Return true if we must define a label for this address, that is, if there ** is a label at this address, and it is an external or internal label. */ @@ -286,7 +345,7 @@ int MustDefLabel (unsigned Addr) -const char* GetLabelName (unsigned Addr) +const char* GetLabelName (uint32_t Addr) /* Return the label name for an address */ { /* Get the label attribute */ @@ -297,19 +356,16 @@ const char* GetLabelName (unsigned Addr) */ if (A == atUnnamedLabel) { return ""; - } else if (IsLongAddr (Addr)) { - /* Return the label if any */ - const unsigned i = FindLongIndex (Addr); - return i < LongLabelsUsed ? LongSymVal[i] : NULL; } else { /* Return the label if any */ - return SymTab[Addr]; + const Label* L = FindLabel (Addr); + return L? L->Name : 0; } } -const char* GetLabel (unsigned Addr, unsigned RefFrom) +const char* GetLabel (uint32_t Addr, uint32_t RefFrom) /* Return the label name for an address, as it is used in a label reference. ** RefFrom is the address the label is referenced from. This is needed in case ** of unnamed labels, to determine the name. @@ -339,7 +395,7 @@ const char* GetLabel (unsigned Addr, unsigned RefFrom) */ if (Addr <= RefFrom) { /* Search backwards */ - unsigned I = RefFrom; + uint32_t I = RefFrom; while (Addr < I) { --I; A = GetLabelAttr (I); @@ -357,7 +413,7 @@ const char* GetLabel (unsigned Addr, unsigned RefFrom) } else { /* Search forwards */ - unsigned I = RefFrom; + uint32_t I = RefFrom; while (Addr > I) { ++I; A = GetLabelAttr (I); @@ -373,26 +429,22 @@ const char* GetLabel (unsigned Addr, unsigned RefFrom) /* Return the label name */ return FwdLabels[Count-1]; } - - } else if (IsLongAddr (Addr)) { - /* Return the label if any */ - const unsigned i = FindLongIndex (Addr); - return i < LongLabelsUsed ? LongSymVal[i] : NULL; } else { /* Return the label if any */ - return SymTab[Addr]; + const Label* L = FindLabel (Addr); + return L? L->Name : 0; } } -void ForwardLabel (unsigned Offs) +void ForwardLabel (uint32_t Offs) /* If necessary, output a forward label, one that is within the next few ** bytes and is therefore output as "label = * + x". */ { /* Calculate the actual address */ - unsigned long Addr = PC + Offs; + uint32_t Addr = PC + Offs; /* Get the type of the label */ attr_t A = GetLabelAttr (Addr); @@ -406,7 +458,7 @@ void ForwardLabel (unsigned Offs) ** an error. */ if (A == atUnnamedLabel) { - Error ("Cannot define unnamed label at address $%04lX", Addr); + Error ("Cannot define unnamed label at address $%04" PRIX32, Addr); } /* Output the label */ @@ -415,24 +467,33 @@ void ForwardLabel (unsigned Offs) -static void DefOutOfRangeLabel (unsigned long Addr) +static int CompareLabels (void* Data attribute ((unused)), + const void* L1, const void* L2) +/* Compare functions for sorting the out-of-range labels */ +{ + if (((const Label*) L1)->Addr < ((const Label*) L2)->Addr) { + return -1; + } else if (((const Label*) L1)->Addr > ((const Label*) L2)->Addr) { + return 1; + } else { + return 0; + } +} + + + +static void DefOutOfRangeLabel (const Label* L) /* Define one label that is outside code range. */ { - switch (GetLabelAttr (Addr)) { + switch (GetLabelAttr (L->Addr)) { case atIntLabel: case atExtLabel: - if (IsLongAddr (Addr)) { - const unsigned i = FindLongIndex (Addr); - DefConst (i < LongLabelsUsed ? LongSymVal[i] : NULL, - GetComment (Addr), Addr); - } else { - DefConst (SymTab[Addr], GetComment (Addr), Addr); - } + DefConst (L->Name, GetComment (L->Addr), L->Addr); break; case atUnnamedLabel: - Error ("Cannot define unnamed label at address $%04lX", Addr); + Error ("Cannot define unnamed label at address $%04" PRIX32, L->Addr); break; default: @@ -446,34 +507,48 @@ static void DefOutOfRangeLabel (unsigned long Addr) void DefOutOfRangeLabels (void) /* Output any labels that are out of the loaded code range */ { - unsigned long Addr; - unsigned i; + unsigned I; - SeparatorLine (); + /* This requires somewhat more effort since the labels output should be + ** sorted by address for better readability. This is not directly + ** possible when using a hash table, so an intermediate data structure + ** is required. It is not possible to collect out-of-range labels while + ** generating them, since they may come from an info file and are added + ** while no input file was read. Which means it cannot be determined at + ** that point if they're out-of-range or not. + */ + Collection Labels = AUTO_COLLECTION_INITIALIZER; + CollGrow (&Labels, 128); - /* Low range */ - Addr = 0; - while (Addr < CodeStart) { - DefOutOfRangeLabel (Addr++); - } - - /* Skip areas in code range */ - while (Addr <= CodeEnd) { - if (GetStyleAttr (Addr) == atSkip) { - DefOutOfRangeLabel (Addr); + /* Walk over the hash and copy all out-of-range labels */ + for (I = 0; I < LABEL_HASH_SIZE; ++I) { + Label* L = LabelTab[I]; + while (L) { + if (L->Addr < CodeStart || L->Addr > CodeEnd) { + CollAppend (&Labels, L); + } + L = L->Next; } - ++Addr; } - /* High range */ - while (Addr < 0x10000) { - DefOutOfRangeLabel (Addr++); - } - - /* 65816 long range */ - for (i = 0; i < LongLabelsUsed; i++) { - DefOutOfRangeLabel (LongSymAddr[i]); - } + /* Sort the out-of-range labels by address */ + CollSort (&Labels, CompareLabels, 0); + /* Output the labels */ SeparatorLine (); + for (I = 0; I < CollCount (&Labels); ++I) { + DefOutOfRangeLabel (CollConstAt (&Labels, I)); + } + SeparatorLine (); + + /* Free allocated storage */ + DoneCollection (&Labels); +} + + + +unsigned long GetLabelCount (void) +/* Return the total number of labels defined so far */ +{ + return LabelCount; } diff --git a/src/da65/labels.h b/src/da65/labels.h index c4b52774a..923a4bd43 100644 --- a/src/da65/labels.h +++ b/src/da65/labels.h @@ -38,6 +38,9 @@ +#include <stdint.h> + +/* da65 */ #include "attrtab.h" @@ -48,42 +51,42 @@ -void AddIntLabel (unsigned Addr); +void AddIntLabel (uint32_t Addr); /* Add an internal label using the address to generate the name. */ -void AddExtLabel (unsigned Addr, const char* Name); +void AddExtLabel (uint32_t Addr, const char* Name); /* Add an external label */ -void AddUnnamedLabel (unsigned Addr); +void AddUnnamedLabel (uint32_t Addr); /* Add an unnamed label */ -void AddDepLabel (unsigned Addr, attr_t Attr, const char* BaseName, unsigned Offs); +void AddDepLabel (uint32_t Addr, attr_t Attr, const char* BaseName, unsigned Offs); /* Add a dependent label at the given address using "base name+Offs" as the new ** name. */ -void AddIntLabelRange (unsigned Addr, const char* Name, unsigned Count); +void AddIntLabelRange (uint32_t Addr, const char* Name, unsigned Count); /* Add an internal label for a range. The first entry gets the label "Name" ** while the others get "Name+offs". */ -void AddExtLabelRange (unsigned Addr, const char* Name, unsigned Count); +void AddExtLabelRange (uint32_t Addr, const char* Name, unsigned Count); /* Add an external label for a range. The first entry gets the label "Name" ** while the others get "Name+offs". */ -int HaveLabel (unsigned Addr); +int HaveLabel (uint32_t Addr); /* Check if there is a label for the given address */ -int MustDefLabel (unsigned Addr); +int MustDefLabel (uint32_t Addr); /* Return true if we must define a label for this address, that is, if there ** is a label at this address, and it is an external or internal label. */ -const char* GetLabelName (unsigned Addr); +const char* GetLabelName (uint32_t Addr); /* Return the label name for an address */ -const char* GetLabel (unsigned Addr, unsigned RefFrom); +const char* GetLabel (uint32_t Addr, uint32_t RefFrom); /* Return the label name for an address, as it is used in a label reference. ** RefFrom is the address the label is referenced from. This is needed in case ** of unnamed labels, to determine the name. @@ -97,6 +100,9 @@ void ForwardLabel (unsigned Offs); void DefOutOfRangeLabels (void); /* Output any labels that are out of the loaded code range */ +unsigned long GetLabelCount (void); +/* Return the total number of labels defined so far */ + /* End of labels.h */ diff --git a/src/da65/main.c b/src/da65/main.c index 67a01dc3b..03dbcaccf 100644 --- a/src/da65/main.c +++ b/src/da65/main.c @@ -42,8 +42,10 @@ /* common */ #include "abend.h" +#include "check.h" #include "cmdline.h" #include "cpu.h" +#include "debugflag.h" #include "fname.h" #include "print.h" #include "version.h" @@ -59,6 +61,7 @@ #include "infofile.h" #include "labels.h" #include "opctable.h" +#include "opc45GS02.h" #include "output.h" #include "scanner.h" #include "segment.h" @@ -78,9 +81,11 @@ static void Usage (void) { printf ("Usage: %s [options] [inputfile]\n" "Short options:\n" + " -d\t\t\tDebug mode\n" " -g\t\t\tAdd debug info to object file\n" " -h\t\t\tHelp (this text)\n" " -i name\t\tSpecify an info file\n" + " -m\t\t\tRun multiple passes to resolve labels\n" " -o name\t\tName the output file\n" " -v\t\t\tIncrease verbosity\n" " -F\t\t\tAdd formfeeds to the output\n" @@ -93,6 +98,7 @@ static void Usage (void) " --comment-column n\tSpecify comment start column\n" " --comments n\t\tSet the comment level for the output\n" " --cpu type\t\tSet cpu type\n" + " --debug\t\tDebug mode\n" " --debug-info\t\tAdd debug info to object file\n" " --formfeeds\t\tAdd formfeeds to the output\n" " --help\t\tHelp (this text)\n" @@ -100,6 +106,7 @@ static void Usage (void) " --info name\t\tSpecify an info file\n" " --label-break n\tAdd newline if label exceeds length n\n" " --mnemonic-column n\tSpecify mnemonic start column\n" + " --multi-pass\t\tRun multiple passes to resolve labels\n" " --pagelength n\tSet the page length for the listing\n" " --start-addr addr\tSet the start/load address\n" " --sync-lines\t\tAccept line markers in the info file\n" @@ -222,6 +229,15 @@ static void OptCPU (const char* Opt attribute ((unused)), const char* Arg) +static void OptDebug (const char* Opt attribute ((unused)), + const char* Arg attribute ((unused))) +/* Disassembler debug mode */ +{ + ++Debug; +} + + + static void OptDebugInfo (const char* Opt attribute ((unused)), const char* Arg attribute ((unused))) /* Add debug info to the object file */ @@ -297,6 +313,15 @@ static void OptMnemonicColumn (const char* Opt, const char* Arg) +static void OptMultiPass (const char* Opt attribute ((unused)), + const char* Arg attribute ((unused))) +/* Handle the --multi-pass option */ +{ + MultiPass = 1; +} + + + static void OptPageLength (const char* Opt attribute ((unused)), const char* Arg) /* Handle the --pagelength option */ { @@ -312,7 +337,8 @@ static void OptPageLength (const char* Opt attribute ((unused)), const char* Arg static void OptStartAddr (const char* Opt, const char* Arg) /* Set the default start address */ { - StartAddr = CvtNumber (Opt, Arg); + StartAddr = (uint32_t) CvtNumber (Opt, Arg); + HaveStartAddr = 1; } @@ -355,7 +381,52 @@ static void OptVersion (const char* Opt attribute ((unused)), /* Print the disassembler version */ { fprintf (stderr, "%s V%s\n", ProgName, GetVersionAsString ()); - exit(EXIT_SUCCESS); + exit (EXIT_SUCCESS); +} + + + +static unsigned HandleChangedLength(const OpcDesc* D, unsigned PC) +/* Instructions that have flSizeChanges set may use a different size than what +** the table says. This function adjusts the PC accordingly, so after this only +** the size from the table needs to be added to make up for the correct value +*/ +{ + if (D->Flags & flSizeChanges) { + if (CPU == CPU_45GS02) { + if (D->Handler == OH_Implicit_42_45GS02) { + if (GetCodeByte (PC+1) == 0x42) { + /* NEG:NEG prefix (0x42 0x42) */ + unsigned opc = GetCodeByte (PC+2); + if (opc == 0xea) { + /* 42 42 ea */ + if ((GetCodeByte (PC+3) & 0x1f) == 0x12) { + PC += 4; + } + } else { + /* 42 42 xx */ + const OpcDesc* ED = &OpcTable_45GS02_extended[opc]; + if (ED->Handler != OH_Illegal) { + PC += (ED->Size - 1); + } + } + } + } else if (D->Handler == OH_Implicit_ea_45GS02) { + /* NOP prefix (0xea) */ + if ((GetCodeByte (PC+1) & 0x1f) == 0x12) { + PC += 2; + } + } + } else if (CPU == CPU_65816) { + if ((D->Handler == OH_Immediate65816M && + GetAttr (PC) & atMem16) || + (D->Handler == OH_Immediate65816X && + GetAttr (PC) & atIdx16)) { + PC++; + } + } + } + return PC; } @@ -363,11 +434,11 @@ static void OptVersion (const char* Opt attribute ((unused)), static void OneOpcode (unsigned RemainingBytes) /* Disassemble one opcode */ { - unsigned I; - unsigned OldPC = PC; + uint32_t I; + uint32_t OldPC = PC; /* Get the opcode from the current address */ - unsigned char OPC = GetCodeByte (PC); + uint8_t OPC = GetCodeByte (PC); /* Get the opcode description for the opcode byte */ const OpcDesc* D = &OpcTable[OPC]; @@ -435,6 +506,7 @@ static void OneOpcode (unsigned RemainingBytes) ++PC; } else { D->Handler (D); + PC = HandleChangedLength (D, PC); PC += D->Size; } break; @@ -449,11 +521,11 @@ static void OneOpcode (unsigned RemainingBytes) if (PrevAddrMode != AddrMode) { if ((PrevAddrMode & atMem8) != (AddrMode & atMem8) || (PrevAddrMode & atMem16) != (AddrMode & atMem16)) { - OutputMFlag(!!(AddrMode & atMem8)); + OutputMFlag (!!(AddrMode & atMem8)); } if ((PrevAddrMode & atIdx8) != (AddrMode & atIdx8) || (PrevAddrMode & atIdx16) != (AddrMode & atIdx16)) { - OutputXFlag(!!(AddrMode & atIdx8)); + OutputXFlag (!!(AddrMode & atIdx8)); } PrevAddrMode = AddrMode; @@ -466,14 +538,8 @@ static void OneOpcode (unsigned RemainingBytes) } /* Output the insn */ D->Handler (D); - if (CPU == CPU_65816 && (D->Flags & flSizeChanges)) { - if ((D->Handler == OH_Immediate65816M && - GetAttr (PC) & atMem16) || - (D->Handler == OH_Immediate65816X && - GetAttr (PC) & atIdx16)) { - PC++; - } - } + + PC = HandleChangedLength (D, PC); PC += D->Size; break; } @@ -533,12 +599,12 @@ static void OneOpcode (unsigned RemainingBytes) static void OnePass (void) /* Make one pass through the code */ { - unsigned Count; + uint32_t Count; PrevAddrMode = 0; /* Disassemble until nothing left */ - while ((Count = GetRemainingBytes()) > 0) { + while ((Count = GetRemainingBytes ()) > 0) { OneOpcode (Count); } } @@ -548,15 +614,37 @@ static void OnePass (void) static void Disassemble (void) /* Disassemble the code */ { - /* Pass 1 */ - Pass = 1; + /* Preparation pass */ + Pass = PASS_PREP; OnePass (); + /* If the --multi-pass option is given, repeat this pass until we have no + ** new labels. + */ + if (MultiPass) { + unsigned long LabelCount = GetLabelCount (); + unsigned Passes = 1; + while (1) { + unsigned long NewLabelCount; + ResetCode (); + OnePass (); + CHECK(++Passes <= 4096); /* Safety measure */ + NewLabelCount = GetLabelCount (); + if (NewLabelCount <= LabelCount) { + break; + } + LabelCount = NewLabelCount; + } + if (Debug) { + printf ("Run %u preparation passes to resolve labels\n", Passes); + } + } + Output ("---------------------------"); LineFeed (); - /* Pass 2 */ - Pass = 2; + /* Final pass */ + Pass = PASS_FINAL; ResetCode (); OutputSettings (); DefOutOfRangeLabels (); @@ -575,6 +663,7 @@ int main (int argc, char* argv []) { "--comment-column", 1, OptCommentColumn }, { "--comments", 1, OptComments }, { "--cpu", 1, OptCPU }, + { "--debug", 0, OptDebug }, { "--debug-info", 0, OptDebugInfo }, { "--formfeeds", 0, OptFormFeeds }, { "--help", 0, OptHelp }, @@ -582,6 +671,7 @@ int main (int argc, char* argv []) { "--info", 1, OptInfo }, { "--label-break", 1, OptLabelBreak }, { "--mnemonic-column", 1, OptMnemonicColumn }, + { "--multi-pass", 0, OptMultiPass }, { "--pagelength", 1, OptPageLength }, { "--start-addr", 1, OptStartAddr }, { "--sync-lines", 0, OptSyncLines }, @@ -611,6 +701,14 @@ int main (int argc, char* argv []) LongOption (&I, OptTab, sizeof(OptTab)/sizeof(OptTab[0])); break; + case 'd': + if (Arg[2] == '\0') { + OptDebug (Arg, 0); + } else { + UnknownOption (Arg); + } + break; + case 'g': OptDebugInfo (Arg, 0); break; @@ -623,6 +721,10 @@ int main (int argc, char* argv []) OptInfo (Arg, GetArg (&I, 2)); break; + case 'm': + OptMultiPass (Arg, 0); + break; + case 'o': OutFile = GetArg (&I, 2); break; diff --git a/src/da65/opc45GS02.c b/src/da65/opc45GS02.c new file mode 100644 index 000000000..21650f53d --- /dev/null +++ b/src/da65/opc45GS02.c @@ -0,0 +1,565 @@ +/*****************************************************************************/ +/* */ +/* opc45GS02.c */ +/* */ +/* 45GS10 opcode description table */ +/* */ +/* */ +/* */ +/* (C) 2003-2011, Ullrich von Bassewitz */ +/* Roemerstrasse 52 */ +/* D-70794 Filderstadt */ +/* EMail: uz@cc65.org */ +/* */ +/* */ +/* This software is provided 'as-is', without any expressed or implied */ +/* warranty. In no event will the authors be held liable for any damages */ +/* arising from the use of this software. */ +/* */ +/* Permission is granted to anyone to use this software for any purpose, */ +/* including commercial applications, and to alter it and redistribute it */ +/* freely, subject to the following restrictions: */ +/* */ +/* 1. The origin of this software must not be misrepresented; you must not */ +/* claim that you wrote the original software. If you use this software */ +/* in a product, an acknowledgment in the product documentation would be */ +/* appreciated but is not required. */ +/* 2. Altered source versions must be plainly marked as such, and must not */ +/* be misrepresented as being the original software. */ +/* 3. This notice may not be removed or altered from any source */ +/* distribution. */ +/* */ +/*****************************************************************************/ + + + +/* da65 */ +#include "handler.h" +#include "opc45GS02.h" + + + +/*****************************************************************************/ +/* Data */ +/*****************************************************************************/ + + + +/* Descriptions for all compound instructions with NEG:NEG prefix (0x42 0x42) */ +const OpcDesc OpcTable_45GS02_extended[256] = { + { "", 1+2, flIllegal, OH_Illegal, }, /* $00 */ + { "", 1+2, flIllegal, OH_Illegal, }, /* $01 */ + { "", 1+2, flIllegal, OH_Illegal, }, /* $02 */ + { "", 1+2, flIllegal, OH_Illegal, }, /* $03 */ + { "", 1+2, flIllegal, OH_Illegal, }, /* $04 */ + { "orq", 2+2, flUseLabel, OH_Direct_Q }, /* $05 */ + { "aslq", 2+2, flUseLabel, OH_Direct_Q }, /* $06 */ + { "", 1+2, flIllegal, OH_Illegal, }, /* $07 */ + { "", 1+2, flIllegal, OH_Illegal, }, /* $08 */ + { "", 1+2, flIllegal, OH_Illegal, }, /* $09 */ + { "aslq", 1+2, flNone, OH_Accumulator }, /* $0a */ + { "", 1+2, flIllegal, OH_Illegal, }, /* $0b */ + { "", 1+2, flIllegal, OH_Illegal, }, /* $0c */ + { "orq", 3+2, flUseLabel|flAbsOverride, OH_Absolute_Q }, /* $0d */ + { "aslq", 3+2, flUseLabel, OH_Absolute_Q }, /* $0e */ + { "", 1+2, flIllegal, OH_Illegal, }, /* $0f */ + { "", 1+2, flIllegal, OH_Illegal, }, /* $10 */ + { "", 1+2, flIllegal, OH_Illegal, }, /* $11 */ + { "orq", 2+2, flUseLabel, OH_DirectIndirectZ_Q }, /* $12 */ + { "", 1+2, flIllegal, OH_Illegal, }, /* $13 */ + { "", 1+2, flIllegal, OH_Illegal, }, /* $14 */ + { "", 1+2, flIllegal, OH_Illegal, }, /* $15 */ + { "aslq", 2+2, flUseLabel, OH_DirectX_Q }, /* $16 */ + { "", 1+2, flIllegal, OH_Illegal, }, /* $17 */ + { "", 1+2, flIllegal, OH_Illegal, }, /* $18 */ + { "", 1+2, flIllegal, OH_Illegal, }, /* $19 */ + { "inq", 1+2, flNone, OH_Accumulator }, /* $1a */ + { "", 1+2, flIllegal, OH_Illegal, }, /* $1b */ + { "", 1+2, flIllegal, OH_Illegal, }, /* $1c */ + { "", 1+2, flIllegal, OH_Illegal, }, /* $1d */ + { "aslq", 3+2, flUseLabel|flAbsOverride, OH_AbsoluteX_Q }, /* $1e */ + { "", 1+2, flIllegal, OH_Illegal, }, /* $1f */ + { "", 1+2, flIllegal, OH_Illegal, }, /* $20 */ + { "", 1+2, flIllegal, OH_Illegal, }, /* $21 */ + { "", 1+2, flIllegal, OH_Illegal, }, /* $22 */ + { "", 1+2, flIllegal, OH_Illegal, }, /* $23 */ + { "bitq", 2+2, flUseLabel, OH_Direct_Q }, /* $24 */ + { "andq", 2+2, flUseLabel, OH_Direct_Q }, /* $25 */ + { "rolq", 2+2, flUseLabel, OH_Direct_Q }, /* $26 */ + { "", 1+2, flIllegal, OH_Illegal, }, /* $27 */ + { "", 1+2, flIllegal, OH_Illegal, }, /* $28 */ + { "", 1+2, flIllegal, OH_Illegal, }, /* $29 */ + { "rolq", 1+2, flNone, OH_Accumulator }, /* $2a */ + { "", 1+2, flIllegal, OH_Illegal, }, /* $2b */ + { "bitq", 3+2, flUseLabel|flAbsOverride, OH_Absolute_Q }, /* $2c */ + { "andq", 3+2, flUseLabel|flAbsOverride, OH_Absolute_Q }, /* $2d */ + { "rolq", 3+2, flUseLabel|flAbsOverride, OH_Absolute_Q }, /* $2e */ + { "", 1+2, flIllegal, OH_Illegal, }, /* $2f */ + { "", 1+2, flIllegal, OH_Illegal, }, /* $30 */ + { "", 1+2, flIllegal, OH_Illegal, }, /* $31 */ + { "andq", 2+2, flUseLabel, OH_DirectIndirectZ_Q }, /* $32 */ + { "", 1+2, flIllegal, OH_Illegal, }, /* $33 */ + { "", 1+2, flIllegal, OH_Illegal, }, /* $34 */ + { "", 1+2, flIllegal, OH_Illegal, }, /* $35 */ + { "rolq", 2+2, flUseLabel, OH_DirectX_Q }, /* $36 */ + { "", 1+2, flIllegal, OH_Illegal, }, /* $37 */ + { "", 1+2, flIllegal, OH_Illegal, }, /* $38 */ + { "", 1+2, flIllegal, OH_Illegal, }, /* $39 */ + { "deq", 1+2, flNone, OH_Accumulator }, /* $3a */ + { "", 1+2, flIllegal, OH_Illegal, }, /* $3b */ + { "", 1+2, flIllegal, OH_Illegal, }, /* $3c */ + { "", 1+2, flIllegal, OH_Illegal, }, /* $3d */ + { "rolq", 3+2, flUseLabel|flAbsOverride, OH_AbsoluteX_Q }, /* $3e */ + { "", 1+2, flIllegal, OH_Illegal, }, /* $3f */ + { "", 1+2, flIllegal, OH_Illegal, }, /* $40 */ + { "", 1+2, flIllegal, OH_Illegal, }, /* $41 */ + { "", 1+2, flIllegal, OH_Illegal, }, /* $42 */ + { "asrq", 1+2, flNone, OH_Accumulator }, /* $43 */ + { "asrq", 2+2, flUseLabel, OH_Direct_Q }, /* $44 */ + { "eorq", 2+2, flUseLabel, OH_Direct_Q }, /* $45 */ + { "lsrq", 2+2, flUseLabel, OH_Direct_Q }, /* $46 */ + { "", 1+2, flIllegal, OH_Illegal, }, /* $47 */ + { "", 1+2, flIllegal, OH_Illegal, }, /* $48 */ + { "", 1+2, flIllegal, OH_Illegal, }, /* $49 */ + { "lsrq", 1+2, flNone, OH_Accumulator }, /* $4a */ + { "", 1+2, flIllegal, OH_Illegal, }, /* $4b */ + { "", 1+2, flIllegal, OH_Illegal, }, /* $4c */ + { "eorq", 3+2, flUseLabel|flAbsOverride, OH_Absolute_Q }, /* $4d */ + { "lsrq", 3+2, flUseLabel|flAbsOverride, OH_Absolute_Q }, /* $4e */ + { "", 1+2, flIllegal, OH_Illegal, }, /* $4f */ + { "", 1+2, flIllegal, OH_Illegal, }, /* $50 */ + { "", 1+2, flIllegal, OH_Illegal, }, /* $51 */ + { "eorq", 2+2, flUseLabel, OH_DirectIndirectZ_Q }, /* $52 */ + { "", 1+2, flIllegal, OH_Illegal, }, /* $53 */ + { "asrq", 2+2, flUseLabel, OH_DirectX_Q }, /* $54 */ + { "", 1+2, flIllegal, OH_Illegal, }, /* $55 */ + { "lsrq", 2+2, flUseLabel, OH_DirectX_Q }, /* $56 */ + { "", 1+2, flIllegal, OH_Illegal, }, /* $57 */ + { "", 1+2, flIllegal, OH_Illegal, }, /* $58 */ + { "", 1+2, flIllegal, OH_Illegal, }, /* $59 */ + { "", 1+2, flIllegal, OH_Illegal, }, /* $5a */ + { "", 1+2, flIllegal, OH_Illegal, }, /* $5b */ + { "", 1+2, flIllegal, OH_Illegal, }, /* $5c */ + { "", 1+2, flIllegal, OH_Illegal, }, /* $5d */ + { "lsrq", 3+2, flUseLabel|flAbsOverride, OH_AbsoluteX_Q }, /* $5e */ + { "", 1+2, flIllegal, OH_Illegal, }, /* $5f */ + { "", 1+2, flIllegal, OH_Illegal, }, /* $60 */ + { "", 1+2, flIllegal, OH_Illegal, }, /* $61 */ + { "", 1+2, flIllegal, OH_Illegal, }, /* $62 */ + { "", 1+2, flIllegal, OH_Illegal, }, /* $63 */ + { "", 1+2, flIllegal, OH_Illegal, }, /* $64 */ + { "adcq", 2+2, flUseLabel, OH_Direct_Q }, /* $65 */ + { "rorq", 2+2, flUseLabel, OH_Direct_Q }, /* $66 */ + { "", 1+2, flIllegal, OH_Illegal, }, /* $67 */ + { "", 1+2, flIllegal, OH_Illegal, }, /* $68 */ + { "", 1+2, flIllegal, OH_Illegal, }, /* $69 */ + { "rorq", 1+2, flNone, OH_Accumulator }, /* $6a */ + { "", 1+2, flIllegal, OH_Illegal, }, /* $6b */ + { "", 1+2, flIllegal, OH_Illegal, }, /* $6c */ + { "adcq", 3+2, flUseLabel|flAbsOverride, OH_Absolute_Q }, /* $6d */ + { "rorq", 3+2, flUseLabel, OH_Absolute_Q }, /* $6e */ + { "", 1+2, flIllegal, OH_Illegal, }, /* $6f */ + { "", 1+2, flIllegal, OH_Illegal, }, /* $70 */ + { "", 1+2, flIllegal, OH_Illegal, }, /* $71 */ + { "adcq", 2+2, flUseLabel, OH_DirectIndirectZ_Q }, /* $72 */ + { "", 1+2, flIllegal, OH_Illegal, }, /* $73 */ + { "", 1+2, flIllegal, OH_Illegal, }, /* $74 */ + { "", 1+2, flIllegal, OH_Illegal, }, /* $75 */ + { "rorq", 2+2, flUseLabel, OH_DirectX_Q }, /* $76 */ + { "", 1+2, flIllegal, OH_Illegal, }, /* $77 */ + { "", 1+2, flIllegal, OH_Illegal, }, /* $78 */ + { "", 1+2, flIllegal, OH_Illegal, }, /* $79 */ + { "", 1+2, flIllegal, OH_Illegal, }, /* $7a */ + { "", 1+2, flIllegal, OH_Illegal, }, /* $7b */ + { "", 1+2, flIllegal, OH_Illegal, }, /* $7c */ + { "", 1+2, flIllegal, OH_Illegal, }, /* $7d */ + { "rorq", 3+2, flUseLabel|flAbsOverride, OH_AbsoluteX_Q }, /* $7e */ + { "", 1+2, flIllegal, OH_Illegal, }, /* $7f */ + { "", 1+2, flIllegal, OH_Illegal, }, /* $80 */ + { "", 1+2, flIllegal, OH_Illegal, }, /* $81 */ + { "", 1+2, flIllegal, OH_Illegal, }, /* $82 */ + { "", 1+2, flIllegal, OH_Illegal, }, /* $83 */ + { "", 1+2, flIllegal, OH_Illegal, }, /* $84 */ + { "stq", 2+2, flUseLabel, OH_Direct_Q }, /* $85 */ + { "", 1+2, flIllegal, OH_Illegal, }, /* $86 */ + { "", 1+2, flIllegal, OH_Illegal, }, /* $87 */ + { "", 1+2, flIllegal, OH_Illegal, }, /* $88 */ + { "", 1+2, flIllegal, OH_Illegal, }, /* $89 */ + { "", 1+2, flIllegal, OH_Illegal, }, /* $8a */ + { "", 1+2, flIllegal, OH_Illegal, }, /* $8b */ + { "", 1+2, flIllegal, OH_Illegal, }, /* $8c */ + { "stq", 3+2, flUseLabel|flAbsOverride, OH_Absolute_Q }, /* $8d */ + { "", 1+2, flIllegal, OH_Illegal, }, /* $8e */ + { "", 1+2, flIllegal, OH_Illegal, }, /* $8f */ + { "", 1+2, flIllegal, OH_Illegal, }, /* $90 */ + { "", 1+2, flIllegal, OH_Illegal, }, /* $91 */ + { "stq", 2+2, flUseLabel, OH_DirectIndirectZ_Q }, /* $92 */ + { "", 1+2, flIllegal, OH_Illegal, }, /* $93 */ + { "", 1+2, flIllegal, OH_Illegal, }, /* $94 */ + { "", 1+2, flIllegal, OH_Illegal, }, /* $95 */ + { "", 1+2, flIllegal, OH_Illegal, }, /* $96 */ + { "", 1+2, flIllegal, OH_Illegal, }, /* $97 */ + { "", 1+2, flIllegal, OH_Illegal, }, /* $98 */ + { "", 1+2, flIllegal, OH_Illegal, }, /* $99 */ + { "", 1+2, flIllegal, OH_Illegal, }, /* $9a */ + { "", 1+2, flIllegal, OH_Illegal, }, /* $9b */ + { "", 1+2, flIllegal, OH_Illegal, }, /* $9c */ + { "", 1+2, flIllegal, OH_Illegal, }, /* $9d */ + { "", 1+2, flIllegal, OH_Illegal, }, /* $9e */ + { "", 1+2, flIllegal, OH_Illegal, }, /* $9f */ + { "", 1+2, flIllegal, OH_Illegal, }, /* $a0 */ + { "", 1+2, flIllegal, OH_Illegal, }, /* $a1 */ + { "", 1+2, flIllegal, OH_Illegal, }, /* $a2 */ + { "", 1+2, flIllegal, OH_Illegal, }, /* $a3 */ + { "", 1+2, flIllegal, OH_Illegal, }, /* $a4 */ + { "ldq", 2+2, flUseLabel, OH_Direct_Q }, /* $a5 */ + { "", 1+2, flIllegal, OH_Illegal, }, /* $a6 */ + { "", 1+2, flIllegal, OH_Illegal, }, /* $a7 */ + { "", 1+2, flIllegal, OH_Illegal, }, /* $a8 */ + { "", 1+2, flIllegal, OH_Illegal, }, /* $a9 */ + { "", 1+2, flIllegal, OH_Illegal, }, /* $aa */ + { "", 1+2, flIllegal, OH_Illegal, }, /* $ab */ + { "", 1+2, flIllegal, OH_Illegal, }, /* $ac */ + { "ldq", 3+2, flUseLabel|flAbsOverride, OH_Absolute_Q }, /* $ad */ + { "", 1+2, flIllegal, OH_Illegal, }, /* $ae */ + { "", 1+2, flIllegal, OH_Illegal, }, /* $af */ + { "", 1+2, flIllegal, OH_Illegal, }, /* $b0 */ + { "", 1+2, flIllegal, OH_Illegal, }, /* $b1 */ + { "ldq", 2+2, flUseLabel, OH_DirectIndirectZ_Q }, /* $b2 */ + { "", 1+2, flIllegal, OH_Illegal, }, /* $b3 */ + { "", 1+2, flIllegal, OH_Illegal, }, /* $b4 */ + { "", 1+2, flIllegal, OH_Illegal, }, /* $b5 */ + { "", 1+2, flIllegal, OH_Illegal, }, /* $b6 */ + { "", 1+2, flIllegal, OH_Illegal, }, /* $b7 */ + { "", 1+2, flIllegal, OH_Illegal, }, /* $b8 */ + { "", 1+2, flIllegal, OH_Illegal, }, /* $b9 */ + { "", 1+2, flIllegal, OH_Illegal, }, /* $ba */ + { "", 1+2, flIllegal, OH_Illegal, }, /* $bb */ + { "", 1+2, flIllegal, OH_Illegal, }, /* $bc */ + { "", 1+2, flIllegal, OH_Illegal, }, /* $bd */ + { "", 1+2, flIllegal, OH_Illegal, }, /* $be */ + { "", 1+2, flIllegal, OH_Illegal, }, /* $bf */ + { "", 1+2, flIllegal, OH_Illegal, }, /* $c0 */ + { "", 1+2, flIllegal, OH_Illegal, }, /* $c1 */ + { "", 1+2, flIllegal, OH_Illegal, }, /* $c2 */ + { "", 1+2, flIllegal, OH_Illegal, }, /* $c3 */ + { "", 1+2, flIllegal, OH_Illegal, }, /* $c4 */ + { "cmpq", 2+2, flUseLabel, OH_Direct_Q }, /* $c5 */ + { "deq", 2+2, flUseLabel, OH_Direct_Q }, /* $c6 */ + { "", 1+2, flIllegal, OH_Illegal, }, /* $c7 */ + { "", 1+2, flIllegal, OH_Illegal, }, /* $c8 */ + { "", 1+2, flIllegal, OH_Illegal, }, /* $c9 */ + { "", 1+2, flIllegal, OH_Illegal, }, /* $ca */ + { "", 1+2, flIllegal, OH_Illegal, }, /* $cb */ + { "", 1+2, flIllegal, OH_Illegal, }, /* $cc */ + { "cmpq", 3+2, flUseLabel|flAbsOverride, OH_Absolute_Q }, /* $cd */ + { "deq", 3+2, flUseLabel|flAbsOverride, OH_Absolute_Q }, /* $ce */ + { "", 1+2, flIllegal, OH_Illegal, }, /* $cf */ + { "", 1+2, flIllegal, OH_Illegal, }, /* $d0 */ + { "", 1+2, flIllegal, OH_Illegal, }, /* $d1 */ + { "cmpq", 2+2, flUseLabel, OH_DirectIndirectZ_Q }, /* $d2 */ + { "", 1+2, flIllegal, OH_Illegal, }, /* $d3 */ + { "", 1+2, flIllegal, OH_Illegal, }, /* $d4 */ + { "", 1+2, flIllegal, OH_Illegal, }, /* $d5 */ + { "deq", 2+2, flUseLabel, OH_DirectX_Q }, /* $d6 */ + { "", 1+2, flIllegal, OH_Illegal, }, /* $d7 */ + { "", 1+2, flIllegal, OH_Illegal, }, /* $d8 */ + { "", 1+2, flIllegal, OH_Illegal, }, /* $d9 */ + { "", 1+2, flIllegal, OH_Illegal, }, /* $da */ + { "", 1+2, flIllegal, OH_Illegal, }, /* $db */ + { "", 1+2, flIllegal, OH_Illegal, }, /* $dc */ + { "", 1+2, flIllegal, OH_Illegal, }, /* $dd */ + { "deq", 3+2, flUseLabel|flAbsOverride, OH_AbsoluteX_Q }, /* $de */ + { "", 1+2, flIllegal, OH_Illegal, }, /* $df */ + { "", 1+2, flIllegal, OH_Illegal, }, /* $e0 */ + { "", 1+2, flIllegal, OH_Illegal, }, /* $e1 */ + { "", 1+2, flIllegal, OH_Illegal, }, /* $e2 */ + { "", 1+2, flIllegal, OH_Illegal, }, /* $e3 */ + { "", 1+2, flIllegal, OH_Illegal, }, /* $e4 */ + { "sbcq", 2+2, flUseLabel, OH_Direct_Q }, /* $e5 */ + { "inq", 2+2, flUseLabel, OH_Direct_Q }, /* $e6 */ + { "", 1+2, flIllegal, OH_Illegal, }, /* $e7 */ + { "", 1+2, flIllegal, OH_Illegal, }, /* $e8 */ + { "", 1+2, flIllegal, OH_Illegal, }, /* $e9 */ + { "", 1+2, flIllegal, OH_Illegal, }, /* $ea */ + { "", 1+2, flIllegal, OH_Illegal, }, /* $eb */ + { "", 1+2, flIllegal, OH_Illegal, }, /* $ec */ + { "sbcq", 3+2, flUseLabel|flAbsOverride, OH_Absolute_Q }, /* $ed */ + { "inq", 3+2, flUseLabel|flAbsOverride, OH_Absolute_Q }, /* $ee */ + { "", 1+2, flIllegal, OH_Illegal, }, /* $ef */ + { "", 1+2, flIllegal, OH_Illegal, }, /* $f0 */ + { "", 1+2, flIllegal, OH_Illegal, }, /* $f1 */ + { "sbcq", 2+2, flUseLabel, OH_DirectIndirectZ_Q }, /* $f2 */ + { "", 1+2, flIllegal, OH_Illegal, }, /* $f3 */ + { "", 1+2, flIllegal, OH_Illegal, }, /* $f4 */ + { "", 1+2, flIllegal, OH_Illegal, }, /* $f5 */ + { "inq", 2+2, flUseLabel, OH_DirectX_Q }, /* $f6 */ + { "", 1+2, flIllegal, OH_Illegal, }, /* $f7 */ + { "", 1+2, flIllegal, OH_Illegal, }, /* $f8 */ + { "", 1+2, flIllegal, OH_Illegal, }, /* $f9 */ + { "", 1+2, flIllegal, OH_Illegal, }, /* $fa */ + { "", 1+2, flIllegal, OH_Illegal, }, /* $fb */ + { "", 1+2, flIllegal, OH_Illegal, }, /* $fc */ + { "", 1+2, flIllegal, OH_Illegal, }, /* $fd */ + { "inq", 3+2, flUseLabel|flAbsOverride, OH_AbsoluteX_Q }, /* $fe */ + { "", 1+2, flIllegal, OH_Illegal, }, /* $ff */ +}; + +const OpcDesc OpcTable_45GS02[256] = { + { "brk", 1, flNone, OH_Implicit }, /* $00 */ + { "ora", 2, flUseLabel, OH_DirectXIndirect }, /* $01 */ + { "cle", 1, flNone, OH_Implicit }, /* $02 */ + { "see", 1, flNone, OH_Implicit }, /* $03 */ + { "tsb", 2, flUseLabel, OH_Direct }, /* $04 */ + { "ora", 2, flUseLabel, OH_Direct }, /* $05 */ + { "asl", 2, flUseLabel, OH_Direct }, /* $06 */ + { "rmb0", 2, flUseLabel, OH_Direct }, /* $07 */ + { "php", 1, flNone, OH_Implicit }, /* $08 */ + { "ora", 2, flNone, OH_Immediate }, /* $09 */ + { "asl", 1, flNone, OH_Accumulator }, /* $0a */ + { "tsy", 1, flNone, OH_Implicit }, /* $0b */ + { "tsb", 3, flUseLabel|flAbsOverride, OH_Absolute }, /* $0c */ + { "ora", 3, flUseLabel|flAbsOverride, OH_Absolute }, /* $0d */ + { "asl", 3, flUseLabel|flAbsOverride, OH_Absolute }, /* $0e */ + { "bbr0", 3, flUseLabel, OH_BitBranch }, /* $0f */ + { "bpl", 2, flLabel, OH_Relative }, /* $10 */ + { "ora", 2, flUseLabel, OH_DirectIndirectY }, /* $11 */ + { "ora", 2, flUseLabel, OH_DirectIndirectZ }, /* $12 */ + { "lbpl", 3, flLabel, OH_RelativeLong4510 }, /* $13 */ + { "trb", 2, flUseLabel, OH_Direct }, /* $14 */ + { "ora", 2, flUseLabel, OH_DirectX }, /* $15 */ + { "asl", 2, flUseLabel, OH_DirectX }, /* $16 */ + { "rmb1", 2, flUseLabel, OH_Direct }, /* $17 */ + { "clc", 1, flNone, OH_Implicit }, /* $18 */ + { "ora", 3, flUseLabel, OH_AbsoluteY }, /* $19 */ + { "inc", 1, flNone, OH_Accumulator }, /* $1a */ + { "inz", 1, flNone, OH_Implicit }, /* $1b */ + { "trb", 3, flUseLabel|flAbsOverride, OH_Absolute }, /* $1c */ + { "ora", 3, flUseLabel|flAbsOverride, OH_AbsoluteX }, /* $1d */ + { "asl", 3, flUseLabel|flAbsOverride, OH_AbsoluteX }, /* $1e */ + { "bbr1", 3, flUseLabel, OH_BitBranch }, /* $1f */ + { "jsr", 3, flLabel, OH_Absolute }, /* $20 */ + { "and", 2, flUseLabel, OH_DirectXIndirect }, /* $21 */ + { "jsr", 3, flLabel, OH_JmpAbsoluteIndirect }, /* $22 */ + { "jsr", 3, flLabel, OH_JmpAbsoluteXIndirect }, /* $23 */ + { "bit", 2, flUseLabel, OH_Direct }, /* $24 */ + { "and", 2, flUseLabel, OH_Direct }, /* $25 */ + { "rol", 2, flUseLabel, OH_Direct }, /* $26 */ + { "rmb2", 2, flUseLabel, OH_Direct }, /* $27 */ + { "plp", 1, flNone, OH_Implicit }, /* $28 */ + { "and", 2, flNone, OH_Immediate }, /* $29 */ + { "rol", 1, flNone, OH_Accumulator }, /* $2a */ + { "tys", 1, flNone, OH_Implicit }, /* $2b */ + { "bit", 3, flUseLabel|flAbsOverride, OH_Absolute }, /* $2c */ + { "and", 3, flUseLabel|flAbsOverride, OH_Absolute }, /* $2d */ + { "rol", 3, flUseLabel|flAbsOverride, OH_Absolute }, /* $2e */ + { "bbr2", 3, flUseLabel, OH_BitBranch }, /* $2f */ + { "bmi", 2, flLabel, OH_Relative }, /* $30 */ + { "and", 2, flUseLabel, OH_DirectIndirectY }, /* $31 */ + { "and", 2, flUseLabel, OH_DirectIndirectZ }, /* $32 */ + { "lbmi", 3, flLabel, OH_RelativeLong4510 }, /* $33 */ + { "bit", 2, flUseLabel, OH_DirectX }, /* $34 */ + { "and", 2, flUseLabel, OH_DirectX }, /* $35 */ + { "rol", 2, flUseLabel, OH_DirectX }, /* $36 */ + { "rmb3", 2, flUseLabel, OH_Direct }, /* $37 */ + { "sec", 1, flNone, OH_Implicit }, /* $38 */ + { "and", 3, flUseLabel, OH_AbsoluteY }, /* $39 */ + { "dec", 1, flNone, OH_Accumulator }, /* $3a */ + { "dez", 1, flNone, OH_Implicit }, /* $3b */ + { "bit", 3, flUseLabel, OH_AbsoluteX }, /* $3c */ + { "and", 3, flUseLabel|flAbsOverride, OH_AbsoluteX }, /* $3d */ + { "rol", 3, flUseLabel|flAbsOverride, OH_AbsoluteX }, /* $3e */ + { "bbr3", 3, flUseLabel, OH_BitBranch }, /* $3f */ + { "rti", 1, flNone, OH_Rts }, /* $40 */ + { "eor", 2, flUseLabel, OH_DirectXIndirect }, /* $41 */ + { "neg", 1, flSizeChanges, OH_Implicit_42_45GS02 }, /* $42 */ + { "asr", 1, flNone, OH_Accumulator }, /* $43 */ + { "asr", 2, flUseLabel, OH_Direct }, /* $44 */ + { "eor", 2, flUseLabel, OH_Direct }, /* $45 */ + { "lsr", 2, flUseLabel, OH_Direct }, /* $46 */ + { "rmb4", 2, flUseLabel, OH_Direct }, /* $47 */ + { "pha", 1, flNone, OH_Implicit }, /* $48 */ + { "eor", 2, flNone, OH_Immediate }, /* $49 */ + { "lsr", 1, flNone, OH_Accumulator }, /* $4a */ + { "taz", 1, flNone, OH_Implicit }, /* $4b */ + { "jmp", 3, flLabel, OH_JmpAbsolute }, /* $4c */ + { "eor", 3, flUseLabel|flAbsOverride, OH_Absolute }, /* $4d */ + { "lsr", 3, flUseLabel|flAbsOverride, OH_Absolute }, /* $4e */ + { "bbr4", 3, flUseLabel, OH_BitBranch }, /* $4f */ + { "bvc", 2, flLabel, OH_Relative }, /* $50 */ + { "eor", 2, flUseLabel, OH_DirectIndirectY }, /* $51 */ + { "eor", 2, flUseLabel, OH_DirectIndirectZ }, /* $52 */ + { "lbvc", 3, flLabel, OH_RelativeLong4510 }, /* $53 */ + { "asr", 2, flUseLabel, OH_DirectX }, /* $54 */ + { "eor", 2, flUseLabel, OH_DirectX }, /* $55 */ + { "lsr", 2, flUseLabel, OH_DirectX }, /* $56 */ + { "rmb5", 2, flUseLabel, OH_Direct }, /* $57 */ + { "cli", 1, flNone, OH_Implicit }, /* $58 */ + { "eor", 3, flUseLabel, OH_AbsoluteY }, /* $59 */ + { "phy", 1, flNone, OH_Implicit }, /* $5a */ + { "tab", 1, flNone, OH_Implicit }, /* $5b */ + { "map", 1, flNone, OH_Implicit }, /* $5c */ + { "eor", 3, flUseLabel|flAbsOverride, OH_AbsoluteX }, /* $5d */ + { "lsr", 3, flUseLabel|flAbsOverride, OH_AbsoluteX }, /* $5e */ + { "bbr5", 3, flUseLabel, OH_BitBranch }, /* $5f */ + { "rts", 1, flNone, OH_Rts }, /* $60 */ + { "adc", 2, flUseLabel, OH_DirectXIndirect }, /* $61 */ + { "rtn", 2, flNone, OH_Immediate }, /* $62 */ + { "bsr", 3, flLabel, OH_RelativeLong4510 }, /* $63 */ + { "stz", 2, flUseLabel, OH_Direct }, /* $64 */ + { "adc", 2, flUseLabel, OH_Direct }, /* $65 */ + { "ror", 2, flUseLabel, OH_Direct }, /* $66 */ + { "rmb6", 2, flUseLabel, OH_Direct, }, /* $67 */ + { "pla", 1, flNone, OH_Implicit }, /* $68 */ + { "adc", 2, flNone, OH_Immediate }, /* $69 */ + { "ror", 1, flNone, OH_Accumulator }, /* $6a */ + { "tza", 1, flNone, OH_Implicit }, /* $6b */ + { "jmp", 3, flLabel, OH_JmpAbsoluteIndirect }, /* $6c */ + { "adc", 3, flUseLabel|flAbsOverride, OH_Absolute }, /* $6d */ + { "ror", 3, flUseLabel, OH_Absolute }, /* $6e */ + { "bbr6", 3, flUseLabel, OH_BitBranch }, /* $6f */ + { "bvs", 2, flLabel, OH_Relative }, /* $70 */ + { "adc", 2, flUseLabel, OH_DirectIndirectY }, /* $71 */ + { "adc", 2, flUseLabel, OH_DirectIndirectZ }, /* $72 */ + { "lbvs", 3, flLabel, OH_RelativeLong4510 }, /* $73 */ + { "stz", 2, flUseLabel, OH_DirectX }, /* $74 */ + { "adc", 2, flUseLabel, OH_DirectX }, /* $75 */ + { "ror", 2, flUseLabel, OH_DirectX }, /* $76 */ + { "rmb7", 2, flUseLabel, OH_Direct }, /* $77 */ + { "sei", 1, flNone, OH_Implicit }, /* $78 */ + { "adc", 3, flUseLabel, OH_AbsoluteY }, /* $79 */ + { "ply", 1, flNone, OH_Implicit }, /* $7a */ + { "tba", 1, flNone, OH_Implicit }, /* $7b */ + { "jmp", 3, flLabel, OH_AbsoluteXIndirect }, /* $7c */ + { "adc", 3, flUseLabel|flAbsOverride, OH_AbsoluteX }, /* $7d */ + { "ror", 3, flUseLabel|flAbsOverride, OH_AbsoluteX }, /* $7e */ + { "bbr7", 3, flUseLabel, OH_BitBranch }, /* $7f */ + { "bra", 2, flLabel, OH_Relative }, /* $80 */ + { "sta", 2, flUseLabel, OH_DirectXIndirect }, /* $81 */ + { "sta", 2, flNone, OH_StackRelativeIndirectY4510}, /* $82 */ + { "lbra", 3, flLabel, OH_RelativeLong4510 }, /* $83 */ + { "sty", 2, flUseLabel, OH_Direct }, /* $84 */ + { "sta", 2, flUseLabel, OH_Direct }, /* $85 */ + { "stx", 2, flUseLabel, OH_Direct }, /* $86 */ + { "smb0", 2, flUseLabel, OH_Direct }, /* $87 */ + { "dey", 1, flNone, OH_Implicit }, /* $88 */ + { "bit", 2, flNone, OH_Immediate }, /* $89 */ + { "txa", 1, flNone, OH_Implicit }, /* $8a */ + { "sty", 3, flUseLabel|flAbsOverride, OH_AbsoluteX }, /* $8b */ + { "sty", 3, flUseLabel|flAbsOverride, OH_Absolute }, /* $8c */ + { "sta", 3, flUseLabel|flAbsOverride, OH_Absolute }, /* $8d */ + { "stx", 3, flUseLabel|flAbsOverride, OH_Absolute }, /* $8e */ + { "bbs0", 3, flUseLabel, OH_BitBranch }, /* $8f */ + { "bcc", 2, flLabel, OH_Relative }, /* $90 */ + { "sta", 2, flUseLabel, OH_DirectIndirectY }, /* $91 */ + { "sta", 2, flUseLabel, OH_DirectIndirectZ }, /* $92 */ + { "lbcc", 3, flLabel, OH_RelativeLong4510 }, /* $93 */ + { "sty", 2, flUseLabel, OH_DirectX }, /* $94 */ + { "sta", 2, flUseLabel, OH_DirectX }, /* $95 */ + { "stx", 2, flUseLabel, OH_DirectY }, /* $96 */ + { "smb1", 2, flUseLabel, OH_Direct }, /* $97 */ + { "tya", 1, flNone, OH_Implicit }, /* $98 */ + { "sta", 3, flUseLabel, OH_AbsoluteY }, /* $99 */ + { "txs", 1, flNone, OH_Implicit }, /* $9a */ + { "stx", 3, flUseLabel|flAbsOverride, OH_AbsoluteY }, /* $9b */ + { "stz", 3, flUseLabel|flAbsOverride, OH_Absolute }, /* $9c */ + { "sta", 3, flUseLabel|flAbsOverride, OH_AbsoluteX }, /* $9d */ + { "stz", 3, flUseLabel|flAbsOverride, OH_AbsoluteX }, /* $9e */ + { "bbs1", 3, flUseLabel, OH_BitBranch }, /* $9f */ + { "ldy", 2, flNone, OH_Immediate }, /* $a0 */ + { "lda", 2, flUseLabel, OH_DirectXIndirect }, /* $a1 */ + { "ldx", 2, flNone, OH_Immediate }, /* $a2 */ + { "ldz", 2, flNone, OH_Immediate }, /* $a3 */ + { "ldy", 2, flUseLabel, OH_Direct }, /* $a4 */ + { "lda", 2, flUseLabel, OH_Direct }, /* $a5 */ + { "ldx", 2, flUseLabel, OH_Direct }, /* $a6 */ + { "smb2", 2, flUseLabel, OH_Direct }, /* $a7 */ + { "tay", 1, flNone, OH_Implicit }, /* $a8 */ + { "lda", 2, flNone, OH_Immediate }, /* $a9 */ + { "tax", 1, flNone, OH_Implicit }, /* $aa */ + { "ldz", 3, flUseLabel|flAbsOverride, OH_Absolute }, /* $ab */ + { "ldy", 3, flUseLabel|flAbsOverride, OH_Absolute }, /* $ac */ + { "lda", 3, flUseLabel|flAbsOverride, OH_Absolute }, /* $ad */ + { "ldx", 3, flUseLabel|flAbsOverride, OH_Absolute }, /* $ae */ + { "bbs2", 3, flUseLabel, OH_BitBranch }, /* $af */ + { "bcs", 2, flLabel, OH_Relative }, /* $b0 */ + { "lda", 2, flUseLabel, OH_DirectIndirectY }, /* $b1 */ + { "lda", 2, flUseLabel, OH_DirectIndirectZ }, /* $b2 */ + { "lbcs", 3, flLabel, OH_RelativeLong4510 }, /* $b3 */ + { "ldy", 2, flUseLabel, OH_DirectX }, /* $b4 */ + { "lda", 2, flUseLabel, OH_DirectX }, /* $b5 */ + { "ldx", 2, flUseLabel, OH_DirectY }, /* $b6 */ + { "smb3", 2, flUseLabel, OH_Direct }, /* $b7 */ + { "clv", 1, flNone, OH_Implicit }, /* $b8 */ + { "lda", 3, flUseLabel, OH_AbsoluteY }, /* $b9 */ + { "tsx", 1, flNone, OH_Implicit }, /* $ba */ + { "ldz", 3, flUseLabel|flAbsOverride, OH_AbsoluteX }, /* $bb */ + { "ldy", 3, flUseLabel|flAbsOverride, OH_AbsoluteX }, /* $bc */ + { "lda", 3, flUseLabel|flAbsOverride, OH_AbsoluteX }, /* $bd */ + { "ldx", 3, flUseLabel|flAbsOverride, OH_AbsoluteY }, /* $be */ + { "bbs3", 3, flUseLabel, OH_BitBranch }, /* $bf */ + { "cpy", 2, flNone, OH_Immediate }, /* $c0 */ + { "cmp", 2, flUseLabel, OH_DirectXIndirect }, /* $c1 */ + { "cpz", 2, flNone, OH_Immediate }, /* $c2 */ + { "dew", 2, flUseLabel, OH_Direct }, /* $c3 */ + { "cpy", 2, flUseLabel, OH_Direct }, /* $c4 */ + { "cmp", 2, flUseLabel, OH_Direct }, /* $c5 */ + { "dec", 2, flUseLabel, OH_Direct }, /* $c6 */ + { "smb4", 2, flUseLabel, OH_Direct }, /* $c7 */ + { "iny", 1, flNone, OH_Implicit }, /* $c8 */ + { "cmp", 2, flNone, OH_Immediate }, /* $c9 */ + { "dex", 1, flNone, OH_Implicit }, /* $ca */ + { "asw", 3, flUseLabel|flAbsOverride, OH_Absolute }, /* $cb */ + { "cpy", 3, flUseLabel|flAbsOverride, OH_Absolute }, /* $cc */ + { "cmp", 3, flUseLabel|flAbsOverride, OH_Absolute }, /* $cd */ + { "dec", 3, flUseLabel|flAbsOverride, OH_Absolute }, /* $ce */ + { "bbs4", 3, flUseLabel, OH_BitBranch }, /* $cf */ + { "bne", 2, flLabel, OH_Relative }, /* $d0 */ + { "cmp", 2, flUseLabel, OH_DirectIndirectY }, /* $d1 */ + { "cmp", 2, flUseLabel, OH_DirectIndirectZ }, /* $d2 */ + { "lbne", 3, flLabel, OH_RelativeLong4510 }, /* $d3 */ + { "cpz", 2, flUseLabel, OH_Direct }, /* $d4 */ + { "cmp", 2, flUseLabel, OH_DirectX }, /* $d5 */ + { "dec", 2, flUseLabel, OH_DirectX }, /* $d6 */ + { "smb5", 2, flUseLabel, OH_Direct }, /* $d7 */ + { "cld", 1, flNone, OH_Implicit }, /* $d8 */ + { "cmp", 3, flUseLabel, OH_AbsoluteY }, /* $d9 */ + { "phx", 1, flNone, OH_Implicit }, /* $da */ + { "phz", 1, flNone, OH_Implicit }, /* $db */ + { "cpz", 3, flUseLabel|flAbsOverride, OH_Absolute }, /* $dc */ + { "cmp", 3, flUseLabel|flAbsOverride, OH_AbsoluteX }, /* $dd */ + { "dec", 3, flUseLabel|flAbsOverride, OH_AbsoluteX }, /* $de */ + { "bbs5", 3, flUseLabel, OH_BitBranch }, /* $df */ + { "cpx", 2, flNone, OH_Immediate }, /* $e0 */ + { "sbc", 2, flUseLabel, OH_DirectXIndirect }, /* $e1 */ + { "lda", 2, flNone, OH_StackRelativeIndirectY4510}, /* $e2 */ + { "inw", 2, flUseLabel, OH_Direct }, /* $e3 */ + { "cpx", 2, flUseLabel, OH_Direct }, /* $e4 */ + { "sbc", 2, flUseLabel, OH_Direct }, /* $e5 */ + { "inc", 2, flUseLabel, OH_Direct }, /* $e6 */ + { "smb6", 2, flUseLabel, OH_Direct }, /* $e7 */ + { "inx", 1, flNone, OH_Implicit }, /* $e8 */ + { "sbc", 2, flNone, OH_Immediate }, /* $e9 */ + { "eom", 1, flSizeChanges, OH_Implicit_ea_45GS02 }, /* $ea */ + { "row", 3, flUseLabel|flAbsOverride, OH_Absolute }, /* $eb */ + { "cpx", 3, flUseLabel|flAbsOverride, OH_Absolute }, /* $ec */ + { "sbc", 3, flUseLabel|flAbsOverride, OH_Absolute }, /* $ed */ + { "inc", 3, flUseLabel|flAbsOverride, OH_Absolute }, /* $ee */ + { "bbs6", 3, flUseLabel, OH_BitBranch }, /* $ef */ + { "beq", 2, flLabel, OH_Relative }, /* $f0 */ + { "sbc", 2, flUseLabel, OH_DirectIndirectY }, /* $f1 */ + { "sbc", 2, flUseLabel, OH_DirectIndirectZ }, /* $f2 */ + { "lbeq", 3, flLabel, OH_RelativeLong4510 }, /* $f3 */ + { "phw", 3, flNone, OH_ImmediateWord }, /* $f4 */ + { "sbc", 2, flUseLabel, OH_DirectX }, /* $f5 */ + { "inc", 2, flUseLabel, OH_DirectX }, /* $f6 */ + { "smb7", 2, flUseLabel, OH_Direct }, /* $f7 */ + { "sed", 1, flNone, OH_Implicit }, /* $f8 */ + { "sbc", 3, flUseLabel, OH_AbsoluteY }, /* $f9 */ + { "plx", 1, flNone, OH_Implicit }, /* $fa */ + { "plz", 1, flNone, OH_Implicit }, /* $fb */ + { "phw", 3, flUseLabel|flAbsOverride, OH_Absolute }, /* $fc */ + { "sbc", 3, flUseLabel|flAbsOverride, OH_AbsoluteX }, /* $fd */ + { "inc", 3, flUseLabel|flAbsOverride, OH_AbsoluteX }, /* $fe */ + { "bbs7", 3, flUseLabel, OH_BitBranch }, /* $ff */ +}; diff --git a/src/da65/opc45GS02.h b/src/da65/opc45GS02.h new file mode 100644 index 000000000..624e4bbd9 --- /dev/null +++ b/src/da65/opc45GS02.h @@ -0,0 +1,58 @@ +/*****************************************************************************/ +/* */ +/* opc45GS02.h */ +/* */ +/* 45GS10 opcode description table */ +/* */ +/* */ +/* */ +/* (C) 2003 Ullrich von Bassewitz */ +/* Roemerstrasse 52 */ +/* D-70794 Filderstadt */ +/* EMail: uz@cc65.org */ +/* */ +/* */ +/* This software is provided 'as-is', without any expressed or implied */ +/* warranty. In no event will the authors be held liable for any damages */ +/* arising from the use of this software. */ +/* */ +/* Permission is granted to anyone to use this software for any purpose, */ +/* including commercial applications, and to alter it and redistribute it */ +/* freely, subject to the following restrictions: */ +/* */ +/* 1. The origin of this software must not be misrepresented; you must not */ +/* claim that you wrote the original software. If you use this software */ +/* in a product, an acknowledgment in the product documentation would be */ +/* appreciated but is not required. */ +/* 2. Altered source versions must be plainly marked as such, and must not */ +/* be misrepresented as being the original software. */ +/* 3. This notice may not be removed or altered from any source */ +/* distribution. */ +/* */ +/*****************************************************************************/ + + + +#ifndef OPC45GS02_H +#define OPC45GS02_H + + + +#include "opcdesc.h" + + + +/*****************************************************************************/ +/* Data */ +/*****************************************************************************/ + + + +/* Descriptions for all opcodes */ +extern const OpcDesc OpcTable_45GS02[256]; +extern const OpcDesc OpcTable_45GS02_extended[256]; + + +/* End of opc45GS02.h */ + +#endif diff --git a/src/da65/opc6502x.c b/src/da65/opc6502x.c index 3bdc8a549..c5fb5888c 100644 --- a/src/da65/opc6502x.c +++ b/src/da65/opc6502x.c @@ -188,7 +188,7 @@ const OpcDesc OpcTable_6502X[256] = { { "dey", 1, flNone, OH_Implicit }, /* $88 */ { "nop", 2, flNone, OH_Immediate }, /* $89 */ { "txa", 1, flNone, OH_Implicit }, /* $8a */ - { "xaa", 2, flNone, OH_Immediate }, /* $8b */ + { "ane", 2, flNone, OH_Immediate }, /* $8b */ { "sty", 3, flUseLabel|flAbsOverride, OH_Absolute }, /* $8c */ { "sta", 3, flUseLabel|flAbsOverride, OH_Absolute }, /* $8d */ { "stx", 3, flUseLabel|flAbsOverride, OH_Absolute }, /* $8e */ @@ -196,7 +196,7 @@ const OpcDesc OpcTable_6502X[256] = { { "bcc", 2, flLabel, OH_Relative }, /* $90 */ { "sta", 2, flUseLabel, OH_DirectIndirectY }, /* $91 */ { "jam", 1, flNone, OH_Implicit }, /* $92 */ - { "ahx", 2, flUseLabel, OH_DirectIndirectY }, /* $93 */ + { "sha", 2, flUseLabel, OH_DirectIndirectY }, /* $93 */ { "sty", 2, flUseLabel, OH_DirectX }, /* $94 */ { "sta", 2, flUseLabel, OH_DirectX }, /* $95 */ { "stx", 2, flUseLabel, OH_DirectY }, /* $96 */ @@ -208,7 +208,7 @@ const OpcDesc OpcTable_6502X[256] = { { "shy", 3, flUseLabel|flAbsOverride, OH_AbsoluteX }, /* $9c */ { "sta", 3, flUseLabel|flAbsOverride, OH_AbsoluteX }, /* $9d */ { "shx", 3, flUseLabel, OH_AbsoluteY }, /* $9e */ - { "ahx", 3, flUseLabel, OH_AbsoluteY }, /* $9f */ + { "sha", 3, flUseLabel, OH_AbsoluteY }, /* $9f */ { "ldy", 2, flNone, OH_Immediate }, /* $a0 */ { "lda", 2, flUseLabel, OH_DirectXIndirect }, /* $a1 */ { "ldx", 2, flNone, OH_Immediate }, /* $a2 */ diff --git a/src/da65/opc65c02.c b/src/da65/opc65c02.c index b69558f2a..88c8c8dec 100644 --- a/src/da65/opc65c02.c +++ b/src/da65/opc65c02.c @@ -250,7 +250,7 @@ const OpcDesc OpcTable_65C02[256] = { { "iny", 1, flNone, OH_Implicit }, /* $c8 */ { "cmp", 2, flNone, OH_Immediate }, /* $c9 */ { "dex", 1, flNone, OH_Implicit }, /* $ca */ - { "wai", 1, flNone, OH_Implicit }, /* $cb */ + { "", 1, flIllegal, OH_Illegal, }, /* $cb */ { "cpy", 3, flUseLabel|flAbsOverride, OH_Absolute }, /* $cc */ { "cmp", 3, flUseLabel|flAbsOverride, OH_Absolute }, /* $cd */ { "dec", 3, flUseLabel|flAbsOverride, OH_Absolute }, /* $ce */ @@ -266,7 +266,7 @@ const OpcDesc OpcTable_65C02[256] = { { "cld", 1, flNone, OH_Implicit }, /* $d8 */ { "cmp", 3, flUseLabel, OH_AbsoluteY }, /* $d9 */ { "phx", 1, flNone, OH_Implicit }, /* $da */ - { "stp", 1, flNone, OH_Implicit }, /* $db */ + { "", 1, flIllegal, OH_Illegal, }, /* $db */ { "", 1, flIllegal, OH_Illegal, }, /* $dc */ { "cmp", 3, flUseLabel|flAbsOverride, OH_AbsoluteX }, /* $dd */ { "dec", 3, flUseLabel|flAbsOverride, OH_AbsoluteX }, /* $de */ diff --git a/src/da65/opc65ce02.c b/src/da65/opc65ce02.c new file mode 100644 index 000000000..093e79a9e --- /dev/null +++ b/src/da65/opc65ce02.c @@ -0,0 +1,306 @@ +/*****************************************************************************/ +/* */ +/* opc65CE02.c */ +/* */ +/* 65CE02 opcode description table */ +/* */ +/* */ +/* */ +/* (C) 2003-2011, Ullrich von Bassewitz */ +/* Roemerstrasse 52 */ +/* D-70794 Filderstadt */ +/* EMail: uz@cc65.org */ +/* */ +/* */ +/* This software is provided 'as-is', without any expressed or implied */ +/* warranty. In no event will the authors be held liable for any damages */ +/* arising from the use of this software. */ +/* */ +/* Permission is granted to anyone to use this software for any purpose, */ +/* including commercial applications, and to alter it and redistribute it */ +/* freely, subject to the following restrictions: */ +/* */ +/* 1. The origin of this software must not be misrepresented; you must not */ +/* claim that you wrote the original software. If you use this software */ +/* in a product, an acknowledgment in the product documentation would be */ +/* appreciated but is not required. */ +/* 2. Altered source versions must be plainly marked as such, and must not */ +/* be misrepresented as being the original software. */ +/* 3. This notice may not be removed or altered from any source */ +/* distribution. */ +/* */ +/*****************************************************************************/ + + + +/* da65 */ +#include "handler.h" +#include "opc65ce02.h" + + + +/*****************************************************************************/ +/* Data */ +/*****************************************************************************/ + + + +/* Descriptions for all opcodes */ +const OpcDesc OpcTable_65CE02[256] = { + { "brk", 1, flNone, OH_Implicit }, /* $00 */ + { "ora", 2, flUseLabel, OH_DirectXIndirect }, /* $01 */ + { "cle", 1, flNone, OH_Implicit }, /* $02 */ + { "see", 1, flNone, OH_Implicit }, /* $03 */ + { "tsb", 2, flUseLabel, OH_Direct }, /* $04 */ + { "ora", 2, flUseLabel, OH_Direct }, /* $05 */ + { "asl", 2, flUseLabel, OH_Direct }, /* $06 */ + { "rmb0", 2, flUseLabel, OH_Direct }, /* $07 */ + { "php", 1, flNone, OH_Implicit }, /* $08 */ + { "ora", 2, flNone, OH_Immediate }, /* $09 */ + { "asl", 1, flNone, OH_Accumulator }, /* $0a */ + { "tsy", 1, flNone, OH_Implicit }, /* $0b */ + { "tsb", 3, flUseLabel|flAbsOverride, OH_Absolute }, /* $0c */ + { "ora", 3, flUseLabel|flAbsOverride, OH_Absolute }, /* $0d */ + { "asl", 3, flUseLabel|flAbsOverride, OH_Absolute }, /* $0e */ + { "bbr0", 3, flUseLabel, OH_BitBranch }, /* $0f */ + { "bpl", 2, flLabel, OH_Relative }, /* $10 */ + { "ora", 2, flUseLabel, OH_DirectIndirectY }, /* $11 */ + { "ora", 2, flUseLabel, OH_DirectIndirectZ }, /* $12 */ + { "lbpl", 3, flLabel, OH_RelativeLong4510 }, /* $13 */ + { "trb", 2, flUseLabel, OH_Direct }, /* $14 */ + { "ora", 2, flUseLabel, OH_DirectX }, /* $15 */ + { "asl", 2, flUseLabel, OH_DirectX }, /* $16 */ + { "rmb1", 2, flUseLabel, OH_Direct }, /* $17 */ + { "clc", 1, flNone, OH_Implicit }, /* $18 */ + { "ora", 3, flUseLabel, OH_AbsoluteY }, /* $19 */ + { "inc", 1, flNone, OH_Accumulator }, /* $1a */ + { "inz", 1, flNone, OH_Implicit }, /* $1b */ + { "trb", 3, flUseLabel|flAbsOverride, OH_Absolute }, /* $1c */ + { "ora", 3, flUseLabel|flAbsOverride, OH_AbsoluteX }, /* $1d */ + { "asl", 3, flUseLabel|flAbsOverride, OH_AbsoluteX }, /* $1e */ + { "bbr1", 3, flUseLabel, OH_BitBranch }, /* $1f */ + { "jsr", 3, flLabel, OH_Absolute }, /* $20 */ + { "and", 2, flUseLabel, OH_DirectXIndirect }, /* $21 */ + { "jsr", 3, flLabel, OH_JmpAbsoluteIndirect }, /* $22 */ + { "jsr", 3, flLabel, OH_JmpAbsoluteXIndirect }, /* $23 */ + { "bit", 2, flUseLabel, OH_Direct }, /* $24 */ + { "and", 2, flUseLabel, OH_Direct }, /* $25 */ + { "rol", 2, flUseLabel, OH_Direct }, /* $26 */ + { "rmb2", 2, flUseLabel, OH_Direct }, /* $27 */ + { "plp", 1, flNone, OH_Implicit }, /* $28 */ + { "and", 2, flNone, OH_Immediate }, /* $29 */ + { "rol", 1, flNone, OH_Accumulator }, /* $2a */ + { "tys", 1, flNone, OH_Implicit }, /* $2b */ + { "bit", 3, flUseLabel|flAbsOverride, OH_Absolute }, /* $2c */ + { "and", 3, flUseLabel|flAbsOverride, OH_Absolute }, /* $2d */ + { "rol", 3, flUseLabel|flAbsOverride, OH_Absolute }, /* $2e */ + { "bbr2", 3, flUseLabel, OH_BitBranch }, /* $2f */ + { "bmi", 2, flLabel, OH_Relative }, /* $30 */ + { "and", 2, flUseLabel, OH_DirectIndirectY }, /* $31 */ + { "and", 2, flUseLabel, OH_DirectIndirectZ }, /* $32 */ + { "lbmi", 3, flLabel, OH_RelativeLong4510 }, /* $33 */ + { "bit", 2, flUseLabel, OH_DirectX }, /* $34 */ + { "and", 2, flUseLabel, OH_DirectX }, /* $35 */ + { "rol", 2, flUseLabel, OH_DirectX }, /* $36 */ + { "rmb3", 2, flUseLabel, OH_Direct }, /* $37 */ + { "sec", 1, flNone, OH_Implicit }, /* $38 */ + { "and", 3, flUseLabel, OH_AbsoluteY }, /* $39 */ + { "dec", 1, flNone, OH_Accumulator }, /* $3a */ + { "dez", 1, flNone, OH_Implicit }, /* $3b */ + { "bit", 3, flUseLabel, OH_AbsoluteX }, /* $3c */ + { "and", 3, flUseLabel|flAbsOverride, OH_AbsoluteX }, /* $3d */ + { "rol", 3, flUseLabel|flAbsOverride, OH_AbsoluteX }, /* $3e */ + { "bbr3", 3, flUseLabel, OH_BitBranch }, /* $3f */ + { "rti", 1, flNone, OH_Rts }, /* $40 */ + { "eor", 2, flUseLabel, OH_DirectXIndirect }, /* $41 */ + { "neg", 1, flNone, OH_Implicit }, /* $42 */ + { "asr", 1, flNone, OH_Accumulator }, /* $43 */ + { "asr", 2, flUseLabel, OH_Direct }, /* $44 */ + { "eor", 2, flUseLabel, OH_Direct }, /* $45 */ + { "lsr", 2, flUseLabel, OH_Direct }, /* $46 */ + { "rmb4", 2, flUseLabel, OH_Direct }, /* $47 */ + { "pha", 1, flNone, OH_Implicit }, /* $48 */ + { "eor", 2, flNone, OH_Immediate }, /* $49 */ + { "lsr", 1, flNone, OH_Accumulator }, /* $4a */ + { "taz", 1, flNone, OH_Implicit }, /* $4b */ + { "jmp", 3, flLabel, OH_JmpAbsolute }, /* $4c */ + { "eor", 3, flUseLabel|flAbsOverride, OH_Absolute }, /* $4d */ + { "lsr", 3, flUseLabel|flAbsOverride, OH_Absolute }, /* $4e */ + { "bbr4", 3, flUseLabel, OH_BitBranch }, /* $4f */ + { "bvc", 2, flLabel, OH_Relative }, /* $50 */ + { "eor", 2, flUseLabel, OH_DirectIndirectY }, /* $51 */ + { "eor", 2, flUseLabel, OH_DirectIndirectZ }, /* $52 */ + { "lbvc", 3, flLabel, OH_RelativeLong4510 }, /* $53 */ + { "asr", 2, flUseLabel, OH_DirectX }, /* $54 */ + { "eor", 2, flUseLabel, OH_DirectX }, /* $55 */ + { "lsr", 2, flUseLabel, OH_DirectX }, /* $56 */ + { "rmb5", 2, flUseLabel, OH_Direct }, /* $57 */ + { "cli", 1, flNone, OH_Implicit }, /* $58 */ + { "eor", 3, flUseLabel, OH_AbsoluteY }, /* $59 */ + { "phy", 1, flNone, OH_Implicit }, /* $5a */ + { "tab", 1, flNone, OH_Implicit }, /* $5b */ + { "aug", 1, flNone, OH_Implicit }, /* $5c */ + { "eor", 3, flUseLabel|flAbsOverride, OH_AbsoluteX }, /* $5d */ + { "lsr", 3, flUseLabel|flAbsOverride, OH_AbsoluteX }, /* $5e */ + { "bbr5", 3, flUseLabel, OH_BitBranch }, /* $5f */ + { "rts", 1, flNone, OH_Rts }, /* $60 */ + { "adc", 2, flUseLabel, OH_DirectXIndirect }, /* $61 */ + { "rtn", 2, flNone, OH_Immediate }, /* $62 */ + { "bsr", 3, flLabel, OH_RelativeLong4510 }, /* $63 */ + { "stz", 2, flUseLabel, OH_Direct }, /* $64 */ + { "adc", 2, flUseLabel, OH_Direct }, /* $65 */ + { "ror", 2, flUseLabel, OH_Direct }, /* $66 */ + { "rmb6", 2, flUseLabel, OH_Direct, }, /* $67 */ + { "pla", 1, flNone, OH_Implicit }, /* $68 */ + { "adc", 2, flNone, OH_Immediate }, /* $69 */ + { "ror", 1, flNone, OH_Accumulator }, /* $6a */ + { "tza", 1, flNone, OH_Implicit }, /* $6b */ + { "jmp", 3, flLabel, OH_JmpAbsoluteIndirect }, /* $6c */ + { "adc", 3, flUseLabel|flAbsOverride, OH_Absolute }, /* $6d */ + { "ror", 3, flUseLabel, OH_Absolute }, /* $6e */ + { "bbr6", 3, flUseLabel, OH_BitBranch }, /* $6f */ + { "bvs", 2, flLabel, OH_Relative }, /* $70 */ + { "adc", 2, flUseLabel, OH_DirectIndirectY }, /* $71 */ + { "adc", 2, flUseLabel, OH_DirectIndirectZ }, /* $72 */ + { "lbvs", 3, flLabel, OH_RelativeLong4510 }, /* $73 */ + { "stz", 2, flUseLabel, OH_DirectX }, /* $74 */ + { "adc", 2, flUseLabel, OH_DirectX }, /* $75 */ + { "ror", 2, flUseLabel, OH_DirectX }, /* $76 */ + { "rmb7", 2, flUseLabel, OH_Direct }, /* $77 */ + { "sei", 1, flNone, OH_Implicit }, /* $78 */ + { "adc", 3, flUseLabel, OH_AbsoluteY }, /* $79 */ + { "ply", 1, flNone, OH_Implicit }, /* $7a */ + { "tba", 1, flNone, OH_Implicit }, /* $7b */ + { "jmp", 3, flLabel, OH_AbsoluteXIndirect }, /* $7c */ + { "adc", 3, flUseLabel|flAbsOverride, OH_AbsoluteX }, /* $7d */ + { "ror", 3, flUseLabel|flAbsOverride, OH_AbsoluteX }, /* $7e */ + { "bbr7", 3, flUseLabel, OH_BitBranch }, /* $7f */ + { "bra", 2, flLabel, OH_Relative }, /* $80 */ + { "sta", 2, flUseLabel, OH_DirectXIndirect }, /* $81 */ + { "sta", 2, flNone, OH_StackRelativeIndirectY4510}, /* $82 */ + { "lbra", 3, flLabel, OH_RelativeLong4510 }, /* $83 */ + { "sty", 2, flUseLabel, OH_Direct }, /* $84 */ + { "sta", 2, flUseLabel, OH_Direct }, /* $85 */ + { "stx", 2, flUseLabel, OH_Direct }, /* $86 */ + { "smb0", 2, flUseLabel, OH_Direct }, /* $87 */ + { "dey", 1, flNone, OH_Implicit }, /* $88 */ + { "bit", 2, flNone, OH_Immediate }, /* $89 */ + { "txa", 1, flNone, OH_Implicit }, /* $8a */ + { "sty", 3, flUseLabel|flAbsOverride, OH_AbsoluteX }, /* $8b */ + { "sty", 3, flUseLabel|flAbsOverride, OH_Absolute }, /* $8c */ + { "sta", 3, flUseLabel|flAbsOverride, OH_Absolute }, /* $8d */ + { "stx", 3, flUseLabel|flAbsOverride, OH_Absolute }, /* $8e */ + { "bbs0", 3, flUseLabel, OH_BitBranch }, /* $8f */ + { "bcc", 2, flLabel, OH_Relative }, /* $90 */ + { "sta", 2, flUseLabel, OH_DirectIndirectY }, /* $91 */ + { "sta", 2, flUseLabel, OH_DirectIndirectZ }, /* $92 */ + { "lbcc", 3, flLabel, OH_RelativeLong4510 }, /* $93 */ + { "sty", 2, flUseLabel, OH_DirectX }, /* $94 */ + { "sta", 2, flUseLabel, OH_DirectX }, /* $95 */ + { "stx", 2, flUseLabel, OH_DirectY }, /* $96 */ + { "smb1", 2, flUseLabel, OH_Direct }, /* $97 */ + { "tya", 1, flNone, OH_Implicit }, /* $98 */ + { "sta", 3, flUseLabel, OH_AbsoluteY }, /* $99 */ + { "txs", 1, flNone, OH_Implicit }, /* $9a */ + { "stx", 3, flUseLabel|flAbsOverride, OH_AbsoluteY }, /* $9b */ + { "stz", 3, flUseLabel|flAbsOverride, OH_Absolute }, /* $9c */ + { "sta", 3, flUseLabel|flAbsOverride, OH_AbsoluteX }, /* $9d */ + { "stz", 3, flUseLabel|flAbsOverride, OH_AbsoluteX }, /* $9e */ + { "bbs1", 3, flUseLabel, OH_BitBranch }, /* $9f */ + { "ldy", 2, flNone, OH_Immediate }, /* $a0 */ + { "lda", 2, flUseLabel, OH_DirectXIndirect }, /* $a1 */ + { "ldx", 2, flNone, OH_Immediate }, /* $a2 */ + { "ldz", 2, flNone, OH_Immediate }, /* $a3 */ + { "ldy", 2, flUseLabel, OH_Direct }, /* $a4 */ + { "lda", 2, flUseLabel, OH_Direct }, /* $a5 */ + { "ldx", 2, flUseLabel, OH_Direct }, /* $a6 */ + { "smb2", 2, flUseLabel, OH_Direct }, /* $a7 */ + { "tay", 1, flNone, OH_Implicit }, /* $a8 */ + { "lda", 2, flNone, OH_Immediate }, /* $a9 */ + { "tax", 1, flNone, OH_Implicit }, /* $aa */ + { "ldz", 3, flUseLabel|flAbsOverride, OH_Absolute }, /* $ab */ + { "ldy", 3, flUseLabel|flAbsOverride, OH_Absolute }, /* $ac */ + { "lda", 3, flUseLabel|flAbsOverride, OH_Absolute }, /* $ad */ + { "ldx", 3, flUseLabel|flAbsOverride, OH_Absolute }, /* $ae */ + { "bbs2", 3, flUseLabel, OH_BitBranch }, /* $af */ + { "bcs", 2, flLabel, OH_Relative }, /* $b0 */ + { "lda", 2, flUseLabel, OH_DirectIndirectY }, /* $b1 */ + { "lda", 2, flUseLabel, OH_DirectIndirectZ }, /* $b2 */ + { "lbcs", 3, flLabel, OH_RelativeLong4510 }, /* $b3 */ + { "ldy", 2, flUseLabel, OH_DirectX }, /* $b4 */ + { "lda", 2, flUseLabel, OH_DirectX }, /* $b5 */ + { "ldx", 2, flUseLabel, OH_DirectY }, /* $b6 */ + { "smb3", 2, flUseLabel, OH_Direct }, /* $b7 */ + { "clv", 1, flNone, OH_Implicit }, /* $b8 */ + { "lda", 3, flUseLabel, OH_AbsoluteY }, /* $b9 */ + { "tsx", 1, flNone, OH_Implicit }, /* $ba */ + { "ldz", 3, flUseLabel|flAbsOverride, OH_AbsoluteX }, /* $bb */ + { "ldy", 3, flUseLabel|flAbsOverride, OH_AbsoluteX }, /* $bc */ + { "lda", 3, flUseLabel|flAbsOverride, OH_AbsoluteX }, /* $bd */ + { "ldx", 3, flUseLabel|flAbsOverride, OH_AbsoluteY }, /* $be */ + { "bbs3", 3, flUseLabel, OH_BitBranch }, /* $bf */ + { "cpy", 2, flNone, OH_Immediate }, /* $c0 */ + { "cmp", 2, flUseLabel, OH_DirectXIndirect }, /* $c1 */ + { "cpz", 2, flNone, OH_Immediate }, /* $c2 */ + { "dew", 2, flUseLabel, OH_Direct }, /* $c3 */ + { "cpy", 2, flUseLabel, OH_Direct }, /* $c4 */ + { "cmp", 2, flUseLabel, OH_Direct }, /* $c5 */ + { "dec", 2, flUseLabel, OH_Direct }, /* $c6 */ + { "smb4", 2, flUseLabel, OH_Direct }, /* $c7 */ + { "iny", 1, flNone, OH_Implicit }, /* $c8 */ + { "cmp", 2, flNone, OH_Immediate }, /* $c9 */ + { "dex", 1, flNone, OH_Implicit }, /* $ca */ + { "asw", 3, flUseLabel|flAbsOverride, OH_Absolute }, /* $cb */ + { "cpy", 3, flUseLabel|flAbsOverride, OH_Absolute }, /* $cc */ + { "cmp", 3, flUseLabel|flAbsOverride, OH_Absolute }, /* $cd */ + { "dec", 3, flUseLabel|flAbsOverride, OH_Absolute }, /* $ce */ + { "bbs4", 3, flUseLabel, OH_BitBranch }, /* $cf */ + { "bne", 2, flLabel, OH_Relative }, /* $d0 */ + { "cmp", 2, flUseLabel, OH_DirectIndirectY }, /* $d1 */ + { "cmp", 2, flUseLabel, OH_DirectIndirectZ }, /* $d2 */ + { "lbne", 3, flLabel, OH_RelativeLong4510 }, /* $d3 */ + { "cpz", 2, flUseLabel, OH_Direct }, /* $d4 */ + { "cmp", 2, flUseLabel, OH_DirectX }, /* $d5 */ + { "dec", 2, flUseLabel, OH_DirectX }, /* $d6 */ + { "smb5", 2, flUseLabel, OH_Direct }, /* $d7 */ + { "cld", 1, flNone, OH_Implicit }, /* $d8 */ + { "cmp", 3, flUseLabel, OH_AbsoluteY }, /* $d9 */ + { "phx", 1, flNone, OH_Implicit }, /* $da */ + { "phz", 1, flNone, OH_Implicit }, /* $db */ + { "cpz", 3, flUseLabel|flAbsOverride, OH_Absolute }, /* $dc */ + { "cmp", 3, flUseLabel|flAbsOverride, OH_AbsoluteX }, /* $dd */ + { "dec", 3, flUseLabel|flAbsOverride, OH_AbsoluteX }, /* $de */ + { "bbs5", 3, flUseLabel, OH_BitBranch }, /* $df */ + { "cpx", 2, flNone, OH_Immediate }, /* $e0 */ + { "sbc", 2, flUseLabel, OH_DirectXIndirect }, /* $e1 */ + { "lda", 2, flNone, OH_StackRelativeIndirectY4510}, /* $e2 */ + { "inw", 2, flUseLabel, OH_Direct }, /* $e3 */ + { "cpx", 2, flUseLabel, OH_Direct }, /* $e4 */ + { "sbc", 2, flUseLabel, OH_Direct }, /* $e5 */ + { "inc", 2, flUseLabel, OH_Direct }, /* $e6 */ + { "smb6", 2, flUseLabel, OH_Direct }, /* $e7 */ + { "inx", 1, flNone, OH_Implicit }, /* $e8 */ + { "sbc", 2, flNone, OH_Immediate }, /* $e9 */ + { "eom", 1, flNone, OH_Implicit }, /* $ea */ + { "row", 3, flUseLabel|flAbsOverride, OH_Absolute }, /* $eb */ + { "cpx", 3, flUseLabel|flAbsOverride, OH_Absolute }, /* $ec */ + { "sbc", 3, flUseLabel|flAbsOverride, OH_Absolute }, /* $ed */ + { "inc", 3, flUseLabel|flAbsOverride, OH_Absolute }, /* $ee */ + { "bbs6", 3, flUseLabel, OH_BitBranch }, /* $ef */ + { "beq", 2, flLabel, OH_Relative }, /* $f0 */ + { "sbc", 2, flUseLabel, OH_DirectIndirectY }, /* $f1 */ + { "sbc", 2, flUseLabel, OH_DirectIndirectZ }, /* $f2 */ + { "lbeq", 3, flLabel, OH_RelativeLong4510 }, /* $f3 */ + { "phw", 3, flNone, OH_ImmediateWord }, /* $f4 */ + { "sbc", 2, flUseLabel, OH_DirectX }, /* $f5 */ + { "inc", 2, flUseLabel, OH_DirectX }, /* $f6 */ + { "smb7", 2, flUseLabel, OH_Direct }, /* $f7 */ + { "sed", 1, flNone, OH_Implicit }, /* $f8 */ + { "sbc", 3, flUseLabel, OH_AbsoluteY }, /* $f9 */ + { "plx", 1, flNone, OH_Implicit }, /* $fa */ + { "plz", 1, flNone, OH_Implicit }, /* $fb */ + { "phw", 3, flUseLabel|flAbsOverride, OH_Absolute }, /* $fc */ + { "sbc", 3, flUseLabel|flAbsOverride, OH_AbsoluteX }, /* $fd */ + { "inc", 3, flUseLabel|flAbsOverride, OH_AbsoluteX }, /* $fe */ + { "bbs7", 3, flUseLabel, OH_BitBranch }, /* $ff */ +}; diff --git a/src/da65/opc65ce02.h b/src/da65/opc65ce02.h new file mode 100644 index 000000000..e3987dbcd --- /dev/null +++ b/src/da65/opc65ce02.h @@ -0,0 +1,58 @@ +/*****************************************************************************/ +/* */ +/* opc65CE02.h */ +/* */ +/* 65CE02 opcode description table */ +/* */ +/* */ +/* */ +/* (C) 2003 Ullrich von Bassewitz */ +/* Roemerstrasse 52 */ +/* D-70794 Filderstadt */ +/* EMail: uz@cc65.org */ +/* */ +/* */ +/* This software is provided 'as-is', without any expressed or implied */ +/* warranty. In no event will the authors be held liable for any damages */ +/* arising from the use of this software. */ +/* */ +/* Permission is granted to anyone to use this software for any purpose, */ +/* including commercial applications, and to alter it and redistribute it */ +/* freely, subject to the following restrictions: */ +/* */ +/* 1. The origin of this software must not be misrepresented; you must not */ +/* claim that you wrote the original software. If you use this software */ +/* in a product, an acknowledgment in the product documentation would be */ +/* appreciated but is not required. */ +/* 2. Altered source versions must be plainly marked as such, and must not */ +/* be misrepresented as being the original software. */ +/* 3. This notice may not be removed or altered from any source */ +/* distribution. */ +/* */ +/*****************************************************************************/ + + + +#ifndef OPC65CE02_H +#define OPC65CE02_H + + + +#include "opcdesc.h" + + + +/*****************************************************************************/ +/* Data */ +/*****************************************************************************/ + + + +/* Descriptions for all opcodes */ +extern const OpcDesc OpcTable_65CE02[256]; + + + +/* End of opc65CE02.h */ + +#endif diff --git a/src/da65/opcm740.c b/src/da65/opcm740.c index 67a36b48c..6d12a7d37 100644 --- a/src/da65/opcm740.c +++ b/src/da65/opcm740.c @@ -44,264 +44,265 @@ /* Data */ /*****************************************************************************/ - +/* CAUTION: in the pdf $1a is dec, and $3a is inc - if that is really the case, + * the table below should be fixed and this notice removed */ /* Descriptions for all opcodes */ const OpcDesc OpcTable_M740[256] = { { "brk", 1, flNone, OH_Implicit }, /* $00 */ { "ora", 2, flUseLabel, OH_DirectXIndirect }, /* $01 */ { "jsr", 2, flLabel, OH_JmpDirectIndirect }, /* $02 */ - { "bbs", 2, flUseLabel, OH_AccumulatorBitBranch }, /* $03 */ + { "bbs0", 2, flUseLabel, OH_AccumulatorBitBranch }, /* $03 */ { "", 1, flIllegal, OH_Illegal }, /* $04 */ { "ora", 2, flUseLabel, OH_Direct }, /* $05 */ { "asl", 2, flUseLabel, OH_Direct }, /* $06 */ - { "bbs", 3, flUseLabel, OH_ZeroPageBit }, /* $07 */ + { "bbs0", 3, flUseLabel, OH_BitBranch_m740 }, /* $07 */ { "php", 1, flNone, OH_Implicit }, /* $08 */ { "ora", 2, flNone, OH_Immediate }, /* $09 */ { "asl", 1, flNone, OH_Accumulator }, /* $0a */ - { "seb", 1, flNone, OH_AccumulatorBit }, /* $0b */ + { "seb0", 1, flNone, OH_AccumulatorBit }, /* $0b */ { "", 1, flIllegal, OH_Illegal, }, /* $0c */ { "ora", 3, flUseLabel|flAbsOverride, OH_Absolute }, /* $0d */ { "asl", 3, flUseLabel|flAbsOverride, OH_Absolute }, /* $0e */ - { "seb", 2, flUseLabel, OH_ZeroPageBit }, /* $0f */ + { "seb0", 2, flUseLabel, OH_ZeroPageBit }, /* $0f */ { "bpl", 2, flLabel, OH_Relative }, /* $10 */ { "ora", 2, flUseLabel, OH_DirectIndirectY }, /* $11 */ { "clt", 1, flNone, OH_Implicit }, /* $12 */ - { "bbc", 2, flUseLabel, OH_AccumulatorBitBranch }, /* $13 */ + { "bbc0", 2, flUseLabel, OH_AccumulatorBitBranch }, /* $13 */ { "", 1, flIllegal, OH_Illegal }, /* $14 */ { "ora", 2, flUseLabel, OH_DirectX }, /* $15 */ { "asl", 2, flUseLabel, OH_DirectX }, /* $16 */ - { "bbc", 3, flUseLabel, OH_ZeroPageBit }, /* $17 */ + { "bbc0", 3, flUseLabel, OH_BitBranch_m740 }, /* $17 */ { "clc", 1, flNone, OH_Implicit }, /* $18 */ { "ora", 3, flUseLabel, OH_AbsoluteY }, /* $19 */ - { "dec", 1, flNone, OH_Accumulator }, /* $1a */ - { "clb", 1, flNone, OH_AccumulatorBit }, /* $1b */ + { "inc", 1, flNone, OH_Accumulator }, /* $1a */ + { "clb0", 1, flNone, OH_AccumulatorBit }, /* $1b */ { "", 1, flIllegal, OH_Illegal }, /* $1c */ { "ora", 3, flUseLabel|flAbsOverride, OH_AbsoluteX }, /* $1d */ { "asl", 3, flUseLabel|flAbsOverride, OH_AbsoluteX }, /* $1e */ - { "clb", 2, flUseLabel, OH_ZeroPageBit }, /* $1f */ + { "clb0", 2, flUseLabel, OH_ZeroPageBit }, /* $1f */ { "jsr", 3, flLabel, OH_Absolute }, /* $20 */ { "and", 2, flUseLabel, OH_DirectXIndirect }, /* $21 */ { "jsr", 2, flLabel, OH_SpecialPage }, /* $22 */ - { "bbs", 2, flUseLabel, OH_AccumulatorBitBranch }, /* $23 */ + { "bbs1", 2, flUseLabel, OH_AccumulatorBitBranch }, /* $23 */ { "bit", 2, flUseLabel, OH_Direct }, /* $24 */ { "and", 2, flUseLabel, OH_Direct }, /* $25 */ { "rol", 2, flUseLabel, OH_Direct }, /* $26 */ - { "bbs", 3, flUseLabel, OH_ZeroPageBit }, /* $27 */ + { "bbs1", 3, flUseLabel, OH_BitBranch_m740 }, /* $27 */ { "plp", 1, flNone, OH_Implicit }, /* $28 */ { "and", 2, flNone, OH_Immediate }, /* $29 */ { "rol", 1, flNone, OH_Accumulator }, /* $2a */ - { "seb", 1, flNone, OH_AccumulatorBit }, /* $2b */ + { "seb1", 1, flNone, OH_AccumulatorBit }, /* $2b */ { "bit", 3, flUseLabel|flAbsOverride, OH_Absolute }, /* $2c */ { "and", 3, flUseLabel|flAbsOverride, OH_Absolute }, /* $2d */ { "rol", 3, flUseLabel|flAbsOverride, OH_Absolute }, /* $2e */ - { "seb", 2, flUseLabel, OH_ZeroPageBit }, /* $2f */ + { "seb1", 2, flUseLabel, OH_ZeroPageBit }, /* $2f */ { "bmi", 2, flLabel, OH_Relative }, /* $30 */ { "and", 2, flUseLabel, OH_DirectIndirectY }, /* $31 */ { "set", 1, flNone, OH_Implicit }, /* $32 */ - { "bbc", 2, flUseLabel, OH_AccumulatorBitBranch }, /* $33 */ + { "bbc1", 2, flUseLabel, OH_AccumulatorBitBranch }, /* $33 */ { "", 1, flIllegal, OH_Illegal }, /* $34 */ { "and", 2, flUseLabel, OH_DirectX }, /* $35 */ { "rol", 2, flUseLabel, OH_DirectX }, /* $36 */ - { "bbc", 3, flUseLabel, OH_ZeroPageBit }, /* $37 */ + { "bbc1", 3, flUseLabel, OH_BitBranch_m740 }, /* $37 */ { "sec", 1, flNone, OH_Implicit }, /* $38 */ { "and", 3, flUseLabel, OH_AbsoluteY }, /* $39 */ - { "inc", 1, flNone, OH_Accumulator }, /* $3a */ - { "clb", 1, flNone, OH_AccumulatorBit }, /* $3b */ + { "dec", 1, flNone, OH_Accumulator }, /* $3a */ + { "clb1", 1, flNone, OH_AccumulatorBit }, /* $3b */ { "ldm", 3, flLabel, OH_DirectImmediate }, /* $3c */ { "and", 3, flUseLabel|flAbsOverride, OH_AbsoluteX }, /* $3d */ { "rol", 3, flUseLabel|flAbsOverride, OH_AbsoluteX }, /* $3e */ - { "clb", 2, flUseLabel, OH_ZeroPageBit }, /* $3f */ + { "clb1", 2, flUseLabel, OH_ZeroPageBit }, /* $3f */ { "rti", 1, flNone, OH_Rts }, /* $40 */ { "eor", 2, flUseLabel, OH_DirectXIndirect }, /* $41 */ { "stp", 1, flNone, OH_Implicit }, /* $42 */ - { "bbs", 2, flUseLabel, OH_AccumulatorBitBranch }, /* $43 */ + { "bbs2", 2, flUseLabel, OH_AccumulatorBitBranch }, /* $43 */ { "com", 2, flUseLabel, OH_Direct }, /* $44 */ { "eor", 2, flUseLabel, OH_Direct }, /* $45 */ { "lsr", 2, flUseLabel, OH_Direct }, /* $46 */ - { "bbs", 3, flUseLabel, OH_ZeroPageBit }, /* $47 */ + { "bbs2", 3, flUseLabel, OH_BitBranch_m740 }, /* $47 */ { "pha", 1, flNone, OH_Implicit }, /* $48 */ { "eor", 2, flNone, OH_Immediate }, /* $49 */ { "lsr", 1, flNone, OH_Accumulator }, /* $4a */ - { "seb", 1, flNone, OH_AccumulatorBit }, /* $4b */ + { "seb2", 1, flNone, OH_AccumulatorBit }, /* $4b */ { "jmp", 3, flLabel, OH_JmpAbsolute }, /* $4c */ { "eor", 3, flUseLabel|flAbsOverride, OH_Absolute }, /* $4d */ { "lsr", 3, flUseLabel|flAbsOverride, OH_Absolute }, /* $4e */ - { "seb", 2, flUseLabel, OH_ZeroPageBit }, /* $4f */ + { "seb2", 2, flUseLabel, OH_ZeroPageBit }, /* $4f */ { "bvc", 2, flLabel, OH_Relative }, /* $50 */ { "eor", 2, flUseLabel, OH_DirectIndirectY }, /* $51 */ { "", 1, flIllegal, OH_Illegal }, /* $52 */ - { "bbc", 2, flUseLabel, OH_AccumulatorBitBranch }, /* $53 */ + { "bbc2", 2, flUseLabel, OH_AccumulatorBitBranch }, /* $53 */ { "", 1, flIllegal, OH_Illegal }, /* $54 */ { "eor", 2, flUseLabel, OH_DirectX }, /* $55 */ { "lsr", 2, flUseLabel, OH_DirectX }, /* $56 */ - { "bbc", 3, flUseLabel, OH_ZeroPageBit }, /* $57 */ + { "bbc2", 3, flUseLabel, OH_BitBranch_m740 }, /* $57 */ { "cli", 1, flNone, OH_Implicit }, /* $58 */ { "eor", 3, flUseLabel, OH_AbsoluteY }, /* $59 */ { "", 1, flIllegal, OH_Illegal }, /* $5a */ - { "clb", 1, flNone, OH_AccumulatorBit }, /* $5b */ + { "clb2", 1, flNone, OH_AccumulatorBit }, /* $5b */ { "", 1, flIllegal, OH_Illegal }, /* $5c */ { "eor", 3, flUseLabel|flAbsOverride, OH_AbsoluteX }, /* $5d */ { "lsr", 3, flUseLabel|flAbsOverride, OH_AbsoluteX }, /* $5e */ - { "clb", 2, flUseLabel, OH_ZeroPageBit }, /* $5f */ + { "clb2", 2, flUseLabel, OH_ZeroPageBit }, /* $5f */ { "rts", 1, flNone, OH_Rts }, /* $60 */ { "adc", 2, flUseLabel, OH_DirectXIndirect }, /* $61 */ - { "mul", 2, flUseLabel, OH_DirectX }, /* $62 */ - { "bbs", 2, flUseLabel, OH_AccumulatorBitBranch }, /* $63 */ + { "", 1, flIllegal, OH_Illegal }, /* $62 */ + { "bbs3", 2, flUseLabel, OH_AccumulatorBitBranch }, /* $63 */ { "tst", 2, flUseLabel, OH_Direct }, /* $64 */ { "adc", 2, flUseLabel, OH_Direct }, /* $65 */ { "ror", 2, flUseLabel, OH_Direct }, /* $66 */ - { "bbs", 3, flUseLabel, OH_ZeroPageBit }, /* $67 */ + { "bbs3", 3, flUseLabel, OH_BitBranch_m740 }, /* $67 */ { "pla", 1, flNone, OH_Implicit }, /* $68 */ { "adc", 2, flNone, OH_Immediate }, /* $69 */ { "ror", 1, flNone, OH_Accumulator }, /* $6a */ - { "seb", 1, flNone, OH_AccumulatorBit }, /* $6b */ + { "seb3", 1, flNone, OH_AccumulatorBit }, /* $6b */ { "jmp", 3, flLabel, OH_JmpAbsoluteIndirect }, /* $6c */ { "adc", 3, flUseLabel|flAbsOverride, OH_Absolute }, /* $6d */ { "ror", 3, flUseLabel|flAbsOverride, OH_Absolute }, /* $6e */ - { "seb", 2, flUseLabel, OH_ZeroPageBit }, /* $6f */ + { "seb3", 2, flUseLabel, OH_ZeroPageBit }, /* $6f */ { "bvs", 2, flLabel, OH_Relative }, /* $70 */ { "adc", 2, flUseLabel, OH_DirectIndirectY }, /* $71 */ { "", 1, flIllegal, OH_Illegal }, /* $72 */ - { "bbc", 2, flUseLabel, OH_AccumulatorBitBranch }, /* $73 */ + { "bbc3", 2, flUseLabel, OH_AccumulatorBitBranch }, /* $73 */ { "", 1, flIllegal, OH_Illegal }, /* $74 */ { "adc", 2, flUseLabel, OH_DirectX }, /* $75 */ { "ror", 2, flUseLabel, OH_DirectX }, /* $76 */ - { "bbc", 3, flUseLabel, OH_ZeroPageBit }, /* $77 */ + { "bbc3", 3, flUseLabel, OH_BitBranch_m740 }, /* $77 */ { "sei", 1, flNone, OH_Implicit }, /* $78 */ { "adc", 3, flUseLabel, OH_AbsoluteY }, /* $79 */ { "", 1, flIllegal, OH_Illegal }, /* $7a */ - { "clb", 1, flNone, OH_AccumulatorBit }, /* $7b */ + { "clb3", 1, flNone, OH_AccumulatorBit }, /* $7b */ { "", 1, flIllegal, OH_Illegal }, /* $7c */ { "adc", 3, flUseLabel|flAbsOverride, OH_AbsoluteX }, /* $7d */ { "ror", 3, flUseLabel|flAbsOverride, OH_AbsoluteX }, /* $7e */ - { "clb", 2, flUseLabel, OH_ZeroPageBit }, /* $7f */ + { "clb3", 2, flUseLabel, OH_ZeroPageBit }, /* $7f */ { "bra", 2, flLabel, OH_Relative }, /* $80 */ { "sta", 2, flUseLabel, OH_DirectXIndirect }, /* $81 */ { "rrf", 2, flLabel, OH_Direct }, /* $82 */ - { "bbs", 2, flUseLabel, OH_AccumulatorBitBranch }, /* $83 */ + { "bbs4", 2, flUseLabel, OH_AccumulatorBitBranch }, /* $83 */ { "sty", 2, flUseLabel, OH_Direct }, /* $84 */ { "sta", 2, flUseLabel, OH_Direct }, /* $85 */ { "stx", 2, flUseLabel, OH_Direct }, /* $86 */ - { "bbs", 3, flUseLabel, OH_ZeroPageBit }, /* $87 */ + { "bbs4", 3, flUseLabel, OH_BitBranch_m740 }, /* $87 */ { "dey", 1, flNone, OH_Implicit }, /* $88 */ { "", 1, flIllegal, OH_Illegal }, /* $89 */ { "txa", 1, flNone, OH_Implicit }, /* $8a */ - { "seb", 1, flNone, OH_AccumulatorBit }, /* $8b */ + { "seb4", 1, flNone, OH_AccumulatorBit }, /* $8b */ { "sty", 3, flUseLabel|flAbsOverride, OH_Absolute }, /* $8c */ { "sta", 3, flUseLabel|flAbsOverride, OH_Absolute }, /* $8d */ { "stx", 3, flUseLabel|flAbsOverride, OH_Absolute }, /* $8e */ - { "seb", 2, flUseLabel, OH_ZeroPageBit }, /* $8f */ + { "seb4", 2, flUseLabel, OH_ZeroPageBit }, /* $8f */ { "bcc", 2, flLabel, OH_Relative }, /* $90 */ { "sta", 2, flUseLabel, OH_DirectIndirectY }, /* $91 */ { "", 1, flIllegal, OH_Illegal }, /* $92 */ - { "bbc", 2, flUseLabel, OH_AccumulatorBitBranch }, /* $93 */ + { "bbc4", 2, flUseLabel, OH_AccumulatorBitBranch }, /* $93 */ { "sty", 2, flUseLabel, OH_DirectX }, /* $94 */ { "sta", 2, flUseLabel, OH_DirectX }, /* $95 */ { "stx", 2, flUseLabel, OH_DirectY }, /* $96 */ - { "bbc", 3, flUseLabel, OH_ZeroPageBit }, /* $97 */ + { "bbc4", 3, flUseLabel, OH_BitBranch_m740 }, /* $97 */ { "tya", 1, flNone, OH_Implicit }, /* $98 */ { "sta", 3, flUseLabel, OH_AbsoluteY }, /* $99 */ { "txs", 1, flNone, OH_Implicit }, /* $9a */ - { "clb", 1, flNone, OH_AccumulatorBit }, /* $9b */ + { "clb4", 1, flNone, OH_AccumulatorBit }, /* $9b */ { "", 1, flIllegal, OH_Illegal }, /* $9c */ { "sta", 3, flUseLabel|flAbsOverride, OH_AbsoluteX }, /* $9d */ { "", 1, flIllegal, OH_Illegal }, /* $9e */ - { "clb", 2, flUseLabel, OH_ZeroPageBit }, /* $9f */ + { "clb4", 2, flUseLabel, OH_ZeroPageBit }, /* $9f */ { "ldy", 2, flNone, OH_Immediate }, /* $a0 */ { "lda", 2, flUseLabel, OH_DirectXIndirect }, /* $a1 */ { "ldx", 2, flNone, OH_Immediate }, /* $a2 */ - { "bbs", 2, flUseLabel, OH_AccumulatorBitBranch }, /* $a3 */ + { "bbs5", 2, flUseLabel, OH_AccumulatorBitBranch }, /* $a3 */ { "ldy", 2, flUseLabel, OH_Direct }, /* $a4 */ { "lda", 2, flUseLabel, OH_Direct }, /* $a5 */ { "ldx", 2, flUseLabel, OH_Direct }, /* $a6 */ - { "bbs", 3, flUseLabel, OH_ZeroPageBit }, /* $a7 */ + { "bbs5", 3, flUseLabel, OH_BitBranch_m740 }, /* $a7 */ { "tay", 1, flNone, OH_Implicit }, /* $a8 */ { "lda", 2, flNone, OH_Immediate }, /* $a9 */ { "tax", 1, flNone, OH_Implicit }, /* $aa */ - { "seb", 1, flNone, OH_AccumulatorBit }, /* $ab */ + { "seb5", 1, flNone, OH_AccumulatorBit }, /* $ab */ { "ldy", 3, flUseLabel|flAbsOverride, OH_Absolute }, /* $ac */ { "lda", 3, flUseLabel|flAbsOverride, OH_Absolute }, /* $ad */ { "ldx", 3, flUseLabel|flAbsOverride, OH_Absolute }, /* $ae */ - { "seb", 2, flUseLabel, OH_ZeroPageBit }, /* $af */ + { "seb5", 2, flUseLabel, OH_ZeroPageBit }, /* $af */ { "bcs", 2, flLabel, OH_Relative }, /* $b0 */ { "lda", 2, flUseLabel, OH_DirectIndirectY }, /* $b1 */ { "jmp", 2, flLabel, OH_JmpDirectIndirect }, /* $b2 */ - { "bbc", 2, flUseLabel, OH_AccumulatorBitBranch }, /* $b3 */ + { "bbc5", 2, flUseLabel, OH_AccumulatorBitBranch }, /* $b3 */ { "ldy", 2, flUseLabel, OH_DirectX }, /* $b4 */ { "lda", 2, flUseLabel, OH_DirectX }, /* $b5 */ { "ldx", 2, flUseLabel, OH_DirectY }, /* $b6 */ - { "bbc", 3, flUseLabel, OH_ZeroPageBit }, /* $b7 */ + { "bbc5", 3, flUseLabel, OH_BitBranch_m740 }, /* $b7 */ { "clv", 1, flNone, OH_Implicit }, /* $b8 */ { "lda", 3, flUseLabel, OH_AbsoluteY }, /* $b9 */ { "tsx", 1, flNone, OH_Implicit }, /* $ba */ - { "clb", 1, flNone, OH_AccumulatorBit }, /* $bb */ + { "clb5", 1, flNone, OH_AccumulatorBit }, /* $bb */ { "ldy", 3, flUseLabel|flAbsOverride, OH_AbsoluteX }, /* $bc */ { "lda", 3, flUseLabel|flAbsOverride, OH_AbsoluteX }, /* $bd */ { "ldx", 3, flUseLabel|flAbsOverride, OH_AbsoluteY }, /* $be */ - { "clb", 2, flUseLabel, OH_ZeroPageBit }, /* $bf */ + { "clb5", 2, flUseLabel, OH_ZeroPageBit }, /* $bf */ { "cpy", 2, flNone, OH_Immediate }, /* $c0 */ { "cmp", 2, flUseLabel, OH_DirectXIndirect }, /* $c1 */ - { "wit", 1, flNone, OH_Implicit, }, /* $c2 */ - { "bbs", 2, flUseLabel, OH_AccumulatorBitBranch }, /* $c3 */ + { "slw", 1, flNone, OH_Implicit, }, /* $c2 */ + { "bbs6", 2, flUseLabel, OH_AccumulatorBitBranch }, /* $c3 */ { "cpy", 2, flUseLabel, OH_Direct }, /* $c4 */ { "cmp", 2, flUseLabel, OH_Direct }, /* $c5 */ { "dec", 2, flUseLabel, OH_Direct }, /* $c6 */ - { "bbs", 3, flUseLabel, OH_ZeroPageBit }, /* $c7 */ + { "bbs6", 3, flUseLabel, OH_BitBranch_m740 }, /* $c7 */ { "iny", 1, flNone, OH_Implicit }, /* $c8 */ { "cmp", 2, flNone, OH_Immediate }, /* $c9 */ { "dex", 1, flNone, OH_Implicit }, /* $ca */ - { "seb", 1, flNone, OH_AccumulatorBit }, /* $cb */ + { "seb6", 1, flNone, OH_AccumulatorBit }, /* $cb */ { "cpy", 3, flUseLabel|flAbsOverride, OH_Absolute }, /* $cc */ { "cmp", 3, flUseLabel|flAbsOverride, OH_Absolute }, /* $cd */ { "dec", 3, flUseLabel|flAbsOverride, OH_Absolute }, /* $ce */ - { "seb", 2, flUseLabel, OH_ZeroPageBit }, /* $cf */ + { "seb6", 2, flUseLabel, OH_ZeroPageBit }, /* $cf */ { "bne", 2, flLabel, OH_Relative }, /* $d0 */ { "cmp", 2, flUseLabel, OH_DirectIndirectY }, /* $d1 */ { "", 1, flIllegal, OH_Illegal }, /* $d2 */ - { "bbc", 2, flUseLabel, OH_AccumulatorBitBranch }, /* $d3 */ + { "bbc6", 2, flUseLabel, OH_AccumulatorBitBranch }, /* $d3 */ { "", 1, flIllegal, OH_Illegal }, /* $d4 */ { "cmp", 2, flUseLabel, OH_DirectX }, /* $d5 */ { "dec", 2, flUseLabel, OH_DirectX }, /* $d6 */ - { "bbc", 3, flUseLabel, OH_ZeroPageBit }, /* $d7 */ + { "bbc6", 3, flUseLabel, OH_BitBranch_m740 }, /* $d7 */ { "cld", 1, flNone, OH_Implicit }, /* $d8 */ { "cmp", 3, flUseLabel, OH_AbsoluteY }, /* $d9 */ { "", 1, flIllegal, OH_Illegal }, /* $da */ - { "clb", 1, flNone, OH_AccumulatorBit }, /* $db */ + { "clb6", 1, flNone, OH_AccumulatorBit }, /* $db */ { "", 1, flIllegal, OH_Illegal }, /* $dc */ { "cmp", 3, flUseLabel|flAbsOverride, OH_AbsoluteX }, /* $dd */ { "dec", 3, flUseLabel|flAbsOverride, OH_AbsoluteX }, /* $de */ - { "clb", 2, flUseLabel, OH_ZeroPageBit }, /* $df */ + { "clb6", 2, flUseLabel, OH_ZeroPageBit }, /* $df */ { "cpx", 2, flNone, OH_Immediate }, /* $e0 */ { "sbc", 2, flUseLabel, OH_DirectXIndirect }, /* $e1 */ - { "div", 2, flUseLabel, OH_DirectX }, /* $e2 */ - { "bbs", 2, flUseLabel, OH_AccumulatorBitBranch }, /* $e3 */ + { "fst", 1, flNone, OH_Implicit }, /* $e2 */ + { "bbs7", 2, flUseLabel, OH_AccumulatorBitBranch }, /* $e3 */ { "cpx", 2, flUseLabel, OH_Direct }, /* $e4 */ { "sbc", 2, flUseLabel, OH_Direct }, /* $e5 */ { "inc", 2, flUseLabel, OH_Direct }, /* $e6 */ - { "bbs", 3, flUseLabel, OH_ZeroPageBit }, /* $e7 */ + { "bbs7", 3, flUseLabel, OH_BitBranch_m740 }, /* $e7 */ { "inx", 1, flNone, OH_Implicit }, /* $e8 */ { "sbc", 2, flNone, OH_Immediate }, /* $e9 */ { "nop", 1, flNone, OH_Implicit }, /* $ea */ - { "seb", 1, flNone, OH_AccumulatorBit }, /* $eb */ + { "seb7", 1, flNone, OH_AccumulatorBit }, /* $eb */ { "cpx", 3, flUseLabel|flAbsOverride, OH_Absolute }, /* $ec */ { "sbc", 3, flUseLabel|flAbsOverride, OH_Absolute }, /* $ed */ { "inc", 3, flUseLabel|flAbsOverride, OH_Absolute }, /* $ee */ - { "seb", 2, flUseLabel, OH_ZeroPageBit }, /* $ef */ + { "seb7", 2, flUseLabel, OH_ZeroPageBit }, /* $ef */ { "beq", 2, flLabel, OH_Relative }, /* $f0 */ { "sbc", 2, flUseLabel, OH_DirectIndirectY }, /* $f1 */ { "", 1, flIllegal, OH_Illegal }, /* $f2 */ - { "bbc", 2, flUseLabel, OH_AccumulatorBitBranch }, /* $f3 */ + { "bbc7", 2, flUseLabel, OH_AccumulatorBitBranch }, /* $f3 */ { "", 1, flIllegal, OH_Illegal }, /* $f4 */ { "sbc", 2, flUseLabel, OH_DirectX }, /* $f5 */ { "inc", 2, flUseLabel, OH_DirectX }, /* $f6 */ - { "bbc", 3, flUseLabel, OH_ZeroPageBit }, /* $f7 */ + { "bbc7", 3, flUseLabel, OH_BitBranch_m740 }, /* $f7 */ { "sed", 1, flNone, OH_Implicit }, /* $f8 */ { "sbc", 3, flUseLabel, OH_AbsoluteY }, /* $f9 */ { "", 1, flIllegal, OH_Illegal }, /* $fa */ - { "clb", 1, flNone, OH_AccumulatorBit }, /* $fb */ + { "clb7", 1, flNone, OH_AccumulatorBit }, /* $fb */ { "", 1, flIllegal, OH_Illegal }, /* $fc */ { "sbc", 3, flUseLabel|flAbsOverride, OH_AbsoluteX }, /* $fd */ { "inc", 3, flUseLabel|flAbsOverride, OH_AbsoluteX }, /* $fe */ - { "clb", 2, flUseLabel, OH_ZeroPageBit }, /* $ff */ + { "clb7", 2, flUseLabel, OH_ZeroPageBit }, /* $ff */ }; diff --git a/src/da65/opctable.c b/src/da65/opctable.c index d9068d253..de90dd83a 100644 --- a/src/da65/opctable.c +++ b/src/da65/opctable.c @@ -36,12 +36,15 @@ /* da65 */ #include "error.h" #include "opc4510.h" +#include "opc45GS02.h" #include "opc6502.h" #include "opc6502x.h" #include "opc6502dtv.h" #include "opc65816.h" #include "opc65c02.h" #include "opc65sc02.h" +#include "opcw65c02.h" +#include "opc65ce02.h" #include "opchuc6280.h" #include "opcm740.h" #include "opctable.h" @@ -74,10 +77,13 @@ void SetOpcTable (cpu_t CPU) case CPU_6502DTV: OpcTable = OpcTable_6502DTV; break; case CPU_65SC02: OpcTable = OpcTable_65SC02; break; case CPU_65C02: OpcTable = OpcTable_65C02; break; + case CPU_W65C02: OpcTable = OpcTable_W65C02; break; + case CPU_65CE02: OpcTable = OpcTable_65CE02; break; case CPU_65816: OpcTable = OpcTable_65816; break; case CPU_HUC6280: OpcTable = OpcTable_HuC6280; break; case CPU_M740: OpcTable = OpcTable_M740; break; case CPU_4510: OpcTable = OpcTable_4510; break; + case CPU_45GS02: OpcTable = OpcTable_45GS02; break; default: Error ("Unsupported CPU"); } } diff --git a/src/da65/opcw65c02.c b/src/da65/opcw65c02.c new file mode 100644 index 000000000..2c48e1019 --- /dev/null +++ b/src/da65/opcw65c02.c @@ -0,0 +1,306 @@ +/*****************************************************************************/ +/* */ +/* opcw65c02.c */ +/* */ +/* W65C02 opcode description table */ +/* */ +/* */ +/* */ +/* (C) 2003-2011, Ullrich von Bassewitz */ +/* Roemerstrasse 52 */ +/* D-70794 Filderstadt */ +/* EMail: uz@cc65.org */ +/* */ +/* */ +/* This software is provided 'as-is', without any expressed or implied */ +/* warranty. In no event will the authors be held liable for any damages */ +/* arising from the use of this software. */ +/* */ +/* Permission is granted to anyone to use this software for any purpose, */ +/* including commercial applications, and to alter it and redistribute it */ +/* freely, subject to the following restrictions: */ +/* */ +/* 1. The origin of this software must not be misrepresented; you must not */ +/* claim that you wrote the original software. If you use this software */ +/* in a product, an acknowledgment in the product documentation would be */ +/* appreciated but is not required. */ +/* 2. Altered source versions must be plainly marked as such, and must not */ +/* be misrepresented as being the original software. */ +/* 3. This notice may not be removed or altered from any source */ +/* distribution. */ +/* */ +/*****************************************************************************/ + + + +/* da65 */ +#include "handler.h" +#include "opcw65c02.h" + + + +/*****************************************************************************/ +/* Data */ +/*****************************************************************************/ + + + +/* Descriptions for all opcodes */ +const OpcDesc OpcTable_W65C02[256] = { + { "brk", 1, flNone, OH_Implicit }, /* $00 */ + { "ora", 2, flUseLabel, OH_DirectXIndirect }, /* $01 */ + { "", 1, flIllegal, OH_Illegal, }, /* $02 */ + { "", 1, flIllegal, OH_Illegal, }, /* $03 */ + { "tsb", 2, flUseLabel, OH_Direct }, /* $04 */ + { "ora", 2, flUseLabel, OH_Direct }, /* $05 */ + { "asl", 2, flUseLabel, OH_Direct }, /* $06 */ + { "rmb0", 2, flUseLabel, OH_Direct, }, /* $07 */ + { "php", 1, flNone, OH_Implicit }, /* $08 */ + { "ora", 2, flNone, OH_Immediate }, /* $09 */ + { "asl", 1, flNone, OH_Accumulator }, /* $0a */ + { "", 1, flIllegal, OH_Illegal, }, /* $0b */ + { "tsb", 3, flUseLabel|flAbsOverride, OH_Absolute }, /* $0c */ + { "ora", 3, flUseLabel|flAbsOverride, OH_Absolute }, /* $0d */ + { "asl", 3, flUseLabel|flAbsOverride, OH_Absolute }, /* $0e */ + { "bbr0", 3, flUseLabel, OH_BitBranch }, /* $0f */ + { "bpl", 2, flLabel, OH_Relative }, /* $10 */ + { "ora", 2, flUseLabel, OH_DirectIndirectY }, /* $11 */ + { "ora", 2, flUseLabel, OH_DirectIndirect }, /* $12 */ + { "", 1, flIllegal, OH_Illegal, }, /* $13 */ + { "trb", 2, flUseLabel, OH_Direct }, /* $14 */ + { "ora", 2, flUseLabel, OH_DirectX }, /* $15 */ + { "asl", 2, flUseLabel, OH_DirectX }, /* $16 */ + { "rmb1", 2, flUseLabel, OH_Direct, }, /* $17 */ + { "clc", 1, flNone, OH_Implicit }, /* $18 */ + { "ora", 3, flUseLabel, OH_AbsoluteY }, /* $19 */ + { "inc", 1, flNone, OH_Accumulator }, /* $1a */ + { "", 1, flIllegal, OH_Illegal, }, /* $1b */ + { "trb", 3, flUseLabel|flAbsOverride, OH_Absolute }, /* $1c */ + { "ora", 3, flUseLabel|flAbsOverride, OH_AbsoluteX }, /* $1d */ + { "asl", 3, flUseLabel|flAbsOverride, OH_AbsoluteX }, /* $1e */ + { "bbr1", 3, flUseLabel, OH_BitBranch }, /* $1f */ + { "jsr", 3, flLabel, OH_JsrAbsolute }, /* $20 */ + { "and", 2, flUseLabel, OH_DirectXIndirect }, /* $21 */ + { "", 1, flIllegal, OH_Illegal, }, /* $22 */ + { "", 1, flIllegal, OH_Illegal, }, /* $23 */ + { "bit", 2, flUseLabel, OH_Direct }, /* $24 */ + { "and", 2, flUseLabel, OH_Direct }, /* $25 */ + { "rol", 2, flUseLabel, OH_Direct }, /* $26 */ + { "rmb2", 2, flUseLabel, OH_Direct, }, /* $27 */ + { "plp", 1, flNone, OH_Implicit }, /* $28 */ + { "and", 2, flNone, OH_Immediate }, /* $29 */ + { "rol", 1, flNone, OH_Accumulator }, /* $2a */ + { "", 1, flIllegal, OH_Illegal, }, /* $2b */ + { "bit", 3, flUseLabel|flAbsOverride, OH_Absolute }, /* $2c */ + { "and", 3, flUseLabel|flAbsOverride, OH_Absolute }, /* $2d */ + { "rol", 3, flUseLabel|flAbsOverride, OH_Absolute }, /* $2e */ + { "bbr2", 3, flUseLabel, OH_BitBranch }, /* $2f */ + { "bmi", 2, flLabel, OH_Relative }, /* $30 */ + { "and", 2, flUseLabel, OH_DirectIndirectY }, /* $31 */ + { "and", 2, flUseLabel, OH_DirectIndirect, }, /* $32 */ + { "", 1, flIllegal, OH_Illegal, }, /* $33 */ + { "bit", 2, flUseLabel, OH_DirectX }, /* $34 */ + { "and", 2, flUseLabel, OH_DirectX }, /* $35 */ + { "rol", 2, flUseLabel, OH_DirectX }, /* $36 */ + { "rmb3", 2, flUseLabel, OH_Direct, }, /* $37 */ + { "sec", 1, flNone, OH_Implicit }, /* $38 */ + { "and", 3, flUseLabel, OH_AbsoluteY }, /* $39 */ + { "dec", 1, flNone, OH_Accumulator }, /* $3a */ + { "", 1, flIllegal, OH_Illegal, }, /* $3b */ + { "bit", 3, flUseLabel, OH_AbsoluteX }, /* $3c */ + { "and", 3, flUseLabel|flAbsOverride, OH_AbsoluteX }, /* $3d */ + { "rol", 3, flUseLabel|flAbsOverride, OH_AbsoluteX }, /* $3e */ + { "bbr3", 3, flUseLabel, OH_BitBranch }, /* $3f */ + { "rti", 1, flNone, OH_Rts }, /* $40 */ + { "eor", 2, flUseLabel, OH_DirectXIndirect }, /* $41 */ + { "", 1, flIllegal, OH_Illegal, }, /* $42 */ + { "", 1, flIllegal, OH_Illegal, }, /* $43 */ + { "", 1, flIllegal, OH_Illegal, }, /* $44 */ + { "eor", 2, flUseLabel, OH_Direct }, /* $45 */ + { "lsr", 2, flUseLabel, OH_Direct }, /* $46 */ + { "rmb4", 2, flUseLabel, OH_Direct, }, /* $47 */ + { "pha", 1, flNone, OH_Implicit }, /* $48 */ + { "eor", 2, flNone, OH_Immediate }, /* $49 */ + { "lsr", 1, flNone, OH_Accumulator }, /* $4a */ + { "", 1, flIllegal, OH_Illegal, }, /* $4b */ + { "jmp", 3, flLabel, OH_JmpAbsolute }, /* $4c */ + { "eor", 3, flUseLabel|flAbsOverride, OH_Absolute }, /* $4d */ + { "lsr", 3, flUseLabel|flAbsOverride, OH_Absolute }, /* $4e */ + { "bbr4", 3, flUseLabel, OH_BitBranch }, /* $4f */ + { "bvc", 2, flLabel, OH_Relative }, /* $50 */ + { "eor", 2, flUseLabel, OH_DirectIndirectY }, /* $51 */ + { "eor", 2, flUseLabel, OH_DirectIndirect }, /* $52 */ + { "", 1, flIllegal, OH_Illegal, }, /* $53 */ + { "", 1, flIllegal, OH_Illegal, }, /* $54 */ + { "eor", 2, flUseLabel, OH_DirectX }, /* $55 */ + { "lsr", 2, flUseLabel, OH_DirectX }, /* $56 */ + { "rmb5", 2, flUseLabel, OH_Direct, }, /* $57 */ + { "cli", 1, flNone, OH_Implicit }, /* $58 */ + { "eor", 3, flUseLabel, OH_AbsoluteY }, /* $59 */ + { "phy", 1, flNone, OH_Implicit }, /* $5a */ + { "", 1, flIllegal, OH_Illegal, }, /* $5b */ + { "", 1, flIllegal, OH_Illegal, }, /* $5c */ + { "eor", 3, flUseLabel|flAbsOverride, OH_AbsoluteX }, /* $5d */ + { "lsr", 3, flUseLabel|flAbsOverride, OH_AbsoluteX }, /* $5e */ + { "bbr5", 3, flUseLabel, OH_BitBranch }, /* $5f */ + { "rts", 1, flNone, OH_Rts }, /* $60 */ + { "adc", 2, flUseLabel, OH_DirectXIndirect }, /* $61 */ + { "", 1, flIllegal, OH_Illegal, }, /* $62 */ + { "", 1, flIllegal, OH_Illegal, }, /* $63 */ + { "stz", 2, flUseLabel, OH_Direct }, /* $64 */ + { "adc", 2, flUseLabel, OH_Direct }, /* $65 */ + { "ror", 2, flUseLabel, OH_Direct }, /* $66 */ + { "rmb6", 2, flUseLabel, OH_Direct, }, /* $67 */ + { "pla", 1, flNone, OH_Implicit }, /* $68 */ + { "adc", 2, flNone, OH_Immediate }, /* $69 */ + { "ror", 1, flNone, OH_Accumulator }, /* $6a */ + { "", 1, flIllegal, OH_Illegal, }, /* $6b */ + { "jmp", 3, flLabel, OH_JmpAbsoluteIndirect }, /* $6c */ + { "adc", 3, flUseLabel|flAbsOverride, OH_Absolute }, /* $6d */ + { "ror", 3, flUseLabel|flAbsOverride, OH_Absolute }, /* $6e */ + { "bbr6", 3, flUseLabel, OH_BitBranch }, /* $6f */ + { "bvs", 2, flLabel, OH_Relative }, /* $70 */ + { "adc", 2, flUseLabel, OH_DirectIndirectY }, /* $71 */ + { "adc", 2, flUseLabel, OH_DirectIndirect, }, /* $72 */ + { "", 1, flIllegal, OH_Illegal, }, /* $73 */ + { "stz", 2, flUseLabel, OH_DirectX }, /* $74 */ + { "adc", 2, flUseLabel, OH_DirectX }, /* $75 */ + { "ror", 2, flUseLabel, OH_DirectX }, /* $76 */ + { "rmb7", 2, flUseLabel, OH_Direct, }, /* $77 */ + { "sei", 1, flNone, OH_Implicit }, /* $78 */ + { "adc", 3, flUseLabel, OH_AbsoluteY }, /* $79 */ + { "ply", 1, flNone, OH_Implicit }, /* $7a */ + { "", 1, flIllegal, OH_Illegal, }, /* $7b */ + { "jmp", 3, flLabel, OH_AbsoluteXIndirect }, /* $7c */ + { "adc", 3, flUseLabel|flAbsOverride, OH_AbsoluteX }, /* $7d */ + { "ror", 3, flUseLabel|flAbsOverride, OH_AbsoluteX }, /* $7e */ + { "bbr7", 3, flUseLabel, OH_BitBranch }, /* $7f */ + { "bra", 2, flLabel, OH_Relative }, /* $80 */ + { "sta", 2, flUseLabel, OH_DirectXIndirect }, /* $81 */ + { "", 1, flIllegal, OH_Illegal, }, /* $82 */ + { "", 1, flIllegal, OH_Illegal, }, /* $83 */ + { "sty", 2, flUseLabel, OH_Direct }, /* $84 */ + { "sta", 2, flUseLabel, OH_Direct }, /* $85 */ + { "stx", 2, flUseLabel, OH_Direct }, /* $86 */ + { "smb0", 2, flUseLabel, OH_Direct, }, /* $87 */ + { "dey", 1, flNone, OH_Implicit }, /* $88 */ + { "bit", 2, flNone, OH_Immediate }, /* $89 */ + { "txa", 1, flNone, OH_Implicit }, /* $8a */ + { "", 1, flIllegal, OH_Illegal, }, /* $8b */ + { "sty", 3, flUseLabel|flAbsOverride, OH_Absolute }, /* $8c */ + { "sta", 3, flUseLabel|flAbsOverride, OH_Absolute }, /* $8d */ + { "stx", 3, flUseLabel|flAbsOverride, OH_Absolute }, /* $8e */ + { "bbs0", 3, flUseLabel, OH_BitBranch }, /* $8f */ + { "bcc", 2, flLabel, OH_Relative }, /* $90 */ + { "sta", 2, flUseLabel, OH_DirectIndirectY }, /* $91 */ + { "sta", 2, flUseLabel, OH_DirectIndirect }, /* $92 */ + { "", 1, flIllegal, OH_Illegal, }, /* $93 */ + { "sty", 2, flUseLabel, OH_DirectX }, /* $94 */ + { "sta", 2, flUseLabel, OH_DirectX }, /* $95 */ + { "stx", 2, flUseLabel, OH_DirectY }, /* $96 */ + { "smb1", 2, flUseLabel, OH_Direct, }, /* $97 */ + { "tya", 1, flNone, OH_Implicit }, /* $98 */ + { "sta", 3, flUseLabel, OH_AbsoluteY }, /* $99 */ + { "txs", 1, flNone, OH_Implicit }, /* $9a */ + { "", 1, flIllegal, OH_Illegal, }, /* $9b */ + { "stz", 3, flUseLabel|flAbsOverride, OH_Absolute }, /* $9c */ + { "sta", 3, flUseLabel|flAbsOverride, OH_AbsoluteX }, /* $9d */ + { "stz", 3, flUseLabel|flAbsOverride, OH_AbsoluteX }, /* $9e */ + { "bbs1", 3, flUseLabel, OH_BitBranch }, /* $9f */ + { "ldy", 2, flNone, OH_Immediate }, /* $a0 */ + { "lda", 2, flUseLabel, OH_DirectXIndirect }, /* $a1 */ + { "ldx", 2, flNone, OH_Immediate }, /* $a2 */ + { "", 1, flIllegal, OH_Illegal, }, /* $a3 */ + { "ldy", 2, flUseLabel, OH_Direct }, /* $a4 */ + { "lda", 2, flUseLabel, OH_Direct }, /* $a5 */ + { "ldx", 2, flUseLabel, OH_Direct }, /* $a6 */ + { "smb2", 2, flUseLabel, OH_Direct, }, /* $a7 */ + { "tay", 1, flNone, OH_Implicit }, /* $a8 */ + { "lda", 2, flNone, OH_Immediate }, /* $a9 */ + { "tax", 1, flNone, OH_Implicit }, /* $aa */ + { "", 1, flIllegal, OH_Illegal, }, /* $ab */ + { "ldy", 3, flUseLabel|flAbsOverride, OH_Absolute }, /* $ac */ + { "lda", 3, flUseLabel|flAbsOverride, OH_Absolute }, /* $ad */ + { "ldx", 3, flUseLabel|flAbsOverride, OH_Absolute }, /* $ae */ + { "bbs2", 3, flUseLabel, OH_BitBranch }, /* $af */ + { "bcs", 2, flLabel, OH_Relative }, /* $b0 */ + { "lda", 2, flUseLabel, OH_DirectIndirectY }, /* $b1 */ + { "lda", 2, flUseLabel, OH_DirectIndirect }, /* $b2 */ + { "", 1, flIllegal, OH_Illegal, }, /* $b3 */ + { "ldy", 2, flUseLabel, OH_DirectX }, /* $b4 */ + { "lda", 2, flUseLabel, OH_DirectX }, /* $b5 */ + { "ldx", 2, flUseLabel, OH_DirectY }, /* $b6 */ + { "smb3", 2, flUseLabel, OH_Direct, }, /* $b7 */ + { "clv", 1, flNone, OH_Implicit }, /* $b8 */ + { "lda", 3, flUseLabel, OH_AbsoluteY }, /* $b9 */ + { "tsx", 1, flNone, OH_Implicit }, /* $ba */ + { "", 1, flIllegal, OH_Illegal, }, /* $bb */ + { "ldy", 3, flUseLabel|flAbsOverride, OH_AbsoluteX }, /* $bc */ + { "lda", 3, flUseLabel|flAbsOverride, OH_AbsoluteX }, /* $bd */ + { "ldx", 3, flUseLabel|flAbsOverride, OH_AbsoluteY }, /* $be */ + { "bbs3", 3, flUseLabel, OH_BitBranch }, /* $bf */ + { "cpy", 2, flNone, OH_Immediate }, /* $c0 */ + { "cmp", 2, flUseLabel, OH_DirectXIndirect }, /* $c1 */ + { "", 1, flIllegal, OH_Illegal, }, /* $c2 */ + { "", 1, flIllegal, OH_Illegal, }, /* $c3 */ + { "cpy", 2, flUseLabel, OH_Direct }, /* $c4 */ + { "cmp", 2, flUseLabel, OH_Direct }, /* $c5 */ + { "dec", 2, flUseLabel, OH_Direct }, /* $c6 */ + { "smb4", 2, flUseLabel, OH_Direct, }, /* $c7 */ + { "iny", 1, flNone, OH_Implicit }, /* $c8 */ + { "cmp", 2, flNone, OH_Immediate }, /* $c9 */ + { "dex", 1, flNone, OH_Implicit }, /* $ca */ + { "wai", 1, flNone, OH_Implicit }, /* $cb */ + { "cpy", 3, flUseLabel|flAbsOverride, OH_Absolute }, /* $cc */ + { "cmp", 3, flUseLabel|flAbsOverride, OH_Absolute }, /* $cd */ + { "dec", 3, flUseLabel|flAbsOverride, OH_Absolute }, /* $ce */ + { "bbs4", 3, flUseLabel, OH_BitBranch }, /* $cf */ + { "bne", 2, flLabel, OH_Relative }, /* $d0 */ + { "cmp", 2, flUseLabel, OH_DirectIndirectY }, /* $d1 */ + { "cmp", 2, flUseLabel, OH_DirectIndirect }, /* $d2 */ + { "", 1, flIllegal, OH_Illegal, }, /* $d3 */ + { "", 1, flIllegal, OH_Illegal, }, /* $d4 */ + { "cmp", 2, flUseLabel, OH_DirectX }, /* $d5 */ + { "dec", 2, flUseLabel, OH_DirectX }, /* $d6 */ + { "smb5", 2, flUseLabel, OH_Direct, }, /* $d7 */ + { "cld", 1, flNone, OH_Implicit }, /* $d8 */ + { "cmp", 3, flUseLabel, OH_AbsoluteY }, /* $d9 */ + { "phx", 1, flNone, OH_Implicit }, /* $da */ + { "stp", 1, flNone, OH_Implicit }, /* $db */ + { "", 1, flIllegal, OH_Illegal, }, /* $dc */ + { "cmp", 3, flUseLabel|flAbsOverride, OH_AbsoluteX }, /* $dd */ + { "dec", 3, flUseLabel|flAbsOverride, OH_AbsoluteX }, /* $de */ + { "bbs5", 3, flUseLabel, OH_BitBranch }, /* $df */ + { "cpx", 2, flNone, OH_Immediate }, /* $e0 */ + { "sbc", 2, flUseLabel, OH_DirectXIndirect }, /* $e1 */ + { "", 1, flIllegal, OH_Illegal, }, /* $e2 */ + { "", 1, flIllegal, OH_Illegal, }, /* $e3 */ + { "cpx", 2, flUseLabel, OH_Direct }, /* $e4 */ + { "sbc", 2, flUseLabel, OH_Direct }, /* $e5 */ + { "inc", 2, flUseLabel, OH_Direct }, /* $e6 */ + { "smb6", 2, flUseLabel, OH_Direct, }, /* $e7 */ + { "inx", 1, flNone, OH_Implicit }, /* $e8 */ + { "sbc", 2, flNone, OH_Immediate }, /* $e9 */ + { "nop", 1, flNone, OH_Implicit }, /* $ea */ + { "", 1, flIllegal, OH_Illegal, }, /* $eb */ + { "cpx", 3, flUseLabel|flAbsOverride, OH_Absolute }, /* $ec */ + { "sbc", 3, flUseLabel|flAbsOverride, OH_Absolute }, /* $ed */ + { "inc", 3, flUseLabel|flAbsOverride, OH_Absolute }, /* $ee */ + { "bbs6", 3, flUseLabel, OH_BitBranch }, /* $ef */ + { "beq", 2, flLabel, OH_Relative }, /* $f0 */ + { "sbc", 2, flUseLabel, OH_DirectIndirectY }, /* $f1 */ + { "sbc", 2, flUseLabel, OH_DirectIndirect }, /* $f2 */ + { "", 1, flIllegal, OH_Illegal, }, /* $f3 */ + { "", 1, flIllegal, OH_Illegal, }, /* $f4 */ + { "sbc", 2, flUseLabel, OH_DirectX }, /* $f5 */ + { "inc", 2, flUseLabel, OH_DirectX }, /* $f6 */ + { "smb7", 2, flUseLabel, OH_Direct, }, /* $f7 */ + { "sed", 1, flNone, OH_Implicit }, /* $f8 */ + { "sbc", 3, flUseLabel, OH_AbsoluteY }, /* $f9 */ + { "plx", 1, flNone, OH_Implicit }, /* $fa */ + { "", 1, flIllegal, OH_Illegal, }, /* $fb */ + { "", 1, flIllegal, OH_Illegal, }, /* $fc */ + { "sbc", 3, flUseLabel|flAbsOverride, OH_AbsoluteX }, /* $fd */ + { "inc", 3, flUseLabel|flAbsOverride, OH_AbsoluteX }, /* $fe */ + { "bbs7", 3, flUseLabel, OH_BitBranch }, /* $ff */ +}; diff --git a/src/da65/opcw65c02.h b/src/da65/opcw65c02.h new file mode 100644 index 000000000..0805ce5dd --- /dev/null +++ b/src/da65/opcw65c02.h @@ -0,0 +1,58 @@ +/*****************************************************************************/ +/* */ +/* opcw65c02.h */ +/* */ +/* W65C02 opcode description table */ +/* */ +/* */ +/* */ +/* (C) 2003 Ullrich von Bassewitz */ +/* Roemerstrasse 52 */ +/* D-70794 Filderstadt */ +/* EMail: uz@cc65.org */ +/* */ +/* */ +/* This software is provided 'as-is', without any expressed or implied */ +/* warranty. In no event will the authors be held liable for any damages */ +/* arising from the use of this software. */ +/* */ +/* Permission is granted to anyone to use this software for any purpose, */ +/* including commercial applications, and to alter it and redistribute it */ +/* freely, subject to the following restrictions: */ +/* */ +/* 1. The origin of this software must not be misrepresented; you must not */ +/* claim that you wrote the original software. If you use this software */ +/* in a product, an acknowledgment in the product documentation would be */ +/* appreciated but is not required. */ +/* 2. Altered source versions must be plainly marked as such, and must not */ +/* be misrepresented as being the original software. */ +/* 3. This notice may not be removed or altered from any source */ +/* distribution. */ +/* */ +/*****************************************************************************/ + + + +#ifndef OPCW65C02_H +#define OPCW65C02_H + + + +#include "opcdesc.h" + + + +/*****************************************************************************/ +/* Data */ +/*****************************************************************************/ + + + +/* Descriptions for all opcodes */ +extern const OpcDesc OpcTable_W65C02[256]; + + + +/* End of opcw65c02.h */ + +#endif diff --git a/src/da65/output.c b/src/da65/output.c index 8e786e130..13cb3e127 100644 --- a/src/da65/output.c +++ b/src/da65/output.c @@ -33,6 +33,7 @@ +#include <inttypes.h> #include <stdio.h> #include <stdarg.h> #include <string.h> @@ -123,7 +124,7 @@ void CloseOutput (void) void Output (const char* Format, ...) /* Write to the output file */ { - if (Pass == PassCount) { + if (Pass == PASS_FINAL) { va_list ap; va_start (ap, Format); Col += vfprintf (F, Format, ap); @@ -136,7 +137,7 @@ void Output (const char* Format, ...) void Indent (unsigned N) /* Make sure the current line column is at position N (zero based) */ { - if (Pass == PassCount) { + if (Pass == PASS_FINAL) { while (Col < N) { fputc (' ', F); ++Col; @@ -149,7 +150,7 @@ void Indent (unsigned N) void LineFeed (void) /* Add a linefeed to the output file */ { - if (Pass == PassCount) { + if (Pass == PASS_FINAL) { fputc ('\n', F); if (PageLength > 0 && ++Line >= PageLength) { if (FormFeeds) { @@ -184,7 +185,7 @@ void DefForward (const char* Name, const char* Comment, unsigned Offs) ** current PC. */ { - if (Pass == PassCount) { + if (Pass == PASS_FINAL) { /* Flush existing output if necessary */ if (Col > 1) { LineFeed (); @@ -208,13 +209,13 @@ void DefForward (const char* Name, const char* Comment, unsigned Offs) -void DefConst (const char* Name, const char* Comment, unsigned Addr) +void DefConst (const char* Name, const char* Comment, uint32_t Addr) /* Define an address constant */ { - if (Pass == PassCount) { + if (Pass == PASS_FINAL) { Output ("%s", Name); Indent (ACol); - Output (":= $%04X", Addr); + Output (":= $%04" PRIX32, Addr); if (Comment) { Indent (CCol); Output ("; %s", Comment); @@ -225,19 +226,19 @@ void DefConst (const char* Name, const char* Comment, unsigned Addr) -void DataByteLine (unsigned ByteCount) +void DataByteLine (uint32_t ByteCount) /* Output a line with bytes */ { - unsigned I; + uint32_t I; Indent (MCol); Output (".byte"); Indent (ACol); for (I = 0; I < ByteCount; ++I) { if (I > 0) { - Output (",$%02X", CodeBuf[PC+I]); + Output (",$%02" PRIX8, CodeBuf[PC+I]); } else { - Output ("$%02X", CodeBuf[PC+I]); + Output ("$%02" PRIX8, CodeBuf[PC+I]); } } LineComment (PC, ByteCount); @@ -246,19 +247,19 @@ void DataByteLine (unsigned ByteCount) -void DataDByteLine (unsigned ByteCount) +void DataDByteLine (uint32_t ByteCount) /* Output a line with dbytes */ { - unsigned I; + uint32_t I; Indent (MCol); Output (".dbyt"); Indent (ACol); for (I = 0; I < ByteCount; I += 2) { if (I > 0) { - Output (",$%04X", GetCodeDByte (PC+I)); + Output (",$%04" PRIX16, GetCodeDByte (PC+I)); } else { - Output ("$%04X", GetCodeDByte (PC+I)); + Output ("$%04" PRIX16, GetCodeDByte (PC+I)); } } LineComment (PC, ByteCount); @@ -267,19 +268,19 @@ void DataDByteLine (unsigned ByteCount) -void DataWordLine (unsigned ByteCount) +void DataWordLine (uint32_t ByteCount) /* Output a line with words */ { - unsigned I; + uint32_t I; Indent (MCol); Output (".word"); Indent (ACol); for (I = 0; I < ByteCount; I += 2) { if (I > 0) { - Output (",$%04X", GetCodeWord (PC+I)); + Output (",$%04" PRIX16, GetCodeWord (PC+I)); } else { - Output ("$%04X", GetCodeWord (PC+I)); + Output ("$%04" PRIX16, GetCodeWord (PC+I)); } } LineComment (PC, ByteCount); @@ -288,19 +289,19 @@ void DataWordLine (unsigned ByteCount) -void DataDWordLine (unsigned ByteCount) +void DataDWordLine (uint32_t ByteCount) /* Output a line with dwords */ { - unsigned I; + uint32_t I; Indent (MCol); Output (".dword"); Indent (ACol); for (I = 0; I < ByteCount; I += 4) { if (I > 0) { - Output (",$%08lX", GetCodeDWord (PC+I)); + Output (",$%08" PRIX32, GetCodeDWord (PC+I)); } else { - Output ("$%08lX", GetCodeDWord (PC+I)); + Output ("$%08" PRIX32, GetCodeDWord (PC+I)); } } LineComment (PC, ByteCount); @@ -312,7 +313,7 @@ void DataDWordLine (unsigned ByteCount) void SeparatorLine (void) /* Print a separator line */ { - if (Pass == PassCount && Comments >= 1) { + if (Pass == PASS_FINAL && Comments >= 1) { Output ("; ----------------------------------------------------------------------------"); LineFeed (); } @@ -323,7 +324,7 @@ void SeparatorLine (void) void StartSegment (const char* Name, unsigned AddrSize) /* Start a segment */ { - if (Pass == PassCount) { + if (Pass == PASS_FINAL) { LineFeed (); Output (".segment"); Indent (ACol); @@ -367,17 +368,17 @@ void LineComment (unsigned PC, unsigned Count) { unsigned I; - if (Pass == PassCount && Comments >= 2) { + if (Pass == PASS_FINAL && Comments >= 2) { Indent (CCol); Output ("; %04X", PC); if (Comments >= 3) { for (I = 0; I < Count; ++I) { - Output (" %02X", CodeBuf [PC+I]); + Output (" %02" PRIX8, CodeBuf [PC+I]); } if (Comments >= 4) { Indent (TCol); for (I = 0; I < Count; ++I) { - unsigned char C = CodeBuf [PC+I]; + uint8_t C = CodeBuf [PC+I]; if (!isprint (C)) { C = '.'; } diff --git a/src/da65/output.h b/src/da65/output.h index bc20aace0..7370e0786 100644 --- a/src/da65/output.h +++ b/src/da65/output.h @@ -72,22 +72,22 @@ void DefForward (const char* Name, const char* Comment, unsigned Offs); ** current PC. */ -void DefConst (const char* Name, const char* Comment, unsigned Addr); +void DefConst (const char* Name, const char* Comment, uint32_t Addr); /* Define an address constant */ void OneDataByte (void); /* Output a .byte line with the current code byte */ -void DataByteLine (unsigned ByteCount); +void DataByteLine (uint32_t ByteCount); /* Output a line with bytes */ -void DataDByteLine (unsigned ByteCount); +void DataDByteLine (uint32_t ByteCount); /* Output a line with dbytes */ -void DataWordLine (unsigned ByteCount); +void DataWordLine (uint32_t ByteCount); /* Output a line with words */ -void DataDWordLine (unsigned ByteCount); +void DataDWordLine (uint32_t ByteCount); /* Output a line with dwords */ void SeparatorLine (void); diff --git a/src/da65/scanner.c b/src/da65/scanner.c index d0301c08a..22319aba3 100644 --- a/src/da65/scanner.c +++ b/src/da65/scanner.c @@ -600,11 +600,11 @@ void InfoAssureIdent (void) -void InfoRangeCheck (long Lo, long Hi) +void InfoRangeCheck (const char* Attr, long Lo, long Hi) /* Check the range of InfoIVal */ { if (InfoIVal < Lo || InfoIVal > Hi) { - InfoError ("Range error"); + InfoError ("Range error for attribute %s", Attr); } } @@ -671,8 +671,8 @@ void InfoSetName (const char* Name) /* Set a name for a config file */ { InfoFile = Name; - xfree(InputSrcName); - InputSrcName = xstrdup(Name); + xfree (InputSrcName); + InputSrcName = xstrdup (Name); } diff --git a/src/da65/scanner.h b/src/da65/scanner.h index ce76d4a98..e34aecb4f 100644 --- a/src/da65/scanner.h +++ b/src/da65/scanner.h @@ -191,7 +191,7 @@ void InfoAssureChar (void); void InfoAssureIdent (void); /* Make sure the next token is an identifier */ -void InfoRangeCheck (long Lo, long Hi); +void InfoRangeCheck (const char* Attr, long Lo, long Hi); /* Check the range of InfoIVal */ void InfoSpecialToken (const IdentTok* Table, unsigned Size, const char* Name); diff --git a/src/da65/segment.c b/src/da65/segment.c index 12d4cf656..1a0b3b062 100644 --- a/src/da65/segment.c +++ b/src/da65/segment.c @@ -58,7 +58,7 @@ typedef struct Segment Segment; struct Segment { Segment* NextStart; /* Pointer to next segment */ - unsigned long Start; + uint32_t Start; unsigned AddrSize; char Name[1]; /* Name, dynamically allocated */ }; @@ -76,7 +76,7 @@ static Segment* StartTab[HASH_SIZE]; /* Table containing segment starts */ -void AddAbsSegment (unsigned Start, unsigned End, const char* Name) +void AddAbsSegment (uint32_t Start, uint32_t End, const char* Name) /* Add an absolute segment to the segment table */ { /* Get the length of the name */ @@ -104,7 +104,7 @@ void AddAbsSegment (unsigned Start, unsigned End, const char* Name) -char* GetSegmentStartName (unsigned Addr) +char* GetSegmentStartName (uint32_t Addr) /* Return the name of the segment which starts at the given address */ { Segment* S = StartTab[Addr % HASH_SIZE]; @@ -122,7 +122,7 @@ char* GetSegmentStartName (unsigned Addr) -unsigned GetSegmentAddrSize (unsigned Addr) +unsigned GetSegmentAddrSize (uint32_t Addr) /* Return the address size of the segment which starts at the given address */ { Segment* S = StartTab[Addr % HASH_SIZE]; diff --git a/src/da65/segment.h b/src/da65/segment.h index b1423bb41..5da30fda3 100644 --- a/src/da65/segment.h +++ b/src/da65/segment.h @@ -44,13 +44,13 @@ -void AddAbsSegment (unsigned Start, unsigned End, const char* Name); +void AddAbsSegment (uint32_t Start, uint32_t End, const char* Name); /* Add an absolute segment to the segment table */ -char* GetSegmentStartName (unsigned Addr); +char* GetSegmentStartName (uint32_t Addr); /* Return the name of the segment which starts at the given address */ -unsigned GetSegmentAddrSize (unsigned Addr); +unsigned GetSegmentAddrSize (uint32_t Addr); /* Return the address size of the segment which starts at the given address */ diff --git a/src/dbginfo/dbginfo.c b/src/dbginfo/dbginfo.c index 1f693e513..896043cb6 100644 --- a/src/dbginfo/dbginfo.c +++ b/src/dbginfo/dbginfo.c @@ -2523,6 +2523,7 @@ static void NextChar (InputData* D) +/* CAUTION: table must be sorted for bsearch */ static void NextToken (InputData* D) /* Read the next token from the input stream */ { @@ -2530,6 +2531,7 @@ static void NextToken (InputData* D) const char Keyword[12]; Token Tok; } KeywordTable[] = { +/* BEGIN SORTED.SH */ { "abs", TOK_ABSOLUTE }, { "addrsize", TOK_ADDRSIZE }, { "auto", TOK_AUTO }, @@ -2578,6 +2580,7 @@ static void NextToken (InputData* D) { "var", TOK_VAR }, { "version", TOK_VERSION }, { "zp", TOK_ZEROPAGE }, +/* END SORTED.SH */ }; diff --git a/src/dbginfo/dbgsh.c b/src/dbginfo/dbgsh.c index 6a95db2af..e848c47cd 100644 --- a/src/dbginfo/dbgsh.c +++ b/src/dbginfo/dbgsh.c @@ -458,7 +458,7 @@ static unsigned FindIdType (const char* TypeName) { "segment", SegmentId }, { "source", SourceId }, { "src", SourceId }, - { "sp", SpanId }, + { "c_sp", SpanId }, { "span", SpanId }, { "sym", SymbolId }, { "symbol", SymbolId }, diff --git a/src/ld65/config.c b/src/ld65/config.c index 947302e98..cb55fae69 100644 --- a/src/ld65/config.c +++ b/src/ld65/config.c @@ -2107,7 +2107,9 @@ unsigned CfgProcess (void) FillLevel - M->Size, (FillLevel - M->Size == 1) ? "" : "s"); } if (FillLevel > M->FillLevel) { - /* Regular segments increase FillLevel. Overwrite segments may increase but not decrease FillLevel. */ + /* Regular segments increase FillLevel. Overwrite segments may + ** increase but not decrease FillLevel. + */ FillAdded = FillLevel - M->FillLevel; M->FillLevel = FillLevel; } @@ -2127,15 +2129,18 @@ unsigned CfgProcess (void) /* Calculate the new address */ Addr += S->Seg->Size; - /* If this segment will go out to the file, or its place - ** in the file will be filled, then increase the file size. - ** An OVERWRITE segment will only increase the size if it overlapped some of the fill area. + /* If this segment will go out to the file, or its place in the + ** file will be filled, then increase the file size. An OVERWRITE + ** segment will only increase the size if it overlapped some of + ** the fill area. */ if (S->Load == M && ((S->Flags & SF_BSS) == 0 || (M->Flags & MF_FILL) != 0)) { - M->F->Size += (!(S->Flags & SF_OVERWRITE)) ? - (Addr - StartAddr) : - FillAdded; + if ((S->Flags & SF_OVERWRITE) == 0) { + M->F->Size += Addr - StartAddr; + } else { + M->F->Size += FillAdded; + } } } @@ -2173,7 +2178,7 @@ unsigned CfgProcess (void) ** area, account for that in the file size. */ if ((M->Flags & MF_OVERFLOW) == 0 && (M->Flags & MF_FILL) != 0) { - M->F->Size += (M->Size - M->FillLevel); + M->F->Size = M->FileOffs + M->Size; } } diff --git a/src/sim65/main.c b/src/sim65/main.c index 828ea498e..3cc9581b5 100644 --- a/src/sim65/main.c +++ b/src/sim65/main.c @@ -230,7 +230,7 @@ static unsigned char ReadProgramFile (void) } } - /* Get the address of sp from the file header */ + /* Get the address of c_sp from the file header */ if ((Val = fgetc(F)) != EOF) { SPAddr = Val; } diff --git a/src/sp65/convert.c b/src/sp65/convert.c index a9047ffb0..3ffdbab7d 100644 --- a/src/sp65/convert.c +++ b/src/sp65/convert.c @@ -61,14 +61,17 @@ struct ConverterMapEntry { StrBuf* (*ConvertFunc) (const Bitmap*, const Collection*); }; -/* Converter table, alphabetically sorted */ +/* Converter table */ +/* CAUTION: table must be alphabetically sorted for bsearch */ static const ConverterMapEntry ConverterMap[] = { +/* BEGIN SORTED.SH */ { "geos-bitmap", GenGeosBitmap }, { "geos-icon", GenGeosIcon }, { "koala", GenKoala }, { "lynx-sprite", GenLynxSprite }, { "raw", GenRaw }, { "vic2-sprite", GenVic2Sprite }, +/* END SORTED.SH */ }; diff --git a/src/sp65/input.c b/src/sp65/input.c index f1df247ae..ac3aeaf99 100644 --- a/src/sp65/input.c +++ b/src/sp65/input.c @@ -69,12 +69,14 @@ static InputFormatDesc InputFormatTable[ifCount] = { { ReadPCXFile }, }; -/* Table that maps extensions to input formats. Must be sorted alphabetically */ +/* Table that maps extensions to input formats. */ +/* CAUTION: table must be alphabetically sorted for bsearch */ static const FileId FormatTable[] = { /* Upper case stuff for obsolete operating systems */ +/* BEGIN SORTED.SH */ { "PCX", ifPCX }, - { "pcx", ifPCX }, +/* END SORTED.SH */ }; diff --git a/src/sp65/output.c b/src/sp65/output.c index c12d1f612..0c8fa59a7 100644 --- a/src/sp65/output.c +++ b/src/sp65/output.c @@ -78,22 +78,24 @@ static OutputFormatDesc OutputFormatTable[ofCount] = { { WriteCFile }, }; -/* Table that maps extensions to Output formats. Must be sorted alphabetically */ +/* Table that maps extensions to Output formats. */ +/* CAUTION: table must be alphabetically sorted for bsearch */ static const FileId FormatTable[] = { /* Upper case stuff for obsolete operating systems */ +/* BEGIN SORTED.SH */ { "A", ofAsm }, { "ASM", ofAsm }, { "BIN", ofBin }, { "C", ofC }, { "INC", ofAsm }, { "S", ofAsm }, - { "a", ofAsm }, { "asm", ofAsm }, { "bin", ofBin }, { "c", ofC }, { "inc", ofAsm }, { "s", ofAsm }, +/* END SORTED.SH */ }; diff --git a/src/sp65/palconv.c b/src/sp65/palconv.c index e92f3c22e..42adb1b33 100644 --- a/src/sp65/palconv.c +++ b/src/sp65/palconv.c @@ -56,9 +56,12 @@ struct PaletteMapEntry { StrBuf* (*PaletteFunc) (const Bitmap*, const Collection*); }; -/* Converter table, alphabetically sorted */ +/* Converter table */ +/* CAUTION: table must be alphabetically sorted for bsearch */ static const PaletteMapEntry PaletteMap[] = { +/* BEGIN SORTED.SH */ { "lynx-palette", GenLynxPalette }, +/* END SORTED.SH */ }; diff --git a/targettest/Makefile b/targettest/Makefile index f78e22461..2b9732c67 100644 --- a/targettest/Makefile +++ b/targettest/Makefile @@ -1,3 +1,9 @@ +# ---- Display info during parsing phase ---- +SILENT:=$(findstring s,$(word 1, $(MAKEFLAGS))) +ifneq ($(SILENT),s) + $(info Using Makefile: $(realpath $(firstword $(MAKEFILE_LIST))) $(MAKECMDGOALS)) +endif + # # Makefile for cc65 testcode # @@ -41,6 +47,19 @@ else LD := $(if $(wildcard ../bin/ld65*),../bin/ld65,ld65) endif +ifeq ($(SILENT),s) + QUIET = 1 +endif + +ifdef QUIET + .SILENT: + PQ = "QUIET=1" + PD = --no-print-directory +ifndef CMD_EXE + CATERR = 2> $$@.errlog || (cat $$@.errlog && false) +endif +endif + ifneq ($(filter disk testcode.%,$(MAKECMDGOALS)),) ifdef CC65_HOME TARGET_PATH = $(CC65_HOME)/target @@ -114,11 +133,13 @@ DISK_atarixl = testcode.atr %: %.s .c.o: - $(CC) $(CFLAGS) -Ors --codesize 500 -T -g -t $(SYS) $< - $(AS) $(<:.c=.s) + $(if $(QUIET),echo $(SYS):$*.c) + $(CC) $(CFLAGS) -Ors --codesize 500 -T -g -t $(SYS) $< $(CATERR) + $(AS) $(<:.c=.s) $(CATERR) .s.o: - $(AS) $(ASFLAGS) -t $(SYS) $< + $(if $(QUIET),echo $(SYS):$*.s) + $(AS) $(ASFLAGS) -t $(SYS) $< $(CATERR) .PRECIOUS: %.o @@ -602,6 +623,64 @@ EXELIST_cx16 = \ strqtok-test \ uname-test +# omitted: deb em-test joy-test mouse-test ser-test seek +EXELIST_c65 = \ + arg-test \ + clock \ + clock-test \ + conio \ + cpeek-test \ + cprintf \ + cursor \ + dir-test \ + div-test \ + exec-test1 \ + exec-test2 \ + fileio-test \ + ft \ + getopt-test \ + heaptest \ + moddiv-test \ + mul-test \ + posixio-test \ + rename-test \ + scanf-test \ + strdup-test \ + strnlen \ + stroserror-test \ + strqtok-test \ + uname-test \ + minimal + +# omitted: deb em-test joy-test mouse-test ser-test seek +EXELIST_mega65 = \ + arg-test \ + clock \ + clock-test \ + conio \ + cpeek-test \ + cprintf \ + cursor \ + dir-test \ + div-test \ + exec-test1 \ + exec-test2 \ + fileio-test \ + ft \ + getopt-test \ + heaptest \ + moddiv-test \ + mul-test \ + posixio-test \ + rename-test \ + scanf-test \ + strdup-test \ + strnlen \ + stroserror-test \ + strqtok-test \ + uname-test \ + minimal + # omitted: arg-test clock-test clock cpeek-test cprintf cursor deb dir-test div-test # em-test exec-test1 exec-test2 fileio-test ft getopt-test heaptest joy-test moddiv-test # mouse-test mul-test posixio-test rename-test scanf-test seek ser-test strdup-test @@ -715,7 +794,7 @@ endif define SUBDIR_recipe -@+$(MAKE) -C $(dir) --no-print-directory $@ +@+$(MAKE) -C $(dir) $(PD) $@ $(PQ) endef # SUBDIR_recipe @@ -750,6 +829,7 @@ TARGETS := \ c128 \ c16 \ c64 \ + c65 \ cbm510 \ cbm610 \ creativision \ @@ -758,6 +838,7 @@ TARGETS := \ kim1 \ lunix \ lynx \ + mega65 \ nes \ osic1p \ pce \ @@ -773,25 +854,34 @@ TARGETS := \ # -------------------------------------------------------------------------- # Rule to make the binaries for every platform +define TARGETDIR_recipe + +@+$(MAKE) -C $(dir) $(PD) $(PQ) + +endef # TARGETDIR_recipe + define TARGET_recipe @echo making targettest for: $(T) @$(MAKE) -j2 SYS:=$(T) -@$(MAKE) --no-print-directory clean SYS:=$(T) +@$(MAKE) $(PD) clean SYS:=$(T) endef # TARGET_recipe platforms: $(foreach T,$(TARGETS),$(TARGET_recipe)) + $(foreach dir,$(DIRLIST),$(TARGETDIR_recipe)) # -------------------------------------------------------------------------- # some programs link against getsp.o mouse-test: mouse-test.o getsp.o + $(if $(QUIET),echo $(SYS):$@) $(LD) $(LDFLAGS) -t $(SYS) -o $@ $^ $(SYS).lib ifneq ($(SYS),vic20) ft: ft.o getsp.o + $(if $(QUIET),echo $(SYS):$@) $(LD) $(LDFLAGS) -t $(SYS) -o $@ $^ $(SYS).lib endif @@ -799,6 +889,7 @@ endif ifeq ($(SYS),vic20) ft: ft.o getsp.o + $(if $(QUIET),echo $(SYS):$@) $(LD) $(LDFLAGS) -o $@ -C vic20-32k.cfg -m $@.map $^ $(SYS).lib endif diff --git a/targettest/accelerator/Makefile b/targettest/accelerator/Makefile index dd5011459..a8d26e368 100644 --- a/targettest/accelerator/Makefile +++ b/targettest/accelerator/Makefile @@ -1,3 +1,9 @@ +# ---- Display info during parsing phase ---- +SILENT:=$(findstring s,$(word 1, $(MAKEFLAGS))) +ifneq ($(SILENT),s) + $(info Using Makefile: $(realpath $(firstword $(MAKEFILE_LIST))) $(MAKECMDGOALS)) +endif + # Run 'make SYS=<target>'; or, set a SYS env. # var. to build for another target system. SYS ?= c64 @@ -30,6 +36,14 @@ else LD := $(if $(wildcard ../../bin/ld65*),../../bin/ld65,ld65) endif +ifeq ($(SILENT),s) + QUIET = 1 +endif + +ifdef QUIET + .SILENT: +endif + EXELIST_c64 = \ c64-scpu-test.prg \ c64dtv-test.prg \ @@ -58,27 +72,35 @@ else endif c64-scpu-test.prg: c64-c128-scpu-test.c + $(if $(QUIET),echo $(SYS):$@) $(CL) -t c64 c64-c128-scpu-test.c -o c64-scpu-test.prg c128-scpu-test.prg: c64-c128-scpu-test.c + $(if $(QUIET),echo $(SYS):$@) $(CL) -t c128 c64-c128-scpu-test.c -o c128-scpu-test.prg c64dtv-test.prg: c64dtv-test.c + $(if $(QUIET),echo $(SYS):$@) $(CL) -t c64 c64dtv-test.c -o c64dtv-test.prg c64-test.prg: c64-c128-test.c + $(if $(QUIET),echo $(SYS):$@) $(CL) -t c64 c64-c128-test.c -o c64-test.prg c128-test.prg: c64-c128-test.c + $(if $(QUIET),echo $(SYS):$@) $(CL) -t c128 c64-c128-test.c -o c128-test.prg chameleon-test.prg: chameleon-test.c + $(if $(QUIET),echo $(SYS):$@) $(CL) -t c64 chameleon-test.c -o chameleon-test.prg c65-test.prg: c65-test.c + $(if $(QUIET),echo $(SYS):$@) $(CL) -t c64 c65-test.c -o c65-test.prg turbomaster-test.prg: turbomaster-test.c + $(if $(QUIET),echo $(SYS):$@) $(CL) -t c64 turbomaster-test.c -o turbomaster-test.prg clean: diff --git a/targettest/atari/Makefile b/targettest/atari/Makefile index d5b4d9593..099dd291c 100644 --- a/targettest/atari/Makefile +++ b/targettest/atari/Makefile @@ -1,3 +1,9 @@ +# ---- Display info during parsing phase ---- +SILENT:=$(findstring s,$(word 1, $(MAKEFLAGS))) +ifneq ($(SILENT),s) + $(info Using Makefile: $(realpath $(firstword $(MAKEFILE_LIST))) $(MAKECMDGOALS)) +endif + # Run 'make SYS=<target>'; or, set a SYS env. # var. to build for another target system. @@ -31,6 +37,14 @@ else LD := $(if $(wildcard ../../bin/ld65*),../../bin/ld65,ld65) endif +ifeq ($(SILENT),s) + QUIET = 1 +endif + +ifdef QUIET + .SILENT: +endif + EXELIST_atari = \ charmapping.xex \ defdev.xex \ @@ -58,24 +72,33 @@ else endif charmapping.xex: charmapping.c + $(if $(QUIET),echo $(SYS):$@) $(CL) -t atari -o charmapping.xex charmapping.c defdev.xex: defdev.c + $(if $(QUIET),echo $(SYS):$@) $(CL) -t atari -o defdev.xex defdev.c displaylist.xex: displaylist.c + $(if $(QUIET),echo $(SYS):$@) $(CL) -t atari -o displaylist.xex displaylist.c mem.xex: mem.c ../getsp.s + $(if $(QUIET),echo $(SYS):$@) $(CL) -t atari -o mem.xex mem.c ../getsp.s multi.xex: multi-xex.s multi-xex.cfg + $(if $(QUIET),echo $(SYS):$@) $(CL) -t atari -C multi-xex.cfg multi-xex.s -o multi.xex ostype.xex: ostype.c + $(if $(QUIET),echo $(SYS):$@) $(CL) -t atari -o ostype.xex ostype.c scrcode.com: scrcode.s + $(if $(QUIET),echo $(SYS):$@) # ca65 -t atari -o scrcode.o scrcode.s # ld65 -C atari-asm.cfg -o scrcode.com scrcode.o $(CL) -t atari -C atari-asm.cfg -o scrcode.com scrcode.s sys.xex: sys.c + $(if $(QUIET),echo $(SYS):$@) $(CL) -t atari -o sys.xex sys.c sound.xex: sound.c + $(if $(QUIET),echo $(SYS):$@) $(CL) -t atari -o sound.xex sound.c clean: @$(DEL) charmapping.xex 2>$(NULLDEV) diff --git a/targettest/atari/mem.c b/targettest/atari/mem.c index b15b215ed..459c472ec 100644 --- a/targettest/atari/mem.c +++ b/targettest/atari/mem.c @@ -41,7 +41,7 @@ int main(void) printf(" data: $%04X (data)\n", &data); printf(" _dos_type: $%04X (bss)\n", &_dos_type); printf(" allocmem: $%04X (dyn. data)\n", allocmem); - printf(" sp: $%04X (stack ptr)\n", getsp()); + printf(" c_sp: $%04X (stack ptr)\n", getsp()); if (allocmem) free(allocmem); if (doesclrscrafterexit()) cgetc(); diff --git a/targettest/cbm/Makefile b/targettest/cbm/Makefile index c3171b13e..6359a154a 100644 --- a/targettest/cbm/Makefile +++ b/targettest/cbm/Makefile @@ -1,3 +1,9 @@ +# ---- Display info during parsing phase ---- +SILENT:=$(findstring s,$(word 1, $(MAKEFLAGS))) +ifneq ($(SILENT),s) + $(info Using Makefile: $(realpath $(firstword $(MAKEFILE_LIST))) $(MAKECMDGOALS)) +endif + # Run 'make SYS=<target>'; or, set a SYS env. # var. to build for another target system. SYS ?= c64 @@ -34,6 +40,14 @@ else LD := $(if $(wildcard ../../bin/ld65*),../../bin/ld65,ld65) endif +ifeq ($(SILENT),s) + QUIET = 1 +endif + +ifdef QUIET + .SILENT: +endif + EXELIST_c64 = \ petscii.prg \ cbmdir-test.prg \ @@ -67,12 +81,14 @@ endif ifeq ($(SYS),c64) petscii.prg: petscii.c + $(if $(QUIET),echo $(SYS):$@) $(CL) -t $(SYS) -O -o petscii.prg petscii.c else petscii.prg: endif cbmdir-test.prg: cbmdir-test.c + $(if $(QUIET),echo $(SYS):$@) ifeq ($(SYS),vic20) $(CL) -t $(SYS) -C vic20-32k.cfg -Oris -o $@ $< else @@ -80,6 +96,7 @@ else endif cbmread.prg: cbmread.c + $(if $(QUIET),echo $(SYS):$@) ifeq ($(SYS),vic20) $(CL) -t $(SYS) -C vic20-32k.cfg -Oris -o $@ $< else diff --git a/targettest/conio.c b/targettest/conio.c index e270d3dab..09b4a9e44 100644 --- a/targettest/conio.c +++ b/targettest/conio.c @@ -9,6 +9,15 @@ * */ +/* Box drawing characters are usually constant expressions. However, there + * are scenarios where this is not the case. To ensure compatibility with + * code that assumes they are constant expressions, the scenarios in question + * must be explicitly enabled by defining DYN_BOX_DRAW. Currently, the only + * such scenario is the apple2 target. There, DYN_BOX_DRAW can be used to + * enable the use of MouseText characters on exactly those machines that + * support them. + */ +#define DYN_BOX_DRAW #include <conio.h> #include <string.h> @@ -34,6 +43,10 @@ #define CH_VLINE '!' #endif +#if defined(DYN_BOX_DRAW) +static char grid[5][5]; +#else + static char grid[5][5] = { {CH_ULCORNER, CH_HLINE, CH_TTEE, CH_HLINE, CH_URCORNER}, {CH_VLINE, ' ', CH_VLINE, ' ', CH_VLINE }, @@ -41,6 +54,35 @@ static char grid[5][5] = { {CH_VLINE, ' ', CH_VLINE, ' ', CH_VLINE }, {CH_LLCORNER, CH_HLINE, CH_BTEE, CH_HLINE, CH_LRCORNER} }; +#endif + +#if defined(DYN_BOX_DRAW) +static void init_grid(void) +{ + /* Programmatically fill the array with extern chars + * instead of constants. */ + grid[0][0] = CH_ULCORNER; + grid[2][0] = CH_LTEE; + grid[4][0] = CH_LLCORNER; + + grid[0][2] = CH_TTEE; + grid[2][2] = CH_CROSS; + grid[4][2] = CH_BTEE; + + grid[0][4] = CH_URCORNER; + grid[2][4] = CH_RTEE; + grid[4][4] = CH_LRCORNER; + + grid[1][1] = grid[1][3] = + grid[3][1] = grid[3][3] = ' '; + + grid[1][0] = grid[1][2] = grid[1][4] = + grid[3][0] = grid[3][2] = grid[3][4] = CH_VLINE; + grid[0][1] = grid[0][3] = + grid[2][1] = grid[2][3] = + grid[4][1] = grid[4][3] = CH_HLINE; +} +#endif #define LINE_COLORTEST 3 #define LINE_PEEKTEST 11 @@ -152,6 +194,11 @@ void main(void) joy_install(joy_static_stddrv); #endif + +#if defined(DYN_BOX_DRAW) + init_grid(); +#endif + clrscr(); screensize(&xsize, &ysize); cputs("cc65 conio test\n\r"); diff --git a/targettest/cpeek-test.c b/targettest/cpeek-test.c index 4c1aadcb2..6f6556935 100644 --- a/targettest/cpeek-test.c +++ b/targettest/cpeek-test.c @@ -24,6 +24,10 @@ # define SCREEN_RAM ((unsigned char*)0x8000) #elif defined(__VIC20__) # define SCREEN_RAM ((unsigned char*)0x1000) +#elif defined(__C65__) +# define SCREEN_RAM ((unsigned char*)0x0800) +#elif defined(__MEGA65__) +# define SCREEN_RAM ((unsigned char*)0x0800) #else # error This program cannot test that target. # define SCREEN_RAM ((unsigned char*)0) diff --git a/targettest/ft.c b/targettest/ft.c index 3dfa0e37b..a28795f2b 100644 --- a/targettest/ft.c +++ b/targettest/ft.c @@ -10,7 +10,7 @@ ** got one from argv). I then opens the file, ** reads the first 16 bytes and displays them ** (as hex values). -** The values of sp (cc65 runtime stack pointer) +** The values of c_sp (cc65 runtime stack pointer) ** are displayed at some places. The displayed ** value should always be the same. */ @@ -64,16 +64,16 @@ int main(int argc,char **argv) } printf("using filename \"%s\"\n",filename); csp = getsp(); - printf("now opening file... sp = %d\n",csp); + printf("now opening file... c_sp = %d\n",csp); fd = open(filename,O_RDONLY); csp = getsp(); if (fd == -1) { char x1 = _oserror; - printf("open failed: os: %d,\n\terrno: %d, sp = %d\n",x1,errno,csp); + printf("open failed: os: %d,\n\terrno: %d, c_sp = %d\n",x1,errno,csp); cgetc(); return(0); } - printf("open success -- handle = $%x, sp = %d\n",fd,csp); + printf("open success -- handle = $%x, c_sp = %d\n",fd,csp); #ifdef __ATARI__ printf("fd_index:\n "); for (i=0; i<12; i++) printf("%02X ",__fd_index[i]); @@ -88,7 +88,7 @@ int main(int argc,char **argv) lr = read(fd,buf,16); /* read first 16 bytes */ csp = getsp(); if (lr == -1) { - printf("read failed: %d (sp = %d)\n",errno,csp); + printf("read failed: %d (c_sp = %d)\n",errno,csp); cgetc(); return(0); } @@ -99,7 +99,7 @@ int main(int argc,char **argv) return(0); } csp = getsp(); - printf("\n\nThe data read: (%d bytes, sp = %d)\n",lr,csp); + printf("\n\nThe data read: (%d bytes, c_sp = %d)\n",lr,csp); for (i=0; i<lr; i++) { printf("%02X ",buf[i]); if (!((i+1) & 7)) printf("\n"); diff --git a/targettest/gamate/Makefile b/targettest/gamate/Makefile index e2b060406..21fd039ec 100644 --- a/targettest/gamate/Makefile +++ b/targettest/gamate/Makefile @@ -1,3 +1,9 @@ +# ---- Display info during parsing phase ---- +SILENT:=$(findstring s,$(word 1, $(MAKEFLAGS))) +ifneq ($(SILENT),s) + $(info Using Makefile: $(realpath $(firstword $(MAKEFILE_LIST))) $(MAKECMDGOALS)) +endif + # Run 'make SYS=<target>'; or, set a SYS env. # var. to build for another target system. @@ -31,6 +37,14 @@ else LD := $(if $(wildcard ../../bin/ld65*),../../bin/ld65,ld65) endif +ifeq ($(SILENT),s) + QUIET = 1 +endif + +ifdef QUIET + .SILENT: +endif + EXELIST_gamate = \ audiotest.bin lcdtest.bin ctest.bin @@ -50,10 +64,13 @@ else endif audiotest.bin: audiotest.s + $(if $(QUIET),echo $(SYS):$@) $(CL) -l audiotest.lst -t gamate -o audiotest.bin audiotest.s lcdtest.bin: lcdtest.s + $(if $(QUIET),echo $(SYS):$@) $(CL) -l lcdtest.lst -t gamate -o lcdtest.bin lcdtest.s ctest.bin: ctest.c + $(if $(QUIET),echo $(SYS):$@) $(CL) -l ctest.lst -t gamate -o ctest.bin ctest.c clean: diff --git a/targettest/getsp.s b/targettest/getsp.s index 9f169dc0b..95db689f4 100644 --- a/targettest/getsp.s +++ b/targettest/getsp.s @@ -1,11 +1,11 @@ .export _getsp - .importzp sp + .importzp c_sp .proc _getsp - ldx sp+1 - lda sp + ldx c_sp+1 + lda c_sp rts .endproc diff --git a/targettest/pce/Makefile b/targettest/pce/Makefile index 89abca6b6..53516d55d 100644 --- a/targettest/pce/Makefile +++ b/targettest/pce/Makefile @@ -1,3 +1,9 @@ +# ---- Display info during parsing phase ---- +SILENT:=$(findstring s,$(word 1, $(MAKEFLAGS))) +ifneq ($(SILENT),s) + $(info Using Makefile: $(realpath $(firstword $(MAKEFILE_LIST))) $(MAKECMDGOALS)) +endif + # Run 'make SYS=<target>'; or, set a SYS env. # var. to build for another target system. @@ -31,6 +37,14 @@ else LD := $(if $(wildcard ../../bin/ld65*),../../bin/ld65,ld65) endif +ifeq ($(SILENT),s) + QUIET = 1 +endif + +ifdef QUIET + .SILENT: +endif + .PHONY: all clean test # Size of cartridge to generate. @@ -65,8 +79,11 @@ else endif %.bin: %.c + $(if $(QUIET),echo $(SYS):$@) $(CL) -t pce $< -Wl -D__CARTSIZE__=${CARTSIZE} -m $*.map -o $@ +ifndef QUIET @echo "use 'make conio.pce' to produce a .pce file using dd" +endif %.pce: %.bin dd if=$< bs=8K skip=${COUNT} > $@ diff --git a/test/Makefile b/test/Makefile index 495082fa4..b647dbe33 100644 --- a/test/Makefile +++ b/test/Makefile @@ -1,3 +1,9 @@ +# ---- Display info during parsing phase ---- +SILENT:=$(findstring s,$(word 1, $(MAKEFLAGS))) +ifneq ($(SILENT),s) + $(info Using Makefile: $(realpath $(firstword $(MAKEFILE_LIST))) $(MAKECMDGOALS)) +endif + # top-level Makefile for the regression tests ifneq ($(shell echo),) @@ -10,6 +16,15 @@ else RMDIR = $(RM) -r $1 endif +ifeq ($(SILENT),s) + QUIET = 1 +endif + +ifdef QUIET + PQ = "QUIET=1" + PD = --no-print-directory +endif + WORKDIR = ../testwrk .PHONY: test continue mostlyclean clean success_message @@ -19,15 +34,15 @@ test: @$(MAKE) continue continue: - @$(MAKE) -C asm all - @$(MAKE) -C dasm all - @$(MAKE) -C val all - @$(MAKE) -C ref all - @$(MAKE) -C err all - @$(MAKE) -C standard all - @$(MAKE) -C standard_err all - @$(MAKE) -C misc all - @$(MAKE) -C todo all + @$(MAKE) $(PD) -C asm all $(PQ) + @$(MAKE) $(PD) -C dasm all $(PQ) + @$(MAKE) $(PD) -C val all $(PQ) + @$(MAKE) $(PD) -C ref all $(PQ) + @$(MAKE) $(PD) -C err all $(PQ) + @$(MAKE) $(PD) -C standard all $(PQ) + @$(MAKE) $(PD) -C standard_err all $(PQ) + @$(MAKE) $(PD) -C misc all $(PQ) + @$(MAKE) $(PD) -C todo all $(PQ) @$(MAKE) success_message success_message: @@ -36,15 +51,15 @@ success_message: $(info ###################################) mostlyclean: - @$(MAKE) -C asm clean - @$(MAKE) -C dasm clean - @$(MAKE) -C val clean - @$(MAKE) -C ref clean - @$(MAKE) -C err clean - @$(MAKE) -C standard clean - @$(MAKE) -C standard_err clean - @$(MAKE) -C misc clean - @$(MAKE) -C todo clean + @$(MAKE) $(PD) -C asm clean $(PQ) + @$(MAKE) $(PD) -C dasm clean $(PQ) + @$(MAKE) $(PD) -C val clean $(PQ) + @$(MAKE) $(PD) -C ref clean $(PQ) + @$(MAKE) $(PD) -C err clean $(PQ) + @$(MAKE) $(PD) -C standard clean $(PQ) + @$(MAKE) $(PD) -C standard_err clean $(PQ) + @$(MAKE) $(PD) -C misc clean $(PQ) + @$(MAKE) $(PD) -C todo clean $(PQ) clean: mostlyclean @$(call RMDIR,$(WORKDIR)) diff --git a/test/asm/Makefile b/test/asm/Makefile index 5b3bff3f8..8d959ecae 100644 --- a/test/asm/Makefile +++ b/test/asm/Makefile @@ -1,3 +1,9 @@ +# ---- Display info during parsing phase ---- +SILENT:=$(findstring s,$(word 1, $(MAKEFLAGS))) +ifneq ($(SILENT),s) + $(info Using Makefile: $(realpath $(firstword $(MAKEFILE_LIST))) $(MAKECMDGOALS)) +endif + # top-level Makefile for the regression tests ifneq ($(shell echo),) @@ -10,6 +16,15 @@ else RMDIR = $(RM) -r $1 endif +ifeq ($(SILENT),s) + QUIET := 1 +endif + +ifdef QUIET + PQ = "QUIET=1" + PD = --no-print-directory +endif + WORKDIR = ../testwrk/asm .PHONY: all continue mostlyclean clean @@ -17,20 +32,20 @@ WORKDIR = ../testwrk/asm all: mostlyclean continue continue: mostlyclean - @$(MAKE) -C cpudetect all - @$(MAKE) -C opcodes all - @$(MAKE) -C listing all - @$(MAKE) -C val all - @$(MAKE) -C err all - @$(MAKE) -C misc all + @$(MAKE) $(PD) -C cpudetect all $(PQ) + @$(MAKE) $(PD) -C opcodes all $(PQ) + @$(MAKE) $(PD) -C listing all $(PQ) + @$(MAKE) $(PD) -C val all $(PQ) + @$(MAKE) $(PD) -C err all $(PQ) + @$(MAKE) $(PD) -C misc all $(PQ) mostlyclean: - @$(MAKE) -C cpudetect clean - @$(MAKE) -C opcodes clean - @$(MAKE) -C listing clean - @$(MAKE) -C val clean - @$(MAKE) -C err clean - @$(MAKE) -C misc clean + @$(MAKE) $(PD) -C cpudetect clean $(PQ) + @$(MAKE) $(PD) -C opcodes clean $(PQ) + @$(MAKE) $(PD) -C listing clean $(PQ) + @$(MAKE) $(PD) -C val clean $(PQ) + @$(MAKE) $(PD) -C err clean $(PQ) + @$(MAKE) $(PD) -C misc clean $(PQ) clean: mostlyclean @$(call RMDIR,$(WORKDIR)) diff --git a/test/asm/cpudetect/4510-cpudetect.ref b/test/asm/cpudetect/4510-cpudetect.ref index 515557c85..5eba7ec5a 100644 Binary files a/test/asm/cpudetect/4510-cpudetect.ref and b/test/asm/cpudetect/4510-cpudetect.ref differ diff --git a/test/asm/cpudetect/45GS02-cpudetect.ref b/test/asm/cpudetect/45GS02-cpudetect.ref new file mode 100644 index 000000000..3936f2902 Binary files /dev/null and b/test/asm/cpudetect/45GS02-cpudetect.ref differ diff --git a/test/asm/cpudetect/6502x-cpudetect.ref b/test/asm/cpudetect/6502x-cpudetect.ref index 3434ecbea..9e7abe573 100644 Binary files a/test/asm/cpudetect/6502x-cpudetect.ref and b/test/asm/cpudetect/6502x-cpudetect.ref differ diff --git a/test/asm/cpudetect/65816-cpudetect.ref b/test/asm/cpudetect/65816-cpudetect.ref index 4f6e767b0..e614b34c9 100644 Binary files a/test/asm/cpudetect/65816-cpudetect.ref and b/test/asm/cpudetect/65816-cpudetect.ref differ diff --git a/test/asm/cpudetect/65ce02-cpudetect.ref b/test/asm/cpudetect/65ce02-cpudetect.ref new file mode 100644 index 000000000..eca5a2b2a Binary files /dev/null and b/test/asm/cpudetect/65ce02-cpudetect.ref differ diff --git a/test/asm/cpudetect/Makefile b/test/asm/cpudetect/Makefile index ffddb1ad8..27724b9f9 100644 --- a/test/asm/cpudetect/Makefile +++ b/test/asm/cpudetect/Makefile @@ -1,3 +1,9 @@ +# ---- Display info during parsing phase ---- +SILENT:=$(findstring s,$(word 1, $(MAKEFLAGS))) +ifneq ($(SILENT),s) + $(info Using Makefile: $(realpath $(firstword $(MAKEFILE_LIST))) $(MAKECMDGOALS)) +endif + # Makefile for the assembler regression tests ifneq ($(shell echo),) @@ -14,8 +20,17 @@ else RMDIR = $(RM) -r $1 endif +ifeq ($(SILENT),s) + QUIET = 1 +endif + ifdef QUIET .SILENT: + NULLOUT = >$(NULLDEV) + NULLERR = 2>$(NULLDEV) +ifndef CMD_EXE + CATERR = 2> $(WORKDIR)/$$@.errlog || (cat $(WORKDIR)/$$@.errlog && false) +endif endif CA65 := $(if $(wildcard ../../../bin/ca65*),../../../bin/ca65,ca65) @@ -46,8 +61,8 @@ define CPUDETECT_template $(WORKDIR)/$1-cpudetect.bin: cpudetect.s $1-cpudetect.ref $(ISEQUAL) $(if $(QUIET),echo asm/$1-cpudetect.bin) - $(CA65) -t none --cpu $1 -l $$(@:.bin=.lst) -o $$(@:.bin=.o) $$< - $(LD65) -t none -o $$@ $$(@:.bin=.o) none.lib + $(CA65) -t none --cpu $1 -l $$(@:.bin=.lst) -o $$(@:.bin=.o) $$< $(CATERR) + $(LD65) -t none -o $$@ $$(@:.bin=.o) none.lib $(CATERR) $(ISEQUAL) $1-cpudetect.ref $$@ endef # CPUDETECT_template @@ -55,7 +70,7 @@ endef # CPUDETECT_template $(foreach cpu,$(CPUDETECT_CPUS),$(eval $(call CPUDETECT_template,$(cpu)))) $(WORKDIR)/%.o: %.s | $(WORKDIR) - $(CA65) -l $(@:.o=.lst) -o $@ $< + $(CA65) -l $(@:.o=.lst) -o $@ $< $(NULLOUT) $(CATERR) clean: @$(call RMDIR,$(WORKDIR)) diff --git a/test/asm/cpudetect/allinst.inc b/test/asm/cpudetect/allinst.inc new file mode 100644 index 000000000..2ba44ff83 --- /dev/null +++ b/test/asm/cpudetect/allinst.inc @@ -0,0 +1,1009 @@ + + ; just emit to bss for now, this way the output wont get checked, which is + ; fine - we only want to see if the assembler accepts all the opcodes it + ; should accept for the current CPU mode + .bss + +.if (.cpu .bitand CPU_ISET_6502) + .scope + ; regular basic 6502 (legal) instruction set +LABEL0: + brk ; $00 + ora ($12,x) ; $01 + ora $12 ; $05 + asl $12 ; $06 + php ; $08 + ora #$12 ; $09 + asl a ; $0a + ora $1234 ; $0d + asl $1234 ; $0e + bpl LABEL0 ; $10 + ora ($12),y ; $11 + ora $12,x ; $15 + asl $12,x ; $16 + clc ; $18 + ora $1234,y ; $19 + ora $1234,x ; $1d + asl $1234,x ; $1e + jsr $1234 ; $20 + and ($12,x) ; $21 + bit $12 ; $24 + and $12 ; $25 + rol $12 ; $26 + plp ; $28 + and #$12 ; $29 + rol a ; $2a + bit $1234 ; $2c + and $1234 ; $2d + rol $1234 ; $2e + bmi LABEL ; $30 + and ($12),y ; $31 + and $12,x ; $35 + rol $12,x ; $36 + sec ; $38 + and $1234,y ; $39 + and $1234,x ; $3d + rol $1234,x ; $3e + rti ; $40 + eor ($12,x) ; $41 + eor $12 ; $45 + lsr $12 ; $46 + pha ; $48 + eor #$12 ; $49 + lsr a ; $4a + jmp $1234 ; $4c + eor $1234 ; $4d + lsr $1234 ; $4e + bvc LABEL ; $50 + eor ($12),y ; $51 + eor $12,x ; $55 + lsr $12,x ; $56 + cli ; $58 + eor $1234,y ; $59 + eor $1234,x ; $5d + lsr $1234,x ; $5e + rts ; $60 + adc ($12,x) ; $61 + adc $12 ; $65 + ror $12 ; $66 + pla ; $68 + adc #$12 ; $69 + ror a ; $6a + jmp ($1234) ; $6c + adc $1234 ; $6d + ror $1234 ; $6e + bvs LABEL ; $70 + adc ($12),y ; $71 + adc $12,x ; $75 + ror $12,x ; $76 + sei ; $78 + adc $1234,y ; $79 + adc $1234,x ; $7d + ror $1234,x ; $7e +LABEL: + sta ($12,x) ; $81 + sty $12 ; $84 + sta $12 ; $85 + stx $12 ; $86 + dey ; $88 + txa ; $8a + sty $1234 ; $8c + sta $1234 ; $8d + stx $1234 ; $8e + bcc LABEL ; $90 + sta ($12),y ; $91 + sty $12,x ; $94 + sta $12,x ; $95 + stx $12,y ; $96 + tya ; $98 + sta $1234,y ; $99 + txs ; $9a + sta $1234,x ; $9d + ldy #$12 ; $a0 + lda ($12,x) ; $a1 + ldx #$12 ; $a2 + ldy $12 ; $a4 + lda $12 ; $a5 + ldx $12 ; $a6 + tay ; $a8 + lda #$12 ; $a9 + tax ; $aa + ldy $1234 ; $ac + lda $1234 ; $ad + ldx $1234 ; $ae + bcs LABEL ; $b0 + lda ($12),y ; $b1 + ldy $12,x ; $b4 + lda $12,x ; $b5 + ldx $12,y ; $b6 + clv ; $b8 + lda $1234,y ; $b9 + tsx ; $ba + ldy $1234,x ; $bc + lda $1234,x ; $bd + ldx $1234,y ; $be + cpy #$12 ; $c0 + cmp ($12,x) ; $c1 + cpy $12 ; $c4 + cmp $12 ; $c5 + dec $12 ; $c6 + iny ; $c8 + cmp #$12 ; $c9 + dex ; $ca + cpy $1234 ; $cc + cmp $1234 ; $cd + dec $1234 ; $ce + bne LABEL ; $d0 + cmp ($12),y ; $d1 + cmp $12,x ; $d5 + dec $12,x ; $d6 + cld ; $d8 + cmp $1234,y ; $d9 + cmp $1234,x ; $dd + dec $1234,x ; $de + cpx #$12 ; $e0 + sbc ($12,x) ; $e1 + cpx $12 ; $e4 + sbc $12 ; $e5 + inc $12 ; $e6 + inx ; $e8 + sbc #$12 ; $e9 + nop ; $ea + cpx $1234 ; $ec + sbc $1234 ; $ed + inc $1234 ; $ee + beq LABEL1 ; $f0 + sbc ($12),y ; $f1 + sbc $12,x ; $f5 + inc $12,x ; $f6 + sed ; $f8 + sbc $1234,y ; $f9 + sbc $1234,x ; $fd + inc $1234,x ; $fe +LABEL1: + .endscope +.endif + + +.if (.cpu .bitand CPU_ISET_6502X) + .scope + ; all "undocumented" 6502 instructions (aka "unintended opcodes") + jam ; $02 + slo ($12,x) ; $03 + nop $12 ; $04 + slo $12 ; $07 + anc #$12 ; $0b + nop $1234 ; $0c + slo $1234 ; $0f + jam ; $12 + slo ($12),y ; $13 + nop $12,x ; $14 + slo $12,y ; $17 + nop ; $1a + slo $1234,y ; $1b + nop $1234,x ; $1c + slo $1234,x ; $1f + jam ; $22 + rla ($12,x) ; $23 + rla $12 ; $27 + anc #$12 ; $2b + rla $1234 ; $2f + jam ; $32 + rla ($12),y ; $33 + nop $12,x ; $34 + rla $12,y ; $37 + nop ; $3a + rla $1234,y ; $3b + nop $1234,x ; $3c + rla $1234,x ; $3f + jam ; $42 + sre ($12,x) ; $43 + nop $12 ; $44 + sre $12 ; $47 + alr #$12 ; $4b + sre $1234 ; $4f + jam ; $52 + sre ($12),y ; $53 + nop $12,x ; $54 + sre $12,y ; $57 + nop ; $5a + sre $1234,y ; $5b + nop $1234,x ; $5c + sre $1234,x ; $5f + jam ; $62 + rra ($12,x) ; $63 + nop $12 ; $64 + rra $12 ; $67 + arr #$12 ; $6b + rra $1234 ; $6f + jam ; $72 + rra ($12),y ; $73 + nop $12,x ; $74 + rra $12,y ; $77 + nop ; $7a + rra $1234,y ; $7b + nop $1234,x ; $7c + rra $1234,x ; $7f + nop #$12 ; $80 + nop #$12 ; $82 + sax ($12,x) ; $83 + sax $12 ; $87 + nop #$12 ; $89 + ane #$12 ; $8b + sax $1234 ; $8f + jam ; $92 + sha ($12),y ; $93 + sax $12,y ; $97 + tas $1234,y ; $9b + shy $1234,x ; $9c + shx $1234,y ; $9e + sha $1234,y ; $9f + lax ($12,x) ; $a3 + lax $12 ; $a7 + lax #$12 ; $ab + lax $1234 ; $af + jam ; $b2 + lax ($12),y ; $b3 + lax $12,y ; $b7 + las $1234,y ; $bb + lax $1234,y ; $bf + nop #$12 ; $c2 + dcp ($12,x) ; $c3 + dcp $12 ; $c7 + axs #$12 ; $cb + dcp $1234 ; $cf + jam ; $d2 + dcp ($12),y ; $d3 + nop $12,x ; $d4 + dcp $12,y ; $d7 + nop ; $da + dcp $1234,y ; $db + nop $1234,x ; $dc + dcp $1234,x ; $df + nop #$12 ; $e2 + isc ($12,x) ; $e3 + isc $12 ; $e7 + sbc #$12 ; $eb + isc $1234 ; $ef + jam ; $f2 + isc ($12),y ; $f3 + nop $12,x ; $f4 + isc $12,y ; $f7 + nop ; $fa + isc $1234,y ; $fb + nop $1234,x ; $fc + isc $1234,x ; $ff + .endscope +.endif + + +.if (.cpu .bitand CPU_ISET_6502DTV) + .scope +LABEL: + ; opcodes added over 6502 (these are JAM on 6502) + bra LABEL ; $12 + sac #$12 ; $32 + sir #$12 ; $42 + + ; opcodes added over 6502, which work the same as the "illegal" opcodes on 6502 + nop $12 ; $04 + nop $1234 ; $0c + nop $12,x ; $14 + nop ; $1a + nop $1234,x ; $1c + nop $12,x ; $34 + nop ; $3a + nop $1234,x ; $3c + nop $12 ; $44 + nop $12,x ; $54 + nop ; $5a + nop $1234,x ; $5c + nop $12 ; $64 + nop $12,x ; $74 + nop ; $7a + nop $1234,x ; $7c + nop #$12 ; $80 + nop #$12 ; $82 + nop #$12 ; $89 + nop #$12 ; $c2 + nop $12,x ; $d4 + nop ; $da + nop $1234,x ; $dc + nop #$12 ; $e2 + nop $12,x ; $f4 + nop ; $fa + nop $1234,x ; $fc + + anc #$12 ; $0b + anc #$12 ; $2b + + rla ($12,x) ; $23 + rla $12 ; $27 + rla $1234 ; $2f + rla ($12),y ; $33 + rla $12,y ; $37 + rla $1234,y ; $3b + rla $1234,x ; $3f + + lax ($12,x) ; $a3 + lax $12 ; $a7 + lax #$12 ; $ab + lax $1234 ; $af + lax ($12),y ; $b3 + lax $12,y ; $b7 + lax $1234,y ; $bf + + las $1234,y ; $bb + + alr #$12 ; $4b + + arr #$12 ; $6b + + rra ($12,x) ; $63 + rra $12 ; $67 + rra $1234 ; $6f + rra ($12),y ; $73 + rra $12,y ; $77 + rra $1234,y ; $7b + rra $1234,x ; $7f + + shy $1234,x ; $9c + shx $1234,y ; $9e + + axs #$12 ; $cb + + sbc #$12 ; $eb + + .endscope +.endif + +;------------------------------------------------------------------------------ +; The 65sc02 is the original CMOS re-design of the 6502. +; +; 65SC02 65ce02 +; +; $04 tsb zp +; $0c tsb abs16 +; $12 ora (zp) (-> ora (zp), z) +; $14 trb zp +; $1a inc +; $1c trb abs16 +; $32 and (zp) (-> and (zp), z) +; $34 bit zp, x +; $3a dec +; $3c bit abs16, x +; $52 eor (zp) (-> eor (zp), z) +; $5a phy +; $64 stz zp (store z, not 0) +; $72 adc (zp) (-> adc (zp), z) +; $74 stz zp, x (store z, not 0) +; $7a ply +; $7c jmp (abs16, x) +; $80 bra rel8 +; $89 bit #imm8 +; $92 sta (zp) (-> sta (zp), z) +; $9c stz abs16 (store z, not 0) +; $9e stz abs16, x (store z, not 0) +; $b2 lda (zp) (-> lda (zp), z) +; $d2 cmp (zp) (-> cmp (zp), z) +; $da phx +; $f2 sbc (zp) (-> sbc (zp), z) +; $fa plx + +.if (.cpu .bitand CPU_ISET_65SC02) + .scope + ; 65c02 instruction set adds some extra legal instructions to 6502 + tsb $12 ; $04 + tsb $1234 ; $0c + ora ($12) ; $12 FIXME: not working with 4510:ora (zp), z + trb $12 ; $14 + inc a ; $1a + trb $1234 ; $1c + and ($12) ; $32 FIXME: not working with 4510:and (zp), z + bit $12,x ; $34 + dec a ; $3a + bit $1234,x ; $3c + eor ($12) ; $52 FIXME: not working with 4510:eor (zp), z + phy ; $5a + stz $12 ; $64 + adc ($12) ; $72 FIXME: not working with 4510:adc (zp), z + stz $12,x ; $74 + ply ; $7a + jmp ($1234) ; $7c +LABEL: + bra LABEL ; $80 + bit #$12 ; $89 + sta ($12) ; $92 FIXME: not working with 4510:sta (zp), z + stz $1234 ; $9c + stz $1234,x ; $9e + lda ($12) ; $b2 FIXME: not working with 4510:lda (zp), z + cmp ($12) ; $d2 FIXME: not working with 4510:cmp (zp), z + phx ; $da + sbc ($12) ; $f2 FIXME: not working with 4510:sbc (zp), z + plx ; $fa + .endscope +.endif + + +; The R65C02 is a superset of the 65C02. It adds bit manipulation instructions: +.if (.cpu .bitand CPU_ISET_65C02) + + ; R65C02 instruction set adds some extra legal instructions to 65C02 + rmb0 $12 ; $07 + bbr0 $12, LABEL3 ; $0f + rmb1 $12 ; $17 + bbr1 $12, LABEL3 ; $1f + rmb2 $12 ; $27 + bbr2 $12, LABEL3 ; $2f + rmb3 $12 ; $37 + bbr3 $12, LABEL3 ; $3f + rmb4 $12 ; $47 + bbr4 $12, LABEL3 ; $4f + rmb5 $12 ; $57 + bbr5 $12, LABEL3 ; $5f + rmb6 $12 ; $67 + bbr6 $12, LABEL3 ; $6f + rmb7 $12 ; $77 + bbr7 $12, LABEL3 ; $7f +LABEL3: + smb0 $12 ; $87 + bbs0 $12, LABEL3 ; $8f + smb1 $12 ; $97 + bbs1 $12, LABEL3 ; $9f + smb2 $12 ; $a7 + bbs2 $12, LABEL3 ; $af + smb3 $12 ; $b7 + bbs3 $12, LABEL3 ; $bf + smb4 $12 ; $c7 + bbs4 $12, LABEL3 ; $cf + smb5 $12 ; $d7 + bbs5 $12, LABEL3 ; $df + smb6 $12 ; $e7 + bbs6 $12, LABEL3 ; $ef + smb7 $12 ; $f7 + bbs7 $12, LABEL3 ; $ff + +.endif + + +; The W65C02 is a superset of the R65C02. It only adds two instructions: +.if (.cpu .bitand CPU_ISET_W65C02) + wai ; $cb + stp ; $db +.endif + + +; The 65CE02 is another superset of the R65C02. It has several improvements: +.if (.cpu .bitand CPU_ISET_65CE02) + .scope + + ; 65CE02 adds the following: + cle ; $02 + see ; $03 + tsy ; $0b + ora ($12), z ; $12 (ora (zp) on 65C02) + lbpl $1234 ; $13 + inz ; $1b + jsr ($1234) ; $22 + jsr ($1234,x) ; $23 + tys ; $2b + and ($12), z ; $32 (and (zp) on 65C02) + lbmi $1234 ; $33 + dez ; $3b + neg ; $42 + asr a ; $43 + asr $12 ; $44 + taz ; $4b + lbvc $1234 ; $53 + asr $12,x ; $54 + tab ; $5b + ;aug ; $5c FIXME: implement in assembler + rtn #$12 ; $62 + bsr $1234 ; $63 + stz $12 ; $64 (stores 0 on 65C02) + tza ; $6b + adc ($12), z ; $72 (adc (zp) on 65C02) + lbvs $1234 ; $73 + stz $12, x ; $74 (stores 0 on 65C02) + tba ; $7b + sta ($12,s),y ; $82 + lbra $1234 ; $83 + sty $1234,x ; $8b + lbcc $1234 ; $93 + sta ($12), z ; $92 (sta (zp) on 65C02) + stx $1234,y ; $9b + stz $1234 ; $9c (stores 0 on 65C02) + ldz #$12 ; $a3 + ldz $1234 ; $ab + lda ($12), z ; $b2 (lda (zp) on 65C02) + lbcs $1234 ; $b3 + ldz $1234,x ; $bb + cpz #$12 ; $c2 + dew $12 ; $c3 + cmp ($12), z ; $d2 (cmp ($12) on 65C02) + lbne $1234 ; $d3 + cpz $12 ; $d4 + cpz $1234 ; $dc + lda ($12,s),y ; $e2 + inw $12 ; $e3 + row $1234 ; $eb + sbc ($12), z ; $f2 (sbc (zp) on 65C02) + lbeq $1234 ; $f3 + phw #$1234 ; $f4 + plz ; $fb + phw $1234 ; $fc + + .endscope +.endif + + +; The 4510 is a superset of the 65CE02. Opcode 5c (originally a "4-byte NOP +; reserved for future expansion") has been changed to the "map" instruction, +; now using implied addressing. +; +; $5c map +; $cb asw abs +; $db phz + +.if (.cpu .bitand CPU_ISET_4510) + .scope + + ; added to 65CE02 + map ; $5c ("4-byte NOP reserved for future expansion" on 65CE02) + eom ; $ea "end of mapping" - but really just a NOP + + .endscope +.endif + + +; The 45GS02 instruction set extends the 4510 instruction set using prefix bytes. +; Therefore, the "normal" opcode table is the same as for the 4510 cpu + +.if (.cpu .bitand CPU_ISET_45GS02) + .scope + + orq $12 ; $42 $42 $05 + aslq $12 ; $42 $42 $06 + aslq ; $42 $42 $0a + orq $1234 ; $42 $42 $0d + aslq $1234 ; $42 $42 $0e + orq ($12) ; $42 $42 $12 + aslq $12,x ; $42 $42 $16 + inq ; $42 $42 $1a + aslq $1234,x ; $42 $42 $1e + bitq $12 ; $42 $42 $24 + andq $12 ; $42 $42 $25 + rolq $12 ; $42 $42 $26 + rolq ; $42 $42 $2a + bitq $1234 ; $42 $42 $2c + andq $1234 ; $42 $42 $2d + rolq $1234 ; $42 $42 $2e + andq ($12) ; $42 $42 $32 + rolq $12, x ; $42 $42 $36 + deq ; $42 $42 $3a + rolq $1234, x ; $42 $42 $3e + asrq ; $42 $42 $43 + asrq $12 ; $42 $42 $44 + eorq $12 ; $42 $42 $45 + lsrq $12 ; $42 $42 $46 + lsrq ; $42 $42 $4a + eorq $1234 ; $42 $42 $4d + lsrq $1234 ; $42 $42 $4e + eorq ($12) ; $42 $42 $52 + asrq $12, x ; $42 $42 $54 + lsrq $12, x ; $42 $42 $56 + lsrq $1234, x ; $42 $42 $5e + adcq $12 ; $42 $42 $65 + rorq $12 ; $42 $42 $66 + rorq ; $42 $42 $6a + adcq $1234 ; $42 $42 $6d + rorq $1234 ; $42 $42 $6e + adcq ($12) ; $42 $42 $72 + rorq $12, x ; $42 $42 $76 + rorq $1234, x ; $42 $42 $7e + stq $12 ; $42 $42 $85 + stq $1234 ; $42 $42 $8d + stq ($12) ; $42 $42 $92 + ldq $12 ; $42 $42 $a5 + ldq $1234 ; $42 $42 $ad + ldq ($12), z ; $42 $42 $b2 + cmpq $12 ; $42 $42 $c5 + deq $12 ; $42 $42 $c6 + cmpq $1234 ; $42 $42 $cd + deq $1234 ; $42 $42 $ce + cmpq ($12) ; $42 $42 $d2 + deq $12, x ; $42 $42 $d6 + deq $1234, x ; $42 $42 $de + sbcq $12 ; $42 $42 $e5 + inq $12 ; $42 $42 $e6 + sbcq $1234 ; $42 $42 $ed + inq $1234 ; $42 $42 $ee + sbcq ($12) ; $42 $42 $f2 + inq $12, x ; $42 $42 $f6 + inq $1234, x ; $42 $42 $fe + + ora [$12], z ; $ea $12 + and [$12], z ; $ea $32 + eor [$12], z ; $ea $52 + adc [$12], z ; $ea $72 + sta [$12], z ; $ea $92 + lda [$12], z ; $ea $b2 + cmp [$12], z ; $ea $d2 + sbc [$12], z ; $ea $f2 + + orq [$12] ; $42 $42 $ea $12 + andq [$12] ; $42 $42 $ea $32 + eorq [$12] ; $42 $42 $ea $52 + adcq [$12] ; $42 $42 $ea $72 + stq [$12] ; $42 $42 $ea $92 + ldq [$12], z ; $42 $42 $ea $b2 + cmpq [$12] ; $42 $42 $ea $d2 + sbcq [$12] ; $42 $42 $ea $f2 + + .endscope +.endif + + +; The HUC6280 is a superset of the R65C02. It adds some other instructions: + +.if (.cpu .bitand CPU_ISET_HUC6280) + .scope + + ; added to R65C02 + sxy ; $02 + st0 #$12 ; $03 + st1 #$12 ; $13 + sax ; $22 + st2 #$12 ; $23 + say ; $42 + tma #$10 ; $43 + bsr LABEL ; $44 + tam #$12 ; $53 + csl ; $54 + cla ; $62 + tii $1234, $5678, $9abc ; $73 +LABEL: + clx ; $82 + tst #$12, $34 ; $83 + clx ; $82 + tst #$12, $34 ; $83 + tst #$12, $3456 ; $93 + tst #$12, $34, x ; $a3 + tst #$12, $3456, x ; $b3 + cly ; $c2 + tdd $1234, $5678, $9abc ; $c3 + tin $1234, $5678, $9abc ; $d3 + csh ; $d4 + tia $1234, $5678, $9abc ; $e3 + tai $1234, $5678, $9abc ; $f3 + set ; $f4 + + .endscope +.endif + + +.if (.cpu .bitand CPU_ISET_M740) + .scope + ; Mitsubishi M740 - adds new instructions to 65SC02 (but also removes some) + + jsr ($12) ; $02 + bbs0 a, LABEL ; $03 + bbs0 $12, LABEL ; $07 + seb0 a ; $0b + seb0 $12 ; $0f + bbc0 a, LABEL ; $13 + bbc0 $12, LABEL ; $17 + clb0 a ; $1b + clb0 $12 ; $1f + jsr $ff12 ; $22 + bbs1 a, LABEL ; $23 + bbs1 $12, LABEL ; $27 + seb1 a ; $2b + seb1 $12 ; $2f + bbc1 a, LABEL ; $33 + bbc1 $12, LABEL ; $37 + clb1 a ; $3b + clb1 $12 ; $3f + stp ; $42 + bbs2 a, LABEL ; $43 + com $12 ; $44 + bbs2 $12, LABEL ; $47 + seb2 a ; $4b + seb2 $12 ; $4f + bbc2 a, LABEL ; $53 + bbc2 $12, LABEL ; $57 + clb2 a ; $5b + clb2 $12 ; $5f + bbs3 a, LABEL ; $63 + bbs3 $12, LABEL ; $67 + seb3 a ; $6b + seb3 $12 ; $6f + bbc3 a, LABEL ; $73 + bbc3 $12, LABEL ; $77 + clb3 a ; $7b + clb3 $12 ; $7f +LABEL: + rrf $12 ; $82 + bbs4 a, LABEL ; $83 + bbs4 $12, LABEL ; $87 + seb4 a ; $8b + seb4 $12 ; $8f + bbc4 a, LABEL ; $93 + bbc4 $12, LABEL ; $97 + clb4 a ; $9b + clb4 $12 ; $9f + bbs5 a, LABEL ; $a3 + bbs5 $12, LABEL ; $a7 + seb5 a ; $ab + seb5 $12 ; $af + bbc5 a, LABEL ; $b3 + bbc5 $12, LABEL ; $b7 + clb5 a ; $bb + clb5 $12 ; $bf + slw ; $c2 + bbs6 a, LABEL ; $c3 + bbs6 $12, LABEL ; $c7 + seb6 a ; $cb + seb6 $12 ; $cf + bbc6 a, LABEL ; $d3 + bbc6 $12, LABEL ; $d7 + clb6 a ; $db + clb6 $12 ; $df + fst ; $e2 + bbs7 a, LABEL ; $e3 + bbs7 $12, LABEL ; $e7 + seb7 a ; $eb + seb7 $12 ; $ef + bbc7 a, LABEL ; $f3 + bbc7 $12, LABEL ; $f7 + clb7 a ; $fb + clb7 $12 ; $ff + + ; replaced from 65SC02 + clt ; $12 + set ; $32 + ldm $12, #$34 ; $3c + tst $12 ; $64 + + ; removed from 65SC02 (replaced by new) + ; ora ($12) ; $12 + ; and ($12) ; $32 + ; bit $1234,x ; $3c + ; stz $12 ; $64 + + ; removed from 65SC02 + ; tsb $12 ; $04 + ; tsb $1234 ; $0c + ; trb $12 ; $14 + ; trb $1234 ; $1c + ; bit $12,y ; $34 + ; eor ($12) ; $52 + ; phy ; $5a + ; adc ($12) ; $72 + ; stz $12,y ; $74 + ; ply ; $7a + ; jmp ($1234) ; $7c + ; bit #$12 ; $89 + ; sta ($12) ; $92 + ; stz $1234 ; $9c + ; stz $1234,x ; $9e + ; cmp ($12) ; $d2 + ; phx ; $da + ; sbc ($12) ; $f2 + ; plx ; $fa + + .endscope +.endif + +.if (.cpu .bitand CPU_ISET_65816) + + .smart - ; Stop being smart + + .A8 ; akku 8 bit + .I8 ; index registers 8 bit + + .scope + cop $12 ; $02 coprocessor operation + ora $12, s ; $03 + ora [$12] ; $07 + phd ; $0b push direct page register + ora $123456 ; $0f + ora ($12, s), y ; $13 + ora [$12], y ; $17 + tcs ; $1b transfer C to stack pointer + ora $123456, x ; $1f + jsl $123456 ; $22 + and $12, s ; $23 + and [$12] ; $27 + pld ; $2b pull direct page register + and $123456 ; $2f + and ($12, s), y ; $33 + and [$12], y ; $37 + tsc ; $3b transfer stack pointer to C + and $123456, x ; $3f + wdm $12 ; $42 (reserved for future expansion) + eor $12, s ; $43 + mvp $1234, $5678 ; $44 + eor [$12] ; $47 + phk ; $4b push program bank register + eor $123456 ; $4f + eor ($12, s), y ; $53 + mvn $1234, $5678 ; $54 + eor [$12], y ; $57 + tcd ; $5b transfer C to direct page register + jml $123456 ; $5c + eor $123456, x ; $5f + per LABEL ; $62 push effective relative address + adc $12, s ; $63 + adc [$12] ; $67 + rtl ; $6b return long (fetches 24-bit address from stack) + adc $123456 ; $6f + adc ($12, s), y ; $73 + adc [$12], y ; $77 + tdc ; $7b transfer direct page register to C + adc $123456, x ; $7f +LABEL: + brl LABEL ; $82 branch long (16-bit offset) + sta $12, s ; $83 + sta [$12] ; $87 + phb ; $8b push data bank register + sta $123456 ; $8f + sta ($12, s), y ; $93 + sta [$12], y ; $97 + txy ; $9b transfer X to Y + sta $123456, x ; $9f + lda $12, s ; $a3 + lda [$12] ; $a7 + plb ; $ab pull data bank register + lda $123456 ; $af + lda ($12, s), y ; $b3 + lda [$12], y ; $b7 + tyx ; $bb transfer Y to X + lda $123456, x ; $bf + rep #$12 ; $c2 clear bits in status register + cmp $12, s ; $c3 + cmp [$12] ; $c7 + wai ; $cb wait for interrupt + cmp $123456 ; $cf + cmp ($12, s), y ; $d3 + pei ($12) ; $d4 push effective indirect address + cmp [$12], y ; $d7 + stp ; $db wait for reset + jmp [$1234] ; $dc + cmp $123456, x ; $df + sep #$12 ; $e2 set bits in status register + sbc $12, s ; $e3 + sbc [$12] ; $e7 + xba ; $eb exchange high and low bytes of accumulator + sbc $123456 ; $ef + sbc ($12, s), y ; $f3 + pea $1234 ; $f4 push effective absolute address + sbc [$12], y ; $f7 + xce ; $fb exchange Carry and Emulation bits + jsr ($1234, x) ; $fc + sbc $123456, x ; $ff + .endscope + + .A16 ; akku 16 bit + .I16 ; index registers 16 bit + + .scope + cop $12 ; $02 coprocessor operation + ora $12, s ; $03 + ora [$12] ; $07 + phd ; $0b push direct page register + ora $123456 ; $0f + ora ($12, s), y ; $13 + ora [$12], y ; $17 + tcs ; $1b transfer C to stack pointer + ora $123456, x ; $1f + jsl $123456 ; $22 + and $12, s ; $23 + and [$12] ; $27 + pld ; $2b pull direct page register + and $123456 ; $2f + and ($12, s), y ; $33 + and [$12], y ; $37 + tsc ; $3b transfer stack pointer to C + and $123456, x ; $3f + wdm $12 ; $42 (reserved for future expansion) + eor $12, s ; $43 + mvp $1234, $5678 ; $44 + eor [$12] ; $47 + phk ; $4b push program bank register + eor $123456 ; $4f + eor ($12, s), y ; $53 + mvn $1234, $5678 ; $54 + eor [$12], y ; $57 + tcd ; $5b transfer C to direct page register + jml $123456 ; $5c + eor $123456, x ; $5f + per LABEL ; $62 push effective relative address + adc $12, s ; $63 + adc [$12] ; $67 + rtl ; $6b return long (fetches 24-bit address from stack) + adc $123456 ; $6f + adc ($12, s), y ; $73 + adc [$12], y ; $77 + tdc ; $7b transfer direct page register to C + adc $123456, x ; $7f +LABEL: + brl LABEL ; $82 branch long (16-bit offset) + sta $12, s ; $83 + sta [$12] ; $87 + phb ; $8b push data bank register + sta $123456 ; $8f + sta ($12, s), y ; $93 + sta [$12], y ; $97 + txy ; $9b transfer X to Y + sta $123456, x ; $9f + lda $12, s ; $a3 + lda [$12] ; $a7 + plb ; $ab pull data bank register + lda $123456 ; $af + lda ($12, s), y ; $b3 + lda [$12], y ; $b7 + tyx ; $bb transfer Y to X + lda $123456, x ; $bf + rep #$12 ; $c2 clear bits in status register + cmp $12, s ; $c3 + cmp [$12] ; $c7 + wai ; $cb wait for interrupt + cmp $123456 ; $cf + cmp ($12, s), y ; $d3 + pei ($12) ; $d4 push effective indirect address + cmp [$12], y ; $d7 + stp ; $db wait for reset + jmp [$1234] ; $dc + cmp $123456, x ; $df + sep #$12 ; $e2 set bits in status register + sbc $12, s ; $e3 + sbc [$12] ; $e7 + xba ; $eb exchange high and low bytes of accumulator + sbc $123456 ; $ef + sbc ($12, s), y ; $f3 + pea $1234 ; $f4 push effective absolute address + sbc [$12], y ; $f7 + xce ; $fb exchange Carry and Emulation bits + jsr ($1234, x) ; $fc + sbc $123456, x ; $ff + .endscope + +.endif + +.if (.cpu .bitand CPU_ISET_SWEET16) + + RTN ; $00 Return to 6502 code. + BR LABEL ; $01 ea Unconditional Branch. + BNC LABEL ; $02 ea Branch if Carry=0. + BC LABEL ; $03 ea Branch if Carry=1. + BP LABEL ; $04 ea Branch if last result positive. + BM LABEL ; $0S ea Branch if last result negative. + BZ LABEL ; $06 ea Branch if last result zero. + BNZ LABEL ; $07 ea Branch if last result non-zero. + BM1 LABEL ; $08 ea Branch if last result = -1. + BNM1 LABEL ; $09 ea Branch if last result not -1. + BK ; $0A Execute 6502 BRK instruction. + RS ; $0B Return from SWEET-16 subroutine. + BS LABEL ; $0C ea Call SWEET-16 subroutine. +LABEL: + +.repeat 16, count + SET count,$1234 ; $1n lo hi Rn <-- value. + LD count ; $2n R0 <-- (Rn). + ST count ; $3n Rn <-- (R0). + LD @count ; $4n MA = (Rn), ROL <-- (MA), Rn <-- MA+1, R0H <-- 0. + ST @count ; $5n MA = (Rn), MA <-- (R0L), Rn <-- MA+1. + LDD @count ; $6n MA = (Rn), R0 <-- (MA, MA+1), Rn <-- MA+2. + STD @count ; $7n MA = (Rn), MA,MA+l <-- (R0), Rn <-- MA+2. + POP @count ; $8n MA = (Rn)-1, R0L <-- (MA), R0H <-- 0, Rn <-- MA. + STP @count ; $9n MA <-- (Rn)-1, (MA) <-- R0L, Rn <-- MA. + ADD count ; $An R0 <-- (R0) + (Rn). + SUB count ; $Bn R0 <-- (R0) - (Rn). + POPD @count ; $Cn MA = (Rn)-2, MA,MA+l <-- R0, Rn <-- MA. + CPR count ; $Dn R13 <-- (R0) - (Rn), R14 <-- status flags. + INR count ; $En Rn <-- (Rn) + 1. + DCR count ; $Fn Rn <-- (Rn) - 1. +.endrepeat + +.endif diff --git a/test/asm/cpudetect/cpudetect.s b/test/asm/cpudetect/cpudetect.s index 7b2363b7f..3022038a2 100644 --- a/test/asm/cpudetect/cpudetect.s +++ b/test/asm/cpudetect/cpudetect.s @@ -8,6 +8,15 @@ lda #$ea .endif +.ifp02x + lax #$ea +.endif + +.ifp6280 + sax + cla +.endif + .ifpsc02 jmp ($1234,x) .endif @@ -16,18 +25,39 @@ rmb0 $12 .endif -.ifp816 - xba +.ifpwc02 + wai + stp +.endif + +.ifpce02 + ldz #$12 .endif .ifp4510 taz .endif +.ifp45GS02 + orq $1234 +.endif + .ifpdtv sac #$00 .endif +.ifpm740 + jsr $ff12 +.endif + +.ifp816 + xba +.endif + +.ifpsweet16 + bk +.endif + ; step 2: check for bitwise compatibility of instructions sets ; (made verbose for better reading with hexdump/hd(1)) @@ -44,6 +74,10 @@ .byte 0,"CPU_ISET_6502X" .endif +.if (.cpu .bitand CPU_ISET_6502DTV) + .byte 0,"CPU_ISET_6502DTV" +.endif + .if (.cpu .bitand CPU_ISET_65SC02) .byte 0,"CPU_ISET_65SC02" .endif @@ -52,6 +86,30 @@ .byte 0,"CPU_ISET_65C02" .endif +.if (.cpu .bitand CPU_ISET_W65C02) + .byte 0,"CPU_ISET_W65C02" +.endif + +.if (.cpu .bitand CPU_ISET_65CE02) + .byte 0,"CPU_ISET_65CE02" +.endif + +.if (.cpu .bitand CPU_ISET_4510) + .byte 0,"CPU_ISET_4510" +.endif + +.if (.cpu .bitand CPU_ISET_45GS02) + .byte 0,"CPU_ISET_45GS02" +.endif + +.if (.cpu .bitand CPU_ISET_HUC6280) + .byte 0,"CPU_ISET_HUC6280" +.endif + +.if (.cpu .bitand CPU_ISET_M740) + .byte 0,"CPU_ISET_M740" +.endif + .if (.cpu .bitand CPU_ISET_65816) .byte 0,"CPU_ISET_65816" .endif @@ -60,15 +118,22 @@ .byte 0,"CPU_ISET_SWEET16" .endif -.if (.cpu .bitand CPU_ISET_HUC6280) - .byte 0,"CPU_ISET_HUC6280" -.endif -.if (.cpu .bitand CPU_ISET_4510) - .byte 0,"CPU_ISET_4510" -.endif +.include "allinst.inc" -.if (.cpu .bitand CPU_ISET_6502DTV) - .byte 0,"CPU_ISET_6502DTV" -.endif +; step 3: switch through all supported cpus to verify the pseudo-op is there + +.p02 +.p02X +.psc02 +.pc02 +.pwc02 +.pce02 +.p4510 +.p45GS02 +.pdtv +.p6280 +.pm740 +.p816 +.psweet16 diff --git a/test/asm/cpudetect/huc6280-cpudetect.ref b/test/asm/cpudetect/huc6280-cpudetect.ref index 646e0f48c..6ae287fdf 100644 Binary files a/test/asm/cpudetect/huc6280-cpudetect.ref and b/test/asm/cpudetect/huc6280-cpudetect.ref differ diff --git a/test/asm/cpudetect/m740-cpudetect.ref b/test/asm/cpudetect/m740-cpudetect.ref new file mode 100644 index 000000000..7788f3ed9 Binary files /dev/null and b/test/asm/cpudetect/m740-cpudetect.ref differ diff --git a/test/asm/cpudetect/sweet16-cpudetect.ref b/test/asm/cpudetect/sweet16-cpudetect.ref new file mode 100644 index 000000000..98d33127a Binary files /dev/null and b/test/asm/cpudetect/sweet16-cpudetect.ref differ diff --git a/test/asm/cpudetect/w65c02-cpudetect.ref b/test/asm/cpudetect/w65c02-cpudetect.ref new file mode 100644 index 000000000..094210464 Binary files /dev/null and b/test/asm/cpudetect/w65c02-cpudetect.ref differ diff --git a/test/asm/err/Makefile b/test/asm/err/Makefile index 6d2430d34..9b6bc7fa9 100644 --- a/test/asm/err/Makefile +++ b/test/asm/err/Makefile @@ -1,3 +1,9 @@ +# ---- Display info during parsing phase ---- +SILENT:=$(findstring s,$(word 1, $(MAKEFLAGS))) +ifneq ($(SILENT),s) + $(info Using Makefile: $(realpath $(firstword $(MAKEFILE_LIST))) $(MAKECMDGOALS)) +endif + # Makefile for the tests that MUST NOT compile ifneq ($(shell echo),) @@ -18,9 +24,17 @@ else RMDIR = $(RM) -r $1 endif +ifeq ($(SILENT),s) + QUIET = 1 +endif + ifdef QUIET .SILENT: + NULLOUT = >$(NULLDEV) NULLERR = 2>$(NULLDEV) +ifndef CMD_EXE + CATERR = 2> $(WORKDIR)/$$@.errlog || (cat $(WORKDIR)/$$@.errlog && false) +endif endif CA65 := $(if $(wildcard ../../../bin/ca65*),..$S..$S..$Sbin$Sca65,ca65) diff --git a/test/asm/err/bug505.s b/test/asm/err/bug505.s new file mode 100644 index 000000000..8cb0e2f18 --- /dev/null +++ b/test/asm/err/bug505.s @@ -0,0 +1,28 @@ +; Test for #505 taken from the issue +; Redefining a variable symbol "reopens" the old name space for cheap locals +; Behavior should be: First definition of a variable symbol opens a new +; scope for cheap locals, redefinitions of the same symbols do not. + +;this starts a new scope for cheap local lables +SomeSymbol .set 4 + + jmp @CheapLocal1 + +@CheapLocal0: + + .byte $8b + +CheapLocalScopeBreaker0: + +CheapLocalScopeBreaker1: + +CheapLocalScopeBreaker2: + +CheapLocalScopeBreaker3: + +;this continues the same cheap scope as before, regardless of the many global labels in between +SomeSymbol .set 5 + +@CheapLocal1: + + lda @CheapLocal0 diff --git a/test/asm/listing/080-sp-compat.s b/test/asm/listing/080-sp-compat.s new file mode 100644 index 000000000..54c48e8c3 --- /dev/null +++ b/test/asm/listing/080-sp-compat.s @@ -0,0 +1,16 @@ +.include "zeropage.inc" + +; FIXME: there must be a less ugly way to do this +.ifp4510 +.else +.ifp45GS02 +.else + +.proc _func + ldy #0 + lda (sp),y + rts +.endproc + +.endif +.endif diff --git a/test/asm/listing/Makefile b/test/asm/listing/Makefile index 23aa3969c..202a44011 100644 --- a/test/asm/listing/Makefile +++ b/test/asm/listing/Makefile @@ -1,3 +1,9 @@ +# ---- Display info during parsing phase ---- +SILENT:=$(findstring s,$(word 1, $(MAKEFLAGS))) +ifneq ($(SILENT),s) + $(info Using Makefile: $(realpath $(firstword $(MAKEFILE_LIST))) $(MAKECMDGOALS)) +endif + # Makefile for the assembler regression tests ifneq ($(shell echo),) @@ -11,6 +17,7 @@ ifdef CMD_EXE RMDIR = -rmdir /q /s $(subst /,\,$1) TRUE = exit 0 CAT = type $(subst /,\,$1) + NULLDEV = nul: else S = / EXE = @@ -18,10 +25,20 @@ else RMDIR = $(RM) -r $1 TRUE = true CAT = cat $1 + NULLDEV = /dev/null +endif + +ifeq ($(SILENT),s) + QUIET = 1 endif ifdef QUIET -# .SILENT: + .SILENT: + NULLOUT = >$(NULLDEV) + NULLERR = 2>$(NULLDEV) +ifndef CMD_EXE + CATERR = 2> $(WORKDIR)/$$@.errlog || (cat $(WORKDIR)/$$@.errlog && false) +endif endif CA65 := $(if $(wildcard ../../../bin/ca65*),..$S..$S..$Sbin$Sca65,ca65) @@ -76,48 +93,52 @@ endif endif ifneq ($(wildcard ref/$1.err-ref),) - $(ISEQUAL) ref/$1.err-ref $$(@:.bin=.err) + $(ISEQUAL) ref/$1.err-ref $$(@:.bin=.err) $(NULLERR) else - $(ISEQUAL) --empty $$(@:.bin=.err) + $(ISEQUAL) --empty $$(@:.bin=.err) $(NULLERR) endif ifneq ($(wildcard ref/$1.err2-ref),) - $(ISEQUAL) ref/$1.err2-ref $$(@:.bin=.err2) + $(ISEQUAL) ref/$1.err2-ref $$(@:.bin=.err2) $(NULLERR) else - $(ISEQUAL) --empty $$(@:.bin=.err2) + $(ISEQUAL) --empty $$(@:.bin=.err2) $(NULLERR) endif ifneq ($(wildcard ref/$1.bin-ref),) - $(ISEQUAL) --binary ref/$1.bin-ref $$@ + $(ISEQUAL) --binary ref/$1.bin-ref $$@ $(NULLERR) endif # rem $(indfo $(CAT) $(subst /,$$S,$$$(@:.bin=.ld65-err))) ifneq ($(wildcard ref/$1.ld65err-ref),) +ifndef QUIET @echo $(CAT) $$(@:.bin=.ld65-err) # FIXME: somehow this refuses to work in cmd.exe ifndef CMD_EXE $(call CAT,$$(@:.bin=.ld65-err)) -diff -u ref/$1.ld65err-ref $$(@:.bin=.ld65-err) endif - $(ISEQUAL) --wildcards ref/$1.ld65err-ref $$(@:.bin=.ld65-err) +endif + $(ISEQUAL) --wildcards ref/$1.ld65err-ref $$(@:.bin=.ld65-err) $(NULLERR) else ifneq ($(wildcard $(WORKDIR)/$1.ld65-err),) - $(ISEQUAL) --empty $$(@:.bin=.ld65-err) + $(ISEQUAL) --empty $$(@:.bin=.ld65-err) $(NULLERR) endif endif ifneq ($(wildcard ref/$1.ld65err2-ref),) +ifndef QUIET @echo $(CAT) $$(@:.bin=.ld65-err2) # FIXME: somehow this refuses to work in cmd.exe ifndef CMD_EXE $(call CAT,$$(@:.bin=.ld65-err2)) -diff -u ref/$1.ld65err2-ref $$(@:.bin=.ld65-err2) endif - $(ISEQUAL) --wildcards ref/$1.ld65err2-ref $$(@:.bin=.ld65-err2) +endif + $(ISEQUAL) --wildcards ref/$1.ld65err2-ref $$(@:.bin=.ld65-err2) $(NULLERR) else ifneq ($(wildcard $(WORKDIR)/$1.ld65-err2),) - $(ISEQUAL) --empty $$(@:.bin=.ld65-err2) + $(ISEQUAL) --empty $$(@:.bin=.ld65-err2) $(NULLERR) endif endif @@ -143,37 +164,37 @@ endif endif ifneq ($(wildcard ref/$1.err-ref),) - $(ISEQUAL) ref/$1.err-ref $$(@:.bin=.list-err) + $(ISEQUAL) ref/$1.err-ref $$(@:.bin=.list-err) $(NULLERR) else - $(ISEQUAL) --empty $$(@:.bin=.list-err) + $(ISEQUAL) --empty $$(@:.bin=.list-err) $(NULLERR) endif ifneq ($(wildcard ref/$1.ld65err-ref),) - $(ISEQUAL) --wildcards ref/$1.ld65err-ref $$(@:.bin=.list-ld65-err) + $(ISEQUAL) --wildcards ref/$1.ld65err-ref $$(@:.bin=.list-ld65-err) $(NULLERR) else ifneq ($(wildcard $(WORKDIR)/$1.list-ld65-err),) - $(ISEQUAL) --empty $$(@:.bin=.list-ld65-err) + $(ISEQUAL) --empty $$(@:.bin=.list-ld65-err) $(NULLERR) endif endif ifneq ($(wildcard ref/$1.err2-ref),) - $(ISEQUAL) ref/$1.err2-ref $$(@:.bin=.list-err2) + $(ISEQUAL) ref/$1.err2-ref $$(@:.bin=.list-err2) $(NULLERR) else - $(ISEQUAL) --empty $$(@:.bin=.list-err2) + $(ISEQUAL) --empty $$(@:.bin=.list-err2) $(NULLERR) endif ifneq ($(wildcard ref/$1.ld65err2-ref),) - $(ISEQUAL) --wildcards ref/$1.ld65err2-ref $$(@:.bin=.list-ld65-err2) + $(ISEQUAL) --wildcards ref/$1.ld65err2-ref $$(@:.bin=.list-ld65-err2) $(NULLERR) else ifneq ($(wildcard $(WORKDIR)/$1.list-ld65-err2),) - $(ISEQUAL) --empty $$(@:.bin=.list-ld65-err2) + $(ISEQUAL) --empty $$(@:.bin=.list-ld65-err2) $(NULLERR) endif endif # check if the result bin is the same as without listing file ifeq ($(wildcard control/$1.err),) ifeq ($(wildcard control/$1.err2),) - $(ISEQUAL) $$@ $$(@:.bin=.list-bin) + $(ISEQUAL) $$@ $$(@:.bin=.list-bin) $(NULLERR) endif endif @@ -181,7 +202,7 @@ ifneq ($(wildcard ref/$1.list-ref),) # we have a reference file, compare that, too # remove first line which contains a version number - $(ISEQUAL) --skip=1 ref/$1.list-ref $$(@:.bin=.list-lst) + $(ISEQUAL) --skip=1 ref/$1.list-ref $$(@:.bin=.list-lst) $(NULLERR) endif endef # LISTING_template diff --git a/test/asm/listing/ref/080-sp-compat.ld65err2-ref b/test/asm/listing/ref/080-sp-compat.ld65err2-ref new file mode 100644 index 000000000..78935d2b3 --- /dev/null +++ b/test/asm/listing/ref/080-sp-compat.ld65err2-ref @@ -0,0 +1 @@ +ld65: Warning: runtime/sp-compat.s:16: Symbol 'sp' is deprecated - please use 'c_sp' instead diff --git a/test/asm/misc/Makefile b/test/asm/misc/Makefile index 5a9d4f3ef..713d57812 100644 --- a/test/asm/misc/Makefile +++ b/test/asm/misc/Makefile @@ -1,3 +1,9 @@ +# ---- Display info during parsing phase ---- +SILENT:=$(findstring s,$(word 1, $(MAKEFLAGS))) +ifneq ($(SILENT),s) + $(info Using Makefile: $(realpath $(firstword $(MAKEFILE_LIST))) $(MAKECMDGOALS)) +endif + # Makefile for the remaining asm tests that need special care in one way or another ifneq ($(shell echo),) @@ -20,10 +26,17 @@ else RMDIR = $(RM) -r $1 endif +ifeq ($(SILENT),s) + QUIET = 1 +endif + ifdef QUIET .SILENT: NULLOUT = >$(NULLDEV) NULLERR = 2>$(NULLDEV) +ifndef CMD_EXE + CATERR = 2> $(WORKDIR)/$$@.errlog || (cat $(WORKDIR)/$$@.errlog && false) +endif endif SIM65FLAGS = -x 200000000 diff --git a/test/asm/opcodes/45GS02-opcodes.ref b/test/asm/opcodes/45GS02-opcodes.ref new file mode 100644 index 000000000..a4a78d46c Binary files /dev/null and b/test/asm/opcodes/45GS02-opcodes.ref differ diff --git a/test/asm/opcodes/45GS02-opcodes.s b/test/asm/opcodes/45GS02-opcodes.s new file mode 100644 index 000000000..6d42b80c4 --- /dev/null +++ b/test/asm/opcodes/45GS02-opcodes.s @@ -0,0 +1,377 @@ +.setcpu "45GS02" + + brk + ora ($05,x) + cle + see + tsb $02 + ora $02 + asl $02 + rmb0 $02 + php + ora #$01 + asl + tsy + tsb $1234 + ora $1234 + asl $1234 + bbr0 $02,*+$34 + + bpl *+$32 + ora ($06),y + ora ($07),z + lbpl *+$3133 ; bpl *+$3133 + trb $02 + ora $03,x + asl $03,x + rmb1 $02 + clc + ora $1456,y + inc + inz + trb $1234 + ora $1345,x + asl $1345,x + bbr1 $02,*+$34 + + jsr $1234 + and ($05,x) + jsr ($2345) + jsr ($2456,x) + bit $02 + and $02 + rol $02 + rmb2 $02 + plp + and #$01 + rol + tys + bit $1234 + and $1234 + rol $1234 + bbr2 $02,*+$34 + + bmi *+$32 + and ($06),y + and ($07),z + lbmi *+$3133 ; bmi *+$3133 + bit $03,x + and $03,x + rol $03,x + rmb3 $02 + sec + and $1456,y + dec + dez + bit $1345,x + and $1345,x + rol $1345,x + bbr3 $02,*+$34 + + rti + eor ($05,x) + neg + asr + asr $02 + eor $02 + lsr $02 + rmb4 $02 + pha + eor #$01 + lsr + taz + jmp $1234 + eor $1234 + lsr $1234 + bbr4 $02,*+$34 + + bvc *+$32 + eor ($06),y + eor ($07),z + lbvc *+$3133 ; bvc *+$3133 + asr $03,x + eor $03,x + lsr $03,x + rmb5 $02 + cli + eor $1456,y + phy + tab + map + eor $1345,x + lsr $1345,x + bbr5 $02,*+$34 + + rts + adc ($05,x) + rtn #$09 + bsr *+$3133 + stz $02 + adc $02 + ror $02 + rmb6 $02 + pla + adc #$01 + ror + tza + jmp ($2345) + adc $1234 + ror $1234 + bbr6 $02,*+$34 + + bvs *+$32 + adc ($06),y + adc ($07),z + lbvs *+$3133 ; bvs *+$3133 + stz $03,x + adc $03,x + ror $03,x + rmb7 $02 + sei + adc $1456,y + ply + tba + jmp ($2456,x) + adc $1345,x + ror $1345,x + bbr7 $02,*+$34 + + bra *+$32 + sta ($05,x) + sta ($0f,s),y + sta ($0f,sp),y + lbra *+$3133 ; bra *+$3133 + sty $02 + sta $02 + stx $02 + smb0 $02 + dey + bit #$01 + txa + sty $1345,x + sty $1234 + sta $1234 + stx $1234 + bbs0 $02,*+$34 + + bcc *+$32 + sta ($06),y + sta ($07),z + lbcc *+$3133 ; bcc *+$3133 + sty $03,x + sta $03,x + stx $04,y + smb1 $02 + tya + sta $1456,y + txs + stx $1456,y + stz $1234 + sta $1345,x + stz $1345,x + bbs1 $02,*+$34 + + ldy #$01 + lda ($05,x) + ldx #$01 + ldz #$01 + ldy $02 + lda $02 + ldx $02 + smb2 $02 + tay + lda #$01 + tax + ldz $1234 + ldy $1234 + lda $1234 + ldx $1234 + bbs2 $02,*+$34 + + bcs *+$32 + lda ($06),y + lda ($07),z + lbcs *+$3133 ; bcs *+$3133 + ldy $03,x + lda $03,x + ldx $04,y + smb3 $02 + clv + lda $1456,y + tsx + ldz $1345,x + ldy $1345,x + lda $1345,x + ldx $1456,y + bbs3 $02,*+$34 + + cpy #$01 + cmp ($05,x) + cpz #$01 + dew $02 + cpy $02 + cmp $02 + dec $02 + smb4 $02 + iny + cmp #$01 + dex + asw $1234 + cpy $1234 + cmp $1234 + dec $1234 + bbs4 $02,*+$34 + + bne *+$32 + cmp ($06),y + cmp ($07),z + lbne *+$3133 ; bne *+$3133 + cpz $02 + cmp $03,x + dec $03,x + smb5 $02 + cld + cmp $1456,y + phx + phz + cpz $1234 + cmp $1345,x + dec $1345,x + bbs5 $02,*+$34 + + cpx #$01 + sbc ($05,x) + lda ($0f,s),y + lda ($0f,sp),y + inw $02 + cpx $02 + sbc $02 + inc $02 + smb6 $02 + inx + sbc #$01 + eom + nop + row $1234 + cpx $1234 + sbc $1234 + inc $1234 + bbs6 $02,*+$34 + + beq *+$32 + sbc ($06),y + sbc ($07),z + lbeq *+$3133 ; beq *+$3133 + phd #$089a + phw #$089a + sbc $03,x + inc $03,x + smb7 $02 + sed + sbc $1456,y + plx + plz + phd $1234 + phw $1234 + sbc $1345,x + inc $1345,x + bbs7 $02,*+$34 + + adc [$12],z + + adcq $12 + adcq $3456 + adcq ($78) + adcq [$9a] + + and [$12],z + + andq $12 + andq $3456 + andq ($78) + andq [$9a] + + aslq $12 + aslq + aslq $3456 + aslq $78,x + aslq $9abc,x + + asrq + asrq $12 + asrq $34,x + + bitq $12 + bitq $3456 + + cmp [$12],z + + cmpq $12 + cmpq $3456 + cmpq ($78) + cmpq [$9a] + + deq + deq $12 + deq $3456 + deq $78,x + deq $9abc,x + + eor [$12],z + + eorq $12 + eorq $3456 + eorq ($78) + eorq [$9a] + + inq + inq $12 + inq $3456 + inq $78,x + inq $9abc,x + + lda [$12],z + + ldq $12 + ldq $3456 + ldq ($78),z + ldq [$9a],z + + lsrq $12 + lsrq + lsrq $3456 + lsrq $78,x + lsrq $9abc,x + + ora [$12],z + + orq $12 + orq $3456 + orq ($78) + orq [$9a] + + rolq $12 + rolq + rolq $3456 + rolq $78,x + rolq $9abc,x + + rorq $12 + rorq + rorq $3456 + rorq $78,x + rorq $9abc,x + + sbc [$12],z + + sbcq $12 + sbcq $3456 + sbcq ($78) + sbcq [$9a] + + sta [$12],z ; EA 92 12 + + stq $12 + stq $3456 + stq ($78) + stq [$9a] diff --git a/test/asm/opcodes/65ce02-opcodes.ref b/test/asm/opcodes/65ce02-opcodes.ref new file mode 100644 index 000000000..b65b12e61 Binary files /dev/null and b/test/asm/opcodes/65ce02-opcodes.ref differ diff --git a/test/asm/opcodes/65ce02-opcodes.s b/test/asm/opcodes/65ce02-opcodes.s new file mode 100644 index 000000000..ecdd7d747 --- /dev/null +++ b/test/asm/opcodes/65ce02-opcodes.s @@ -0,0 +1,278 @@ +.setcpu "65CE02" + + brk + ora ($05,x) + cle + see + tsb $02 + ora $02 + asl $02 + rmb0 $02 + php + ora #$01 + asl + tsy + tsb $1234 + ora $1234 + asl $1234 + bbr0 $02,*+$34 + + bpl *+$32 + ora ($06),y + ora ($07),z + lbpl *+$3133 ; bpl *+$3133 + trb $02 + ora $03,x + asl $03,x + rmb1 $02 + clc + ora $1456,y + inc + inz + trb $1234 + ora $1345,x + asl $1345,x + bbr1 $02,*+$34 + + jsr $1234 + and ($05,x) + jsr ($2345) + jsr ($2456,x) + bit $02 + and $02 + rol $02 + rmb2 $02 + plp + and #$01 + rol + tys + bit $1234 + and $1234 + rol $1234 + bbr2 $02,*+$34 + + bmi *+$32 + and ($06),y + and ($07),z + lbmi *+$3133 ; bmi *+$3133 + bit $03,x + and $03,x + rol $03,x + rmb3 $02 + sec + and $1456,y + dec + dez + bit $1345,x + and $1345,x + rol $1345,x + bbr3 $02,*+$34 + + rti + eor ($05,x) + neg + asr + asr $02 + eor $02 + lsr $02 + rmb4 $02 + pha + eor #$01 + lsr + taz + jmp $1234 + eor $1234 + lsr $1234 + bbr4 $02,*+$34 + + bvc *+$32 + eor ($06),y + eor ($07),z + lbvc *+$3133 ; bvc *+$3133 + asr $03,x + eor $03,x + lsr $03,x + rmb5 $02 + cli + eor $1456,y + phy + tab + aug + eor $1345,x + lsr $1345,x + bbr5 $02,*+$34 + + rts + adc ($05,x) + rtn #$09 + bsr *+$3133 + stz $02 + adc $02 + ror $02 + rmb6 $02 + pla + adc #$01 + ror + tza + jmp ($2345) + adc $1234 + ror $1234 + bbr6 $02,*+$34 + + bvs *+$32 + adc ($06),y + adc ($07),z + lbvs *+$3133 ; bvs *+$3133 + stz $03,x + adc $03,x + ror $03,x + rmb7 $02 + sei + adc $1456,y + ply + tba + jmp ($2456,x) + adc $1345,x + ror $1345,x + bbr7 $02,*+$34 + + bra *+$32 + sta ($05,x) + sta ($0f,s),y + sta ($0f,sp),y + lbra *+$3133 ; bra *+$3133 + sty $02 + sta $02 + stx $02 + smb0 $02 + dey + bit #$01 + txa + sty $1345,x + sty $1234 + sta $1234 + stx $1234 + bbs0 $02,*+$34 + + bcc *+$32 + sta ($06),y + sta ($07),z + lbcc *+$3133 ; bcc *+$3133 + sty $03,x + sta $03,x + stx $04,y + smb1 $02 + tya + sta $1456,y + txs + stx $1456,y + stz $1234 + sta $1345,x + stz $1345,x + bbs1 $02,*+$34 + + ldy #$01 + lda ($05,x) + ldx #$01 + ldz #$01 + ldy $02 + lda $02 + ldx $02 + smb2 $02 + tay + lda #$01 + tax + ldz $1234 + ldy $1234 + lda $1234 + ldx $1234 + bbs2 $02,*+$34 + + bcs *+$32 + lda ($06),y + lda ($07),z + lbcs *+$3133 ; bcs *+$3133 + ldy $03,x + lda $03,x + ldx $04,y + smb3 $02 + clv + lda $1456,y + tsx + ldz $1345,x + ldy $1345,x + lda $1345,x + ldx $1456,y + bbs3 $02,*+$34 + + cpy #$01 + cmp ($05,x) + cpz #$01 + dew $02 + cpy $02 + cmp $02 + dec $02 + smb4 $02 + iny + cmp #$01 + dex + asw $1234 + cpy $1234 + cmp $1234 + dec $1234 + bbs4 $02,*+$34 + + bne *+$32 + cmp ($06),y + cmp ($07),z + lbne *+$3133 ; bne *+$3133 + cpz $02 + cmp $03,x + dec $03,x + smb5 $02 + cld + cmp $1456,y + phx + phz + cpz $1234 + cmp $1345,x + dec $1345,x + bbs5 $02,*+$34 + + cpx #$01 + sbc ($05,x) + lda ($0f,s),y + lda ($0f,sp),y + inw $02 + cpx $02 + sbc $02 + inc $02 + smb6 $02 + inx + sbc #$01 + eom + nop + row $1234 + cpx $1234 + sbc $1234 + inc $1234 + bbs6 $02,*+$34 + + beq *+$32 + sbc ($06),y + sbc ($07),z + lbeq *+$3133 ; beq *+$3133 + phd #$089a + phw #$089a + sbc $03,x + inc $03,x + smb7 $02 + sed + sbc $1456,y + plx + plz + phd $1234 + phw $1234 + sbc $1345,x + inc $1345,x + bbs7 $02,*+$34 diff --git a/test/asm/opcodes/Makefile b/test/asm/opcodes/Makefile index 00be96d91..e9978ee95 100644 --- a/test/asm/opcodes/Makefile +++ b/test/asm/opcodes/Makefile @@ -1,3 +1,9 @@ +# ---- Display info during parsing phase ---- +SILENT:=$(findstring s,$(word 1, $(MAKEFLAGS))) +ifneq ($(SILENT),s) + $(info Using Makefile: $(realpath $(firstword $(MAKEFILE_LIST))) $(MAKECMDGOALS)) +endif + # Makefile for the assembler regression tests ifneq ($(shell echo),) @@ -14,8 +20,17 @@ else RMDIR = $(RM) -r $1 endif +ifeq ($(SILENT),s) + QUIET = 1 +endif + ifdef QUIET .SILENT: + NULLOUT = >$(NULLDEV) + NULLERR = 2>$(NULLDEV) +ifndef CMD_EXE + CATERR = 2> $(WORKDIR)/$$@.errlog || (cat $(WORKDIR)/$$@.errlog && false) +endif endif CA65 := $(if $(wildcard ../../../bin/ca65*),../../../bin/ca65,ca65) diff --git a/test/asm/opcodes/m740-opcodes.ref b/test/asm/opcodes/m740-opcodes.ref new file mode 100644 index 000000000..b3cffc9b6 Binary files /dev/null and b/test/asm/opcodes/m740-opcodes.ref differ diff --git a/test/asm/opcodes/m740-opcodes.s b/test/asm/opcodes/m740-opcodes.s index df6d71488..e4f8562cc 100644 --- a/test/asm/opcodes/m740-opcodes.s +++ b/test/asm/opcodes/m740-opcodes.s @@ -1,260 +1,565 @@ -.setcpu "65C02" -; copy of 65c02, comments note changes to the m740 according to -; http://documentation.renesas.com/doc/products/mpumcu/rej09b0322_740sm.pdf +; da65 V2.19 - Git 89651fd8b +; Created: 2025-06-16 20:10:42 +; Input file: testfile +; Page: 1 - brk - ora ($12,x) - .byte $02,$00,$00 ; jsr zp,ind - .byte $03,$00,$00 ; bbs 0,a - tsb $12 ; .byte $04 - ora $12 - asl $12 - rmb0 $12 ; bbs 0,zp - php - ora #$12 - asl a - .byte $0B,$00,$00 ; seb 0,a - tsb $3456 ; .byte $0c - ora $3456 - asl $3456 - bbr0 $12,*+122 ; seb 0,zp - bpl *+122 - ora ($12),y - ora ($12) ; clt - .byte $13,$00,$00 ; bbc 0,a - trb $12 ; .byte $14 - ora $12,x - asl $12,x - rmb1 $12 ; bbc 0,zp - clc - ora $3456,y - inc a - .byte $1B,$00,$00 ; clb 0,a - trb $3456 ; .byte $1c - ora $3456,x - asl $3456,x - bbr1 $12,*+122 ; clb 0,zp - jsr $3456 - and ($12,x) - .byte $22,$00,$00 ; jsr sp - .byte $23,$00,$00 ; bbs 1,a - bit $12 - and $12 - rol $12 - rmb2 $12 ; bbs 1,zp - plp - and #$12 - rol a - .byte $2B,$00,$00 ; seb 1,a - bit $3456 - and $3456 - rol $3456 - bbr2 $12,*+122 ; seb 1,zp - bmi *+122 - and ($12),y - and ($12) ; set - .byte $33,$00,$00 ; bbc 1,a - bit $12,x ; .byte $34 - and $12,x - rol $12,x - rmb3 $12 ; bbc 1,zp - sec - and $3456,y - dec a - .byte $3B,$00,$00 ; clb 1,a - bit $3456,x ; ldm zp - and $3456,x - rol $3456,x - bbr3 $12,*+122 ; clb 1,zp - rti - eor ($12,x) - .byte $42,$00,$00 ; stp - .byte $43,$00,$00 ; bbs 2,a - .byte $44,$00,$00 ; com zp - eor $12 - lsr $12 - rmb4 $12 ; bbs 2,zp - pha - eor #$12 - lsr a - .byte $4B,$00,$00 ; seb 2,a - jmp $3456 - eor $3456 - lsr $3456 - bbr4 $12,*+122 ; seb 2,zp - bvc *+122 - eor ($12),y - eor ($12) ; .byte $52 - .byte $53,$00,$00 ; bbc 2,a - .byte $54,$00,$00 - eor $12,x - lsr $12,x - rmb5 $12 ; bbc 2,zp - cli - eor $3456,y - phy - .byte $5B,$00,$00 ; clb 2,a - .byte $5C,$00,$00 - eor $3456,x - lsr $3456,x - bbr5 $12,*+122 ; clb 2,zp - rts - adc ($12,x) - .byte $62,$00,$00 ; mul zp,x - .byte $63,$00,$00 ; bbs 3,a - stz $12 ; tst zp - adc $12 - ror $12 - rmb6 $12 ; bbs 3,zp - pla - adc #$12 - ror a - .byte $6B,$00,$00 ; seb 3,a - jmp ($3456) - adc $3456 - ror $3456 - bbr6 $12,*+122 ; seb 3,zp - bvs *+122 - adc ($12),y - adc ($12) ; .byte $72 - .byte $73,$00,$00 ; bbc 3,a - stz $12,x ; .byte $74 - adc $12,x - ror $12,x - rmb7 $12 ; bbc 3,zp - sei - adc $3456,y - ply - .byte $7B,$00,$00 ; clb 3,a - jmp ($3456,x) ; .byte $7c - adc $3456,x - ror $3456,x - bbr7 $12,*+122 ; clb 3,zp - bra *+122 - sta ($12,x) - .byte $82,$00,$00 ; rrf zp - .byte $83,$00,$00 ; bbs 4,a - sty $12 - sta $12 - stx $12 - smb0 $12 ; bbs 4,zp - dey - bit #$12 - txa - .byte $8B,$00,$00 ; seb 4,a - sty $3456 - sta $3456 - stx $3456 - bbs0 $12,*+122 ; seb 4,zp - bcc *+122 - sta ($12),y - sta ($12) ; .byte $92 - .byte $93,$00,$00 ; bbc 4,a - sty $12,x - sta $12,x - stx $12,y - smb1 $12 ; bbc 4,zp - tya - sta $3456,y - txs - .byte $9B,$00,$00 ; clb 4,a - stz $3456 ; .byte $9c - sta $3456,x - stz $3456,x ; .byte $9e - bbs1 $12,*+122 ; clb 4,zp - ldy #$12 - lda ($12,x) - ldx #$12 - .byte $A3,$00,$00 ; bbs 5,a - ldy $12 - lda $12 - ldx $12 - smb2 $12 ; bbs 5,zp - tay - lda #$12 - tax - .byte $AB,$00,$00 ; seb 5,a - ldy $3456 - lda $3456 - ldx $3456 - bbs2 $12,*+122 ; seb 5,zp - bcs *+122 - lda ($12),y - lda ($12) ; .byte $b2 - .byte $B3,$00,$00 ; bbc 5,a - ldy $12,x - lda $12,x - ldx $12,y - smb3 $12 ; bbc 5,zp - clv - lda $3456,y - tsx - .byte $BB,$00,$00 ; clb 5,a - ldy $3456,x - lda $3456,x - ldx $3456,y - bbs3 $12,*+122 ; clb 5,zp - cpy #$12 - cmp ($12,x) - .byte $C2,$00,$00 ; wit - .byte $C3,$00,$00 ; bbs 6,a - cpy $12 - cmp $12 - dec $12 - smb4 $12 ; bbs 6,zp - iny - cmp #$12 - dex - .byte $CB,$00,$00 ; seb 6,a - cpy $3456 - cmp $3456 - dec $3456 - bbs4 $12,*+122 ; seb 6,zp - bne *+122 - cmp ($12),y - cmp ($12) ; .byte $d2 - .byte $D3,$00,$00 ; bbc 6,a - .byte $D4,$00,$00 - cmp $12,x - dec $12,x - smb5 $12 ; bbc 6,zp - cld - cmp $3456,y - phx - .byte $DB,$00,$00 ; clb 6,a - .byte $DC,$00,$00 - cmp $3456,x - dec $3456,x - bbs5 $12,*+122 ; clb 6,zp - cpx #$12 - sbc ($12,x) - .byte $E2,$00,$00 ; div zp,x - .byte $E3,$00,$00 ; bbs 7,a - cpx $12 - sbc $12 - inc $12 - smb6 $12 ; bbs 7,zp - inx - sbc #$12 - nop - .byte $EB,$00,$00 ; seb 7,a - cpx $3456 - sbc $3456 - inc $3456 - bbs6 $12,*+122 ; seb 7,zp - beq *+122 - sbc ($12),y - sbc ($12) ; .byte $f2 - .byte $F3,$00,$00 ; bbc 7,a - .byte $F4,$00,$00 - sbc $12,x - inc $12,x - smb7 $12 ; bbc 7,zp - sed - sbc $3456,y - plx - .byte $FB,$00,$00 ; clb 7,a - .byte $FC,$00,$00 - sbc $3456,x - inc $3456,x - bbs7 $12,*+122 ; clb 7,zp + + .setcpu "m740" + +L000C := $000C +L040C := $040C +LFF0C := $FF0C + brk + .byte $0C + .byte $04 + ora (L000C,x) + .byte $04 + jsr (L000C) + + .byte $04 + bbs0 a, L8018 + .byte $04 + .byte $04 + .byte $0C + .byte $04 + ora L000C + .byte $04 + asl L000C + .byte $04 + bbs0 L000C, L801C +L8018: php + .byte $0C + .byte $04 + .byte $09 +L801C: .byte $0C + .byte $04 + asl a + .byte $0C + .byte $04 + seb0 a + .byte $0C + .byte $04 + .byte $0C + .byte $0C + .byte $04 + ora L040C + asl L040C + seb0 L000C + .byte $04 + bpl L803E + .byte $04 + ora (L000C),y + .byte $04 + clt + .byte $0C + .byte $04 + bbc0 a, L8048 + .byte $04 + .byte $14 + .byte $0C +L803E: .byte $04 + ora L000C,x + .byte $04 + asl L000C,x + .byte $04 + bbc0 L000C, L804C +L8048: clc + .byte $0C + .byte $04 + .byte $19 +L804C: .byte $0C + .byte $04 + inc a + .byte $0C + .byte $04 + clb0 a + .byte $0C + .byte $04 + .byte $1C + .byte $0C + .byte $04 + ora L040C,x + asl L040C,x + clb0 L000C + .byte $04 + jsr L040C + and (L000C,x) + .byte $04 + jsr LFF0C + .byte $04 + bbs1 a, L8078 + .byte $04 + bit L000C + .byte $04 + and L000C + .byte $04 + rol L000C + .byte $04 + bbs1 L000C, L807C +L8078: plp + .byte $0C + .byte $04 + .byte $29 +L807C: .byte $0C + .byte $04 + rol a + .byte $0C + .byte $04 + seb1 a + .byte $0C + .byte $04 + bit L040C + and L040C + rol L040C + seb1 L000C + .byte $04 + bmi L809E + .byte $04 + and (L000C),y + .byte $04 + set + .byte $0C + .byte $04 + bbc1 a, L80A8 + .byte $04 + .byte $34 + .byte $0C +L809E: .byte $04 + and L000C,x + .byte $04 + rol L000C,x + .byte $04 + bbc1 L000C, L80AC +L80A8: sec + .byte $0C + .byte $04 + .byte $39 +L80AC: .byte $0C + .byte $04 + dec a + .byte $0C + .byte $04 + clb1 a + .byte $0C + .byte $04 + ldm L000C, #$04 + and L040C,x + rol L040C,x + clb1 L000C + .byte $04 + rti + + .byte $0C + .byte $04 + eor (L000C,x) + .byte $04 + stp + .byte $0C + .byte $04 + bbs2 a, L80D8 + .byte $04 + com L000C + .byte $04 + eor L000C + .byte $04 + lsr L000C + .byte $04 + bbs2 L000C, L80DC +L80D8: pha + .byte $0C + .byte $04 + .byte $49 +L80DC: .byte $0C + .byte $04 + lsr a + .byte $0C + .byte $04 + seb2 a + .byte $0C + .byte $04 + jmp L040C + + eor L040C + lsr L040C + seb2 L000C + .byte $04 + bvc L80FE + .byte $04 + eor (L000C),y + .byte $04 + .byte $52 + .byte $0C + .byte $04 + bbc2 a, L8108 + .byte $04 + .byte $54 + .byte $0C +L80FE: .byte $04 + eor L000C,x + .byte $04 + lsr L000C,x + .byte $04 + bbc2 L000C, L810C +L8108: cli + .byte $0C + .byte $04 + .byte $59 +L810C: .byte $0C + .byte $04 + .byte $5A + .byte $0C + .byte $04 + clb2 a + .byte $0C + .byte $04 + .byte $5C + .byte $0C + .byte $04 + eor L040C,x + lsr L040C,x + clb2 L000C + .byte $04 + rts + + .byte $0C + .byte $04 + adc (L000C,x) + .byte $04 + .byte $62 + .byte $0C + .byte $04 + bbs3 a, L8138 + .byte $04 + tst L000C + .byte $04 + adc L000C + .byte $04 + ror L000C + .byte $04 + bbs3 L000C, L813C +L8138: pla + .byte $0C + .byte $04 + .byte $69 +L813C: .byte $0C + .byte $04 + ror a + .byte $0C + .byte $04 + seb3 a + .byte $0C + .byte $04 + jmp (L040C) + + adc L040C + ror L040C + seb3 L000C + .byte $04 + bvs L815E + .byte $04 + adc (L000C),y + .byte $04 + .byte $72 + .byte $0C + .byte $04 + bbc3 a, L8168 + .byte $04 + .byte $74 + .byte $0C +L815E: .byte $04 + adc L000C,x + .byte $04 + ror L000C,x + .byte $04 + bbc3 L000C, L816C +L8168: sei + .byte $0C + .byte $04 + .byte $79 +L816C: .byte $0C + .byte $04 + .byte $7A + .byte $0C + .byte $04 + clb3 a + .byte $0C + .byte $04 + .byte $7C + .byte $0C + .byte $04 + adc L040C,x + ror L040C,x + clb3 L000C + .byte $04 + bra L818E + .byte $04 + sta (L000C,x) + .byte $04 + rrf L000C + .byte $04 + bbs4 a, L8198 + .byte $04 + sty L000C +L818E: .byte $04 + sta L000C + .byte $04 + stx L000C + .byte $04 + bbs4 L000C, L819C +L8198: dey + .byte $0C + .byte $04 + .byte $89 +L819C: .byte $0C + .byte $04 + txa + .byte $0C + .byte $04 + seb4 a + .byte $0C + .byte $04 + sty L040C + sta L040C + stx L040C + seb4 L000C + .byte $04 + bcc L81BE + .byte $04 + sta (L000C),y + .byte $04 + .byte $92 + .byte $0C + .byte $04 + bbc4 a, L81C8 + .byte $04 + sty L000C,x +L81BE: .byte $04 + sta L000C,x + .byte $04 + stx L000C,y + .byte $04 + bbc4 L000C, L81CC +L81C8: tya + .byte $0C + .byte $04 + .byte $99 +L81CC: .byte $0C + .byte $04 + txs + .byte $0C + .byte $04 + clb4 a + .byte $0C + .byte $04 + .byte $9C + .byte $0C + .byte $04 + sta L040C,x + .byte $9E + .byte $0C + .byte $04 + clb4 L000C + .byte $04 + ldy #$0C + .byte $04 + lda (L000C,x) + .byte $04 + ldx #$0C + .byte $04 + bbs5 a, L81F8 + .byte $04 + ldy L000C + .byte $04 + lda L000C + .byte $04 + ldx L000C + .byte $04 + bbs5 L000C, L81FC +L81F8: tay + .byte $0C + .byte $04 + .byte $A9 +L81FC: .byte $0C + .byte $04 + tax + .byte $0C + .byte $04 + seb5 a + .byte $0C + .byte $04 + ldy L040C + lda L040C + ldx L040C + seb5 L000C + .byte $04 + bcs L821E + .byte $04 + lda (L000C),y + .byte $04 + jmp (L000C) + + .byte $04 + bbc5 a, L8228 + .byte $04 + ldy L000C,x +L821E: .byte $04 + lda L000C,x + .byte $04 + ldx L000C,y + .byte $04 + bbc5 L000C, L822C +L8228: clv + .byte $0C + .byte $04 + .byte $B9 +L822C: .byte $0C + .byte $04 + tsx + .byte $0C + .byte $04 + clb5 a + .byte $0C + .byte $04 + ldy L040C,x + lda L040C,x + ldx L040C,y + clb5 L000C + .byte $04 + cpy #$0C + .byte $04 + cmp (L000C,x) + .byte $04 + slw + .byte $0C + .byte $04 + bbs6 a, L8258 + .byte $04 + cpy L000C + .byte $04 + cmp L000C + .byte $04 + dec L000C + .byte $04 + bbs6 L000C, L825C +L8258: iny + .byte $0C + .byte $04 + .byte $C9 +L825C: .byte $0C + .byte $04 + dex + .byte $0C + .byte $04 + seb6 a + .byte $0C + .byte $04 + cpy L040C + cmp L040C + dec L040C + seb6 L000C + .byte $04 + bne L827E + .byte $04 + cmp (L000C),y + .byte $04 + .byte $D2 + .byte $0C + .byte $04 + bbc6 a, L8288 + .byte $04 + .byte $D4 + .byte $0C +L827E: .byte $04 + cmp L000C,x + .byte $04 + dec L000C,x + .byte $04 + bbc6 L000C, L828C +L8288: cld + .byte $0C + .byte $04 + .byte $D9 +L828C: .byte $0C + .byte $04 + .byte $DA + .byte $0C + .byte $04 + clb6 a + .byte $0C + .byte $04 + .byte $DC + .byte $0C + .byte $04 + cmp L040C,x + dec L040C,x + clb6 L000C + .byte $04 + cpx #$0C + .byte $04 + sbc (L000C,x) + .byte $04 + fst + .byte $0C + .byte $04 + bbs7 a, L82B8 + .byte $04 + cpx L000C + .byte $04 + sbc L000C + .byte $04 + inc L000C + .byte $04 + bbs7 L000C, L82BC +L82B8: inx + .byte $0C + .byte $04 + .byte $E9 +L82BC: .byte $0C + .byte $04 + nop + .byte $0C + .byte $04 + seb7 a + .byte $0C + .byte $04 + cpx L040C + sbc L040C + inc L040C + seb7 L000C + .byte $04 + beq L82DE + .byte $04 + sbc (L000C),y + .byte $04 + .byte $F2 + .byte $0C + .byte $04 + bbc7 a, L82E8 + .byte $04 + .byte $F4 + .byte $0C +L82DE: .byte $04 + sbc L000C,x + .byte $04 + inc L000C,x + .byte $04 + bbc7 L000C, L82EC +L82E8: sed + .byte $0C + .byte $04 + .byte $F9 +L82EC: .byte $0C + .byte $04 + .byte $FA + .byte $0C + .byte $04 + clb7 a + .byte $0C + .byte $04 + .byte $FC + .byte $0C + .byte $04 + sbc L040C,x + inc L040C,x + clb7 L000C + .byte $04 diff --git a/test/asm/opcodes/sweet16-opcodes.ref b/test/asm/opcodes/sweet16-opcodes.ref new file mode 100644 index 000000000..af128b55f Binary files /dev/null and b/test/asm/opcodes/sweet16-opcodes.ref differ diff --git a/test/asm/opcodes/sweet16-opcodes.s b/test/asm/opcodes/sweet16-opcodes.s new file mode 100644 index 000000000..f283c6093 --- /dev/null +++ b/test/asm/opcodes/sweet16-opcodes.s @@ -0,0 +1,34 @@ +.setcpu "SWEET16" + + RTN ; $00 Return to 6502 code. + BR LABEL ; $01 ea Unconditional Branch. + BNC LABEL ; $02 ea Branch if Carry=0. + BC LABEL ; $03 ea Branch if Carry=1. + BP LABEL ; $04 ea Branch if last result positive. + BM LABEL ; $0S ea Branch if last result negative. + BZ LABEL ; $06 ea Branch if last result zero. + BNZ LABEL ; $07 ea Branch if last result non-zero. + BM1 LABEL ; $08 ea Branch if last result = -1. + BNM1 LABEL ; $09 ea Branch if last result not -1. + BK ; $0A Execute 6502 BRK instruction. + RS ; $0B Return from SWEET-16 subroutine. + BS LABEL ; $0C ea Call SWEET-16 subroutine. +LABEL: + +.repeat 16, count + SET count,$1234 ; $1n lo hi Rn <-- value. + LD count ; $2n R0 <-- (Rn). + ST count ; $3n Rn <-- (R0). + LD @count ; $4n MA = (Rn), ROL <-- (MA), Rn <-- MA+1, R0H <-- 0. + ST @count ; $5n MA = (Rn), MA <-- (R0L), Rn <-- MA+1. + LDD @count ; $6n MA = (Rn), R0 <-- (MA, MA+1), Rn <-- MA+2. + STD @count ; $7n MA = (Rn), MA,MA+l <-- (R0), Rn <-- MA+2. + POP @count ; $8n MA = (Rn)-1, R0L <-- (MA), R0H <-- 0, Rn <-- MA. + STP @count ; $9n MA <-- (Rn)-1, (MA) <-- R0L, Rn <-- MA. + ADD count ; $An R0 <-- (R0) + (Rn). + SUB count ; $Bn R0 <-- (R0) - (Rn). + POPD @count ; $Cn MA = (Rn)-2, MA,MA+l <-- R0, Rn <-- MA. + CPR count ; $Dn R13 <-- (R0) - (Rn), R14 <-- status flags. + INR count ; $En Rn <-- (Rn) + 1. + DCR count ; $Fn Rn <-- (Rn) - 1. +.endrepeat diff --git a/test/asm/opcodes/w65c02-opcodes.ref b/test/asm/opcodes/w65c02-opcodes.ref new file mode 100644 index 000000000..2d44045cb Binary files /dev/null and b/test/asm/opcodes/w65c02-opcodes.ref differ diff --git a/test/asm/opcodes/w65c02-opcodes.s b/test/asm/opcodes/w65c02-opcodes.s new file mode 100644 index 000000000..0fe741518 --- /dev/null +++ b/test/asm/opcodes/w65c02-opcodes.s @@ -0,0 +1,258 @@ +.setcpu "W65C02" + + brk + ora ($12,x) + .byte $02 + .byte $03 + tsb $12 + ora $12 + asl $12 + rmb0 $12 + php + ora #$12 + asl a + .byte $0B + tsb $3456 + ora $3456 + asl $3456 + bbr0 $12,*+122 + bpl *+122 + ora ($12),y + ora ($12) + .byte $13 + trb $12 + ora $12,x + asl $12,x + rmb1 $12 + clc + ora $3456,y + inc a + .byte $1B + trb $3456 + ora $3456,x + asl $3456,x + bbr1 $12,*+122 + jsr $3456 + and ($12,x) + .byte $22 + .byte $23 + bit $12 + and $12 + rol $12 + rmb2 $12 + plp + and #$12 + rol a + .byte $2B + bit $3456 + and $3456 + rol $3456 + bbr2 $12,*+122 + bmi *+122 + and ($12),y + and ($12) + .byte $33 + bit $12,x + and $12,x + rol $12,x + rmb3 $12 + sec + and $3456,y + dec a + .byte $3B + bit $3456,x + and $3456,x + rol $3456,x + bbr3 $12,*+122 + rti + eor ($12,x) + .byte $42 + .byte $43 + .byte $44 + eor $12 + lsr $12 + rmb4 $12 + pha + eor #$12 + lsr a + .byte $4B + jmp $3456 + eor $3456 + lsr $3456 + bbr4 $12,*+122 + bvc *+122 + eor ($12),y + eor ($12) + .byte $53 + .byte $54 + eor $12,x + lsr $12,x + rmb5 $12 + cli + eor $3456,y + phy + .byte $5B + .byte $5C + eor $3456,x + lsr $3456,x + bbr5 $12,*+122 + rts + adc ($12,x) + .byte $62 + .byte $63 + stz $12 + adc $12 + ror $12 + rmb6 $12 + pla + adc #$12 + ror a + .byte $6B + jmp ($3456) + adc $3456 + ror $3456 + bbr6 $12,*+122 + bvs *+122 + adc ($12),y + adc ($12) + .byte $73 + stz $12,x + adc $12,x + ror $12,x + rmb7 $12 + sei + adc $3456,y + ply + .byte $7B + jmp ($3456,x) + adc $3456,x + ror $3456,x + bbr7 $12,*+122 + bra *+122 + sta ($12,x) + .byte $82 + .byte $83 + sty $12 + sta $12 + stx $12 + smb0 $12 + dey + bit #$12 + txa + .byte $8B + sty $3456 + sta $3456 + stx $3456 + bbs0 $12,*+122 + bcc *+122 + sta ($12),y + sta ($12) + .byte $93 + sty $12,x + sta $12,x + stx $12,y + smb1 $12 + tya + sta $3456,y + txs + .byte $9B + stz $3456 + sta $3456,x + stz $3456,x + bbs1 $12,*+122 + ldy #$12 + lda ($12,x) + ldx #$12 + .byte $A3 + ldy $12 + lda $12 + ldx $12 + smb2 $12 + tay + lda #$12 + tax + .byte $AB + ldy $3456 + lda $3456 + ldx $3456 + bbs2 $12,*+122 + bcs *+122 + lda ($12),y + lda ($12) + .byte $B3 + ldy $12,x + lda $12,x + ldx $12,y + smb3 $12 + clv + lda $3456,y + tsx + .byte $BB + ldy $3456,x + lda $3456,x + ldx $3456,y + bbs3 $12,*+122 + cpy #$12 + cmp ($12,x) + .byte $C2 + .byte $C3 + cpy $12 + cmp $12 + dec $12 + smb4 $12 + iny + cmp #$12 + dex + wai + cpy $3456 + cmp $3456 + dec $3456 + bbs4 $12,*+122 + bne *+122 + cmp ($12),y + cmp ($12) + .byte $D3 + .byte $D4 + cmp $12,x + dec $12,x + smb5 $12 + cld + cmp $3456,y + phx + stp + .byte $DC + cmp $3456,x + dec $3456,x + bbs5 $12,*+122 + cpx #$12 + sbc ($12,x) + .byte $E2 + .byte $E3 + cpx $12 + sbc $12 + inc $12 + smb6 $12 + inx + sbc #$12 + nop + .byte $EB + cpx $3456 + sbc $3456 + inc $3456 + bbs6 $12,*+122 + beq *+122 + sbc ($12),y + sbc ($12) + .byte $F3 + .byte $F4 + sbc $12,x + inc $12,x + smb7 $12 + sed + sbc $3456,y + plx + .byte $FB + .byte $FC + sbc $3456,x + inc $3456,x + bbs7 $12,*+122 diff --git a/test/asm/val/Makefile b/test/asm/val/Makefile index 54b1100ec..41df980a9 100644 --- a/test/asm/val/Makefile +++ b/test/asm/val/Makefile @@ -1,3 +1,9 @@ +# ---- Display info during parsing phase ---- +SILENT:=$(findstring s,$(word 1, $(MAKEFLAGS))) +ifneq ($(SILENT),s) + $(info Using Makefile: $(realpath $(firstword $(MAKEFILE_LIST))) $(MAKECMDGOALS)) +endif + # Makefile for the regression tests that return an error code on failure ifneq ($(shell echo),) @@ -16,6 +22,10 @@ else RMDIR = $(RM) -r $1 endif +ifeq ($(SILENT),s) + QUIET = 1 +endif + ifdef QUIET .SILENT: NULLOUT = >$(NULLDEV) @@ -45,8 +55,8 @@ define PRG_template $(WORKDIR)/%.$1.prg: %.s | $(WORKDIR) $(if $(QUIET),echo asm/val/$$*.$1.prg) - $(CA65) -t sim$1 -o $$(@:.prg=.o) $$< $(NULLERR) - $(LD65) -C sim6502-asmtest.cfg -o $$@ $$(@:.prg=.o) sim$1.lib $(NULLERR) + $(CA65) -t sim$1 -o $$(@:.prg=.o) $$< $(NULLOUT) $(NULLERR) + $(LD65) -C sim6502-asmtest.cfg -o $$@ $$(@:.prg=.o) sim$1.lib $(NULLOUT) $(NULLERR) $(SIM65) $(SIM65FLAGS) $$@ $(NULLOUT) endef # PRG_template diff --git a/test/asm/val/ismnemonic.s b/test/asm/val/ismnemonic.s index 2d131e7a9..831a8a3c7 100644 --- a/test/asm/val/ismnemonic.s +++ b/test/asm/val/ismnemonic.s @@ -8,7 +8,10 @@ ; "6502DTV" ; "65SC02" ; "65C02" +; "65CE02" +; "W65C02" ; "4510" +; "45GS02" ; "huc6280" ; "65816" ; "sweet16" @@ -415,6 +418,107 @@ test_Ismnemonic smb5 test_Ismnemonic smb6 test_Ismnemonic smb7 test_Ismnemonic sta +test_Ismnemonic stx +test_Ismnemonic sty +test_Ismnemonic stz +test_Ismnemonic tax +test_Ismnemonic tay +test_Ismnemonic trb +test_Ismnemonic tsb +test_Ismnemonic tsx +test_Ismnemonic txa +test_Ismnemonic txs +test_Ismnemonic tya + + +.setcpu "W65C02" +test_Ismnemonic adc +test_Ismnemonic and +test_Ismnemonic asl +test_Ismnemonic bbr0 +test_Ismnemonic bbr1 +test_Ismnemonic bbr2 +test_Ismnemonic bbr3 +test_Ismnemonic bbr4 +test_Ismnemonic bbr5 +test_Ismnemonic bbr6 +test_Ismnemonic bbr7 +test_Ismnemonic bbs0 +test_Ismnemonic bbs1 +test_Ismnemonic bbs2 +test_Ismnemonic bbs3 +test_Ismnemonic bbs4 +test_Ismnemonic bbs5 +test_Ismnemonic bbs6 +test_Ismnemonic bbs7 +test_Ismnemonic bcc +test_Ismnemonic bcs +test_Ismnemonic beq +test_Ismnemonic bit +test_Ismnemonic bmi +test_Ismnemonic bne +test_Ismnemonic bpl +test_Ismnemonic bra +test_Ismnemonic brk +test_Ismnemonic bvc +test_Ismnemonic bvs +test_Ismnemonic clc +test_Ismnemonic cld +test_Ismnemonic cli +test_Ismnemonic clv +test_Ismnemonic cmp +test_Ismnemonic cpx +test_Ismnemonic cpy +test_Ismnemonic dea +test_Ismnemonic dec +test_Ismnemonic dex +test_Ismnemonic dey +test_Ismnemonic eor +test_Ismnemonic ina +test_Ismnemonic inc +test_Ismnemonic inx +test_Ismnemonic iny +test_Ismnemonic jmp +test_Ismnemonic jsr +test_Ismnemonic lda +test_Ismnemonic ldx +test_Ismnemonic ldy +test_Ismnemonic lsr +test_Ismnemonic nop +test_Ismnemonic ora +test_Ismnemonic pha +test_Ismnemonic php +test_Ismnemonic phx +test_Ismnemonic phy +test_Ismnemonic pla +test_Ismnemonic plp +test_Ismnemonic plx +test_Ismnemonic ply +test_Ismnemonic rmb0 +test_Ismnemonic rmb1 +test_Ismnemonic rmb2 +test_Ismnemonic rmb3 +test_Ismnemonic rmb4 +test_Ismnemonic rmb5 +test_Ismnemonic rmb6 +test_Ismnemonic rmb7 +test_Ismnemonic rol +test_Ismnemonic ror +test_Ismnemonic rti +test_Ismnemonic rts +test_Ismnemonic sbc +test_Ismnemonic sec +test_Ismnemonic sed +test_Ismnemonic sei +test_Ismnemonic smb0 +test_Ismnemonic smb1 +test_Ismnemonic smb2 +test_Ismnemonic smb3 +test_Ismnemonic smb4 +test_Ismnemonic smb5 +test_Ismnemonic smb6 +test_Ismnemonic smb7 +test_Ismnemonic sta test_Ismnemonic stp test_Ismnemonic stx test_Ismnemonic sty @@ -429,6 +533,141 @@ test_Ismnemonic txs test_Ismnemonic tya test_Ismnemonic wai +.setcpu "65CE02" +test_Ismnemonic adc +test_Ismnemonic and +test_Ismnemonic asl +test_Ismnemonic asr +test_Ismnemonic asw +test_Ismnemonic aug +test_Ismnemonic bbr0 +test_Ismnemonic bbr1 +test_Ismnemonic bbr2 +test_Ismnemonic bbr3 +test_Ismnemonic bbr4 +test_Ismnemonic bbr5 +test_Ismnemonic bbr6 +test_Ismnemonic bbr7 +test_Ismnemonic bbs0 +test_Ismnemonic bbs1 +test_Ismnemonic bbs2 +test_Ismnemonic bbs3 +test_Ismnemonic bbs4 +test_Ismnemonic bbs5 +test_Ismnemonic bbs6 +test_Ismnemonic bbs7 +test_Ismnemonic bcc +test_Ismnemonic bcs +test_Ismnemonic beq +test_Ismnemonic bit +test_Ismnemonic bmi +test_Ismnemonic bne +test_Ismnemonic bpl +test_Ismnemonic bra +test_Ismnemonic brk +test_Ismnemonic bsr +test_Ismnemonic bvc +test_Ismnemonic bvs +test_Ismnemonic clc +test_Ismnemonic cld +test_Ismnemonic cle +test_Ismnemonic cli +test_Ismnemonic clv +test_Ismnemonic cmp +test_Ismnemonic cpx +test_Ismnemonic cpy +test_Ismnemonic cpz +test_Ismnemonic dea +test_Ismnemonic dec +test_Ismnemonic dew +test_Ismnemonic dex +test_Ismnemonic dey +test_Ismnemonic dez +test_Ismnemonic eom +test_Ismnemonic eor +test_Ismnemonic ina +test_Ismnemonic inc +test_Ismnemonic inw +test_Ismnemonic inx +test_Ismnemonic iny +test_Ismnemonic inz +test_Ismnemonic jmp +test_Ismnemonic jsr +test_Ismnemonic lbcc +test_Ismnemonic lbcs +test_Ismnemonic lbeq +test_Ismnemonic lbmi +test_Ismnemonic lbne +test_Ismnemonic lbpl +test_Ismnemonic lbra +test_Ismnemonic lbvc +test_Ismnemonic lbvs +test_Ismnemonic lda +test_Ismnemonic ldx +test_Ismnemonic ldy +test_Ismnemonic ldz +test_Ismnemonic lsr +test_Ismnemonic neg +test_Ismnemonic nop +test_Ismnemonic ora +test_Ismnemonic pha +test_Ismnemonic phd +test_Ismnemonic php +test_Ismnemonic phw +test_Ismnemonic phx +test_Ismnemonic phy +test_Ismnemonic phz +test_Ismnemonic pla +test_Ismnemonic plp +test_Ismnemonic plx +test_Ismnemonic ply +test_Ismnemonic plz +test_Ismnemonic rmb0 +test_Ismnemonic rmb1 +test_Ismnemonic rmb2 +test_Ismnemonic rmb3 +test_Ismnemonic rmb4 +test_Ismnemonic rmb5 +test_Ismnemonic rmb6 +test_Ismnemonic rmb7 +test_Ismnemonic rol +test_Ismnemonic ror +test_Ismnemonic row +test_Ismnemonic rti +test_Ismnemonic rtn +test_Ismnemonic rts +test_Ismnemonic sbc +test_Ismnemonic sec +test_Ismnemonic sed +test_Ismnemonic see +test_Ismnemonic sei +test_Ismnemonic smb0 +test_Ismnemonic smb1 +test_Ismnemonic smb2 +test_Ismnemonic smb3 +test_Ismnemonic smb4 +test_Ismnemonic smb5 +test_Ismnemonic smb6 +test_Ismnemonic smb7 +test_Ismnemonic sta +test_Ismnemonic stx +test_Ismnemonic sty +test_Ismnemonic stz +test_Ismnemonic tab +test_Ismnemonic tax +test_Ismnemonic tay +test_Ismnemonic taz +test_Ismnemonic tba +test_Ismnemonic trb +test_Ismnemonic tsb +test_Ismnemonic tsx +test_Ismnemonic tsy +test_Ismnemonic txa +test_Ismnemonic txs +test_Ismnemonic tya +test_Ismnemonic tys +test_Ismnemonic tza + .setcpu "4510" test_Ismnemonic adc test_Ismnemonic and @@ -564,6 +803,159 @@ test_Ismnemonic tya test_Ismnemonic tys test_Ismnemonic tza +.setcpu "45GS02" +test_Ismnemonic adc +test_Ismnemonic and +test_Ismnemonic asl +test_Ismnemonic asr +test_Ismnemonic asw +test_Ismnemonic bbr0 +test_Ismnemonic bbr1 +test_Ismnemonic bbr2 +test_Ismnemonic bbr3 +test_Ismnemonic bbr4 +test_Ismnemonic bbr5 +test_Ismnemonic bbr6 +test_Ismnemonic bbr7 +test_Ismnemonic bbs0 +test_Ismnemonic bbs1 +test_Ismnemonic bbs2 +test_Ismnemonic bbs3 +test_Ismnemonic bbs4 +test_Ismnemonic bbs5 +test_Ismnemonic bbs6 +test_Ismnemonic bbs7 +test_Ismnemonic bcc +test_Ismnemonic bcs +test_Ismnemonic beq +test_Ismnemonic bit +test_Ismnemonic bmi +test_Ismnemonic bne +test_Ismnemonic bpl +test_Ismnemonic bra +test_Ismnemonic brk +test_Ismnemonic bsr +test_Ismnemonic bvc +test_Ismnemonic bvs +test_Ismnemonic clc +test_Ismnemonic cld +test_Ismnemonic cle +test_Ismnemonic cli +test_Ismnemonic clv +test_Ismnemonic cmp +test_Ismnemonic cpx +test_Ismnemonic cpy +test_Ismnemonic cpz +test_Ismnemonic dea +test_Ismnemonic dec +test_Ismnemonic dew +test_Ismnemonic dex +test_Ismnemonic dey +test_Ismnemonic dez +test_Ismnemonic eom +test_Ismnemonic eor +test_Ismnemonic ina +test_Ismnemonic inc +test_Ismnemonic inw +test_Ismnemonic inx +test_Ismnemonic iny +test_Ismnemonic inz +test_Ismnemonic jmp +test_Ismnemonic jsr +test_Ismnemonic lbcc +test_Ismnemonic lbcs +test_Ismnemonic lbeq +test_Ismnemonic lbmi +test_Ismnemonic lbne +test_Ismnemonic lbpl +test_Ismnemonic lbra +test_Ismnemonic lbvc +test_Ismnemonic lbvs +test_Ismnemonic lda +test_Ismnemonic ldx +test_Ismnemonic ldy +test_Ismnemonic ldz +test_Ismnemonic lsr +test_Ismnemonic map +test_Ismnemonic neg +test_Ismnemonic nop +test_Ismnemonic ora +test_Ismnemonic pha +test_Ismnemonic phd +test_Ismnemonic php +test_Ismnemonic phw +test_Ismnemonic phx +test_Ismnemonic phy +test_Ismnemonic phz +test_Ismnemonic pla +test_Ismnemonic plp +test_Ismnemonic plx +test_Ismnemonic ply +test_Ismnemonic plz +test_Ismnemonic rmb0 +test_Ismnemonic rmb1 +test_Ismnemonic rmb2 +test_Ismnemonic rmb3 +test_Ismnemonic rmb4 +test_Ismnemonic rmb5 +test_Ismnemonic rmb6 +test_Ismnemonic rmb7 +test_Ismnemonic rol +test_Ismnemonic ror +test_Ismnemonic row +test_Ismnemonic rti +test_Ismnemonic rtn +test_Ismnemonic rts +test_Ismnemonic sbc +test_Ismnemonic sec +test_Ismnemonic sed +test_Ismnemonic see +test_Ismnemonic sei +test_Ismnemonic smb0 +test_Ismnemonic smb1 +test_Ismnemonic smb2 +test_Ismnemonic smb3 +test_Ismnemonic smb4 +test_Ismnemonic smb5 +test_Ismnemonic smb6 +test_Ismnemonic smb7 +test_Ismnemonic sta +test_Ismnemonic stx +test_Ismnemonic sty +test_Ismnemonic stz +test_Ismnemonic tab +test_Ismnemonic tax +test_Ismnemonic tay +test_Ismnemonic taz +test_Ismnemonic tba +test_Ismnemonic trb +test_Ismnemonic tsb +test_Ismnemonic tsx +test_Ismnemonic tsy +test_Ismnemonic txa +test_Ismnemonic txs +test_Ismnemonic tya +test_Ismnemonic tys +test_Ismnemonic tza + +test_Ismnemonic adcq +test_Ismnemonic andq +test_Ismnemonic aslq +test_Ismnemonic asrq +test_Ismnemonic bitq +test_Ismnemonic cmpq +test_Ismnemonic deq +test_Ismnemonic eorq +test_Ismnemonic inq +test_Ismnemonic ldq +test_Ismnemonic lsrq +test_Ismnemonic orq +test_Ismnemonic sbcq +test_Ismnemonic stq +test_Ismnemonic rolq +test_Ismnemonic rorq + + .setcpu "HuC6280" test_Ismnemonic adc test_Ismnemonic and diff --git a/test/dasm/45GS02-disass.s b/test/dasm/45GS02-disass.s new file mode 100644 index 000000000..1ed174a2f --- /dev/null +++ b/test/dasm/45GS02-disass.s @@ -0,0 +1,381 @@ +.setcpu "45GS02" + +ZP = $12 +ABS = $1234 + + brk + ora ($05,x) + cle + see + tsb $02 + ora $02 + asl $02 + rmb0 $02 + php + ora #$01 + asl + tsy + tsb $1234 + ora $1234 + asl $1234 + bbr0 $02, L0 +L0: + bpl L0 + ora ($06),y + ora ($07),z + lbpl *+$3133 ; bpl *+$3133 + trb $02 + ora $03,x + asl $03,x + rmb1 $02 + clc + ora $1456,y + inc + inz + trb $1234 + ora $1345,x + asl $1345,x + bbr1 $02,L1 +L1: + jsr $1234 + and ($05,x) + jsr ($2345) + jsr ($2456,x) + bit $02 + and $02 + rol $02 + rmb2 $02 + plp + and #$01 + rol + tys + bit $1234 + and $1234 + rol $1234 + bbr2 $02,L2 +L2: + bmi L2 + and ($06),y + and ($07),z + lbmi *+$3133 ; bmi *+$3133 + bit $03,x + and $03,x + rol $03,x + rmb3 $02 + sec + and $1456,y + dec + dez + bit $1345,x + and $1345,x + rol $1345,x + bbr3 $02,L3 +L3: + rti + eor ($05,x) + neg + asr + asr $02 + eor $02 + lsr $02 + rmb4 $02 + pha + eor #$01 + lsr + taz + jmp $1234 + eor $1234 + lsr $1234 + bbr4 $02,L4 +L4: + bvc L4 + eor ($06),y + eor ($07),z + lbvc *+$3133 ; bvc *+$3133 + asr $03,x + eor $03,x + lsr $03,x + rmb5 $02 + cli + eor $1456,y + phy + tab + map + eor $1345,x + lsr $1345,x + bbr5 $02,L5 +L5: + rts + adc ($05,x) + rtn #$09 + bsr *+$3133 + stz $02 + adc $02 + ror $02 + rmb6 $02 + pla + adc #$01 + ror + tza + jmp ($2345) + adc $1234 + ror $1234 + bbr6 $02,L6 +L6: + bvs L6 + adc ($06),y + adc ($07),z + lbvs *+$3133 ; bvs *+$3133 + stz $03,x + adc $03,x + ror $03,x + rmb7 $02 + sei + adc $1456,y + ply + tba + jmp ($2456,x) + adc $1345,x + ror $1345,x + bbr7 $02,L7 +L7: + bra L7 + sta ($05,x) + sta ($0f,s),y + sta ($0f,sp),y + lbra *+$3133 ; bra *+$3133 + sty $02 + sta $02 + stx $02 + smb0 $02 + dey + bit #$01 + txa + sty $1345,x + sty $1234 + sta $1234 + stx $1234 + bbs0 $02,L8 +L8: + bcc L8 + sta ($06),y + sta ($07),z + lbcc *+$3133 ; bcc *+$3133 + sty $03,x + sta $03,x + stx $04,y + smb1 $02 + tya + sta $1456,y + txs + stx $1456,y + stz $1234 + sta $1345,x + stz $1345,x + bbs1 $02,L9 +L9: + ldy #$01 + lda ($05,x) + ldx #$01 + ldz #$01 + ldy $02 + lda $02 + ldx $02 + smb2 $02 + tay + lda #$01 + tax + ldz $1234 + ldy $1234 + lda $1234 + ldx $1234 + bbs2 $02,L10 +L10: + bcs L10 + lda ($06),y + lda ($07),z + lbcs *+$3133 ; bcs *+$3133 + ldy $03,x + lda $03,x + ldx $04,y + smb3 $02 + clv + lda $1456,y + tsx + ldz $1345,x + ldy $1345,x + lda $1345,x + ldx $1456,y + bbs3 $02,L11 +L11: + cpy #$01 + cmp ($05,x) + cpz #$01 + dew $02 + cpy $02 + cmp $02 + dec $02 + smb4 $02 + iny + cmp #$01 + dex + asw $1234 + cpy $1234 + cmp $1234 + dec $1234 + bbs4 $02,L12 +L12: + bne L12 + cmp ($06),y + cmp ($07),z + lbne *+$3133 ; bne *+$3133 + cpz $02 + cmp $03,x + dec $03,x + smb5 $02 + cld + cmp $1456,y + phx + phz + cpz $1234 + cmp $1345,x + dec $1345,x + bbs5 $02,L13 +L13: + cpx #$01 + sbc ($05,x) + lda ($0f,s),y + lda ($0f,sp),y + inw $02 + cpx $02 + sbc $02 + inc $02 + smb6 $02 + inx + sbc #$01 + eom + nop + row $1234 + cpx $1234 + sbc $1234 + inc $1234 + bbs6 $02,L14 +L14: + beq L14 + sbc ($06),y + sbc ($07),z + lbeq *+$3133 ; beq *+$3133 + phd #$089a + phw #$089a + sbc $03,x + inc $03,x + smb7 $02 + sed + sbc $1456,y + plx + plz + phd $1234 + phw $1234 + sbc $1345,x + inc $1345,x + bbs7 $02,L15 +L15: + + adc [$12],z + + adcq $12 + adcq $3456 + adcq ($78) + adcq [$9a] + + and [$12],z + + andq $12 + andq $3456 + andq ($78) + andq [$9a] + + aslq $12 + aslq + aslq $3456 + aslq $78,x + aslq $9abc,x + + asrq + asrq $12 + asrq $34,x + + bitq $12 + bitq $3456 + + cmp [$12],z + + cmpq $12 + cmpq $3456 + cmpq ($78) + cmpq [$9a] + + deq + deq $12 + deq $3456 + deq $78,x + deq $9abc,x + + eor [$12],z + + eorq $12 + eorq $3456 + eorq ($78) + eorq [$9a] + + inq + inq $12 + inq $3456 + inq $78,x + inq $9abc,x + + lda [$12],z + + ldq $12 + ldq $3456 + ldq ($78),z + ldq [$9a],z + + lsrq $12 + lsrq + lsrq $3456 + lsrq $78,x + lsrq $9abc,x + + ora [$12],z + + orq $12 + orq $3456 + orq ($78) + orq [$9a] + + rolq $12 + rolq + rolq $3456 + rolq $78,x + rolq $9abc,x + + rorq $12 + rorq + rorq $3456 + rorq $78,x + rorq $9abc,x + + sbc [$12],z + + sbcq $12 + sbcq $3456 + sbcq ($78) + sbcq [$9a] + + sta [$12],z ; EA 92 12 + + stq $12 + stq $3456 + stq ($78) + stq [$9a] diff --git a/test/dasm/6502-disass.s b/test/dasm/6502-disass.s new file mode 100644 index 000000000..794eead76 --- /dev/null +++ b/test/dasm/6502-disass.s @@ -0,0 +1,8 @@ + + .setcpu "6502" + + .repeat 256, cnt + + .byte 0 + cnt, $02, $ea, $00 + + .endrepeat diff --git a/test/dasm/6502DTV-disass.s b/test/dasm/6502DTV-disass.s new file mode 100644 index 000000000..5254923c5 --- /dev/null +++ b/test/dasm/6502DTV-disass.s @@ -0,0 +1,188 @@ +.setcpu "6502DTV" + + brk + ora ($12,x) + nop $12 + ora $12 + asl $12 + php + ora #$12 + asl a + anc #$12 + nop $3456 + ora $3456 + asl $3456 + bpl *+2 + ora ($12),y + bra *+2 + nop $12,x + ora $12,x + asl $12,x + clc + ora $3456,y + nop $3456,x + ora $3456,x + asl $3456,x + jsr $3456 + and ($12,x) + rla ($12,x) + bit $12 + and $12 + rol $12 + rla $12 + plp + and #$12 + rol a + bit $3456 + and $3456 + rol $3456 + rla $3456 + bmi *+2 + and ($12),y + sac #$12 + rla ($12),y + and $12,x + rol $12,x + rla $12,x + sec + and $3456,y + rla $3456,y + and $3456,x + rol $3456,x + rla $3456,x + rti + eor ($12,x) + sir #$12 + eor $12 + lsr $12 + pha + eor #$12 + lsr a + alr #$12 + jmp $3456 + eor $3456 + lsr $3456 + bvc *+2 + eor ($12),y + eor $12,x + lsr $12,x + cli + eor $3456,x + lsr $3456,x + rts + adc ($12,x) + rra ($12,x) + adc $12 + ror $12 + rra $12 + pla + adc #$12 + ror a + arr #$12 + jmp ($3456) + adc $3456 + ror $3456 + rra $3456 + bvs *+2 + adc ($12),y + rra ($12),y + adc $12,x + ror $12,x + rra $12,x + sei + adc $3456,y + rra $3456,y + adc $3456,x + ror $3456,x + rra $3456,x + nop #$12 + sta ($12,x) + sty $12 + sta $12 + stx $12 + dey + txa + sty $3456 + sta $3456 + stx $3456 + bcc *+2 + sta ($12),y + sty $12,x + sta $12,x + stx $12,y + tya + sta $3456,y + txs + shy $3456,x + sta $3456,x + shx $3456,y + ldy #$12 + lda ($12,x) + ldx #$12 + lax ($12,x) + ldy $12 + lda $12 + ldx $12 + lax $12 + tay + lda #$12 + tax + lax #$12 + ldy $3456 + lda $3456 + ldx $3456 + lax $3456 + bcs *+2 + lda ($12),y + lax ($12),y + ldy $12,x + lda $12,x + ldx $12,y + lax $12,y + clv + lda $3456,y + tsx + las $3456,y + ldy $3456,x + lda $3456,x + ldx $3456,y + lax $3456,y + cpy #$12 + cmp ($12,x) + cpy $12 + cmp $12 + dec $12 + iny + cmp #$12 + dex + axs #$12 + cpy $3456 + cmp $3456 + dec $3456 + bne *+2 + cmp ($12),y + cmp $12,x + dec $12,x + cld + cmp $3456,y + cmp $3456,x + dec $3456,x + cpx #$12 + sbc ($12,x) + cpx $12 + sbc $12 + inc $12 + inx + sbc #$12 + nop + cpx $3456 + sbc $3456 + inc $3456 + beq *+2 + sbc ($12),y + sbc $12,x + inc $12,x + sed + sbc $3456,y + sbc $3456,x + inc $3456,x diff --git a/test/dasm/6502X-disass.s b/test/dasm/6502X-disass.s new file mode 100644 index 000000000..f102144c4 --- /dev/null +++ b/test/dasm/6502X-disass.s @@ -0,0 +1,30 @@ + + .setcpu "6502X" + + .repeat 256, cnt + + ; generate a pattern with all opcodes. however, for the full cycle to work, + ; we must take care of the "duplicate" opcodes, ie use only the favourite one. + .if ((cnt & $0f) = $02) + .byte $02 ; all JAM + .elseif ((cnt & $1f) = $1a) + .byte $ea ; all NOP + .elseif (cnt = $2b) + .byte $0b ; both ANC #imm + .elseif (cnt = $89) + .byte $80 ; both NOP #imm + .elseif (cnt = $eb) + .byte $e9 ; both SBC #imm + .elseif (cnt = $34) || (cnt = $54) || (cnt = $74) || (cnt = $d4) || (cnt = $f4) + .byte $14 ; all NOP zp, x + .elseif (cnt = $3c) || (cnt = $5c) || (cnt = $7c) || (cnt = $dc) || (cnt = $fc) + .byte $1c ; all NOP abs, x + .elseif (cnt = $44) || (cnt = $64) + .byte $04 ; all NOP zp + .else + .byte cnt + .endif + + .byte $02, $ea, $00 + + .endrepeat diff --git a/test/dasm/65C02-disass.s b/test/dasm/65C02-disass.s new file mode 100644 index 000000000..0613921d5 --- /dev/null +++ b/test/dasm/65C02-disass.s @@ -0,0 +1,214 @@ +.setcpu "65C02" + + brk + ora ($12,x) + tsb $12 + ora $12 + asl $12 + rmb0 $12 + php + ora #$12 + asl a + tsb $3456 + ora $3456 + asl $3456 + bbr0 $12,*+2 + bpl *+2 + ora ($12),y + ora ($12) + trb $12 + ora $12,x + asl $12,x + rmb1 $12 + clc + ora $3456,y + inc a + trb $3456 + ora $3456,x + asl $3456,x + bbr1 $12,*+2 + jsr $3456 + and ($12,x) + bit $12 + and $12 + rol $12 + rmb2 $12 + plp + and #$12 + rol a + bit $3456 + and $3456 + rol $3456 + bbr2 $12,*+2 + bmi *+2 + and ($12),y + and ($12) + bit $12,x + and $12,x + rol $12,x + rmb3 $12 + sec + and $3456,y + dec a + bit $3456,x + and $3456,x + rol $3456,x + bbr3 $12,*+2 + rti + eor ($12,x) + eor $12 + lsr $12 + rmb4 $12 + pha + eor #$12 + lsr a + jmp $3456 + eor $3456 + lsr $3456 + bbr4 $12,*+2 + bvc *+2 + eor ($12),y + eor ($12) + eor $12,x + lsr $12,x + rmb5 $12 + cli + eor $3456,y + phy + eor $3456,x + lsr $3456,x + bbr5 $12,*+2 + rts + adc ($12,x) + stz $12 + adc $12 + ror $12 + rmb6 $12 + pla + adc #$12 + ror a + jmp ($3456) + adc $3456 + ror $3456 + bbr6 $12,*+2 + bvs *+2 + adc ($12),y + adc ($12) + stz $12,x + adc $12,x + ror $12,x + rmb7 $12 + sei + adc $3456,y + ply + jmp ($3456,x) + adc $3456,x + ror $3456,x + bbr7 $12,*+2 + bra *+2 + sta ($12,x) + sty $12 + sta $12 + stx $12 + smb0 $12 + dey + bit #$12 + txa + sty $3456 + sta $3456 + stx $3456 + bbs0 $12,*+2 + bcc *+2 + sta ($12),y + sta ($12) + sty $12,x + sta $12,x + stx $12,y + smb1 $12 + tya + sta $3456,y + txs + stz $3456 + sta $3456,x + stz $3456,x + bbs1 $12,*+2 + ldy #$12 + lda ($12,x) + ldx #$12 + ldy $12 + lda $12 + ldx $12 + smb2 $12 + tay + lda #$12 + tax + ldy $3456 + lda $3456 + ldx $3456 + bbs2 $12,*+2 + bcs *+2 + lda ($12),y + lda ($12) + ldy $12,x + lda $12,x + ldx $12,y + smb3 $12 + clv + lda $3456,y + tsx + ldy $3456,x + lda $3456,x + ldx $3456,y + bbs3 $12,*+2 + cpy #$12 + cmp ($12,x) + cpy $12 + cmp $12 + dec $12 + smb4 $12 + iny + cmp #$12 + dex + cpy $3456 + cmp $3456 + dec $3456 + bbs4 $12,*+2 + bne *+2 + cmp ($12),y + cmp ($12) + cmp $12,x + dec $12,x + smb5 $12 + cld + cmp $3456,y + phx + cmp $3456,x + dec $3456,x + bbs5 $12,*+2 + cpx #$12 + sbc ($12,x) + cpx $12 + sbc $12 + inc $12 + smb6 $12 + inx + sbc #$12 + nop + cpx $3456 + sbc $3456 + inc $3456 + bbs6 $12,*+2 + beq *+2 + sbc ($12),y + sbc ($12) + sbc $12,x + inc $12,x + smb7 $12 + sed + sbc $3456,y + plx + sbc $3456,x + inc $3456,x +L0: + bbs7 $12,L0 + nop diff --git a/test/dasm/65SC02-disass.s b/test/dasm/65SC02-disass.s new file mode 100644 index 000000000..46e96aaf9 --- /dev/null +++ b/test/dasm/65SC02-disass.s @@ -0,0 +1,181 @@ +.setcpu "65SC02" + + brk + ora ($12,x) + tsb $12 + ora $12 + asl $12 + php + ora #$12 + asl a + tsb $3456 + ora $3456 + asl $3456 + bpl *+2 + ora ($12),y + ora ($12) + trb $12 + ora $12,x + asl $12,x + clc + ora $3456,y + inc a + trb $3456 + ora $3456,x + asl $3456,x + jsr $3456 + and ($12,x) + bit $12 + and $12 + rol $12 + plp + and #$12 + rol a + bit $3456 + and $3456 + rol $3456 + bmi *+2 + and ($12),y + and ($12) + bit $12,x + and $12,x + rol $12,x + sec + and $3456,y + dec a + bit $3456,x + and $3456,x + rol $3456,x + rti + eor ($12,x) + eor $12 + lsr $12 + pha + eor #$12 + lsr a + jmp $3456 + eor $3456 + lsr $3456 + bvc *+2 + eor ($12),y + eor ($12) + eor $12,x + lsr $12,x + cli + eor $3456,y + phy + eor $3456,x + lsr $3456,x + rts + adc ($12,x) + stz $12 + adc $12 + ror $12 + pla + adc #$12 + ror a + jmp ($3456) + adc $3456 + ror $3456 + bvs *+2 + adc ($12),y + adc ($12) + stz $12,x + adc $12,x + ror $12,x + sei + adc $3456,y + ply + jmp ($3456,x) + adc $3456,x + ror $3456,x + bra *+2 + sta ($12,x) + sty $12 + sta $12 + stx $12 + dey + bit #$12 + txa + sty $3456 + sta $3456 + stx $3456 + bcc *+2 + sta ($12),y + sta ($12) + sty $12,x + sta $12,x + stx $12,y + tya + sta $3456,y + txs + stz $3456 + sta $3456,x + stz $3456,x + ldy #$12 + lda ($12,x) + ldx #$12 + ldy $12 + lda $12 + ldx $12 + tay + lda #$12 + tax + ldy $3456 + lda $3456 + ldx $3456 + bcs *+2 + lda ($12),y + lda ($12) + ldy $12,x + lda $12,x + ldx $12,y + clv + lda $3456,y + tsx + ldy $3456,x + lda $3456,x + ldx $3456,y + cpy #$12 + cmp ($12,x) + cpy $12 + cmp $12 + dec $12 + iny + cmp #$12 + dex + cpy $3456 + cmp $3456 + dec $3456 + bne *+2 + cmp ($12),y + cmp ($12) + cmp $12,x + dec $12,x + cld + cmp $3456,y + phx + cmp $3456,x + dec $3456,x + cpx #$12 + sbc ($12,x) + cpx $12 + sbc $12 + inc $12 + inx + sbc #$12 + nop + cpx $3456 + sbc $3456 + inc $3456 + beq *+2 + sbc ($12),y + sbc ($12) + sbc $12,x + inc $12,x + sed + sbc $3456,y + plx + sbc $3456,x + inc $3456,x + diff --git a/test/dasm/Makefile b/test/dasm/Makefile index e84560ad2..b86a75416 100644 --- a/test/dasm/Makefile +++ b/test/dasm/Makefile @@ -1,3 +1,9 @@ +# ---- Display info during parsing phase ---- +SILENT:=$(findstring s,$(word 1, $(MAKEFLAGS))) +ifneq ($(SILENT),s) + $(info Using Makefile: $(realpath $(firstword $(MAKEFILE_LIST))) $(MAKECMDGOALS)) +endif + # Makefile for the disassembler regression tests ifneq ($(shell echo),) @@ -8,14 +14,25 @@ ifdef CMD_EXE EXE = .exe MKDIR = mkdir $(subst /,\,$1) RMDIR = -rmdir /q /s $(subst /,\,$1) + NULLDEV = nul: else EXE = MKDIR = mkdir -p $1 RMDIR = $(RM) -r $1 + NULLDEV = /dev/null +endif + +ifeq ($(SILENT),s) + QUIET = 1 endif ifdef QUIET .SILENT: + NULLOUT = >$(NULLDEV) + NULLERR = 2>$(NULLDEV) +ifndef CMD_EXE + CATERR = 2> $(WORKDIR)/$$@.errlog || (cat $(WORKDIR)/$$@.errlog && false) +endif endif CL65 := $(if $(wildcard ../../bin/cl65*),../../bin/cl65,cl65) diff --git a/test/dasm/huc6280-disass.s b/test/dasm/huc6280-disass.s new file mode 100644 index 000000000..4ae7b067d --- /dev/null +++ b/test/dasm/huc6280-disass.s @@ -0,0 +1,250 @@ +.setcpu "huc6280" + + brk + ora ($12,x) + sxy + st0 #$12 + tsb $12 + ora $12 + asl $12 + rmb0 $12 + php + ora #$12 + asl a + tsb $3456 + ora $3456 + asl $3456 + bbr0 $12,L0 +L0: + bpl *+2 + ora ($12),y + ora ($12) + st1 #$12 + trb $12 + ora $12,x + asl $12,x + rmb1 $12 + clc + ora $3456,y + inc a + trb $3456 + ora $3456,x + asl $3456,x + bbr1 $12,L1 +L1: + jsr $3456 + and ($12,x) + sax + st2 #$12 + bit $12 + and $12 + rol $12 + rmb2 $12 + plp + and #$12 + rol a + bit $3456 + and $3456 + rol $3456 + bbr2 $12,L2 +L2: + bmi *+2 + and ($12),y + and ($12) + bit $12,x + and $12,x + rol $12,x + rmb3 $12 + sec + and $3456,y + dec a + bit $3456,x + and $3456,x + rol $3456,x + bbr3 $12,L3 +L3: + rti + eor ($12,x) + say + tma #$02 + bsr *+2 + eor $12 + lsr $12 + rmb4 $12 + pha + eor #$12 + lsr a + jmp $3456 + eor $3456 + lsr $3456 + bbr4 $12,L4 +L4: + bvc *+2 + eor ($12),y + eor ($12) + tam #$12 + csl + eor $12,x + lsr $12,x + rmb5 $12 + cli + eor $3456,y + phy + eor $3456,x + lsr $3456,x + bbr5 $12,L5 +L5: + rts + adc ($12,x) + cla + stz $12 + adc $12 + ror $12 + rmb6 $12 + pla + adc #$12 + ror a + jmp ($3456) + adc $3456 + ror $3456 + bbr6 $12,L6 +L6: + bvs *+2 + adc ($12),y + adc ($12) + tii $3333,$7373,$1111 + stz $12,x + adc $12,x + ror $12,x + rmb7 $12 + sei + adc $3456,y + ply + jmp ($3456,x) + adc $3456,x + ror $3456,x + bbr7 $12,L7 +L7: + bra *+2 + sta ($12,x) + clx + tst #$12,$EA + sty $12 + sta $12 + stx $12 + smb0 $12 + dey + bit #$12 + txa + sty $3456 + sta $3456 + stx $3456 + bbs0 $12,LS0 +LS0: + bcc *+2 + sta ($12),y + sta ($12) + tst #$12,$EAEA + sty $12,x + sta $12,x + stx $12,y + smb1 $12 + tya + sta $3456,y + txs + stz $3456 + sta $3456,x + stz $3456,x + bbs1 $12,LS1 +LS1: + ldy #$12 + lda ($12,x) + ldx #$12 + tst #$12,$EA,x + ldy $12 + lda $12 + ldx $12 + smb2 $12 + tay + lda #$12 + tax + ldy $3456 + lda $3456 + ldx $3456 + bbs2 $12,LS2 +LS2: + bcs *+2 + lda ($12),y + lda ($12) + tst #$12,$EAEA,x + ldy $12,x + lda $12,x + ldx $12,y + smb3 $12 + clv + lda $3456,y + tsx + ldy $3456,x + lda $3456,x + ldx $3456,y + bbs3 $12,LS3 +LS3: + cpy #$12 + cmp ($12,x) + cly + tdd $3333,$C3C3,$1111 + cpy $12 + cmp $12 + dec $12 + smb4 $12 + iny + cmp #$12 + dex + cpy $3456 + cmp $3456 + dec $3456 + bbs4 $12,LS4 +LS4: + bne *+2 + cmp ($12),y + cmp ($12) + tin $3333,$D3D3,$1111 + cmp $12,x + dec $12,x + smb5 $12 + cld + cmp $3456,y + phx + cmp $3456,x + dec $3456,x + bbs5 $12,LS5 +LS5: + cpx #$12 + sbc ($12,x) + tia $3333,$E3E3,$1111 + cpx $12 + sbc $12 + inc $12 + smb6 $12 + inx + sbc #$12 + nop + cpx $3456 + sbc $3456 + inc $3456 + bbs6 $12,LS6 +LS6: + beq *+2 + sbc ($12),y + sbc ($12) + tai $3333,$F3F3,$1111 + sbc $12,x + inc $12,x + smb7 $12 + sed + sbc $3456,y + plx + sbc $3456,x + inc $3456,x +LS7: + bbs7 $12,LS7 diff --git a/test/dasm/m740-disass.s b/test/dasm/m740-disass.s new file mode 100644 index 000000000..ea0f19f8d --- /dev/null +++ b/test/dasm/m740-disass.s @@ -0,0 +1,8 @@ + + .setcpu "M740" + + .repeat 256, cnt + + .byte 0 + cnt, $12, $02, $ea + + .endrepeat diff --git a/test/dasm/readme.txt b/test/dasm/readme.txt new file mode 100644 index 000000000..9e001ec8c --- /dev/null +++ b/test/dasm/readme.txt @@ -0,0 +1,9 @@ + +Per CPU, a test binary is produced (using the assembler), which should contain +all possible instructions. That file is then disassembled, and assembled again, +and finally the resulting binary compared with the binary produced in the first +step. + +Given that we assume the assembler works (this is tested in other/previous +tests), this proves that the disassembler works, and can produce output that the +assembler will understand - and produce an identical binary from. diff --git a/test/err/Makefile b/test/err/Makefile index 1273bbb2c..60780d27b 100644 --- a/test/err/Makefile +++ b/test/err/Makefile @@ -1,3 +1,9 @@ +# ---- Display info during parsing phase ---- +SILENT:=$(findstring s,$(word 1, $(MAKEFLAGS))) +ifneq ($(SILENT),s) + $(info Using Makefile: $(realpath $(firstword $(MAKEFILE_LIST))) $(MAKECMDGOALS)) +endif + # Makefile for the tests that MUST NOT compile ifneq ($(shell echo),) @@ -18,10 +24,19 @@ else RMDIR = $(RM) -r $1 endif +ifeq ($(SILENT),s) + QUIET = 1 +endif + ifdef QUIET .SILENT: + NULLOUT = >$(NULLDEV) NULLERR = 2>$(NULLDEV) +ifndef CMD_EXE + CATERR = 2> $(WORKDIR)/$$@.errlog || (cat $(WORKDIR)/$$@.errlog && false) endif +endif + CC65 := $(if $(wildcard ../../bin/cc65*),..$S..$Sbin$Scc65,cc65) @@ -39,7 +54,7 @@ $(WORKDIR): $(WORKDIR)/%.s: %.c | $(WORKDIR) $(if $(QUIET),echo err/$*.s) - $(NOT) $(CC65) -o $@ $< $(NULLERR) + $(NOT) $(CC65) -o $@ $< $(NULLOUT) $(CATERR) clean: @$(call RMDIR,$(WORKDIR)) diff --git a/test/misc/Makefile b/test/misc/Makefile index 48293e504..6a5611c68 100644 --- a/test/misc/Makefile +++ b/test/misc/Makefile @@ -1,3 +1,9 @@ +# ---- Display info during parsing phase ---- +SILENT:=$(findstring s,$(word 1, $(MAKEFLAGS))) +ifneq ($(SILENT),s) + $(info Using Makefile: $(realpath $(firstword $(MAKEFILE_LIST))) $(MAKECMDGOALS)) +endif + # Makefile for the remaining tests that need special care in one way or another ifneq ($(shell echo),) @@ -20,10 +26,17 @@ else RMDIR = $(RM) -r $1 endif +ifeq ($(SILENT),s) + QUIET = 1 +endif + ifdef QUIET .SILENT: NULLOUT = >$(NULLDEV) NULLERR = 2>$(NULLDEV) +ifndef CMD_EXE + CATERR = 2> $(WORKDIR)/$$@.errlog || (cat $(WORKDIR)/$$@.errlog && false) +endif endif SIM65FLAGS = -x 200000000 @@ -62,7 +75,7 @@ define PRG_template $(WORKDIR)/bug1209-ind-goto-rev.$1.$2.prg: bug1209-ind-goto-rev.c | $(WORKDIR) @echo "FIXME: " $$@ "currently does not compile." $(if $(QUIET),echo misc/bug1209-ind-goto-rev.$1.$2.prg) - $(CC65) -t sim$2 -$1 -o $$(@:.prg=.s) $$< $(NULLERR) + $(CC65) -t sim$2 -$1 -o $$(@:.prg=.s) $$< $(NULLOUT) $(CATERR) $(CA65) -t sim$2 -o $$(@:.prg=.o) $$(@:.prg=.s) $(NULLERR) $(NOT) $(LD65) -t sim$2 -o $$@ $$(@:.prg=.o) sim$2.lib $(NULLERR) @@ -70,7 +83,7 @@ $(WORKDIR)/bug1209-ind-goto-rev.$1.$2.prg: bug1209-ind-goto-rev.c | $(WORKDIR) $(WORKDIR)/bug1209-ind-goto-rev-2.$1.$2.prg: bug1209-ind-goto-rev-2.c | $(WORKDIR) @echo "FIXME: " $$@ "currently does not compile." $(if $(QUIET),echo misc/bug1209-ind-goto-rev-2.$1.$2.prg) - $(CC65) -t sim$2 -$1 -o $$(@:.prg=.s) $$< $(NULLERR) + $(CC65) -t sim$2 -$1 -o $$(@:.prg=.s) $$< $(NULLOUT) $(CATERR) $(CA65) -t sim$2 -o $$(@:.prg=.o) $$(@:.prg=.s) $(NULLERR) $(NOT) $(LD65) -t sim$2 -o $$@ $$(@:.prg=.o) sim$2.lib $(NULLERR) @@ -78,7 +91,7 @@ $(WORKDIR)/bug1209-ind-goto-rev-2.$1.$2.prg: bug1209-ind-goto-rev-2.c | $(WORKDI $(WORKDIR)/bug1209-ind-goto-rev-3.$1.$2.prg: bug1209-ind-goto-rev-3.c | $(WORKDIR) @echo "FIXME: " $$@ "currently does not compile." $(if $(QUIET),echo misc/bug1209-ind-goto-rev-3.$1.$2.prg) - $(CC65) -t sim$2 -$1 -o $$(@:.prg=.s) $$< $(NULLERR) + $(CC65) -t sim$2 -$1 -o $$(@:.prg=.s) $$< $(NULLOUT) $(CATERR) $(CA65) -t sim$2 -o $$(@:.prg=.o) $$(@:.prg=.s) $(NULLERR) $(NOT) $(LD65) -t sim$2 -o $$@ $$(@:.prg=.o) sim$2.lib $(NULLERR) @@ -86,40 +99,40 @@ $(WORKDIR)/bug1209-ind-goto-rev-3.$1.$2.prg: bug1209-ind-goto-rev-3.c | $(WORKDI $(WORKDIR)/pptest2.$1.$2.prg: pptest2.c | $(WORKDIR) @echo "FIXME: " $$@ "currently does not compile." $(if $(QUIET),echo misc/pptest2.$1.$2.prg) - $(NOT) $(CC65) -t sim$2 -$1 -o $$@ $$< $(NULLERR) + $(NOT) $(CC65) -t sim$2 -$1 -o $$@ $$< $(NULLOUT) $(CATERR) # should compile, but compiler exits with internal error $(WORKDIR)/bug1211-ice-move-refs-2.$1.$2.prg: bug1211-ice-move-refs-2.c | $(WORKDIR) @echo "FIXME: " $$@ "currently does not compile." $(if $(QUIET),echo misc/bug1211-ice-move-refs-2.$1.$2.prg) - $(NOT) $(CC65) -t sim$2 -$1 -o $$@ $$< $(NULLERR) + $(NOT) $(CC65) -t sim$2 -$1 -o $$@ $$< $(NULLOUT) $(CATERR) # this one requires --std=c89, it fails with --std=c99 $(WORKDIR)/bug1265.$1.$2.prg: bug1265.c | $(WORKDIR) $(if $(QUIET),echo misc/bug1265.$1.$2.prg) - $(CC65) --standard c89 -t sim$2 -$1 -o $$(@:.prg=.s) $$< $(NULLERR) + $(CC65) --standard c89 -t sim$2 -$1 -o $$(@:.prg=.s) $$< $(NULLOUT) $(CATERR) $(CA65) -t sim$2 -o $$(@:.prg=.o) $$(@:.prg=.s) $(NULLERR) $(LD65) -t sim$2 -o $$@ $$(@:.prg=.o) sim$2.lib $(NULLERR) $(SIM65) $(SIM65FLAGS) $$@ $(NULLOUT) $(NULLERR) # should not compile, but gives different diagnostics in C99 mode than in others -$(WORKDIR)/bug2515.$1.$2.prg: bug2515.c | $(WORKDIR) +$(WORKDIR)/bug2515.$1.$2.prg: bug2515.c $(ISEQUAL) | $(WORKDIR) $(if $(QUIET),echo misc/bug2515.$1.$2.prg) - $(NOT) $(CC65) --standard c99 -t sim$2 -$1 -o $$(@:.prg=.s) $$< 2>$(WORKDIR)/bug2515.$1.$2.out + $(NOT) $(CC65) --standard c99 -t sim$2 -$1 -o $$(@:.prg=.s) $$< $(NULLOUT) 2>$(WORKDIR)/bug2515.$1.$2.out $(ISEQUAL) $(WORKDIR)/bug2515.$1.$2.out bug2515.c99.ref - $(NOT) $(CC65) -t sim$2 -$1 -o $$(@:.prg=.s) $$< 2>$(WORKDIR)/bug2515.$1.$2.out + $(NOT) $(CC65) -t sim$2 -$1 -o $$(@:.prg=.s) $$< $(NULLOUT) 2>$(WORKDIR)/bug2515.$1.$2.out $(ISEQUAL) $(WORKDIR)/bug2515.$1.$2.out bug2515.ref # should not issue any warnings in C99 mode -$(WORKDIR)/bug2637.$1.$2.prg: bug2637.c | $(WORKDIR) +$(WORKDIR)/bug2637.$1.$2.prg: bug2637.c $(ISEQUAL) | $(WORKDIR) $(if $(QUIET),echo misc/bug2637.$1.$2.prg) - $(CC65) --standard c99 -t sim$2 -$1 -o $$(@:.prg=.s) $$< 2>$(WORKDIR)/bug2637.$1.$2.out + $(CC65) --standard c99 -t sim$2 -$1 -o $$(@:.prg=.s) $$< $(NULLOUT) 2>$(WORKDIR)/bug2637.$1.$2.out $(ISEQUAL) $(WORKDIR)/bug2637.$1.$2.out bug2637.ref # this one requires -Werror $(WORKDIR)/bug1768.$1.$2.prg: bug1768.c | $(WORKDIR) $(if $(QUIET),echo misc/bug1768.$1.$2.prg) - $(CC65) -Werror -t sim$2 -$1 -o $$(@:.prg=.s) $$< $(NULLERR) + $(CC65) -Werror -t sim$2 -$1 -o $$(@:.prg=.s) $$< $(NULLOUT) $(CATERR) $(CA65) -t sim$2 -o $$(@:.prg=.o) $$(@:.prg=.s) $(NULLERR) $(LD65) -t sim$2 -o $$@ $$(@:.prg=.o) sim$2.lib $(NULLERR) $(SIM65) $(SIM65FLAGS) $$@ $(NULLOUT) $(NULLERR) @@ -127,7 +140,7 @@ $(WORKDIR)/bug1768.$1.$2.prg: bug1768.c | $(WORKDIR) # should compile, but then hangs in an endless loop $(WORKDIR)/endless.$1.$2.prg: endless.c | $(WORKDIR) $(if $(QUIET),echo misc/endless.$1.$2.prg) - $(CC65) -t sim$2 -$1 -o $$(@:.prg=.s) $$< $(NULLERR) + $(CC65) -t sim$2 -$1 -o $$(@:.prg=.s) $$< $(NULLOUT) $(CATERR) $(CA65) -t sim$2 -o $$(@:.prg=.o) $$(@:.prg=.s) $(NULLERR) $(LD65) -t sim$2 -o $$@ $$(@:.prg=.o) sim$2.lib $(NULLERR) $(NOT) $(SIM65) $(SIM65FLAGS) $$@ $(NULLOUT) $(NULLERR) @@ -136,12 +149,12 @@ $(WORKDIR)/endless.$1.$2.prg: endless.c | $(WORKDIR) # in a useful way $(WORKDIR)/bug2655.$1.$2.prg: bug2655.c $(ISEQUAL) | $(WORKDIR) $(if $(QUIET),echo misc/bug2655.$1.$2.prg) - $(CC65) -t sim$2 -$1 -o $$@ $$< 2>$(WORKDIR)/bug2655.$1.$2.out + $(CC65) -t sim$2 -$1 -o $$@ $$< $(NULLOUT) 2>$(WORKDIR)/bug2655.$1.$2.out $(ISEQUAL) $(WORKDIR)/bug2655.$1.$2.out bug2655.ref $(WORKDIR)/limits.$1.$2.prg: limits.c $(ISEQUAL) | $(WORKDIR) $(if $(QUIET),echo misc/limits.$1.$2.prg) - $(CC65) -t sim$2 -$1 -o $$(@:.prg=.s) $$< $(NULLERR) + $(CC65) -t sim$2 -$1 -o $$(@:.prg=.s) $$< $(NULLOUT) $(CATERR) $(CA65) -t sim$2 -o $$(@:.prg=.o) $$(@:.prg=.s) $(NULLERR) $(LD65) -t sim$2 -o $$@ $$(@:.prg=.o) sim$2.lib $(NULLERR) $(SIM65) $(SIM65FLAGS) $$@ > $(WORKDIR)/limits.$1.$2.out @@ -149,24 +162,24 @@ $(WORKDIR)/limits.$1.$2.prg: limits.c $(ISEQUAL) | $(WORKDIR) $(WORKDIR)/goto.$1.$2.prg: goto.c $(ISEQUAL) | $(WORKDIR) $(if $(QUIET),echo misc/goto.$1.$2.prg) - $(CC65) -t sim$2 -$1 -o $$@ $$< 2>$(WORKDIR)/goto.$1.$2.out + $(CC65) -t sim$2 -$1 -o $$@ $$< $(NULLOUT) 2>$(WORKDIR)/goto.$1.$2.out $(ISEQUAL) $(WORKDIR)/goto.$1.$2.out goto.ref # this one requires failure with --std=c89, it fails with --std=cc65 due to # stricter checks $(WORKDIR)/bug2304-implicit-func.$1.$2.prg: bug2304-implicit-func.c | $(WORKDIR) $(if $(QUIET),echo misc/bug2304-implicit-func.$1.$2.prg) - $(NOT) $(CC65) --standard c89 -t sim$2 -$1 -o $$@ $$< $(NULLERR) + $(NOT) $(CC65) --standard c89 -t sim$2 -$1 -o $$@ $$< $(NULLOUT) $(CATERR) # should not compile until 3-byte struct by value tests are re-enabled $(WORKDIR)/struct-by-value.$1.$2.prg: struct-by-value.c | $(WORKDIR) $(if $(QUIET),echo misc/struct-by-value.$1.$2.prg) - $(NOT) $(CC65) -t sim$2 -$1 -o $$@ $$< $(NULLERR) + $(NOT) $(CC65) -t sim$2 -$1 -o $$@ $$< $(NULLOUT) $(CATERR) # the rest are tests that fail currently for one reason or another $(WORKDIR)/sitest.$1.$2.prg: sitest.c | $(WORKDIR) @echo "FIXME: " $$@ "currently does not compile." - $(NOT) $(CC65) -t sim$2 -$1 -o $$@ $$< $(NULLERR) + $(NOT) $(CC65) -t sim$2 -$1 -o $$@ $$< $(NULLOUT) $(CATERR) # $(SIM65) $(SIM65FLAGS) $$@ $(NULLOUT) endef # PRG_template diff --git a/test/ref/Makefile b/test/ref/Makefile index e82c6de37..4269c3879 100644 --- a/test/ref/Makefile +++ b/test/ref/Makefile @@ -1,3 +1,9 @@ +# ---- Display info during parsing phase ---- +SILENT:=$(findstring s,$(word 1, $(MAKEFLAGS))) +ifneq ($(SILENT),s) + $(info Using Makefile: $(realpath $(firstword $(MAKEFILE_LIST))) $(MAKECMDGOALS)) +endif + # Makefile for the regression tests that generate output which has to be # compared with reference output @@ -21,9 +27,17 @@ else COPY = cp $1 $2 endif +ifeq ($(SILENT),s) + QUIET = 1 +endif + ifdef QUIET .SILENT: + NULLOUT = >$(NULLDEV) NULLERR = 2>$(NULLDEV) +ifndef CMD_EXE + CATERR = 2> $(WORKDIR)/$$@.errlog || (cat $(WORKDIR)/$$@.errlog && false) +endif endif SIM65FLAGS = -x 200000000 diff --git a/test/standard/Makefile b/test/standard/Makefile index bf513c84e..903b34221 100644 --- a/test/standard/Makefile +++ b/test/standard/Makefile @@ -1,3 +1,9 @@ +# ---- Display info during parsing phase ---- +SILENT:=$(findstring s,$(word 1, $(MAKEFLAGS))) +ifneq ($(SILENT),s) + $(info Using Makefile: $(realpath $(firstword $(MAKEFILE_LIST))) $(MAKECMDGOALS)) +endif + # Makefile for the regression tests that return an error code on failure ifneq ($(shell echo),) @@ -16,10 +22,17 @@ else RMDIR = $(RM) -r $1 endif +ifeq ($(SILENT),s) + QUIET = 1 +endif + ifdef QUIET .SILENT: NULLOUT = >$(NULLDEV) NULLERR = 2>$(NULLDEV) +ifndef CMD_EXE + CATERR = 2> $(WORKDIR)/$$@.errlog || (cat $(WORKDIR)/$$@.errlog && false) +endif endif SIM65FLAGS = -x 4000000000 -c diff --git a/test/standard/null.c b/test/standard/null.c new file mode 100644 index 000000000..cd4bd0a44 --- /dev/null +++ b/test/standard/null.c @@ -0,0 +1,162 @@ + + +/* test headers which should define NULL */ + +#include <locale.h> +#ifndef NULL +#error "NULL should be defined in locale.h" +#endif +#undef NULL + +#include <stdlib.h> +#ifndef NULL +#error "NULL should be defined in stdlib.h" +#endif +#undef NULL + +#include <string.h> +#ifndef NULL +#error "NULL should be defined in string.h" +#endif +#undef NULL + +#include <stddef.h> +#ifndef NULL +#error "NULL should be defined in stddef.h" +#endif +#undef NULL + +#include <stdio.h> +#ifndef NULL +#error "NULL should be defined in stdio.h" +#endif +#undef NULL + +#include <time.h> +#ifndef NULL +#error "NULL should be defined in time.h" +#endif +#undef NULL + +/* does not exist in cc65 (yet) +#include <wchar.h> +#ifndef NULL +#error "NULL should be defined in wchar.h" +#endif */ +#undef NULL + + +/* test headers which should NOT define NULL */ + +#include <assert.h> +#ifdef NULL +#error "NULL should NOT be defined in assert.h" +#undef NULL +#endif + +/* does not exist in cc65 (yet) +#include <complex.h> +#ifdef NULL +#error "NULL should NOT be defined in complex.h" +#undef NULL +#endif */ + +#include <ctype.h> +#ifdef NULL +#error "NULL should NOT be defined in ctype.h" +#undef NULL +#endif + +#include <errno.h> +#ifdef NULL +#error "NULL should NOT be defined in errno.h" +#undef NULL +#endif + +/* does not exist in cc65 (yet) +#include <fenv.h> +#ifdef NULL +#error "NULL should NOT be defined in fenv.h" +#undef NULL +#endif */ + +/* does not exist in cc65 (yet) +#include <float.h> +#ifdef NULL +#error "NULL should NOT be defined in float.h" +#undef NULL +#endif */ + +#include <inttypes.h> +#ifdef NULL +#error "NULL should NOT be defined in inttypes.h" +#undef NULL +#endif + +#include <iso646.h> +#ifdef NULL +#error "NULL should NOT be defined in iso646.h" +#undef NULL +#endif + +#include <limits.h> +#ifdef NULL +#error "NULL should NOT be defined in limits.h" +#undef NULL +#endif + +/* does not exist in cc65 (yet) +#include <math.h> +#ifdef NULL +#error "NULL should NOT be defined in math.h" +#undef NULL +#endif */ + +#include <setjmp.h> +#ifdef NULL +#error "NULL should NOT be defined in setjmp.h" +#undef NULL +#endif + +#include <signal.h> +#ifdef NULL +#error "NULL should NOT be defined in signal.h" +#undef NULL +#endif + +#include <stdarg.h> +#ifdef NULL +#error "NULL should NOT be defined in stdarg.h" +#undef NULL +#endif + +#include <stdbool.h> +#ifdef NULL +#error "NULL should NOT be defined in stdbool.h" +#undef NULL +#endif + +#include <stdint.h> +#ifdef NULL +#error "NULL should NOT be defined in stdint.h" +#undef NULL +#endif + +/* does not exist in cc65 (yet) +#include <tgmath.h> +#ifdef NULL +#error "NULL should NOT be defined in tgmath.h" +#undef NULL +#endif */ + +/* does not exist in cc65 (yet) +#include <wctype.h> +#ifdef NULL +#error "NULL should NOT be defined in wctype.h" +#undef NULL +#endif */ + +int main(void) +{ + return 0; +} diff --git a/test/standard_err/Makefile b/test/standard_err/Makefile index 700a52eea..989d26d6f 100644 --- a/test/standard_err/Makefile +++ b/test/standard_err/Makefile @@ -1,3 +1,9 @@ +# ---- Display info during parsing phase ---- +SILENT:=$(findstring s,$(word 1, $(MAKEFLAGS))) +ifneq ($(SILENT),s) + $(info Using Makefile: $(realpath $(firstword $(MAKEFILE_LIST))) $(MAKECMDGOALS)) +endif + # Makefile for the tests that MUST NOT compile ifneq ($(shell echo),) @@ -18,10 +24,19 @@ else RMDIR = $(RM) -r $1 endif +ifeq ($(SILENT),s) + QUIET = 1 +endif + ifdef QUIET .SILENT: + NULLOUT = >$(NULLDEV) NULLERR = 2>$(NULLDEV) +ifndef CMD_EXE + CATERR = 2> $(WORKDIR)/$$@.errlog || (cat $(WORKDIR)/$$@.errlog && false) endif +endif + CC65 := $(if $(wildcard ../../bin/cc65*),..$S..$Sbin$Scc65,cc65) @@ -43,7 +58,7 @@ define PRG_template $(WORKDIR)/%.$1.$2.prg: %.c | $(WORKDIR) $(if $(QUIET),echo standard_err/$$*.$1.$2.prg) - $(NOT) $(CC65) -t sim$2 $$(CC65FLAGS) -Osir --add-source --standard $1 -o $$(@:.prg=.s) $$< $(NULLERR) + $(NOT) $(CC65) -t sim$2 $$(CC65FLAGS) -Osir --add-source --standard $1 -o $$(@:.prg=.s) $$< $(NULLOUT) $(CATERR) endef # PRG_template diff --git a/test/todo/Makefile b/test/todo/Makefile index 062b899ce..efaca3a25 100644 --- a/test/todo/Makefile +++ b/test/todo/Makefile @@ -1,3 +1,9 @@ +# ---- Display info during parsing phase ---- +SILENT:=$(findstring s,$(word 1, $(MAKEFLAGS))) +ifneq ($(SILENT),s) + $(info Using Makefile: $(realpath $(firstword $(MAKEFILE_LIST))) $(MAKECMDGOALS)) +endif + # Makefile for the currently failing regression tests that return an error code on failure ifneq ($(shell echo),) @@ -18,11 +24,19 @@ else RMDIR = $(RM) -r $1 endif +ifeq ($(SILENT),s) + QUIET = 1 +endif + ifdef QUIET .SILENT: NULLOUT = >$(NULLDEV) NULLERR = 2>$(NULLDEV) +ifndef CMD_EXE + CATERR = 2> $(WORKDIR)/$$@.errlog || (cat $(WORKDIR)/$$@.errlog && false) endif +endif + SIM65FLAGS = -x 200000000 diff --git a/test/todo/bug2172_invalid_code.c b/test/todo/bug2172_invalid_code.c new file mode 100644 index 000000000..74522c029 --- /dev/null +++ b/test/todo/bug2172_invalid_code.c @@ -0,0 +1,56 @@ + +// bug #2172 - Invalid code generated for switch statement + +#include <stdlib.h> +#include <stdio.h> + +// cc65 -o bug2172.s -Cl -Oirs -T -t c64 bug2172.c +int func(int expr) +{ + switch (expr) { + int i; + case 0: + i = 17; + return i; + default: + i = 16; + return i; + } +} + +int err = 0; + +int main(void) +{ + int i = 0; + int n = 42; + for (i = -3; i < 0; i++) { + n = func(i); + if ((i < -3) || (i >= 0)) { + goto stackerr; + } + printf("i:%d expect:16 got:%d\n", i, n); + if (n != 16) { + err++; + } + } + n = func(0); + printf("i:%d expect:17 got:%d\n", 0, n); + if (n != 17) { + err++; + } + for (i = 1; i < 4; i++) { + n = func(i); + if ((i < 1) || (i >= 4)) { + goto stackerr; + } + printf("i:%d expect:16 got:%d\n", i, n); + if (n != 16) { + err++; + } + } + return err; +stackerr: + fputs("stack messed up?\n", stdout); + return -1; +} diff --git a/test/todo/bug2172b_invalid_code.c b/test/todo/bug2172b_invalid_code.c new file mode 100644 index 000000000..13d983123 --- /dev/null +++ b/test/todo/bug2172b_invalid_code.c @@ -0,0 +1,51 @@ + +#include <stdlib.h> +#include <stdio.h> + +/* Just some arbitrary code, more fun with goto */ +int func(int m) +{ + long x = -42; /* sp: -4 */ + switch (x) { + /* return 0; // C99 only */ + int i = 42; /* sp: -6 */ +L0: + --i; +default: + if (i != 0) { + long j = 13; /* sp: -10 */ + goto L1; +L1: +case 0x7FFF01: + m--; +case 0x7EFF0001: +case 0x7FFF0001: + i++; + } /* sp: -6 */ +case 0x7FFF00: +case 0x7FFF0000: + break; + goto L0; + { + int skipped = 42; /* sp: -8 */ +case 0x7EFF00: +case 0x7EFF0000: + ++skipped; + } /* sp: -6 */ + } /* sp: -4 */ + + return m; +} + +int err = 0; + +int main(void) +{ + int n = 42; + n = func(7); + if (n != 7) { + err++; + } + printf("n:%d\n", n); + return err; +} diff --git a/test/val/Makefile b/test/val/Makefile index 56d8e5ff9..13b4ca4bd 100644 --- a/test/val/Makefile +++ b/test/val/Makefile @@ -1,3 +1,9 @@ +# ---- Display info during parsing phase ---- +SILENT:=$(findstring s,$(word 1, $(MAKEFLAGS))) +ifneq ($(SILENT),s) + $(info Using Makefile: $(realpath $(firstword $(MAKEFILE_LIST))) $(MAKECMDGOALS)) +endif + # Makefile for the regression tests that return an error code on failure ifneq ($(shell echo),) @@ -15,13 +21,20 @@ else NULLDEV = /dev/null MKDIR = mkdir -p $1 RMDIR = $(RM) -r $1 - CATRES = || (cat $(WORKDIR)/$$@.out && false) + CATRES = > $(WORKDIR)/$$@.out 2> $(WORKDIR)/$$@.out || (cat $(WORKDIR)/$$@.out && false) +endif + +ifeq ($(SILENT),s) + QUIET = 1 endif ifdef QUIET .SILENT: NULLOUT = >$(NULLDEV) NULLERR = 2>$(NULLDEV) +ifndef CMD_EXE + CATERR = 2> $(WORKDIR)/$$@.errlog || (cat $(WORKDIR)/$$@.errlog && false) +endif endif SIM65FLAGS = -x 4000000000 -c @@ -50,10 +63,10 @@ define PRG_template $(WORKDIR)/%.$1.$2.prg: %.c | $(WORKDIR) $(if $(QUIET),echo val/$$*.$1.$2.prg) - $(CC65) -t sim$2 $$(CC65FLAGS) --add-source -$1 -o $$(@:.prg=.s) $$< $(NULLERR) - $(CA65) -t sim$2 -o $$(@:.prg=.o) $$(@:.prg=.s) $(NULLERR) - $(LD65) -t sim$2 -o $$@ $$(@:.prg=.o) sim$2.lib $(NULLERR) - $(SIM65) $(SIM65FLAGS) $$@ > $(WORKDIR)/$$@.out $(CATRES) + $(CC65) -t sim$2 $$(CC65FLAGS) --add-source -$1 -o $$(@:.prg=.s) $$< $(NULLOUT) $(CATERR) + $(CA65) -t sim$2 -o $$(@:.prg=.o) $$(@:.prg=.s) $(NULLOUT) $(CATERR) + $(LD65) -t sim$2 -o $$@ $$(@:.prg=.o) sim$2.lib $(NULLOUT) $(CATERR) + $(SIM65) $(SIM65FLAGS) $$@ $(CATRES) endef # PRG_template diff --git a/test/val/bug1652-optimizer.c b/test/val/bug1652-optimizer.c index 7926ef770..97d0c5e4d 100644 --- a/test/val/bug1652-optimizer.c +++ b/test/val/bug1652-optimizer.c @@ -10,9 +10,9 @@ before: jsr pusha ldy #$01 ldx #$00 - lda (sp),y + lda (c_sp),y beq L0005 - lda (sp,x) + lda (c_sp,x) beq L0005 txa jmp incsp2 ; <-- @@ -24,9 +24,9 @@ after: jsr pusha ldy #$01 ldx #$00 - lda (sp),y + lda (c_sp),y beq L0004 - lda (sp,x) + lda (c_sp,x) beq L0004 txa jmp L0001 ; <-- diff --git a/test/val/bug2151.c b/test/val/bug2151.c index 25f145506..1277961ef 100644 --- a/test/val/bug2151.c +++ b/test/val/bug2151.c @@ -47,10 +47,11 @@ _Pragma _Pragma ( #pragma bss-name("BSS") { extern int y; -#pragma bss-name("BSS2") +#pragma bss-name("BSS") // used to be BSS2, but fix for #2608 means + // that now causes ld65 to fail, so we use BSS instead static #pragma zpsym ("y") - int x; // TODO: currently in "BSS", but supposed to be in "BSS2"? + int x; x = 0; if (memcmp(str, "aBC", 3)) diff --git a/test/val/bug2608.c b/test/val/bug2608.c new file mode 100644 index 000000000..c0685d28c --- /dev/null +++ b/test/val/bug2608.c @@ -0,0 +1,40 @@ + +/* bug #2608: "zp_bss" is placed in BSS and NOT placed in ZEROPAGE as expected. */ + +#include <stdlib.h> +#include <stdio.h> + +int err = 0; + +int is_zeropage(void *p) +{ + if (/*(p >= ((void*)0)) &&*/ + (p <= ((void*)0xff))) { + return 1; + } + return 0; +} + +void foo(void) { +#pragma bss-name(push,"ZEROPAGE") +#pragma data-name(push,"ZEROPAGE") + static int zp_data = 5; + static char zp_bss; +#pragma bss-name(pop) +#pragma data-name(pop) + printf("zp_data at 0x%04x (%szp)\n", &zp_data, is_zeropage(&zp_data) ? "" : "NOT "); + printf("zp_bss at 0x%04x (%szp)\n", &zp_bss, is_zeropage(&zp_bss) ? "" : "NOT "); + if (!is_zeropage(&zp_data)) { + err++; + } + if (!is_zeropage(&zp_bss)) { + err++; + } +} + +int main(void) +{ + foo(); + printf("errors: %d\n", err); + return err; +} diff --git a/test/val/cq85.c b/test/val/cq85.c index 81a99c960..ce836b649 100644 --- a/test/val/cq85.c +++ b/test/val/cq85.c @@ -62,7 +62,7 @@ int s85(struct defs *pd0){ struct tnode *right; }; - struct tnode s1, s2, *sp; + struct tnode s1, s2, *c_sp; struct{ char cdummy; diff --git a/util/Makefile b/util/Makefile index 6d960abf6..96d2ec629 100644 --- a/util/Makefile +++ b/util/Makefile @@ -1,3 +1,18 @@ +# ---- Display info during parsing phase ---- +SILENT:=$(findstring s,$(word 1, $(MAKEFLAGS))) +ifneq ($(SILENT),s) + $(info Using Makefile: $(realpath $(firstword $(MAKEFILE_LIST))) $(MAKECMDGOALS)) +endif + +ifeq ($(SILENT),s) + QUIET = 1 +endif + +ifdef QUIET + .SILENT: + PQ = "QUIET=1" + PD = --no-print-directory +endif .PHONY: atari gamate zlib @@ -6,16 +21,16 @@ util: atari gamate zlib all: util atari: - @$(MAKE) -C atari --no-print-directory $@ + @$(MAKE) -C atari $(PD) $(PQ) gamate: - @$(MAKE) -C gamate --no-print-directory $@ + @$(MAKE) -C gamate $(PD) $(PQ) zlib: - @$(MAKE) -C zlib --no-print-directory $@ + @$(MAKE) -C zlib $(PD) $(PQ) mostlyclean clean: - @$(MAKE) -C atari --no-print-directory $@ - @$(MAKE) -C gamate --no-print-directory $@ - @$(MAKE) -C zlib --no-print-directory $@ + @$(MAKE) -C atari $(PD) $@ $(PQ) + @$(MAKE) -C gamate $(PD) $@ $(PQ) + @$(MAKE) -C zlib $(PD) $@ $(PQ) install zip: diff --git a/util/atari/Makefile b/util/atari/Makefile index e53c837aa..74b7ee78a 100644 --- a/util/atari/Makefile +++ b/util/atari/Makefile @@ -1,3 +1,16 @@ +# ---- Display info during parsing phase ---- +SILENT:=$(findstring s,$(word 1, $(MAKEFLAGS))) +ifneq ($(SILENT),s) + $(info Using Makefile: $(realpath $(firstword $(MAKEFILE_LIST))) $(MAKECMDGOALS)) +endif + +ifeq ($(SILENT),s) + QUIET = 1 +endif + +ifdef QUIET + .SILENT: +endif CC = $(CROSS_COMPILE)gcc @@ -22,6 +35,7 @@ CFLAGS += -O3 -Wall -Wextra -Wno-char-subscripts $(USER_CFLAGS) atari: ataricvt ataricvt: ataricvt.c + $(if $(QUIET),echo HOST:$@) $(CC) $(CFLAGS) -o ataricvt ataricvt.c mostlyclean clean: diff --git a/util/gamate/Makefile b/util/gamate/Makefile index 54fa74191..7d1681c37 100644 --- a/util/gamate/Makefile +++ b/util/gamate/Makefile @@ -1,3 +1,16 @@ +# ---- Display info during parsing phase ---- +SILENT:=$(findstring s,$(word 1, $(MAKEFLAGS))) +ifneq ($(SILENT),s) + $(info Using Makefile: $(realpath $(firstword $(MAKEFILE_LIST))) $(MAKECMDGOALS)) +endif + +ifeq ($(SILENT),s) + QUIET = 1 +endif + +ifdef QUIET + .SILENT: +endif CC = $(CROSS_COMPILE)gcc @@ -22,6 +35,7 @@ CFLAGS += -O3 -Wall -Wextra -Wno-char-subscripts $(USER_CFLAGS) gamate: gamate-fixcart gamate-fixcart: gamate-fixcart.c + $(if $(QUIET),echo HOST:$@) $(CC) $(CFLAGS) -o gamate-fixcart gamate-fixcart.c mostlyclean clean: diff --git a/util/zlib/Makefile b/util/zlib/Makefile index f276ddaf2..5778ae821 100644 --- a/util/zlib/Makefile +++ b/util/zlib/Makefile @@ -1,3 +1,16 @@ +# ---- Display info during parsing phase ---- +SILENT:=$(findstring s,$(word 1, $(MAKEFLAGS))) +ifneq ($(SILENT),s) + $(info Using Makefile: $(realpath $(firstword $(MAKEFILE_LIST))) $(MAKECMDGOALS)) +endif + +ifeq ($(SILENT),s) + QUIET = 1 +endif + +ifdef QUIET + .SILENT: +endif CC = $(CROSS_COMPILE)gcc @@ -29,6 +42,7 @@ warning: @echo "note that you need zlib installed first" deflater: deflater.c + $(if $(QUIET),echo HOST:$@) $(CC) $(CFLAGS) -o deflater deflater.c -lz mostlyclean clean: