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Merge pull request #345 from SvOlli/release

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migrated opcodes tests for assembler from testcode to test...
This commit is contained in:
Oliver Schmidt
2016-09-07 10:11:47 +02:00
committed by GitHub
parent 32d4937363 f007fc13d5
commit 05279f8302
23 changed files with 1612 additions and 615 deletions
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3
testcode/assembler/.gitignore vendored
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@@ -1,3 +0,0 @@
*.bin
*.o
*.lst

BIN
testcode/assembler/4510all.ref
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278
testcode/assembler/4510all.s
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@@ -1,278 +0,0 @@
.setcpu "4510"
brk
ora ($05,x)
cle
see
tsb $02
ora $02
asl $02
rmb0 $02
php
ora #$01
asl
tsy
tsb $1234
ora $1234
asl $1234
bbr0 $02,*+$34
bpl *+$32
ora ($06),y
ora ($07),z
lbpl *+$3133 ; bpl *+$3133
trb $02
ora $03,x
asl $03,x
rmb1 $02
clc
ora $1456,y
inc
inz
trb $1234
ora $1345,x
asl $1345,x
bbr1 $02,*+$34
jsr $1234
and ($05,x)
jsr ($2345)
jsr ($2456,x)
bit $02
and $02
rol $02
rmb2 $02
plp
and #$01
rol
tys
bit $1234
and $1234
rol $1234
bbr2 $02,*+$34
bmi *+$32
and ($06),y
and ($07),z
lbmi *+$3133 ; bmi *+$3133
bit $03,x
and $03,x
rol $03,x
rmb3 $02
sec
and $1456,y
dec
dez
bit $1345,x
and $1345,x
rol $1345,x
bbr3 $02,*+$34
rti
eor ($05,x)
neg
asr
asr $02
eor $02
lsr $02
rmb4 $02
pha
eor #$01
lsr
taz
jmp $1234
eor $1234
lsr $1234
bbr4 $02,*+$34
bvc *+$32
eor ($06),y
eor ($07),z
lbvc *+$3133 ; bvc *+$3133
asr $03,x
eor $03,x
lsr $03,x
rmb5 $02
cli
eor $1456,y
phy
tab
map
eor $1345,x
lsr $1345,x
bbr5 $02,*+$34
rts
adc ($05,x)
rtn #$09
bsr *+$3133
stz $02
adc $02
ror $02
rmb6 $02
pla
adc #$01
ror
tza
jmp ($2345)
adc $1234
ror $1234
bbr6 $02,*+$34
bvs *+$32
adc ($06),y
adc ($07),z
lbvs *+$3133 ; bvs *+$3133
stz $03,x
adc $03,x
ror $03,x
rmb7 $02
sei
adc $1456,y
ply
tba
jmp ($2456,x)
adc $1345,x
ror $1345,x
bbr7 $02,*+$34
bra *+$32
sta ($05,x)
sta ($0f,s),y
sta ($0f,sp),y
lbra *+$3133 ; bra *+$3133
sty $02
sta $02
stx $02
smb0 $02
dey
bit #$01
txa
sty $1345,x
sty $1234
sta $1234
stx $1234
bbs0 $02,*+$34
bcc *+$32
sta ($06),y
sta ($07),z
lbcc *+$3133 ; bcc *+$3133
sty $03,x
sta $03,x
stx $04,y
smb1 $02
tya
sta $1456,y
txs
stx $1456,y
stz $1234
sta $1345,x
stz $1345,x
bbs1 $02,*+$34
ldy #$01
lda ($05,x)
ldx #$01
ldz #$01
ldy $02
lda $02
ldx $02
smb2 $02
tay
lda #$01
tax
ldz $1234
ldy $1234
lda $1234
ldx $1234
bbs2 $02,*+$34
bcs *+$32
lda ($06),y
lda ($07),z
lbcs *+$3133 ; bcs *+$3133
ldy $03,x
lda $03,x
ldx $04,y
smb3 $02
clv
lda $1456,y
tsx
ldz $1345,x
ldy $1345,x
lda $1345,x
ldx $1456,y
bbs3 $02,*+$34
cpy #$01
cmp ($05,x)
cpz #$01
dew $02
cpy $02
cmp $02
dec $02
smb4 $02
iny
cmp #$01
dex
asw $1234
cpy $1234
cmp $1234
dec $1234
bbs4 $02,*+$34
bne *+$32
cmp ($06),y
cmp ($07),z
lbne *+$3133 ; bne *+$3133
cpz $02
cmp $03,x
dec $03,x
smb5 $02
cld
cmp $1456,y
phx
phz
cpz $1234
cmp $1345,x
dec $1345,x
bbs5 $02,*+$34
cpx #$01
sbc ($05,x)
lda ($0f,s),y
lda ($0f,sp),y
inw $02
cpx $02
sbc $02
inc $02
smb6 $02
inx
sbc #$01
eom
nop
row $1234
cpx $1234
sbc $1234
inc $1234
bbs6 $02,*+$34
beq *+$32
sbc ($06),y
sbc ($07),z
lbeq *+$3133 ; beq *+$3133
phd #$089a
phw #$089a
sbc $03,x
inc $03,x
smb7 $02
sed
sbc $1456,y
plx
plz
phd $1234
phw $1234
sbc $1345,x
inc $1345,x
bbs7 $02,*+$34

32
testcode/assembler/Makefile
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@@ -1,32 +0,0 @@
all: chklegal.bin chkillegal.bin chkall.bin chk4510.bin
@#
.PHONY: chklegal.bin chkillegal.bin chkall.bin chk4510.bin
chk4510.bin: 4510all.s
$(MAKE) -C ../../src all
../../bin/cl65 --target none --cpu 4510 --listing 4510all.lst -o $@ $<
diff -q 4510all.ref $@ || cat 4510all.lst
chklegal.bin: legal.s
../../bin/cl65 --target none --cpu 6502X -o chklegal.bin legal.s
diff -q legal.ref chklegal.bin || hex chklegal.bin
chkillegal.bin: illegal.s
../../bin/cl65 --target none --cpu 6502X -o chkillegal.bin illegal.s
diff -q illegal.ref chkillegal.bin || hex chkillegal.bin
chkall.bin: all.s
../../bin/cl65 --target none --cpu 6502X -o chkall.bin all.s
ref: legal.s illegal.s
../../bin/cl65 --target none --cpu 6502X -o legal.ref legal.s
../../bin/cl65 --target none --cpu 6502X -o illegal.ref illegal.s
clean:
rm -f legal.o chklegal.bin
rm -f illegal.o chkillegal.bin
rm -f all.o chkall.bin
rm -f 4510all.o chk4510.bin 4510all.lst

260
testcode/assembler/all.s
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.setcpu "6502X"
; all legal and illegal opcodes as they would be disassembled by da65
; note that this would not assemble into the exact same binary
brk ; 00
ora ($12,x) ; 01 12
jam ; 02
slo ($12,x) ; 03 12
nop $12 ; 04 12
ora $12 ; 05 12
asl $12 ; 06 12
slo $12 ; 07 12
php ; 08
ora #$12 ; 09 12
asl a ; 0a
anc #$12 ; 0b 12
nop $1234 ; 0c 34 12
ora $1234 ; 0d 34 12
asl $1234 ; 0e 34 12
slo $1234 ; 0f 34 12
bpl *+$14 ; 10 12
ora ($12),y ; 11 12
jam ; 12
slo ($12),y ; 13 12
nop $12,x ; 14 12
ora $12,x ; 15 12
asl $12,x ; 16 12
slo $12,x ; 17 12
clc ; 18
ora $1234,y ; 19 34 12
nop ; 1a
slo $1234,y ; 1b 34 12
nop $1234,x ; 1c 34 12
ora $1234,x ; 1d 34 12
asl $1234,x ; 1e 34 12
slo $1234,x ; 1f 34 12
jsr $1234 ; 20 34 12
and ($12,x) ; 21 12
jam ; 22
rla ($12,x) ; 23 12
bit $12 ; 24 12
and $12 ; 25 12
rol $12 ; 26 12
rla $12 ; 27 12
plp ; 28
and #$12 ; 29 12
rol a ; 2a
anc #$12 ; 2b 12
bit $1234 ; 2c 34 12
and $1234 ; 2d 34 12
rol $1234 ; 2e 34 12
rla $1234 ; 2f 34 12
bmi *+$14 ; 30 12
and ($12),y ; 31 12
jam ; 32
rla ($12),y ; 33 12
nop $12,x ; 34 12
and $12,x ; 35 12
rol $12,x ; 36 12
rla $12,x ; 37 12
sec ; 38
and $1234,y ; 39 34 12
nop ; 3a
rla $1234,y ; 3b 34 12
nop $1234,x ; 3c 34 12
and $1234,x ; 3d 34 12
rol $1234,x ; 3e 34 12
rla $1234,x ; 3f 34 12
rti ; 40
eor ($12,x) ; 41 12
jam ; 42
sre ($12,x) ; 43 12
nop $12 ; 44 12
eor $12 ; 45 12
lsr $12 ; 46 12
sre $12 ; 47 12
pha ; 48
eor #$12 ; 49 12
lsr a ; 4a
alr #$12 ; 4b 12
jmp $1234 ; 4c 34 12
eor $1234 ; 4d 34 12
lsr $1234 ; 4e 34 12
sre $1234 ; 4f 34 12
bvc *+$14 ; 50 12
eor ($12),y ; 51 12
jam ; 52
sre ($12),y ; 53 12
nop $12,x ; 54 12
eor $12,x ; 55 12
lsr $12,x ; 56 12
sre $12,x ; 57 12
cli ; 58
eor $1234,y ; 59 34 12
nop ; 5a
sre $1234,y ; 5b 34 12
nop $1234,x ; 5c 34 12
eor $1234,x ; 5d 34 12
lsr $1234,x ; 5e 34 12
sre $1234,x ; 5f 34 12
rts ; 60
adc ($12,x) ; 61 12
jam ; 62
rra ($12,x) ; 63 12
nop $12 ; 64 12
adc $12 ; 65 12
ror $12 ; 66 12
rra $12 ; 67 12
pla ; 68
adc #$12 ; 69 12
ror a ; 6a
arr #$12 ; 6b 12
jmp ($1234) ; 6c 34 12
adc $1234 ; 6d 34 12
ror $1234 ; 6e 34 12
rra $1234 ; 6f 34 12
bvs *+$14 ; 70 12
adc ($12),y ; 71 12
jam ; 72
rra ($12),y ; 73 12
nop $12,x ; 74 12
adc $12,x ; 75 12
ror $12,x ; 76 12
rra $12,x ; 77 12
sei ; 78
adc $1234,y ; 79 34 12
nop ; 7a
rra $1234,y ; 7b 34 12
nop $1234,x ; 7c 34 12
adc $1234,x ; 7d 34 12
ror $1234,x ; 7e 34 12
rra $1234,x ; 7f 34 12
nop #$12 ; 80 12
sta ($12,x) ; 81 12
nop #$12 ; 82 12
sax ($12,x) ; 83 12
sty $12 ; 84 12
sta $12 ; 85 12
stx $12 ; 86 12
sax $12 ; 87 12
dey ; 88
nop #$12 ; 89 12
txa ; 8a
ane #$12 ; 8b 12
sty $1234 ; 8c 34 12
sta $1234 ; 8d 34 12
stx $1234 ; 8e 34 12
sax $1234 ; 8f 34 12
bcc *+$14 ; 90 12
sta ($12),y ; 91 12
jam ; 92
sha ($12),y ; 93 12
sty $12,x ; 94 12
sta $12,x ; 95 12
stx $12,y ; 96 12
sax $12,y ; 97 12
tya ; 98
sta $1234,y ; 99 34 12
txs ; 9a
tas $1234,y ; 9b 34 12
shy $1234,x ; 9c 34 12
sta $1234,x ; 9d 34 12
shx $1234,y ; 9e 34 12
sha $1234,y ; 9f 34 12
ldy #$12 ; a0 12
lda ($12,x) ; a1 12
ldx #$12 ; a2 12
lax ($12,x) ; a3 12
ldy $12 ; a4 12
lda $12 ; a5 12
ldx $12 ; a6 12
lax $12 ; a7 12
tay ; a8
lda #$12 ; a9 12
tax ; aa
lax #$12 ; ab 12
ldy $1234 ; ac 34 12
lda $1234 ; ad 34 12
ldx $1234 ; ae 34 12
lax $1234 ; af 34 12
bcs *+$14 ; b0 12
lda ($12),y ; b1 12
jam ; b2
lax ($12),y ; b3 12
ldy $12,x ; b4 12
lda $12,x ; b5 12
ldx $12,y ; b6 12
lax $12,y ; b7 12
clv ; b8
lda $1234,y ; b9 34 12
tsx ; ba
las $1234,y ; bb 34 12
ldy $1234,x ; bc 34 12
lda $1234,x ; bd 34 12
ldx $1234,y ; be 34 12
lax $1234,y ; bf 34 12
cpy #$12 ; c0 12
cmp ($12,x) ; c1 12
nop #$12 ; c2 12
dcp ($12,x) ; c3 12
cpy $12 ; c4 12
cmp $12 ; c5 12
dec $12 ; c6 12
dcp $12 ; c7 12
iny ; c8
cmp #$12 ; c9 12
dex ; ca
axs #$12 ; cb 12
cpy $1234 ; cc 34 12
cmp $1234 ; cd 34 12
dec $1234 ; ce 34 12
dcp $1234 ; cf 34 12
bne *+$14 ; d0 12
cmp ($12),y ; d1 12
jam ; d2
dcp ($12),y ; d3 12
nop $12,x ; d4 12
cmp $12,x ; d5 12
dec $12,x ; d6 12
dcp $12,x ; d7 12
cld ; d8
cmp $1234,y ; d9 34 12
nop ; da
dcp $1234,y ; db 34 12
nop $1234,x ; dc 34 12
cmp $1234,x ; dd 34 12
dec $1234,x ; de 34 12
dcp $1234,x ; df 34 12
cpx #$12 ; e0 12
sbc ($12,x) ; e1 12
nop #$12 ; e2 12
isc ($12,x) ; e3 12
cpx $12 ; e4 12
sbc $12 ; e5 12
inc $12 ; e6 12
isc $12 ; e7 12
inx ; e8
sbc #$12 ; e9 12
nop ; ea
sbc #$12 ; eb 12
cpx $1234 ; ec 34 12
sbc $1234 ; ed 34 12
inc $1234 ; ee 34 12
isc $1234 ; ef 34 12
beq *+$14 ; f0 12
sbc ($12),y ; f1 12
jam ; f2
isc ($12),y ; f3 12
nop $12,x ; f4 12
sbc $12,x ; f5 12
inc $12,x ; f6 12
isc $12,x ; f7 12
sed ; f8
sbc $1234,y ; f9 34 12
isc $1234,y ; fb 34 12
nop $1234,x ; fc 34 12
sbc $1234,x ; fd 34 12
inc $1234,x ; fe 34 12
isc $1234,x ; ff 34 12

1
testcode/assembler/illegal.ref
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@@ -1 +0,0 @@
444'/4?4;4#73O4_4[4GCWSo44{4gcws<12>4<12>4<12>4<12><12><12><12><12>4<12>4<12>4<12><12><12><12><12>4<12><12><12><12>4<12>4<12><12><12><12> kK<12> 44<12><02><12>4<12>4<12>4<12>4<12>4<12><12>

135
testcode/assembler/illegal.s
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@@ -1,135 +0,0 @@
.setcpu "6502X"
; all so called "illegal" opcodes. duplicated (functionally identical) ones
; are commented out
; first all totally stable undocs:
slo $12 ; 07 12
slo $1234 ; 0f 34 12
slo $1234,x ; 1f 34 12
slo $1234,y ; 1b 34 12
slo ($12,x) ; 03 12
slo $12,x ; 17 12
slo ($12),y ; 13 12
rla $12 ; 27 12
rla $1234 ; 2f 34 12
rla $1234,x ; 3f 34 12
rla $1234,y ; 3b 34 12
rla ($12,x) ; 23 12
rla $12,x ; 37 12
rla ($12),y ; 33 12
sre $1234 ; 4f 34 12
sre $1234,x ; 5f 34 12
sre $1234,y ; 5b 34 12
sre $12 ; 47 12
sre ($12,x) ; 43 12
sre $12,x ; 57 12
sre ($12),y ; 53 12
rra $1234 ; 6f 34 12
rra $1234,x ; 7f 34 12
rra $1234,y ; 7b 34 12
rra $12 ; 67 12
rra ($12,x) ; 63 12
rra $12,x ; 77 12
rra ($12),y ; 73 12
dcp $1234 ; cf 34 12
dcp $1234,x ; df 34 12
dcp $1234,y ; db 34 12
dcp $12 ; c7 12
dcp ($12,x) ; c3 12
dcp $12,x ; d7 12
dcp ($12),y ; d3 12
isc $1234 ; ef 34 12
isc $1234,x ; ff 34 12
isc $1234,y ; fb 34 12
isc $12 ; e7 12
isc ($12,x) ; e3 12
isc $12,x ; f7 12
isc ($12),y ; f3 12
sax $1234 ; 8f 34 12
sax $12 ; 87 12
sax ($12,x) ; 83 12
sax $12,y ; 97 12
lax $1234 ; af 34 12
lax $1234,y ; bf 34 12
lax $12 ; a7 12
lax ($12,x) ; a3 12
lax ($12),y ; b3 12
lax $12,y ; b7 12
anc #$12 ; 0b 12
;anc #$12 ; 2b 12
arr #$12 ; 6b 12
alr #$12 ; 4b 12
axs #$12 ; cb 12
nop $1234 ; 0c 34 12
nop $1234,x ; 1c 34 12
nop $12 ; 04 12
nop $12,x ; 14 12
nop #$12 ; 80 12
;nop $1234,x ; 3c 34 12
;nop $1234,x ; 5c 34 12
;nop $1234,x ; 7c 34 12
;nop $1234,x ; dc 34 12
;nop $1234,x ; fc 34 12
;nop $12 ; 44 12
;nop $12 ; 64 12
;nop #$12 ; 82 12
;nop #$12 ; 89 12
;nop #$12 ; c2 12
;nop #$12 ; e2 12
;nop $12,x ; 34 12
;nop $12,x ; 54 12
;nop $12,x ; 74 12
;nop $12,x ; d4 12
;nop $12,x ; f4 12
;nop ; 1a
;nop ; 3a
;nop ; 5a
;nop ; 7a
;nop ; da
jam ; 02
;jam ; 12
;jam ; 22
;jam ; 32
;jam ; 42
;jam ; 52
;jam ; 62
;jam ; 72
;jam ; 92
;jam ; b2
;jam ; d2
;jam ; f2
;sbc #$12 ; eb 12
; the so-called "unstable" ones:
sha ($12),y ; 93 12
sha $1234,y ; 9f 34 12
shx $1234,y ; 9e 34 12
shy $1234,x ; 9c 34 12
tas $1234,y ; 9b 34 12
las $1234,y ; bb 34 12
; the two so-called "highly unstable" ones:
lax #$12 ; ab 12
ane #$12 ; 8b 12

BIN
testcode/assembler/legal.ref
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Binary file not shown.

185
testcode/assembler/legal.s
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.setcpu "6502"
adc $1234 ; 6d 34 12
adc $1234,x ; 7d 34 12
adc $1234,y ; 79 34 12
adc $12 ; 65 12
adc #$12 ; 69 12
adc ($12,x) ; 61 12
adc $12,x ; 75 12
adc ($12),y ; 71 12
and $12 ; 25 12
and #$12 ; 29 12
and $1234 ; 2d 34 12
and $1234,x ; 3d 34 12
and $1234,y ; 39 34 12
and ($12,x) ; 21 12
and $12,x ; 35 12
and ($12),y ; 31 12
asl $12 ; 06 12
asl $1234 ; 0e 34 12
asl $1234,x ; 1e 34 12
asl $12,x ; 16 12
asl a ; 0a
bcc *+$14 ; 90 12
bcs *+$14 ; b0 12
beq *+$14 ; f0 12
bmi *+$14 ; 30 12
bne *+$14 ; d0 12
bpl *+$14 ; 10 12
bvc *+$14 ; 50 12
bvs *+$14 ; 70 12
bit $12 ; 24 12
bit $1234 ; 2c 34 12
brk ; 00
clc ; 18
cld ; d8
cli ; 58
clv ; b8
cmp $1234 ; cd 34 12
cmp $1234,x ; dd 34 12
cmp $1234,y ; d9 34 12
cmp $12 ; c5 12
cmp #$12 ; c9 12
cmp ($12,x) ; c1 12
cmp $12,x ; d5 12
cmp ($12),y ; d1 12
cpx $1234 ; ec 34 12
cpx #$12 ; e0 12
cpx $12 ; e4 12
cpy $1234 ; cc 34 12
cpy #$12 ; c0 12
cpy $12 ; c4 12
dec $1234 ; ce 34 12
dec $1234,x ; de 34 12
dec $12 ; c6 12
dec $12,x ; d6 12
dex ; ca
dey ; 88
eor $1234 ; 4d 34 12
eor $1234,x ; 5d 34 12
eor $1234,y ; 59 34 12
eor $12 ; 45 12
eor #$12 ; 49 12
eor ($12,x) ; 41 12
eor $12,x ; 55 12
eor ($12),y ; 51 12
inc $1234 ; ee 34 12
inc $1234,x ; fe 34 12
inc $12 ; e6 12
inc $12,x ; f6 12
inx ; e8
iny ; c8
jmp $1234 ; 4c 34 12
jmp ($1234) ; 6c 34 12
jsr $1234 ; 20 34 12
lda $1234 ; ad 34 12
lda $1234,x ; bd 34 12
lda $1234,y ; b9 34 12
lda $12 ; a5 12
lda #$12 ; a9 12
lda ($12,x) ; a1 12
lda $12,x ; b5 12
lda ($12),y ; b1 12
ldx $1234 ; ae 34 12
ldx $1234,y ; be 34 12
ldx #$12 ; a2 12
ldx $12 ; a6 12
ldx $12,y ; b6 12
ldy $1234 ; ac 34 12
ldy $1234,x ; bc 34 12
ldy #$12 ; a0 12
ldy $12 ; a4 12
ldy $12,x ; b4 12
lsr $1234 ; 4e 34 12
lsr $1234,x ; 5e 34 12
lsr $12 ; 46 12
lsr $12,x ; 56 12
lsr a ; 4a
nop ; ea
ora $12 ; 05 12
ora #$12 ; 09 12
ora $1234 ; 0d 34 12
ora $1234,x ; 1d 34 12
ora $1234,y ; 19 34 12
ora ($12,x) ; 01 12
ora $12,x ; 15 12
ora ($12),y ; 11 12
pha ; 48
php ; 08
pla ; 68
plp ; 28
rol $12 ; 26 12
rol $1234 ; 2e 34 12
rol $1234,x ; 3e 34 12
rol $12,x ; 36 12
rol a ; 2a
ror $1234 ; 6e 34 12
ror $1234,x ; 7e 34 12
ror $12 ; 66 12
ror $12,x ; 76 12
ror a ; 6a
rti ; 40
rts ; 60
sbc $1234 ; ed 34 12
sbc $1234,x ; fd 34 12
sbc $1234,y ; f9 34 12
sbc $12 ; e5 12
sbc #$12 ; e9 12
sbc ($12,x) ; e1 12
sbc $12,x ; f5 12
sbc ($12),y ; f1 12
sec ; 38
sed ; f8
sei ; 78
sta $1234 ; 8d 34 12
sta $1234,x ; 9d 34 12
sta $1234,y ; 99 34 12
sta $12 ; 85 12
sta ($12,x) ; 81 12
sta $12,x ; 95 12
sta ($12),y ; 91 12
stx $1234 ; 8e 34 12
stx $12 ; 86 12
stx $12,y ; 96 12
sty $1234 ; 8c 34 12
sty $12 ; 84 12
sty $12,x ; 94 12
tax ; aa
tay ; a8
tsx ; ba
txa ; 8a
txs ; 9a
tya ; 98