Add 4510 support for C65/C64DX
This commit is contained in:
Sven Oliver Moll
234
src/ca65/instr.c
234
src/ca65/instr.c
@@ -73,6 +73,9 @@ static void PutPCRel8 (const InsDesc* Ins);
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static void PutPCRel16 (const InsDesc* Ins);
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/* Handle branches with an 16 bit distance and PER */
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static void PutPCRel4510 (const InsDesc* Ins);
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/* Handle branches with a 16 bit distance for 4510 */
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static void PutBlockMove (const InsDesc* Ins);
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/* Handle the blockmove instructions (65816) */
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@@ -125,6 +128,9 @@ static void PutRTS (const InsDesc* Ins attribute ((unused)));
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static void PutAll (const InsDesc* Ins);
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/* Handle all other instructions */
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static void Put4510 (const InsDesc* Ins);
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/* Handle instructions of 4510 not matching any EATab */
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static void PutSweet16 (const InsDesc* Ins);
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/* Handle a generic sweet16 instruction */
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@@ -483,6 +489,149 @@ static const struct {
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}
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};
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/* Instruction table for the 4510 */
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static const struct {
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unsigned Count;
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InsDesc Ins[133];
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} InsTab4510 = {
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sizeof (InsTab4510.Ins) / sizeof (InsTab4510.Ins[0]),
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{
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{ "ADC", 0x080A66C, 0x60, 0, PutAll },
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{ "AND", 0x080A66C, 0x20, 0, PutAll },
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{ "ASL", 0x000006e, 0x02, 1, PutAll },
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{ "ASR", 0x0000026, 0x43, 0, Put4510 },
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{ "ASW", 0x0000008, 0xcb, 6, PutAll },
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{ "BBR0", 0x0000000, 0x0F, 0, PutBitBranch },
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{ "BBR1", 0x0000000, 0x1F, 0, PutBitBranch },
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{ "BBR2", 0x0000000, 0x2F, 0, PutBitBranch },
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{ "BBR3", 0x0000000, 0x3F, 0, PutBitBranch },
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{ "BBR4", 0x0000000, 0x4F, 0, PutBitBranch },
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{ "BBR5", 0x0000000, 0x5F, 0, PutBitBranch },
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{ "BBR6", 0x0000000, 0x6F, 0, PutBitBranch },
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{ "BBR7", 0x0000000, 0x7F, 0, PutBitBranch },
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{ "BBS0", 0x0000000, 0x8F, 0, PutBitBranch },
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{ "BBS1", 0x0000000, 0x9F, 0, PutBitBranch },
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{ "BBS2", 0x0000000, 0xAF, 0, PutBitBranch },
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{ "BBS3", 0x0000000, 0xBF, 0, PutBitBranch },
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{ "BBS4", 0x0000000, 0xCF, 0, PutBitBranch },
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{ "BBS5", 0x0000000, 0xDF, 0, PutBitBranch },
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{ "BBS6", 0x0000000, 0xEF, 0, PutBitBranch },
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{ "BBS7", 0x0000000, 0xFF, 0, PutBitBranch },
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{ "BCC", 0x0020000, 0x90, 0, PutPCRel8 },
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{ "BCS", 0x0020000, 0xb0, 0, PutPCRel8 },
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{ "BEQ", 0x0020000, 0xf0, 0, PutPCRel8 },
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{ "BIT", 0x0A0006C, 0x00, 2, PutAll },
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{ "BMI", 0x0020000, 0x30, 0, PutPCRel8 },
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{ "BNE", 0x0020000, 0xd0, 0, PutPCRel8 },
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{ "BPL", 0x0020000, 0x10, 0, PutPCRel8 },
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{ "BRA", 0x0020000, 0x80, 0, PutPCRel8 },
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{ "BRK", 0x0000001, 0x00, 0, PutAll },
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{ "BSR", 0x0040000, 0x63, 0, PutPCRel4510 },
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{ "BVC", 0x0020000, 0x50, 0, PutPCRel8 },
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{ "BVS", 0x0020000, 0x70, 0, PutPCRel8 },
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{ "CLC", 0x0000001, 0x18, 0, PutAll },
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{ "CLD", 0x0000001, 0xd8, 0, PutAll },
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{ "CLE", 0x0000001, 0x02, 0, PutAll },
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{ "CLI", 0x0000001, 0x58, 0, PutAll },
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{ "CLV", 0x0000001, 0xb8, 0, PutAll },
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{ "CMP", 0x080A66C, 0xc0, 0, PutAll },
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{ "CPX", 0x080000C, 0xe0, 1, PutAll },
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{ "CPY", 0x080000C, 0xc0, 1, PutAll },
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{ "CPZ", 0x080000C, 0xd0, 1, Put4510 },
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{ "DEA", 0x0000001, 0x00, 3, PutAll }, /* == DEC */
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{ "DEC", 0x000006F, 0x00, 3, PutAll },
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{ "DEW", 0x0000004, 0xc3, 7, PutAll }, /* trial'n'error */
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{ "DEX", 0x0000001, 0xca, 0, PutAll },
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{ "DEY", 0x0000001, 0x88, 0, PutAll },
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{ "DEZ", 0x0000001, 0x3B, 0, PutAll },
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{ "EOM", 0x0000001, 0xea, 0, PutAll },
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{ "EOR", 0x080A66C, 0x40, 0, PutAll },
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{ "INA", 0x0000001, 0x00, 4, PutAll }, /* == INC */
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{ "INC", 0x000006f, 0x00, 4, PutAll },
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{ "INW", 0x0000004, 0xe3, 7, PutAll }, /* trial'n'error */
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{ "INX", 0x0000001, 0xe8, 0, PutAll },
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{ "INY", 0x0000001, 0xc8, 0, PutAll },
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{ "INZ", 0x0000001, 0x1B, 0, PutAll },
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{ "JMP", 0x0010808, 0x4c, 6, PutAll },
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{ "JSR", 0x0010808, 0x20, 6, Put4510 },
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{ "LBCC", 0x0040000, 0x93, 0, PutPCRel4510 },
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{ "LBCS", 0x0040000, 0xb3, 0, PutPCRel4510 },
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{ "LBEQ", 0x0040000, 0xf3, 0, PutPCRel4510 },
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{ "LBMI", 0x0040000, 0x33, 0, PutPCRel4510 },
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{ "LBNE", 0x0040000, 0xd3, 0, PutPCRel4510 },
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{ "LBPL", 0x0040000, 0x13, 0, PutPCRel4510 },
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{ "LBRA", 0x0040000, 0x83, 0, PutPCRel4510 },
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{ "LBVC", 0x0040000, 0x53, 0, PutPCRel4510 },
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{ "LBVS", 0x0040000, 0x73, 0, PutPCRel4510 },
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{ "LDA", 0x090A66C, 0xa0, 0, Put4510 },
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{ "LDX", 0x080030C, 0xa2, 1, PutAll },
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{ "LDY", 0x080006C, 0xa0, 1, PutAll },
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{ "LDZ", 0x0800048, 0xa3, 1, Put4510 },
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{ "LSR", 0x000006F, 0x42, 1, PutAll },
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{ "MAP", 0x0000001, 0x5C, 0, PutAll },
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{ "NEG", 0x0000001, 0x42, 0, PutAll },
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{ "NOP", 0x0000001, 0xea, 0, PutAll }, /* == EOM */
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{ "ORA", 0x080A66C, 0x00, 0, PutAll },
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{ "PHA", 0x0000001, 0x48, 0, PutAll },
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{ "PHD", 0x8000008, 0xf4, 1, PutAll }, /* == PHW */
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{ "PHP", 0x0000001, 0x08, 0, PutAll },
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{ "PHW", 0x8000008, 0xf4, 1, PutAll },
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{ "PHX", 0x0000001, 0xda, 0, PutAll },
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{ "PHY", 0x0000001, 0x5a, 0, PutAll },
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{ "PHZ", 0x0000001, 0xdb, 0, PutAll },
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{ "PLA", 0x0000001, 0x68, 0, PutAll },
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{ "PLP", 0x0000001, 0x28, 0, PutAll },
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{ "PLX", 0x0000001, 0xfa, 0, PutAll },
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{ "PLY", 0x0000001, 0x7a, 0, PutAll },
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{ "PLZ", 0x0000001, 0xfb, 0, PutAll },
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{ "RMB0", 0x0000004, 0x07, 1, PutAll },
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{ "RMB1", 0x0000004, 0x17, 1, PutAll },
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{ "RMB2", 0x0000004, 0x27, 1, PutAll },
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{ "RMB3", 0x0000004, 0x37, 1, PutAll },
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{ "RMB4", 0x0000004, 0x47, 1, PutAll },
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{ "RMB5", 0x0000004, 0x57, 1, PutAll },
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{ "RMB6", 0x0000004, 0x67, 1, PutAll },
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{ "RMB7", 0x0000004, 0x77, 1, PutAll },
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{ "ROL", 0x000006F, 0x22, 1, PutAll },
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{ "ROR", 0x000006F, 0x62, 1, PutAll },
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{ "ROW", 0x0000008, 0xeb, 6, PutAll },
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{ "RTI", 0x0000001, 0x40, 0, PutAll },
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{ "RTN", 0x0800000, 0x62, 1, PutAll },
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{ "RTS", 0x0000001, 0x60, 0, PutAll },
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{ "SBC", 0x080A66C, 0xe0, 0, PutAll },
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{ "SEC", 0x0000001, 0x38, 0, PutAll },
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{ "SED", 0x0000001, 0xf8, 0, PutAll },
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{ "SEE", 0x0000001, 0x03, 0, PutAll },
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{ "SEI", 0x0000001, 0x78, 0, PutAll },
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{ "SMB0", 0x0000004, 0x87, 1, PutAll },
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{ "SMB1", 0x0000004, 0x97, 1, PutAll },
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{ "SMB2", 0x0000004, 0xA7, 1, PutAll },
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{ "SMB3", 0x0000004, 0xB7, 1, PutAll },
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{ "SMB4", 0x0000004, 0xC7, 1, PutAll },
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{ "SMB5", 0x0000004, 0xD7, 1, PutAll },
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{ "SMB6", 0x0000004, 0xE7, 1, PutAll },
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{ "SMB7", 0x0000004, 0xF7, 1, PutAll },
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{ "STA", 0x010A66C, 0x80, 0, Put4510 },
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{ "STX", 0x000030c, 0x82, 1, Put4510 },
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{ "STY", 0x000006c, 0x80, 1, Put4510 },
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{ "STZ", 0x000006c, 0x04, 5, PutAll },
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{ "TAB", 0x0000001, 0x5b, 0, PutAll },
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{ "TAX", 0x0000001, 0xaa, 0, PutAll },
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{ "TAY", 0x0000001, 0xa8, 0, PutAll },
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{ "TAZ", 0x0000001, 0x4b, 0, PutAll },
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{ "TBA", 0x0000001, 0x7b, 0, PutAll },
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{ "TRB", 0x000000c, 0x10, 1, PutAll },
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{ "TSB", 0x000000c, 0x00, 1, PutAll },
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{ "TSX", 0x0000001, 0xba, 0, PutAll },
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{ "TSY", 0x0000001, 0x0b, 0, PutAll },
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{ "TXA", 0x0000001, 0x8a, 0, PutAll },
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{ "TXS", 0x0000001, 0x9a, 0, PutAll },
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{ "TYA", 0x0000001, 0x98, 0, PutAll },
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{ "TYS", 0x0000001, 0x2b, 0, PutAll },
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{ "TZA", 0x0000001, 0x6b, 0, PutAll },
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}
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};
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/* Instruction table for the 65816 */
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static const struct {
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unsigned Count;
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@@ -786,6 +935,7 @@ static const InsTable* InsTabs[CPU_COUNT] = {
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(const InsTable*) &InsTabSweet16,
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(const InsTable*) &InsTabHuC6280,
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0, /* Mitsubishi 740 */
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(const InsTable*) &InsTab4510,
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};
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const InsTable* InsTab = (const InsTable*) &InsTab6502;
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@@ -797,73 +947,73 @@ static unsigned char EATab[12][AM65I_COUNT] = {
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0x00, 0x00, 0x05, 0x0D, 0x0F, 0x15, 0x1D, 0x1F,
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0x00, 0x19, 0x12, 0x00, 0x07, 0x11, 0x17, 0x01,
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0x00, 0x00, 0x00, 0x03, 0x13, 0x09, 0x00, 0x09,
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0x00, 0x00, 0x00
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0x00, 0x00, 0x00, 0x00
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},
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{ /* Table 1 */
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0x08, 0x08, 0x04, 0x0C, 0x00, 0x14, 0x1C, 0x00,
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0x14, 0x1C, 0x00, 0x80, 0x00, 0x10, 0x00, 0x00,
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0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
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0x00, 0x00, 0x80
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0x00, 0x00, 0x80, 0x00
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},
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{ /* Table 2 */
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0x00, 0x00, 0x24, 0x2C, 0x0F, 0x34, 0x3C, 0x00,
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0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
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0x00, 0x00, 0x00, 0x00, 0x00, 0x89, 0x00, 0x00,
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0x00, 0x00, 0x00
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0x00, 0x00, 0x00, 0x00
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},
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{ /* Table 3 */
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0x3A, 0x3A, 0xC6, 0xCE, 0x00, 0xD6, 0xDE, 0x00,
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0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
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0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
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0x00, 0x00, 0x00
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0x00, 0x00, 0x00, 0x00
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},
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{ /* Table 4 */
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0x1A, 0x1A, 0xE6, 0xEE, 0x00, 0xF6, 0xFE, 0x00,
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0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
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0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
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0x00, 0x00, 0x00
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0x00, 0x00, 0x00, 0x00
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},
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{ /* Table 5 */
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0x00, 0x00, 0x60, 0x98, 0x00, 0x70, 0x9E, 0x00,
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0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
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0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
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0x00, 0x00, 0x00
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0x00, 0x00, 0x00, 0x00
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},
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{ /* Table 6 */
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0x00, 0x00, 0x00, 0x00, 0x10, 0x00, 0x00, 0x00,
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0x00, 0x00, 0x00, 0x20, 0x00, 0x00, 0x00, 0x00,
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0x30, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
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0x00, 0x00, 0x90
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0x00, 0x00, 0x90, 0x00
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},
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{ /* Table 7 */
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0x00, 0x00, 0x00, 0x00, 0x02, 0x00, 0x00, 0x00,
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0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
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0xDC, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
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0x00, 0x00, 0x00
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0x00, 0x00, 0x00, 0x00
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},
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{ /* Table 8 */
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0x00, 0x40, 0x01, 0x41, 0x00, 0x09, 0x49, 0x00,
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0x00, 0x00, 0x00, 0x51, 0x00, 0x00, 0x00, 0x00,
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0x00, 0x00, 0x00, 0x00, 0x00, 0x40, 0x00, 0x00,
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0x00, 0x00, 0x00
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0x00, 0x00, 0x00, 0x00
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},
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{ /* Table 9 */
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0x00, 0x00, 0x00, 0x10, 0x00, 0x20, 0x30, 0x00,
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0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
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0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
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0x00, 0x00, 0x00
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0x00, 0x00, 0x00, 0x00
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},
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{ /* Table 10 (NOPs) */
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0xea, 0x00, 0x04, 0x0c, 0x00, 0x14, 0x1c, 0x00,
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0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
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0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80,
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0x00, 0x00, 0x00
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0x00, 0x00, 0x00, 0x00
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},
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{ /* Table 11 (LAX) */
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0x08, 0x08, 0x04, 0x0C, 0x00, 0x14, 0x1C, 0x00,
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0x14, 0x1C, 0x00, 0x80, 0x00, 0x10, 0x00, 0x00,
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0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x08,
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0x00, 0x00, 0x80
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0x00, 0x00, 0x80, 0x00
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},
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};
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@@ -908,6 +1058,7 @@ unsigned char ExtBytes[AM65I_COUNT] = {
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2, /* Blockmove (65816) */
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7, /* Block transfer (HuC6280) */
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2, /* Absolute Indirect long */
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2, /* Immidiate word */
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};
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/* Table that encodes the additional bytes for each SWEET16 instruction */
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@@ -1033,7 +1184,7 @@ static int EvalEA (const InsDesc* Ins, EffAddr* A)
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** limit the expression to the maximum possible value.
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*/
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if (A->AddrMode == AM65I_IMM_ACCU || A->AddrMode == AM65I_IMM_INDEX ||
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A->AddrMode == AM65I_IMM_IMPLICIT) {
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A->AddrMode == AM65I_IMM_IMPLICIT || A->AddrMode == AM65I_IMM_IMPLICIT_WORD) {
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if (ForceRange && A->Expr) {
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A->Expr = MakeBoundedExpr (A->Expr, ExtBytes[A->AddrMode]);
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}
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@@ -1136,6 +1287,14 @@ static void PutPCRel16 (const InsDesc* Ins)
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static void PutPCRel4510 (const InsDesc* Ins)
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/* Handle branches with a 16 bit distance */
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{
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/* 16 bit branch opcode is 8 bit branch opcode or 0x03 */
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EmitPCRel (Ins->BaseCode, GenBranchExpr (2), 2);
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}
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static void PutBlockMove (const InsDesc* Ins)
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/* Handle the blockmove instructions (65816) */
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{
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@@ -1383,6 +1542,55 @@ static void PutAll (const InsDesc* Ins)
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static void Put4510 (const InsDesc* Ins)
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/* Handle all other instructions */
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{
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/* The 4510 uses all 256 possible opcodes, so the last ones were cramped
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* in where an opcode was still undefined. As a result, some of those
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* don't follow any rules for encoding the addressmodes. So the EATab
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* approach does not work always. In this function, the wrongly calculated
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* opcode is replaced by the correct one "on the fly". Suggestions for a
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* better approach are welcome.
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*
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* These are:
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* $20 -> $22 : JSR ($1234) NEED TO CHECK FOR ADDRESSING
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* $30 -> $23 : JSR ($1234,X)
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* $47 -> $44 : ASR $12
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* $57 -> $54 : ASR $12,X
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* $93 -> $82 : STA ($12,SP),Y
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* $9c -> $8b : STY $1234,X
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* $9e -> $9b : STX $1234,Y
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* $af -> $ab : LDZ $1234
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* $bf -> $bb : LDZ $1234,X
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* $b3 -> $e2 : LDA ($12,SP),Y
|
||||
* $d0 -> $c2 : CPZ #$00
|
||||
*/
|
||||
EffAddr A;
|
||||
|
||||
/* Evaluate the addressing mode used */
|
||||
if (EvalEA (Ins, &A)) {
|
||||
switch(A.Opcode) {
|
||||
case 0x20: if(A.AddrModeBit == AM65_ABS_IND) A.Opcode = 0x22; break;
|
||||
case 0x30: A.Opcode = 0x23; break;
|
||||
case 0x47: A.Opcode = 0x44; break;
|
||||
case 0x57: A.Opcode = 0x54; break;
|
||||
case 0x93: A.Opcode = 0x82; break;
|
||||
case 0x9C: A.Opcode = 0x8B; break;
|
||||
case 0x9E: A.Opcode = 0x9B; break;
|
||||
case 0xAF: A.Opcode = 0xAB; break;
|
||||
case 0xBF: A.Opcode = 0xBB; break;
|
||||
case 0xB3: A.Opcode = 0xE2; break;
|
||||
case 0xD0: A.Opcode = 0xC2; break;
|
||||
default: /*nothing*/ break;
|
||||
}
|
||||
|
||||
/* No error, output code */
|
||||
EmitCode (&A);
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
|
||||
/*****************************************************************************/
|
||||
/* Handler functions for SWEET16 */
|
||||
/*****************************************************************************/
|
||||
|
||||
Reference in New Issue
Block a user