the10thwiz/cc65
1
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity

fixed VDC register assignments

Browse Source
This commit is contained in:
mrdudz
2015-09-07 12:55:36 +02:00
parent af2ba26c62
commit 088a25437d
2 changed files with 21 additions and 19 deletions
Download Patch File Download Diff File Expand all files Collapse all files

38
asminc/pce.inc
View File

@@ -18,27 +18,29 @@ charsperline = 61
CH_HLINE = 1 CH_HLINE = 1
CH_VLINE = 2 CH_VLINE = 2
; huc6270 - Video Display Controller (vdc) ; huc6270 - Video Display Controller (VDC)
VDC_MAWR = 0 ; Memory Address Write Register VDC_MAWR = 0 ; Memory Address Write Register
VDC_MARR = 1 ; Memory Address Read Register VDC_MARR = 1 ; Memory Address Read Register
VDC_VWR = 2 ; VRAM Write Register VDC_VWR = 2 ; VRAM Write Register (write only)
VDC_VRR = 3 ; VRAM Read Register VDC_VRR = 2 ; VRAM Read Register (read only)
VDC_CR = 4 ; Control Register VDC_UNK03 = 3 ; (unknown)
VDC_RCR = 5 ; Raster Counter Register VDC_UNK04 = 4 ; (unknown)
VDC_BXR = 6 ; Background X-Scroll Register VDC_CR = 5 ; Control Register
VDC_BYR = 7 ; Background Y-Scroll Register VDC_RCR = 6 ; Raster Counter Register
VDC_MWR = 8 ; Memory-access Width Register VDC_BXR = 7 ; Background X-Scroll Register
VDC_HSR = 9 ; Horizontal Sync Register (?) VDC_BYR = 8 ; Background Y-Scroll Register
VDC_HDR = 10 ; Horizontal Display Register (?) VDC_MWR = 9 ; Memory-access Width Register
VDC_VPR = 11 ; (unknown) VDC_HSR = 10 ; Horizontal Sync Register
VDC_VDW = 12 ; (unknown use) VDC_HDR = 11 ; Horizontal Display Register
VDC_VCR = 13 ; (unknown use) VDC_VPR = 12 ; Vertical synchronous register
VDC_DCR = 14 ; (DMA) Control Register VDC_VDW = 13 ; Vertical display register
VDC_SOUR = 15 ; (DMA) Source Register VDC_VCR = 14 ; Vertical display END position register
VDC_DESR = 16 ; (DMA) Destination Register VDC_DCR = 15 ; (DMA) Control Register
VDC_LENR = 17 ; (DMA) Length Register VDC_SOUR = 16 ; (DMA) Source Register
VDC_SATB = 18 ; Sprite Attribute Table VDC_DESR = 17 ; (DMA) Destination Register
VDC_LENR = 18 ; (DMA) Length Register
VDC_SATB = 19 ; Sprite Attribute Table
; VDC port ; VDC port
; Note: absolute addressing mode must be used when writing to this port ; Note: absolute addressing mode must be used when writing to this port

2
libsrc/pce/conio.s
View File

@@ -14,7 +14,7 @@ initconio:
jsr conio_init jsr conio_init
jsr set_palette jsr set_palette
st0 #VDC_RCR st0 #VDC_CR
st1 #<$0088 st1 #<$0088
st2 #>$0088 st2 #>$0088
rts rts