Apple2: implement sleep using MONWAIT

Also publish detect_iigs(), set_iigs_speed() and get_iigs_speed(). Refactor to only store one ostype variable.

libsrc/apple2/detect_iigs.s

@@ -0,0 +1,17 @@
+;
+; Colin Leroy-Mira <colin@colino.net>, 2024
+;
+; void __fastcall__ detect_iigs(void)
+;
+
+        .export         _detect_iigs
+        .import         ostype, return0, return1
+
+        .include        "apple2.inc"
+
+        ; Returns 1 if running on IIgs, 0 otherwise
+_detect_iigs:
+        lda     ostype
+        bpl     :+
+        jmp     return1
+:       jmp     return0

libsrc/apple2/get_iigs_speed.s

@@ -0,0 +1,22 @@
+;
+; Colin Leroy-Mira <colin@colino.net>, 2024
+;
+; unsigned char __fastcall__ get_iigs_speed(void)
+;
+
+        .export         _get_iigs_speed
+        .import         ostype, return0
+
+        .include        "apple2.inc"
+        .include        "accelerator.inc"
+
+_get_iigs_speed:
+        lda     ostype          ; Return SLOW if not IIgs
+        bpl     :+
+        lda     CYAREG          ; Check current setting
+        bpl     :+
+        lda     #SPEED_FAST
+        ldx     #$00
+        rts
+        .assert SPEED_SLOW = 0, error
+:       jmp     return0         ; SPEED_SLOW

libsrc/apple2/get_ostype.s

@@ -5,7 +5,7 @@
 ;
 
         .constructor    initostype, 9
-        .export         _get_ostype
+        .export         _get_ostype, ostype
 
 ; Identify machine according to:
 ; Apple II Miscellaneous TechNote #7, Apple II Family Identification

libsrc/apple2/set_iigs_speed.s

@@ -0,0 +1,29 @@
+;
+; Colin Leroy-Mira <colin@colino.net>, 2024
+;
+; unsigned char __fastcall__ detect_iigs(unsigned char speed)
+;
+
+        .export         _set_iigs_speed
+        .import         ostype, return0
+
+        .include        "apple2.inc"
+        .include        "accelerator.inc"
+
+_set_iigs_speed:
+        tax                     ; Keep parameter
+        lda     ostype          ; Return if not IIgs
+        bmi     :+
+        jmp     return0
+
+:       lda     CYAREG
+        cpx     #SPEED_SLOW
+        beq     :+
+        ora     #%10000000
+        bne     set_speed
+:       and     #%01111111
+set_speed:
+        sta     CYAREG
+        txa
+        ldx     #$00
+        rts

libsrc/apple2/sleep.s

@@ -0,0 +1,54 @@
+;
+; Colin Leroy-Mira <colin@colino.net>, 2024
+;
+; void __fastcall__ sleep(unsigned s)
+;
+;
+
+        .export         _sleep
+        .import         _get_iigs_speed
+        .import         _set_iigs_speed
+        .import         WAIT
+        .importzp       tmp1
+
+        .include        "accelerator.inc"
+
+        ; This functions uses the Apple2 WAIT ROM routine to waste a certain
+        ; amount of cycles and returns approximately after the numbers of
+        ; seconds passed in AX.
+        ;
+        ; It takes 1023730 cycles when called with AX=1 (1,0007s),
+        ; 10236364 cycles when called with AX=10 (10,006 seconds),
+        ; 306064298 cycles with AX=300 (299.2 seconds).
+        ;
+        ; Caveat: IRQs firing during calls to sleep will make the sleep longer
+        ; by the amount of cycles it takes to handle the IRQ.
+        ;
+_sleep:
+        stx     tmp1            ; High byte of s in X
+        tay                     ; Low byte in A
+        ora     tmp1
+        bne     :+
+        rts
+:       jsr     _get_iigs_speed ; Save current CPU speed
+        pha
+        lda     #SPEED_SLOW     ; Down to 1MHz for consistency around WAIT
+        jsr     _set_iigs_speed
+sleep_1s:
+        ldx     #$0A            ; Loop 10 times
+sleep_100ms:
+        lda     #$C7            ; Sleep about 99ms
+        jsr     WAIT
+        lda     #$0D             ; About 1ms
+        jsr     WAIT
+        dex
+        bne     sleep_100ms
+        dey
+        bne     sleep_1s
+        dec     tmp1
+        bmi     done
+        dey                     ; Down to #$FF
+        bne     sleep_1s
+done:
+        pla                     ; Restore CPU speed
+        jmp     _set_iigs_speed

libsrc/apple2/wait.s

@@ -0,0 +1,20 @@
+;
+; Colin Leroy-Mira, 2024
+;
+; WAIT routine
+;
+
+        .export         WAIT
+
+        .include        "apple2.inc"
+
+        .segment        "LOWCODE"
+
+WAIT:
+        ; Switch in ROM and call WAIT
+        bit     $C082
+        jsr     $FCA8           ; Vector to WAIT routine
+
+        ; Switch in LC bank 2 for R/O and return
+        bit     $C080
+        rts

libsrc/apple2/waitvsync.s

@@ -5,21 +5,11 @@
 ;
         .ifdef  __APPLE2ENH__
 
-        .constructor    initvsync
         .export         _waitvsync
-        .import         _get_ostype
+        .import         ostype
 
         .include        "apple2.inc"
 
-        .segment        "ONCE"
-
-initvsync:
-        jsr     _get_ostype
-        sta     ostype
-        rts
-
-        .code
-
 _waitvsync:
         bit     ostype
         bmi     iigs            ; $8x
@@ -53,8 +43,4 @@ iic:    sei
         cli
         rts
 
-        .segment        "INIT"
-
-ostype: .res    1
-
         .endif                  ; __APPLE2ENH__