Fixed behavior of the 65C02 "BIT #imm" instruction.
The BIT #imm instruction behaves differently from the BIT instruction with other addressing modes, in that it does /not/ set the N and V flags according to the value of its operand. It only sets the Z flag, in accordance to the value of (A & operand). This is corroborated in two ways: - The 65x02 test suite; - Documentation about BIT #imm such as http://www.6502.org/tutorials/65c02opcodes.html This patch implements the correct behavior for BIT with immediate addressing. The patched version passes the 65x02 test suite for 65C02 opcode 0x89.
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@@ -823,6 +823,12 @@ static unsigned HaveIRQRequest;
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SET_OF (Val & 0x40); \
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SET_OF (Val & 0x40); \
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SET_ZF ((Val & Regs.AC) == 0)
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SET_ZF ((Val & Regs.AC) == 0)
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/* BITIMM */
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/* The BIT instruction with immediate mode addressing only sets
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the zero flag; the sign and overflow flags are not changed. */
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#define BITIMM(Val) \
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SET_ZF ((Val & Regs.AC) == 0)
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/* LDA */
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/* LDA */
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#define LDA(Val) \
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#define LDA(Val) \
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Regs.AC = Val; \
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Regs.AC = Val; \
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@@ -2257,7 +2263,9 @@ static void OPC_6502_88 (void)
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static void OPC_65SC02_89 (void)
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static void OPC_65SC02_89 (void)
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/* Opcode $89: BIT #imm */
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/* Opcode $89: BIT #imm */
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{
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{
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ALU_OP_IMM (BIT);
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/* Note: BIT #imm behaves differently from BIT with other addressing modes,
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* hence the different 'op' argument to the macro. */
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ALU_OP_IMM (BITIMM);
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}
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}
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