Changed the PC-Engine's configuration file, so that the command line can build 8K, 16K, and 32K carts.

Adjusted the PCE's document, the start-up code, and the PCE library test makefile.  That makefile shows how to post-process the linker's output file.
This commit is contained in:
Greg King
2018-02-23 16:06:49 -05:00
parent 83890e56eb
commit 3a0506ccb3
5 changed files with 115 additions and 84 deletions

View File

@@ -1,34 +1,29 @@
# linker config to produce simple NEC PC-Engine cartridge (.pce)
# linker config. to produce a NEC PC-Engine 8K, 16K, or 32K image (.bin)
SYMBOLS {
__CARTSIZE__: type = weak, value = $2000; # $2000, $4000, or $8000
__STACKSIZE__: type = weak, value = $0300; # 3 pages stack
}
MEMORY {
# FIXME: is this correct? the first 3? bytes cant be used?
ZP: file = "", start = $0003, size = $00FD, type = rw, define = yes;
# reset-bank and hardware vectors
ROM0: file = %O, start = $E000, size = $1FF6, fill = yes, define = yes;
ROMV: file = %O, start = $FFF6, size = $000A, fill = yes;
# first RAM page (also contains stack and zeropage)
RAM: file = "", start = $2200, size = $1e00, define = yes;
ZP: file = "", start = $0000, size = $0100, define = yes;
# RAM bank
MAIN: file = "", start = $2200, size = $1E00 - __STACKSIZE__, define = yes;
# ROM banks, before swapping, and after mapping
ROM: file = %O, start = $10000 - __CARTSIZE__, size = __CARTSIZE__, fill = yes, fillval = $FF;
}
SEGMENTS {
ZEROPAGE: load = ZP, type = zp, define = yes;
EXTZP: load = ZP, type = zp, define = yes, optional = yes;
APPZP: load = ZP, type = zp, define = yes, optional = yes;
STARTUP: load = ROM0, type = ro, define = yes;
ONCE: load = ROM0, type = ro, optional = yes;
CODE: load = ROM0, type = ro, define = yes;
RODATA: load = ROM0, type = ro, define = yes;
DATA: load = ROM0, run = RAM, type = rw, define = yes;
BSS: load = RAM, type = bss, define = yes;
VECTORS: load = ROMV, type = rw, define = yes;
ZEROPAGE: load = ZP, type = zp;
EXTZP: load = ZP, type = zp, optional = yes;
APPZP: load = ZP, type = zp, optional = yes;
DATA: load = ROM, run = MAIN, type = rw, define = yes;
INIT: load = MAIN, type = bss, optional = yes;
BSS: load = MAIN, type = bss, define = yes;
RODATA: load = ROM, type = ro;
CODE: load = ROM, type = ro;
LOWCODE: load = ROM, type = ro, optional = yes;
ONCE: load = ROM, type = ro, optional = yes;
STARTUP: load = ROM, type = ro, start = $FFF6 - $0066;
VECTORS: load = ROM, type = ro, start = $FFF6;
}
FEATURES {
CONDES: type = constructor,
label = __CONSTRUCTOR_TABLE__,