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Changed the PC-Engine's configuration file, so that the command line can build 8K, 16K, and 32K carts.

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Adjusted the PCE's document, the start-up code, and the PCE library test makefile.  That makefile shows how to post-process the linker's output file.
This commit is contained in:
Greg King
2018-02-23 16:06:49 -05:00
parent 83890e56eb
commit 3a0506ccb3
5 changed files with 115 additions and 84 deletions
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68
libsrc/pce/crt0.s
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@@ -4,33 +4,26 @@
; by Groepaz/Hitmen <groepaz@gmx.net>
; based on code by Ullrich von Bassewitz <uz@cc65.org>
;
; This must be the *first* file on the linker command line
; 2018-02-11, Greg King
;
.export _exit
.export __STARTUP__ : absolute = 1 ; Mark as startup
.import initlib, donelib
.import push0, _main, zerobss
.import initheap
.import push0, _main
.import IRQStub
; Linker generated
.import __RAM_START__, __RAM_SIZE__
.import __ROM0_START__, __ROM0_SIZE__
.import __ROM_START__, __ROM_SIZE__
.import __STARTUP_LOAD__,__STARTUP_RUN__, __STARTUP_SIZE__
.import __CODE_LOAD__,__CODE_RUN__, __CODE_SIZE__
.import __RODATA_LOAD__,__RODATA_RUN__, __RODATA_SIZE__
.import __DATA_LOAD__,__DATA_RUN__, __DATA_SIZE__
.import __BSS_SIZE__
; Linker-generated
.import __CARTSIZE__
.import __DATA_LOAD__, __DATA_RUN__, __DATA_SIZE__
.import __BSS_RUN__, __BSS_SIZE__
.import __MAIN_START__, __MAIN_SIZE__, __STACKSIZE__
.include "pce.inc"
.include "extzp.inc"
.importzp sp
.importzp ptr1,ptr2
.importzp tmp1,tmp2,tmp3
; ------------------------------------------------------------------------
; Place the startup code in a special segment.
@@ -53,29 +46,27 @@ start:
ldx #$FF ; Stack top ($21FF)
txs
; At startup all MPRs are set to 0, so init them
lda #$ff
tam #%00000001 ; 0000-1FFF = Hardware page
; At power-on, most MPRs have random values; so, initiate them.
lda #$FF
tam #%00000001 ; $0000-$1FFF = Hardware bank
lda #$F8
tam #%00000010 ; 2000-3FFF = Work RAM
; FIXME: setup a larger block of memory to use with C-code
tam #%00000010 ; $2000-$3FFF = Work RAM
;lda #$F7
;tam #%00000100 ; 4000-5FFF = Save RAM
;lda #1
;tam #%00001000 ; 6000-7FFF Page 2
;lda #2
;tam #%00010000 ; 8000-9FFF Page 3
;lda #3
;tam #%00100000 ; A000-BFFF Page 4
;tam #%00000100 ; $4000-$47FF = 2K Battery-backed RAM
;lda #4
;tam #%01000000 ; C000-DFFF Page 5
;lda #0
;tam #%10000000 ; e000-fFFF hucard/syscard bank 0
;tam #%00001000 ; $6000-$7FFF
; Clear work RAM (2000-3FFF)
stz <$00
tii $2000, $2001, $1FFF
lda #$01
ldx #>$8000
cpx #>__CARTSIZE__
bcc @L1 ;(blt)
tam #%00010000 ; $8000-$9FFF = ROM bank 1 (32K block of ROM)
inc a
tam #%00100000 ; $A000-$BFFF = ROM bank 2
inc a
@L1: tam #%01000000 ; $C000-$DFFF = ROM bank 3 (32K) or 1 (16K)
;lda #$00 ; (The reset default)
;tam #%10000000 ; $E000-$FFFF hucard/syscard bank 0
; Initialize hardware
stz TIMER_CTRL ; Timer off
@@ -91,15 +82,16 @@ start:
lda #$05
sta IRQ_MASK ; IRQ1=on
; Clear the BSS data
jsr zerobss
; Copy the .data segment to RAM
tii __DATA_LOAD__, __DATA_RUN__, __DATA_SIZE__
; Clear the .bss segment
stz __BSS_RUN__
tii __BSS_RUN__, __BSS_RUN__ + 1, __BSS_SIZE__ - 1
; Set up the stack
lda #<(__RAM_START__+__RAM_SIZE__)
ldx #>(__RAM_START__+__RAM_SIZE__)
lda #<(__MAIN_START__ + __MAIN_SIZE__ + __STACKSIZE__)
ldx #>(__MAIN_START__ + __MAIN_SIZE__ + __STACKSIZE__)
sta sp
stx sp + 1