alignment fixes

This commit is contained in:
xlar54
2024-06-19 23:50:54 -05:00
parent 6098ac2788
commit 3b494ad6f2

View File

@@ -31,7 +31,7 @@
.addr $0000 ; Library reference .addr $0000 ; Library reference
.word 640 ; X resolution .word 640 ; X resolution
.word 480 ; Y resolution .word 480 ; Y resolution
.byte 2 ; Number of drawing colors .byte 2 ; Number of drawing colors
.byte 0 ; Number of screens available .byte 0 ; Number of screens available
.byte 8 ; System font X size .byte 8 ; System font X size
.byte 8 ; System font Y size .byte 8 ; System font Y size
@@ -198,14 +198,14 @@ INIT: stz ERROR ; #TGI_ERR_OK
; Switch into (640 x 480 x 2 bpp) graphics mode. ; Switch into (640 x 480 x 2 bpp) graphics mode.
lda #%00000000 ; DCSEL = 0, VRAM port 1 lda #%00000000 ; DCSEL = 0, VRAM port 1
sta VERA::CTRL sta VERA::CTRL
lda #%00100001 ; Disable sprites, layer 1 enable, VGA lda #%00100001 ; Disable sprites, layer 1 enable, VGA
sta VERA::DISP::VIDEO sta VERA::DISP::VIDEO
lda #%00000100 ; Bitmap mode enable lda #%00000100 ; Bitmap mode enable
sta VERA::L1::CONFIG sta VERA::L1::CONFIG
lda #%00000001 ; Tile width 640 lda #%00000001 ; Tile width 640
sta VERA::L1::TILE_BASE sta VERA::L1::TILE_BASE
rts rts
; ------------------------------------------------------------------------ ; ------------------------------------------------------------------------
@@ -245,59 +245,57 @@ CONTROL:
; Must set an error code: NO ; Must set an error code: NO
CLEAR: CLEAR:
.scope inner .scope inner
; set up DCSEL=2 ; set up DCSEL=2
lda #(2 << 1) lda #(2 << 1)
sta VERA::CTRL sta VERA::CTRL
; set cache writes ; set cache writes
lda #$40 lda #$40
tsb $9F29 ;VERA_FX_CTRL tsb VERA::DISP::VIDEO ; VERA_FX_CTRL when DCSEL=2
; set FX cache to all zeroes ; set FX cache to all zeroes
lda #(6 << 1) lda #(6 << 1)
sta VERA::CTRL sta VERA::CTRL
lda #$00 lda #$00
sta VERA::DISP::VIDEO
sta VERA::DISP::HSCALE
sta VERA::DISP::VSCALE
sta VERA::DISP::FRAME
ahead: stz VERA::CTRL
sta VERA::DISP::VIDEO ; set address and increment for bitmap area
sta VERA::DISP::HSCALE stz VERA::ADDR
sta VERA::DISP::VSCALE stz VERA::ADDR + 1
sta VERA::DISP::FRAME lda #$30 ; increment +4
sta VERA::ADDR + 2
stz VERA::CTRL ldy #$F0
; set address and increment for bitmap area @blank_outer:
stz VERA::ADDR ldx #$0A
stz VERA::ADDR + 1 @blank_loop:
lda #$30 ; increment +4
sta VERA::ADDR + 2
ldy #$F0 .repeat 8
blank_outer: stz VERA::DATA0
ldx #$0A .endrep
blank_loop:
.repeat 8 dex
stz VERA::DATA0 bne @blank_loop
.endrep dey
bne @blank_outer
dex ; set up DCSEL=2
bne blank_loop lda #(2 << 1)
dey sta VERA::CTRL
bne blank_outer
; set up DCSEL=2 ; set FX off (cache write bit 1 -> 0)
lda #(2 << 1) stz $9F29 ;VERA_FX_CTRL
sta VERA::CTRL stz VERA::CTRL
; set FX off (cache write bit 1 -> 0) .endscope
stz $9F29 ;VERA_FX_CTRL rts
stz VERA::CTRL
.endscope
rts
; ------------------------------------------------------------------------ ; ------------------------------------------------------------------------
@@ -447,7 +445,7 @@ SETPIXEL:
sta VERA::DATA0 ; Store back the modified byte sta VERA::DATA0 ; Store back the modified byte
rts rts
@ahead: @ahead:
; if BITMASK = $FF, black is line color ; if BITMASK = $FF, black is line color
lda VERA::DATA0 ; Load the byte at memory address lda VERA::DATA0 ; Load the byte at memory address
and bitMasks2,X ; OR with the bit mask and bitMasks2,X ; OR with the bit mask
@@ -482,7 +480,7 @@ GETPIXEL:
lda #$00 lda #$00
rts rts
@ahead: @ahead:
ldx #$00 ldx #$00
lda #$01 lda #$01
rts rts