the10thwiz/cc65
1
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity

Merge branch 'cc65:master' into master

Browse Source
This commit is contained in:
rumbledethumps
2025-05-23 18:53:28 -07:00
committed by GitHub
parent 34bb14bc6e 2dbc7d1696
commit 5854818754
30 changed files with 676 additions and 61 deletions
Download Patch File Download Diff File Expand all files Collapse all files

189
libsrc/apple2/get_tv.s Normal file
View File

@@ -0,0 +1,189 @@
;
; Colin Leroy-Mira <colin@colino.net>, 2025
;
; unsigned char __fastcall__ get_tv(void)
;
.export _get_tv
.import _set_iigs_speed, _get_iigs_speed
.import ostype
.constructor calibrate_tv, 2
.include "accelerator.inc"
.include "apple2.inc"
.include "get_tv.inc"
.segment "ONCE"
; Cycle wasters
waste_72:
jsr waste_36
waste_36:
jsr waste_12
waste_24:
jsr waste_12
waste_12:
rts
.proc calibrate_tv
lda ostype
bmi iigs
cmp #$20
bcc iip
cmp #$40
bcc iie
iic: jmp calibrate_iic
iigs: jmp calibrate_iigs
iie: jmp calibrate_iie
iip: rts ; Keep TV::OTHER.
.endproc
; Magic numbers
WASTE_LOOP_CYCLES = 92 ; The wait loop total cycles
NTSC_LOOP_COUNT = 17030/WASTE_LOOP_CYCLES ; How many loops expected on NTSC
PAL_LOOP_COUNT = 20280/WASTE_LOOP_CYCLES ; How many loops expected on PAL
STOP_PTRIG = 16500/WASTE_LOOP_CYCLES ; Stop PTRIG at 16.5ms
; Carry set at enter: wait for VBL +
; Carry clear at enter: wait for VBL -
; Increments X every 92 cycles.
.proc count_until_vbl_bit
lda #$10 ; BPL
bcc :+
lda #$30 ; BMI
: sta sign
; Wait for VBLsign change with 92 cycles loops.
; Hit PTRIG repeatedly so that accelerators will slow down.
; But stop hitting PTRIG after 16.5ms cycles, so that on the //c,
; the VBLINT will not be reset right before we get it. 16.5ms
; is a good value because it's far enough from 17ms for NTSC
; models, and close enough to 20.2ms for PAL models that accelerators
; will stay slow until there. (5ms usually).
: cpx #STOP_PTRIG ; 2 - see if we spent 16.5ms already
bcs notrig ; 4 / 5 - if so, stop hitting PTRIG
sta PTRIG ; 8 - otherwise hit it
bcc count ; 11
notrig:
nop ; 7 - keep cycle count constant when not
nop ; 9 - hitting PTRIG
nop ; 11
count:
inx ; 13
jsr waste_72 ; 85
bit RDVBLBAR ; 89 - Wait for VBL change
sign:
bpl :- ; 92 - patched with bpl/bmi
rts
.endproc
.proc calibrate_iic
php
sei
sta IOUDISOFF
lda RDVBLMSK
pha ; Back up for cleanup
bit ENVBL
bit PTRIG ; Reset VBL interrupt flag
: bit RDVBLBAR ; Wait for one VBL
bpl :-
bit PTRIG ; Reset VBL interrupt flag again
ldx #$00
clc
jsr count_until_vbl_bit
pla ; Cleanup
asl
bcs :+ ; VBL interrupts were already enabled
bit DISVBL
: sta IOUDISON ; IIc Tech Ref Man: The firmware normally leaves IOUDIS on.
plp
jmp calibrate_done
.endproc
.proc calibrate_iie
: bit RDVBLBAR ; Wait for bit 7 to be off (VBL start)
bmi :-
: bit RDVBLBAR ; Wait for bit 7 to be on (VBL end)
bpl :-
; Wait and count during a full cycle
ldx #$00
sec
jsr count_until_vbl_bit
clc
jsr count_until_vbl_bit
jmp calibrate_done
.endproc
.proc calibrate_iigs
; Backup speed and slow down
jsr _get_iigs_speed
pha
lda #SPEED_SLOW
jsr _set_iigs_speed
; The same as IIe, but reverted, because... something?
: bit RDVBLBAR ; Wait for bit 7 to be on (VBL start)
bpl :-
: bit RDVBLBAR ; Wait for bit 7 to be off (VBL end)
bmi :-
; Wait and count during a full cycle
ldx #$00
clc
jsr count_until_vbl_bit
sec
jsr count_until_vbl_bit
jsr calibrate_done
; Restore user speed
pla
jmp _set_iigs_speed
.endproc
.proc calibrate_done
; Consider X +/- 3 to be valid,
; anything else is unknown.
lda #TV::NTSC
cpx #NTSC_LOOP_COUNT-3
bcc unexpected
cpx #NTSC_LOOP_COUNT+3
bcc matched
lda #TV::PAL
cpx #PAL_LOOP_COUNT-3
bcc unexpected
cpx #PAL_LOOP_COUNT+3
bcs unexpected
matched:
sta tv
unexpected:
rts
.endproc
.code
; The only thing remaining from that code after init
.proc _get_tv
lda tv
ldx #>$0000
rts
.endproc
.segment "INIT"
tv: .byte TV::OTHER

3
libsrc/atari/read.s
View File

@@ -147,6 +147,7 @@ icbll_copy:
sta dataptr+1
lda ICBLL,x
sta copylen
beq copied ; length = 0 if EOF
pha ; remember for return value
ldy #0
ldx index
@@ -159,7 +160,7 @@ copy: lda linebuf,x
bne copy
pla ; length
pha ; save length to return at okdone
copied: pha ; save length to return at okdone
clc
adc index

54
libsrc/common/lz4.s
View File

@@ -6,6 +6,60 @@
; Almost 7 times faster, uses no RAM (vs 14 bytes BSS), and takes 1/4 the space
; vs the official C source.
;
;
; C implementation was:
; void decompress_lz4 (unsigned char *in, unsigned char *out, const int outlen) {
; unsigned char token, tmp;
; unsigned int offset;
; unsigned char *end = out+outlen;
; unsigned char *copysrc;
;
; while (out < end) {
; token = *in++;
; offset = token >> 4;
;
; token &= 0x0f;
; token += 4; // Minmatch
;
; if (offset == 15) {
; moreliterals:
; tmp = *in++;
; offset += tmp;
; if (tmp == 255)
; goto moreliterals;
; }
;
; if (offset) {
; memcpy(out, in, offset);
; out += offset;
; in += offset;
; }
;
; if (out >= end) {
; return;
; }
;
; offset = (*in);
; in++;
; offset += (*in)<<8;
; in++;
;
; copysrc = out - offset;
; offset = token;
;
; if (token == 19) {
; morematches:
; tmp = *in++;
; offset += tmp;
; if (tmp == 255)
; goto morematches;
; }
;
; memcpy(out, copysrc, offset);
; out += offset;
; }
; }
.importzp sp, sreg, regsave, regbank
.importzp tmp1, tmp2, tmp3, tmp4, ptr1, ptr2, ptr3, ptr4

7
libsrc/cx16/videomode.s
View File

@@ -9,6 +9,13 @@
; #define VIDEOMODE_40x15 0x04
; #define VIDEOMODE_20x30 0x05
; #define VIDEOMODE_20x15 0x06
; #define VIDEOMODE_22x23 0x07
; #define VIDEOMODE_64x50 0x08
; #define VIDEOMODE_64x25 0x09
; #define VIDEOMODE_32x50 0x0A
; #define VIDEOMODE_32x25 0x0B
; #define VIDEOMODE_80COL VIDEOMODE_80x60
; #define VIDEOMODE_40COL VIDEOMODE_40x30
; #define VIDEOMODE_320x240 0x80
; #define VIDEOMODE_SWAP (-1)
;