Merge branch 'master' into c_sp
This commit is contained in:
@@ -9,8 +9,7 @@
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.import callirq_y, initlib, donelib
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.import callmain, zerobss
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.import __INTERRUPTOR_COUNT__
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.import __MAIN_START__, __MAIN_SIZE__ ; Linker generated
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.import __STACKSIZE__ ; Linker generated
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.import __HIMEM__ ; Linker generated
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.importzp ST
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.include "zeropage.inc"
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@@ -52,19 +51,28 @@ L1: lda c_sp,x
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tsx
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stx spsave ; Save system stk ptr
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lda #<(__MAIN_START__ + __MAIN_SIZE__ + __STACKSIZE__)
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ldx #>(__MAIN_START__ + __MAIN_SIZE__ + __STACKSIZE__)
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lda #<__HIMEM__
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ldx #>__HIMEM__
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sta c_sp
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stx c_sp+1
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; Set up the IRQ vector in the banked RAM; and, switch off the ROM.
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ldx #<IRQ
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ldy #>IRQ
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lda #<IRQ
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ldx #>IRQ
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sei ; No ints, handler not yet in place
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sta ENABLE_RAM
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stx $FFFE ; Install interrupt handler
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sty $FFFF
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sta $FFFE ; Install interrupt handler
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stx $FFFF
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lda IRQVec
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ldx IRQVec+1
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sta IRQInd+1
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stx IRQInd+2
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lda #<IRQStub
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ldx #>IRQStub
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sta IRQVec
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stx IRQVec+1
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cli ; Allow interrupts
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; Clear the BSS data.
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@@ -95,6 +103,13 @@ _exit: pha ; Save the return code
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lda #0
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sta irqcount ; Disable custom IRQ handlers
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sei
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ldx IRQInd+1
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ldy IRQInd+2
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stx IRQVec
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sty IRQVec+1
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cli
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; Copy back the zero-page stuff.
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ldx #zpspace-1
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@@ -122,9 +137,13 @@ L2: lda zpsave,x
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; IRQ handler. The handler in the ROM enables the Kernal, and jumps to
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; $CE00, where the ROM code checks for a BRK or IRQ, and branches via the
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; indirect vectors at $314/$316.
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; To make our stub as fast as possible, we skip the whole part of the ROM
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; handler, and jump to the indirect vectors directly. We do also call our
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; own interrupt handlers if we have any; so, they need not use $314.
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;
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; When RAM is banked in, we skip the whole part of the ROM handler, and jump to
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; the indirect vectors directly, after calling our own interrupt handlers.
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;
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; When ROM is banked in, a stub installed in the $314 indirect vector ensures
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; that our interrupt handlers are still called (otherwise, interrupts that are
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; not serviced by the ROM handler may cause a deadlock).
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.segment "LOWCODE"
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@@ -139,15 +158,6 @@ IRQ: cld ; Just to be sure
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and #$10 ; Test for BRK bit
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bne dobreak
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; It's an IRQ; and, RAM is enabled. If we have handlers, call them. We will use
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; a flag here instead of loading __INTERRUPTOR_COUNT__ directly, since the
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; condes function is not reentrant. The irqcount flag will be set/reset from
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; the main code, to avoid races.
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ldy irqcount
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beq @L1
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jsr callirq_y ; Call the IRQ functions
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; Since the ROM handler will end with an RTI, we have to fake an IRQ return
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; on the stack, so that we get control of the CPU after the ROM handler,
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; and can switch back to RAM.
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@@ -161,7 +171,7 @@ IRQ: cld ; Just to be sure
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pha ; Push faked X register
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pha ; Push faked Y register
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sta ENABLE_ROM ; Switch to ROM
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jmp (IRQVec) ; Jump indirect to Kernal IRQ handler
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jmp (IRQVec) ; Jump indirect to IRQ stub
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irq_ret:
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sta ENABLE_RAM ; Switch back to RAM
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@@ -183,6 +193,22 @@ nohandler:
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sta ENABLE_ROM
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jmp (BRKVec) ; Jump indirect to the break vector
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; IRQ stub installed at $314, called by our handler above if RAM is banked in,
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; or the Kernal IRQ handler if ROM is banked in.
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; If we have handlers, call them. We will use a flag here instead of loading
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; __INTERRUPTOR_COUNT__ directly, since the condes function is not reentrant.
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; The irqcount flag will be set/reset from the main code, to avoid races.
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IRQStub:
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cld ; Just to be sure
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sta ENABLE_RAM
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ldy irqcount
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beq @L1
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jsr callirq_y ; Call the IRQ functions
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@L1: sta ENABLE_ROM
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jmp (IRQInd+1) ; Jump to the saved IRQ vector
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; ------------------------------------------------------------------------
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; Data
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