Merge pull request #348 from SvOlli/release
ca65: added .P4510 and .IFP4510 pseudo commands
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@@ -12,6 +12,7 @@
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; - carry clear and 0 in A for a NMOS 6502 CPU
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; - carry set and 1 in A for some CMOS 6502 CPU
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; - carry set and 2 in A for a 65816
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; - carry set and 3 in A for a 4510
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;
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; This function uses a $1A opcode which is a INA on the 816 and ignored
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; (interpreted as a NOP) on a NMOS 6502. There are several CMOS versions
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@@ -22,16 +23,24 @@
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_getcpu:
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lda #0
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inc a ; .byte $1A
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inc a ; .byte $1A ; nop on nmos, inc on every cmos
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cmp #1
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bcc @L9
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; This is at least a 65C02, check for a 65816
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; This is at least a 65C02, check for a 4510
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.byte $42,$ea ; neg on 4510, nop #$ea on 65c02, wdm $ea on 65816
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cmp #1
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bne @L8
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; check for 65816; after 4510, because $eb there is row (rotate word)
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xba ; .byte $eb, put $01 in B accu
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dec a ; .byte $3a, A=$00 if 65C02
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xba ; .byte $eb, get $01 back if 65816
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inc a ; .byte $1a, make $01/$02
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.byte $2c ; bit instruction to skip next command
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@L8: lda #3 ; CPU_4510 constant
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@L9: ldx #0 ; Load high byte of word
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rts
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