Removed (pretty inconsistently used) tab chars from source code base.
This commit is contained in:
@@ -21,9 +21,9 @@
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; Register 25 ($19) is said to require different value for VDC v1, but I
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; couldn't find what it should be.
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.include "zeropage.inc"
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.include "zeropage.inc"
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.include "tgi-kernel.inc"
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.include "tgi-kernel.inc"
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.include "tgi-error.inc"
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@@ -32,19 +32,19 @@
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; ------------------------------------------------------------------------
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; Constants
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VDC_ADDR_REG = $D600 ; VDC address
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VDC_DATA_REG = $D601 ; VDC data
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VDC_ADDR_REG = $D600 ; VDC address
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VDC_DATA_REG = $D601 ; VDC data
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VDC_DSP_HI = 12 ; registers used
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VDC_DSP_LO = 13
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VDC_DATA_HI = 18
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VDC_DATA_LO = 19
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VDC_VSCROLL = 24
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VDC_HSCROLL = 25
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VDC_COLORS = 26
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VDC_CSET = 28
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VDC_COUNT = 30
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VDC_DATA = 31
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VDC_DSP_HI = 12 ; registers used
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VDC_DSP_LO = 13
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VDC_DATA_HI = 18
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VDC_DATA_LO = 19
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VDC_VSCROLL = 24
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VDC_HSCROLL = 25
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VDC_COLORS = 26
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VDC_CSET = 28
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VDC_COUNT = 30
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VDC_DATA = 31
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; ------------------------------------------------------------------------
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; Header. Includes jump table and constants.
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@@ -59,7 +59,7 @@ VDC_DATA = 31
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xres: .word 640 ; X resolution
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yres: .word 480 ; Y resolution
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.byte 2 ; Number of drawing colors
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pages: .byte 0 ; Number of screens available
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pages: .byte 0 ; Number of screens available
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.byte 8 ; System font X size
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.byte 8 ; System font Y size
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.word $0100 ; Aspect ratio (based on 4/3 display)
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@@ -72,7 +72,7 @@ pages: .byte 0 ; Number of screens available
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.addr UNINSTALL
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.addr INIT
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.addr DONE
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.addr GETERROR
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.addr GETERROR
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.addr CONTROL
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.addr CLEAR
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.addr SETVIEWPAGE
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@@ -100,21 +100,21 @@ Y1 = ptr2
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X2 = ptr3
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Y2 = ptr4
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ADDR = tmp1
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TEMP = tmp3
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TEMP2 = tmp4 ; HORLINE
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TEMP3 = sreg ; HORLINE
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ADDR = tmp1
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TEMP = tmp3
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TEMP2 = tmp4 ; HORLINE
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TEMP3 = sreg ; HORLINE
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; Absolute variables used in the code
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.bss
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ERROR: .res 1 ; Error code
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ERROR: .res 1 ; Error code
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PALETTE: .res 2 ; The current palette
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BITMASK: .res 1 ; $00 = clear, $FF = set pixels
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OLDCOLOR: .res 1 ; colors before entering gfx mode
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OLDCOLOR: .res 1 ; colors before entering gfx mode
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; Text output stuff
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TEXTMAGX: .res 1
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@@ -130,33 +130,33 @@ PALETTESIZE = * - DEFPALETTE
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BITTAB: .byte $80,$40,$20,$10,$08,$04,$02,$01
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BITMASKL: .byte %11111111, %01111111, %00111111, %00011111
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.byte %00001111, %00000111, %00000011, %00000001
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BITMASKL: .byte %11111111, %01111111, %00111111, %00011111
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.byte %00001111, %00000111, %00000011, %00000001
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BITMASKR: .byte %10000000, %11000000, %11100000, %11110000
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.byte %11111000, %11111100, %11111110, %11111111
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BITMASKR: .byte %10000000, %11000000, %11100000, %11110000
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.byte %11111000, %11111100, %11111110, %11111111
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; color translation table (indexed by VIC color)
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COLTRANS: .byte $00, $0f, $08, $06, $0a, $04, $02, $0c
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.byte $0d, $0b, $09, $01, $0e, $05, $03, $07
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; colors BROWN and GRAY3 are wrong
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COLTRANS: .byte $00, $0f, $08, $06, $0a, $04, $02, $0c
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.byte $0d, $0b, $09, $01, $0e, $05, $03, $07
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; colors BROWN and GRAY3 are wrong
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; VDC initialization table (reg),(val),...,$ff
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InitVDCTab:
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.byte VDC_DSP_HI, 0 ; viewpage 0 as default
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.byte VDC_DSP_LO, 0
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.byte VDC_HSCROLL, $87
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.byte 2, $66
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.byte 4, $4c
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.byte 5, $06
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.byte 6, $4c
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.byte 7, $47
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.byte 8, $03
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.byte 9, $06
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.byte 27, $00
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.byte $ff
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.byte VDC_DSP_HI, 0 ; viewpage 0 as default
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.byte VDC_DSP_LO, 0
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.byte VDC_HSCROLL, $87
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.byte 2, $66
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.byte 4, $4c
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.byte 5, $06
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.byte 6, $4c
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.byte 7, $47
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.byte 8, $03
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.byte 9, $06
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.byte 27, $00
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.byte $ff
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SCN80CLR: .byte 27,88,147,27,88,0
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SCN80CLR: .byte 27,88,147,27,88,0
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.code
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@@ -169,76 +169,76 @@ SCN80CLR: .byte 27,88,147,27,88,0
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;
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INSTALL:
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; check for VDC version and update register $19 value
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; check for VDC version and update register $19 value
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; check for VDC ram size and update number of available screens
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; check for VDC ram size and update number of available screens
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ldx #VDC_CSET ; determine size of RAM...
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jsr VDCReadReg
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sta tmp1
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ora #%00010000
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jsr VDCWriteReg ; turn on 64k
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ldx #VDC_CSET ; determine size of RAM...
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jsr VDCReadReg
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sta tmp1
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ora #%00010000
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jsr VDCWriteReg ; turn on 64k
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jsr settestadr1 ; save original value of test byte
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jsr VDCReadByte
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sta tmp2
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jsr settestadr1 ; save original value of test byte
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jsr VDCReadByte
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sta tmp2
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lda #$55 ; write $55 here
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ldy #ptr1
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jsr test64k ; read it here and there
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lda #$aa ; write $aa here
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ldy #ptr2
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jsr test64k ; read it here and there
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lda #$55 ; write $55 here
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ldy #ptr1
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jsr test64k ; read it here and there
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lda #$aa ; write $aa here
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ldy #ptr2
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jsr test64k ; read it here and there
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jsr settestadr1
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lda tmp2
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jsr VDCWriteByte ; restore original value of test byte
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jsr settestadr1
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lda tmp2
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jsr VDCWriteByte ; restore original value of test byte
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lda ptr1 ; do bytes match?
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cmp ptr1+1
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bne @have64k
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lda ptr2
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cmp ptr2+1
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bne @have64k
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lda ptr1 ; do bytes match?
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cmp ptr1+1
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bne @have64k
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lda ptr2
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cmp ptr2+1
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bne @have64k
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ldx #VDC_CSET
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lda tmp1
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jsr VDCWriteReg ; restore 16/64k flag
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jmp @endok ; and leave default values for 16k
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ldx #VDC_CSET
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lda tmp1
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jsr VDCWriteReg ; restore 16/64k flag
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jmp @endok ; and leave default values for 16k
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@have64k:
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lda #1
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sta pages
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lda #1
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sta pages
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@endok:
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rts
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test64k:
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sta tmp1
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sty ptr3
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lda #0
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sta ptr3+1
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jsr settestadr1
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lda tmp1
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jsr VDCWriteByte ; write $55
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jsr settestadr1
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jsr VDCReadByte ; read here
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pha
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jsr settestadr2
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jsr VDCReadByte ; and there
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ldy #1
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sta (ptr3),y
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pla
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dey
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sta (ptr3),y
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rts
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sta tmp1
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sty ptr3
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lda #0
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sta ptr3+1
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jsr settestadr1
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lda tmp1
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jsr VDCWriteByte ; write $55
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jsr settestadr1
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jsr VDCReadByte ; read here
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pha
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jsr settestadr2
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jsr VDCReadByte ; and there
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ldy #1
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sta (ptr3),y
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pla
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dey
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sta (ptr3),y
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rts
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settestadr1:
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ldy #$02 ; test page 2 (here)
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.byte $2c
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ldy #$02 ; test page 2 (here)
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.byte $2c
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settestadr2:
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ldy #$42 ; or page 64+2 (there)
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lda #0
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jmp VDCSetSourceAddr
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ldy #$42 ; or page 64+2 (there)
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lda #0
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jmp VDCSetSourceAddr
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; ------------------------------------------------------------------------
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; UNINSTALL routine. Is called before the driver is removed from memory. May
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@@ -266,10 +266,10 @@ UNINSTALL:
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;
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INIT:
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lda pages ; is there enough memory?
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bne @L1 ; Jump if there is one screen
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lda #TGI_ERR_INV_MODE ; Error
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bne @L9
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lda pages ; is there enough memory?
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bne @L1 ; Jump if there is one screen
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lda #TGI_ERR_INV_MODE ; Error
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bne @L9
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; Initialize variables
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@@ -277,20 +277,20 @@ INIT:
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stx BITMASK
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; Remeber current color value
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ldx #VDC_COLORS
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jsr VDCReadReg
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sta OLDCOLOR
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ldx #VDC_COLORS
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jsr VDCReadReg
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sta OLDCOLOR
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; Switch into graphics mode (set view page 0)
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ldy #0
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@L2: ldx InitVDCTab,y
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bmi @L3
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iny
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lda InitVDCTab,y
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jsr VDCWriteReg
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iny
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bne @L2
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ldy #0
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@L2: ldx InitVDCTab,y
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bmi @L3
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iny
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lda InitVDCTab,y
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jsr VDCWriteReg
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iny
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bne @L2
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@L3:
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; Done, reset the error code
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@@ -308,35 +308,35 @@ INIT:
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;
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DONE:
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; This part is C128-mode specific
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jsr $e179 ; reload character set and setup VDC
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jsr $ff62
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lda $d7 ; in 80-columns?
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bne @L01
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@L0: lda SCN80CLR,y
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beq @L1
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jsr $ffd2 ; print \xe,clr,\xe
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iny
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bne @L0
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@L01: lda #147
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jsr $ffd2 ; print clr
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@L1: lda #0 ; restore view page
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ldx #VDC_DSP_HI
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jsr VDCWriteReg
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lda OLDCOLOR
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ldx #VDC_COLORS
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jsr VDCWriteReg ; restore color (background)
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lda #$47
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ldx #VDC_HSCROLL
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jmp VDCWriteReg ; switch to text screen
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; This part is C128-mode specific
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jsr $e179 ; reload character set and setup VDC
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jsr $ff62
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lda $d7 ; in 80-columns?
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bne @L01
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@L0: lda SCN80CLR,y
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beq @L1
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jsr $ffd2 ; print \xe,clr,\xe
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iny
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bne @L0
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@L01: lda #147
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jsr $ffd2 ; print clr
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@L1: lda #0 ; restore view page
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ldx #VDC_DSP_HI
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jsr VDCWriteReg
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lda OLDCOLOR
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ldx #VDC_COLORS
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jsr VDCWriteReg ; restore color (background)
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lda #$47
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ldx #VDC_HSCROLL
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jmp VDCWriteReg ; switch to text screen
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; ------------------------------------------------------------------------
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; GETERROR: Return the error code in A and clear it.
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GETERROR:
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ldx #TGI_ERR_OK
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lda ERROR
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stx ERROR
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ldx #TGI_ERR_OK
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lda ERROR
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stx ERROR
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rts
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; ------------------------------------------------------------------------
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@@ -346,8 +346,8 @@ GETERROR:
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;
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CONTROL:
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lda #TGI_ERR_INV_FUNC
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sta ERROR
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lda #TGI_ERR_INV_FUNC
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sta ERROR
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rts
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; ------------------------------------------------------------------------
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@@ -357,21 +357,21 @@ CONTROL:
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;
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CLEAR:
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lda #0
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tay
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jsr VDCSetSourceAddr
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lda #0
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ldx #VDC_VSCROLL
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jsr VDCWriteReg ; set fill mode
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lda #0
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jsr VDCWriteByte ; put 1rst byte (fill value)
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ldy #159 ; 159 times
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lda #0 ; 256 bytes
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ldx #VDC_COUNT
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@L1: jsr VDCWriteReg
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dey
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bne @L1
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rts
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lda #0
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tay
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jsr VDCSetSourceAddr
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lda #0
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ldx #VDC_VSCROLL
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jsr VDCWriteReg ; set fill mode
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lda #0
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jsr VDCWriteByte ; put 1rst byte (fill value)
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ldy #159 ; 159 times
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lda #0 ; 256 bytes
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ldx #VDC_COUNT
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@L1: jsr VDCWriteReg
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dey
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bne @L1
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rts
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; ------------------------------------------------------------------------
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; SETVIEWPAGE: Set the visible page. Called with the new page in A (0..n).
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@@ -381,7 +381,7 @@ CLEAR:
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;
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SETVIEWPAGE:
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rts
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rts
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; ------------------------------------------------------------------------
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; SETDRAWPAGE: Set the drawable page. Called with the new page in A (0..n).
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@@ -391,7 +391,7 @@ SETVIEWPAGE:
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;
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SETDRAWPAGE:
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rts
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rts
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; ------------------------------------------------------------------------
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; SETCOLOR: Set the drawing color (in A). The new color is already checked
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@@ -426,16 +426,16 @@ SETPALETTE:
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; Get the color entries from the palette
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ldy PALETTE+1 ; Foreground color
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lda COLTRANS,y
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lda COLTRANS,y
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asl a
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asl a
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asl a
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asl a
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ldy PALETTE ; Background color
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ora COLTRANS,y
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ora COLTRANS,y
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ldx #VDC_COLORS
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jsr VDCWriteReg
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ldx #VDC_COLORS
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jsr VDCWriteReg
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lda #TGI_ERR_OK ; Clear error code
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sta ERROR
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rts
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@@ -478,23 +478,23 @@ GETDEFPALETTE:
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SETPIXEL:
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jsr CALC ; Calculate coordinates
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stx TEMP
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lda ADDR
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ldy ADDR+1
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jsr VDCSetSourceAddr
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jsr VDCReadByte
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ldx TEMP
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stx TEMP
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lda ADDR
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ldy ADDR+1
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jsr VDCSetSourceAddr
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jsr VDCReadByte
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ldx TEMP
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sta TEMP
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sta TEMP
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eor BITMASK
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and BITTAB,X
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eor TEMP
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pha
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lda ADDR
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ldy ADDR+1
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jsr VDCSetSourceAddr
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pla
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jsr VDCWriteByte
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eor TEMP
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pha
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lda ADDR
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ldy ADDR+1
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jsr VDCSetSourceAddr
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pla
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jsr VDCWriteByte
|
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@L9: rts
|
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|
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@@ -507,12 +507,12 @@ SETPIXEL:
|
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GETPIXEL:
|
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jsr CALC ; Calculate coordinates
|
||||
|
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stx TEMP ; preserve X
|
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lda ADDR
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ldy ADDR+1
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jsr VDCSetSourceAddr
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jsr VDCReadByte
|
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ldx TEMP
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stx TEMP ; preserve X
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lda ADDR
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ldy ADDR+1
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jsr VDCSetSourceAddr
|
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jsr VDCReadByte
|
||||
ldx TEMP
|
||||
|
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ldy #$00
|
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and BITTAB,X
|
||||
@@ -540,127 +540,127 @@ GETPIXEL:
|
||||
;
|
||||
|
||||
BAR:
|
||||
inc Y2
|
||||
bne HORLINE
|
||||
inc Y2+1
|
||||
inc Y2
|
||||
bne HORLINE
|
||||
inc Y2+1
|
||||
|
||||
; Original code for a horizontal line
|
||||
|
||||
HORLINE:
|
||||
lda X1
|
||||
pha
|
||||
lda X1+1
|
||||
pha
|
||||
jsr CALC ; get data for LEFT
|
||||
lda BITMASKL,x ; remember left address and bitmask
|
||||
pha
|
||||
lda ADDR
|
||||
pha
|
||||
lda ADDR+1
|
||||
pha
|
||||
lda X1
|
||||
pha
|
||||
lda X1+1
|
||||
pha
|
||||
jsr CALC ; get data for LEFT
|
||||
lda BITMASKL,x ; remember left address and bitmask
|
||||
pha
|
||||
lda ADDR
|
||||
pha
|
||||
lda ADDR+1
|
||||
pha
|
||||
|
||||
lda X2
|
||||
sta X1
|
||||
lda X2+1
|
||||
sta X1+1
|
||||
jsr CALC ; get data for RIGHT
|
||||
lda BITMASKR,x
|
||||
sta TEMP3
|
||||
lda X2
|
||||
sta X1
|
||||
lda X2+1
|
||||
sta X1+1
|
||||
jsr CALC ; get data for RIGHT
|
||||
lda BITMASKR,x
|
||||
sta TEMP3
|
||||
|
||||
pla ; recall data for LEFT
|
||||
sta X1+1
|
||||
pla
|
||||
sta X1 ; put left address into X1
|
||||
pla
|
||||
pla ; recall data for LEFT
|
||||
sta X1+1
|
||||
pla
|
||||
sta X1 ; put left address into X1
|
||||
pla
|
||||
|
||||
cmp #%11111111 ; if left bit <> 0
|
||||
beq @L1
|
||||
sta TEMP2 ; do left byte only...
|
||||
lda X1
|
||||
ldy X1+1
|
||||
jsr VDCSetSourceAddr
|
||||
jsr VDCReadByte
|
||||
sta TEMP
|
||||
eor BITMASK
|
||||
and TEMP2
|
||||
eor TEMP
|
||||
pha
|
||||
lda X1
|
||||
ldy X1+1
|
||||
jsr VDCSetSourceAddr
|
||||
pla
|
||||
jsr VDCWriteByte
|
||||
inc X1 ; ... and proceed
|
||||
bne @L1
|
||||
inc X1+1
|
||||
cmp #%11111111 ; if left bit <> 0
|
||||
beq @L1
|
||||
sta TEMP2 ; do left byte only...
|
||||
lda X1
|
||||
ldy X1+1
|
||||
jsr VDCSetSourceAddr
|
||||
jsr VDCReadByte
|
||||
sta TEMP
|
||||
eor BITMASK
|
||||
and TEMP2
|
||||
eor TEMP
|
||||
pha
|
||||
lda X1
|
||||
ldy X1+1
|
||||
jsr VDCSetSourceAddr
|
||||
pla
|
||||
jsr VDCWriteByte
|
||||
inc X1 ; ... and proceed
|
||||
bne @L1
|
||||
inc X1+1
|
||||
|
||||
; do right byte (if Y2=0 ++ADDR and skip)
|
||||
@L1: lda TEMP3
|
||||
cmp #%11111111 ; if right bit <> 7
|
||||
bne @L11
|
||||
inc ADDR ; right bit = 7 - the next one is the last
|
||||
bne @L10
|
||||
inc ADDR+1
|
||||
@L10: bne @L2
|
||||
; do right byte (if Y2=0 ++ADDR and skip)
|
||||
@L1: lda TEMP3
|
||||
cmp #%11111111 ; if right bit <> 7
|
||||
bne @L11
|
||||
inc ADDR ; right bit = 7 - the next one is the last
|
||||
bne @L10
|
||||
inc ADDR+1
|
||||
@L10: bne @L2
|
||||
|
||||
@L11: lda ADDR ; do right byte only...
|
||||
ldy ADDR+1
|
||||
jsr VDCSetSourceAddr
|
||||
jsr VDCReadByte
|
||||
sta TEMP
|
||||
eor BITMASK
|
||||
and TEMP3
|
||||
eor TEMP
|
||||
pha
|
||||
lda ADDR
|
||||
ldy ADDR+1
|
||||
jsr VDCSetSourceAddr
|
||||
pla
|
||||
jsr VDCWriteByte
|
||||
@L11: lda ADDR ; do right byte only...
|
||||
ldy ADDR+1
|
||||
jsr VDCSetSourceAddr
|
||||
jsr VDCReadByte
|
||||
sta TEMP
|
||||
eor BITMASK
|
||||
and TEMP3
|
||||
eor TEMP
|
||||
pha
|
||||
lda ADDR
|
||||
ldy ADDR+1
|
||||
jsr VDCSetSourceAddr
|
||||
pla
|
||||
jsr VDCWriteByte
|
||||
|
||||
@L2: ; do the fill in the middle
|
||||
lda ADDR ; calculate offset in full bytes
|
||||
sec
|
||||
sbc X1
|
||||
beq @L3 ; if equal - there are no more bytes
|
||||
sta ADDR
|
||||
@L2: ; do the fill in the middle
|
||||
lda ADDR ; calculate offset in full bytes
|
||||
sec
|
||||
sbc X1
|
||||
beq @L3 ; if equal - there are no more bytes
|
||||
sta ADDR
|
||||
|
||||
lda X1 ; setup for the left side
|
||||
ldy X1+1
|
||||
jsr VDCSetSourceAddr
|
||||
lda BITMASK ; get color
|
||||
jsr VDCWriteByte ; put 1st value
|
||||
ldx ADDR
|
||||
dex
|
||||
beq @L3 ; 1 byte already written
|
||||
lda X1 ; setup for the left side
|
||||
ldy X1+1
|
||||
jsr VDCSetSourceAddr
|
||||
lda BITMASK ; get color
|
||||
jsr VDCWriteByte ; put 1st value
|
||||
ldx ADDR
|
||||
dex
|
||||
beq @L3 ; 1 byte already written
|
||||
|
||||
stx ADDR ; if there are more bytes - fill them...
|
||||
ldx #VDC_VSCROLL
|
||||
lda #0
|
||||
jsr VDCWriteReg ; setup for fill
|
||||
ldx #VDC_COUNT
|
||||
lda ADDR
|
||||
jsr VDCWriteReg ; ... fill them NOW!
|
||||
stx ADDR ; if there are more bytes - fill them...
|
||||
ldx #VDC_VSCROLL
|
||||
lda #0
|
||||
jsr VDCWriteReg ; setup for fill
|
||||
ldx #VDC_COUNT
|
||||
lda ADDR
|
||||
jsr VDCWriteReg ; ... fill them NOW!
|
||||
|
||||
@L3: pla
|
||||
sta X1+1
|
||||
pla
|
||||
sta X1
|
||||
@L3: pla
|
||||
sta X1+1
|
||||
pla
|
||||
sta X1
|
||||
|
||||
; End of horizontal line code
|
||||
|
||||
inc Y1
|
||||
bne @L4
|
||||
inc Y1+1
|
||||
@L4: lda Y1
|
||||
cmp Y2
|
||||
bne @L5
|
||||
lda Y1+1
|
||||
cmp Y2+1
|
||||
bne @L5
|
||||
rts
|
||||
inc Y1
|
||||
bne @L4
|
||||
inc Y1+1
|
||||
@L4: lda Y1
|
||||
cmp Y2
|
||||
bne @L5
|
||||
lda Y1+1
|
||||
cmp Y2+1
|
||||
bne @L5
|
||||
rts
|
||||
|
||||
@L5: jmp HORLINE
|
||||
@L5: jmp HORLINE
|
||||
|
||||
|
||||
; ------------------------------------------------------------------------
|
||||
@@ -695,98 +695,98 @@ OUTTEXT:
|
||||
;> ADDR - address of card
|
||||
;> X - bit number (X1 & 7)
|
||||
CALC:
|
||||
lda Y1
|
||||
pha
|
||||
lda Y1+1
|
||||
pha
|
||||
lsr
|
||||
ror Y1 ; Y=Y/2
|
||||
sta Y1+1
|
||||
sta ADDR+1
|
||||
lda Y1
|
||||
asl
|
||||
rol ADDR+1
|
||||
asl
|
||||
rol ADDR+1 ; Y*4
|
||||
clc
|
||||
adc Y1
|
||||
sta ADDR
|
||||
lda Y1+1
|
||||
adc ADDR+1
|
||||
sta ADDR+1 ; Y*4+Y=Y*5
|
||||
lda ADDR
|
||||
asl
|
||||
rol ADDR+1
|
||||
asl
|
||||
rol ADDR+1
|
||||
asl
|
||||
rol ADDR+1
|
||||
asl
|
||||
rol ADDR+1
|
||||
sta ADDR ; Y*5*16=Y*80
|
||||
lda X1+1
|
||||
sta TEMP
|
||||
lda X1
|
||||
lsr TEMP
|
||||
ror
|
||||
lsr TEMP
|
||||
ror
|
||||
lsr TEMP
|
||||
ror
|
||||
clc
|
||||
adc ADDR
|
||||
sta ADDR
|
||||
lda ADDR+1 ; ADDR = Y*80+x/8
|
||||
adc TEMP
|
||||
sta ADDR+1
|
||||
pla
|
||||
sta Y1+1
|
||||
pla
|
||||
sta Y1
|
||||
and #1
|
||||
beq @even ; even line - no offset
|
||||
lda ADDR
|
||||
clc
|
||||
adc #<21360
|
||||
sta ADDR
|
||||
lda ADDR+1
|
||||
adc #>21360
|
||||
sta ADDR+1 ; odd lines are 21360 bytes farther
|
||||
@even: lda X1
|
||||
and #7
|
||||
tax
|
||||
rts
|
||||
lda Y1
|
||||
pha
|
||||
lda Y1+1
|
||||
pha
|
||||
lsr
|
||||
ror Y1 ; Y=Y/2
|
||||
sta Y1+1
|
||||
sta ADDR+1
|
||||
lda Y1
|
||||
asl
|
||||
rol ADDR+1
|
||||
asl
|
||||
rol ADDR+1 ; Y*4
|
||||
clc
|
||||
adc Y1
|
||||
sta ADDR
|
||||
lda Y1+1
|
||||
adc ADDR+1
|
||||
sta ADDR+1 ; Y*4+Y=Y*5
|
||||
lda ADDR
|
||||
asl
|
||||
rol ADDR+1
|
||||
asl
|
||||
rol ADDR+1
|
||||
asl
|
||||
rol ADDR+1
|
||||
asl
|
||||
rol ADDR+1
|
||||
sta ADDR ; Y*5*16=Y*80
|
||||
lda X1+1
|
||||
sta TEMP
|
||||
lda X1
|
||||
lsr TEMP
|
||||
ror
|
||||
lsr TEMP
|
||||
ror
|
||||
lsr TEMP
|
||||
ror
|
||||
clc
|
||||
adc ADDR
|
||||
sta ADDR
|
||||
lda ADDR+1 ; ADDR = Y*80+x/8
|
||||
adc TEMP
|
||||
sta ADDR+1
|
||||
pla
|
||||
sta Y1+1
|
||||
pla
|
||||
sta Y1
|
||||
and #1
|
||||
beq @even ; even line - no offset
|
||||
lda ADDR
|
||||
clc
|
||||
adc #<21360
|
||||
sta ADDR
|
||||
lda ADDR+1
|
||||
adc #>21360
|
||||
sta ADDR+1 ; odd lines are 21360 bytes farther
|
||||
@even: lda X1
|
||||
and #7
|
||||
tax
|
||||
rts
|
||||
|
||||
;-------------
|
||||
; VDC helpers
|
||||
|
||||
VDCSetSourceAddr:
|
||||
pha
|
||||
tya
|
||||
ldx #VDC_DATA_HI
|
||||
jsr VDCWriteReg
|
||||
pla
|
||||
ldx #VDC_DATA_LO
|
||||
bne VDCWriteReg
|
||||
pha
|
||||
tya
|
||||
ldx #VDC_DATA_HI
|
||||
jsr VDCWriteReg
|
||||
pla
|
||||
ldx #VDC_DATA_LO
|
||||
bne VDCWriteReg
|
||||
|
||||
VDCReadByte:
|
||||
ldx #VDC_DATA
|
||||
ldx #VDC_DATA
|
||||
VDCReadReg:
|
||||
stx VDC_ADDR_REG
|
||||
@L0: bit VDC_ADDR_REG
|
||||
bpl @L0
|
||||
lda VDC_DATA_REG
|
||||
rts
|
||||
stx VDC_ADDR_REG
|
||||
@L0: bit VDC_ADDR_REG
|
||||
bpl @L0
|
||||
lda VDC_DATA_REG
|
||||
rts
|
||||
|
||||
VDCWriteByte:
|
||||
ldx #VDC_DATA
|
||||
ldx #VDC_DATA
|
||||
VDCWriteReg:
|
||||
stx VDC_ADDR_REG
|
||||
@L0: bit VDC_ADDR_REG
|
||||
bpl @L0
|
||||
sta VDC_DATA_REG
|
||||
rts
|
||||
stx VDC_ADDR_REG
|
||||
@L0: bit VDC_ADDR_REG
|
||||
bpl @L0
|
||||
sta VDC_DATA_REG
|
||||
rts
|
||||
|
||||
; ------------------------------------------------------------------------
|
||||
|
||||
.include "../../tgi/tgidrv_line.inc"
|
||||
.include "../../tgi/tgidrv_line.inc"
|
||||
|
||||
Reference in New Issue
Block a user