Removed (pretty inconsistently used) tab chars from source code base.
This commit is contained in:
@@ -8,7 +8,7 @@
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; 16.02.96 leaner (thanks to Harry)
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; 12.03.96 test for busy after write and erase (well, Harry ;)) )
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; 22.08.97 ported to ra65 for use with cc65
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; 02.12.97 added xref for the new ra65
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; 02.12.97 added xref for the new ra65
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; 2010 93c66 support B. Spruck
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; 2010 93c86 support B. Spruck
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; 2011 modified to suit cc65 environment Karri Kaksonen
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@@ -28,12 +28,12 @@
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;(32) AUDIN ----+---| DO |- GND
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; ----------
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.export _lynx_eeread_93c86
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.export _lynx_eewrite_93c86
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.import popax
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.importzp ptr1
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.export _lynx_eeread_93c86
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.export _lynx_eewrite_93c86
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.import popax
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.importzp ptr1
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.include "lynx.inc"
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.include "lynx.inc"
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; -------------------
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; EEPROM command list
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@@ -49,188 +49,188 @@ EE_C_EWDS2 = $00
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; Only lower byte in A is used for address
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; unsigned int __fastcall__ lynx_eeread_93c86(unsigned int addr);
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_lynx_eeread_93c86:
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pha
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txa
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ora #EE_C_READ
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tax
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pla
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jsr EE_Send13Bit
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jsr EE_Read16Bit
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lda ptr1
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ldx ptr1+1
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rts
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pha
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txa
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ora #EE_C_READ
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tax
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pla
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jsr EE_Send13Bit
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jsr EE_Read16Bit
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lda ptr1
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ldx ptr1+1
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rts
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;***************
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; reads EEPROM-word to ptr1
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; A,Y destroyed
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EE_Read16Bit:
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lda #$a
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sta IODIR ; set AUDIN to Input
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clc
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stz ptr1
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stz ptr1+1
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ldy #15
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lda #$a
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sta IODIR ; set AUDIN to Input
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clc
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stz ptr1
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stz ptr1+1
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ldy #15
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EEloop1:
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; CLK = 1
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stz RCART0
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stz RCART0
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stz RCART0
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stz RCART0
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; CLK = 0
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stz RCART0
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stz RCART0
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stz RCART0
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stz RCART0
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lda IODAT
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and #$10 ; mask bit
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adc #$f0 ; C=1 if A=$10
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rol ptr1
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rol ptr1+1 ; shifts 0 to Carry
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dey
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bpl EEloop1
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lda IODAT
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and #$10 ; mask bit
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adc #$f0 ; C=1 if A=$10
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rol ptr1
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rol ptr1+1 ; shifts 0 to Carry
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dey
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bpl EEloop1
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ldx #$1a
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stx IODIR ; set AUDIN for output
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ldx #$1a
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stx IODIR ; set AUDIN for output
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;EE_SET_CS_LOW
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ldx #3
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stx SYSCTL1
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dex
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stx SYSCTL1
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ldx #3
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stx SYSCTL1
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dex
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stx SYSCTL1
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rts
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rts
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;***************
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; write word to EEPROM
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; void __fastcall__ lynx_eewrite_93c86(unsigned int addr, unsigned int val);
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_lynx_eewrite_93c86:
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sta ptr1
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stx ptr1+1
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ldx #EE_C_EWEN
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lda #EE_C_EWEN2
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jsr EE_Send13Bit
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jsr popax
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pha
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txa
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ora #EE_C_WRITE
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tax
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pla
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jsr EE_Send13Bit
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jsr EE_Send16Bit ; Sends ptr1 that contains val
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sta ptr1
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stx ptr1+1
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ldx #EE_C_EWEN
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lda #EE_C_EWEN2
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jsr EE_Send13Bit
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jsr popax
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pha
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txa
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ora #EE_C_WRITE
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tax
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pla
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jsr EE_Send13Bit
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jsr EE_Send16Bit ; Sends ptr1 that contains val
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EE_wait:
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; EE_SET_CS_HIGH
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ldx #63
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ldx #63
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EEloop:
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stz RCART0
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stz RCART0
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dex
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bpl EEloop
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stz RCART0
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stz RCART0
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dex
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bpl EEloop
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lda #$0A
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sta IODIR ; AUDIN to input
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lda #$10
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lda #$0A
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sta IODIR ; AUDIN to input
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lda #$10
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EE_wait1:
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bit IODAT ; 'til ready :D0-read is /D0-written
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beq EE_wait1
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lda #$1a ; AUDIN to output
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sta IODIR
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ldx #EE_C_EWDS
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lda #EE_C_EWDS2
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; bra EE_Send13Bit ; fall into
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bit IODAT ; 'til ready :D0-read is /D0-written
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beq EE_wait1
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lda #$1a ; AUDIN to output
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sta IODIR
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ldx #EE_C_EWDS
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lda #EE_C_EWDS2
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; bra EE_Send13Bit ; fall into
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;***************
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; send A via I2C
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; A,Y destroyed
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EE_Send13Bit:
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; EE_SET_CS_LOW
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ldy #3
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sty SYSCTL1
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dey
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sty SYSCTL1
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ldy #3
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sty SYSCTL1
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dey
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sty SYSCTL1
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; EE_SET_CS_HIGH
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ldy #63
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ldy #63
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EEloop2:
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stz RCART0
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stz RCART0
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dey
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bpl EEloop2
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stz RCART0
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stz RCART0
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dey
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bpl EEloop2
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pha
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txa ;; Ok erstmal x abarbeiten und A sichern
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ldy #4 ; 5 times
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pha
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txa ;; Ok erstmal x abarbeiten und A sichern
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ldy #4 ; 5 times
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EEloop3:
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tax
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and #$10
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ora #$b
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sta IODAT
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tax
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and #$10
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ora #$b
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sta IODAT
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; CLK = 1
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stz RCART0
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stz RCART0
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stz RCART0
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stz RCART0
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; CLK = 0
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stz RCART0
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stz RCART0
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txa
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rol A
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dey
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bpl EEloop3
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stz RCART0
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stz RCART0
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txa
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rol A
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dey
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bpl EEloop3
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ldy #7 ; 8 times
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pla ;; jetzt kommt a an die reihe
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ldy #7 ; 8 times
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pla ;; jetzt kommt a an die reihe
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ror A
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ror A
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ror A ; bit 7 at pos. 4
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ror A
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ror A
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ror A ; bit 7 at pos. 4
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EEloop4:
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tax
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and #$10
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tax
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and #$10
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ora #$b
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sta IODAT
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ora #$b
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sta IODAT
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; CLK = 1
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stz RCART0
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stz RCART0
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stz RCART0
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stz RCART0
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; CLK = 0
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stz RCART0
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stz RCART0
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txa
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rol A
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dey
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bpl EEloop4
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rts
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stz RCART0
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stz RCART0
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txa
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rol A
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dey
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bpl EEloop4
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rts
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;***************
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; send ptr1 to EEPROM
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EE_Send16Bit:
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lda ptr1+1
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lda ptr1+1
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ror A
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ror ptr1
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ror A
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ror ptr1
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ror A
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ror ptr1
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ror A
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ror ptr1
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ror A
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ror ptr1
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ror A
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ror ptr1
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ldy #15
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ldy #15
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EEloop5:
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tax
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and #$10
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ora #$b
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sta IODAT
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tax
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and #$10
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ora #$b
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sta IODAT
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; CLK = 1
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stz RCART0
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stz RCART0
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stz RCART0
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stz RCART0
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; CLK = 0
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stz RCART0
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stz RCART0
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txa
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rol ptr1
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rol A
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dey
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bpl EEloop5
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stz RCART0
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stz RCART0
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txa
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rol ptr1
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rol A
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dey
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bpl EEloop5
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; EE_SET_CS_LOW
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ldx #3
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stx SYSCTL1
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dex
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stx SYSCTL1
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rts
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ldx #3
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stx SYSCTL1
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dex
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stx SYSCTL1
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rts
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