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added support for LAX#imm, all done

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This commit is contained in:
mrdudz
2014-11-20 00:18:12 +01:00
parent 044aee7f8d
commit 8cc71f135c
8 changed files with 81 additions and 62 deletions
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10
src/ca65/instr.c
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@@ -257,7 +257,7 @@ static const struct {
{ "JMP", 0x0000808, 0x4c, 6, PutJMP }, { "JMP", 0x0000808, 0x4c, 6, PutJMP },
{ "JSR", 0x0000008, 0x20, 7, PutAll }, { "JSR", 0x0000008, 0x20, 7, PutAll },
{ "LAS", 0x0000200, 0xBB, 0, PutAll }, /* X */ { "LAS", 0x0000200, 0xBB, 0, PutAll }, /* X */
{ "LAX", 0x000A30C, 0xA3, 1, PutAll }, /* X */ { "LAX", 0x080A30C, 0xA3, 11, PutAll }, /* X */
{ "LDA", 0x080A26C, 0xa0, 0, PutAll }, { "LDA", 0x080A26C, 0xa0, 0, PutAll },
{ "LDX", 0x080030C, 0xa2, 1, PutAll }, { "LDX", 0x080030C, 0xa2, 1, PutAll },
{ "LDY", 0x080006C, 0xa0, 1, PutAll }, { "LDY", 0x080006C, 0xa0, 1, PutAll },
@@ -790,7 +790,7 @@ const InsTable* InsTab = (const InsTable*) &InsTab6502;
/* Table to build the effective 65xx opcode from a base opcode and an /* Table to build the effective 65xx opcode from a base opcode and an
** addressing mode. (The value in the table is ORed with the base opcode) ** addressing mode. (The value in the table is ORed with the base opcode)
*/ */
static unsigned char EATab[11][AM65I_COUNT] = { static unsigned char EATab[12][AM65I_COUNT] = {
{ /* Table 0 */ { /* Table 0 */
0x00, 0x00, 0x05, 0x0D, 0x0F, 0x15, 0x1D, 0x1F, 0x00, 0x00, 0x05, 0x0D, 0x0F, 0x15, 0x1D, 0x1F,
0x00, 0x19, 0x12, 0x00, 0x07, 0x11, 0x17, 0x01, 0x00, 0x19, 0x12, 0x00, 0x07, 0x11, 0x17, 0x01,
@@ -857,6 +857,12 @@ static unsigned char EATab[11][AM65I_COUNT] = {
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80,
0x00, 0x00, 0x00 0x00, 0x00, 0x00
}, },
{ /* Table 11 (LAX) */
0x08, 0x08, 0x04, 0x0C, 0x00, 0x14, 0x1C, 0x00,
0x14, 0x1C, 0x00, 0x80, 0x00, 0x10, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x08,
0x00, 0x00, 0x80
},
}; };
/* Table to build the effective SWEET16 opcode from a base opcode and an /* Table to build the effective SWEET16 opcode from a base opcode and an

2
testcode/assembler/.gitignore vendored
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@@ -1,4 +1,6 @@
chkillegal.bin chkillegal.bin
chklegal.bin chklegal.bin
chkall.bin
legal.o legal.o
illegal.o illegal.o
all.o

14
testcode/assembler/Makefile
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@@ -1,19 +1,25 @@
all: chklegal.bin chkillegal.bin all: chklegal.bin chkillegal.bin chkall.bin
@# @#
.PHONY: chklegal.bin chkillegal.bin .PHONY: chklegal.bin chkillegal.bin chkall.bin
chklegal.bin: legal.s chklegal.bin: legal.s
../../bin/cl65 --target none --cpu 6502X -o chklegal.bin legal.s ../../bin/cl65 --target none --cpu 6502X -o chklegal.bin legal.s
diff legal.ref chklegal.bin diff -q legal.ref chklegal.bin || hex chklegal.bin
chkillegal.bin: illegal.s chkillegal.bin: illegal.s
../../bin/cl65 --target none --cpu 6502X -o chkillegal.bin illegal.s ../../bin/cl65 --target none --cpu 6502X -o chkillegal.bin illegal.s
diff -q illegal.ref chkillegal.bin || hex chkillegal.bin
ref: legal.s chkall.bin: all.s
../../bin/cl65 --target none --cpu 6502X -o chkall.bin all.s
ref: legal.s illegal.s
../../bin/cl65 --target none --cpu 6502X -o legal.ref legal.s ../../bin/cl65 --target none --cpu 6502X -o legal.ref legal.s
../../bin/cl65 --target none --cpu 6502X -o illegal.ref illegal.s
clean: clean:
rm -f legal.o chklegal.bin rm -f legal.o chklegal.bin
rm -f illegal.o chkillegal.bin rm -f illegal.o chkillegal.bin
rm -f all.o chkall.bin

93
testcode/assembler/all.s
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@@ -1,10 +1,13 @@
.setcpu "6502X" .setcpu "6502X"
; all legal and illegal opcodes as they would be disassembled by da65
; note that this would not assemble into the exact same binary
brk ; 00 brk ; 00
ora ($12,x) ; 01 12 ora ($12,x) ; 01 12
jam ; 02 jam ; 02
slo ($12,x) ; 03 12 slo ($12,x) ; 03 12
noop $12 ; 04 12 nop $12 ; 04 12
ora $12 ; 05 12 ora $12 ; 05 12
asl $12 ; 06 12 asl $12 ; 06 12
slo $12 ; 07 12 slo $12 ; 07 12
@@ -12,23 +15,23 @@
ora #$12 ; 09 12 ora #$12 ; 09 12
asl a ; 0a asl a ; 0a
anc #$12 ; 0b 12 anc #$12 ; 0b 12
noop $1234 ; 0c 34 12 nop $1234 ; 0c 34 12
ora $1234 ; 0d 34 12 ora $1234 ; 0d 34 12
asl $1234 ; 0e 34 12 asl $1234 ; 0e 34 12
slo $1234 ; 0f 34 12 slo $1234 ; 0f 34 12
bpl $101c ; 10 12 bpl *+$14 ; 10 12
ora ($12),y ; 11 12 ora ($12),y ; 11 12
jam ; 12 jam ; 12
slo ($12),y ; 13 12 slo ($12),y ; 13 12
noop $12,x ; 14 12 nop $12,x ; 14 12
ora $12,x ; 15 12 ora $12,x ; 15 12
asl $12,x ; 16 12 asl $12,x ; 16 12
slo $12,x ; 17 12 slo $12,x ; 17 12
clc ; 18 clc ; 18
ora $1234,y ; 19 34 12 ora $1234,y ; 19 34 12
noop ; 1a nop ; 1a
slo $1234,y ; 1b 34 12 slo $1234,y ; 1b 34 12
noop $1234,x ; 1c 34 12 nop $1234,x ; 1c 34 12
ora $1234,x ; 1d 34 12 ora $1234,x ; 1d 34 12
asl $1234,x ; 1e 34 12 asl $1234,x ; 1e 34 12
slo $1234,x ; 1f 34 12 slo $1234,x ; 1f 34 12
@@ -48,19 +51,19 @@
and $1234 ; 2d 34 12 and $1234 ; 2d 34 12
rol $1234 ; 2e 34 12 rol $1234 ; 2e 34 12
rla $1234 ; 2f 34 12 rla $1234 ; 2f 34 12
bmi $107c ; 30 12 bmi *+$14 ; 30 12
and ($12),y ; 31 12 and ($12),y ; 31 12
jam ; 32 jam ; 32
rla ($12),y ; 33 12 rla ($12),y ; 33 12
noop $12,x ; 34 12 nop $12,x ; 34 12
and $12,x ; 35 12 and $12,x ; 35 12
rol $12,x ; 36 12 rol $12,x ; 36 12
rla $12,x ; 37 12 rla $12,x ; 37 12
sec ; 38 sec ; 38
and $1234,y ; 39 34 12 and $1234,y ; 39 34 12
noop ; 3a nop ; 3a
rla $1234,y ; 3b 34 12 rla $1234,y ; 3b 34 12
noop $1234,x ; 3c 34 12 nop $1234,x ; 3c 34 12
and $1234,x ; 3d 34 12 and $1234,x ; 3d 34 12
rol $1234,x ; 3e 34 12 rol $1234,x ; 3e 34 12
rla $1234,x ; 3f 34 12 rla $1234,x ; 3f 34 12
@@ -68,31 +71,31 @@
eor ($12,x) ; 41 12 eor ($12,x) ; 41 12
jam ; 42 jam ; 42
sre ($12,x) ; 43 12 sre ($12,x) ; 43 12
noop $12 ; 44 12 nop $12 ; 44 12
eor $12 ; 45 12 eor $12 ; 45 12
lsr $12 ; 46 12 lsr $12 ; 46 12
sre $12 ; 47 12 sre $12 ; 47 12
pha ; 48 pha ; 48
eor #$12 ; 49 12 eor #$12 ; 49 12
lsr a ; 4a lsr a ; 4a
asr #$12 ; 4b 12 alr #$12 ; 4b 12
jmp $1234 ; 4c 34 12 jmp $1234 ; 4c 34 12
eor $1234 ; 4d 34 12 eor $1234 ; 4d 34 12
lsr $1234 ; 4e 34 12 lsr $1234 ; 4e 34 12
sre $1234 ; 4f 34 12 sre $1234 ; 4f 34 12
bvc $10dc ; 50 12 bvc *+$14 ; 50 12
eor ($12),y ; 51 12 eor ($12),y ; 51 12
jam ; 52 jam ; 52
sre ($12),y ; 53 12 sre ($12),y ; 53 12
noop $12,x ; 54 12 nop $12,x ; 54 12
eor $12,x ; 55 12 eor $12,x ; 55 12
lsr $12,x ; 56 12 lsr $12,x ; 56 12
sre $12,x ; 57 12 sre $12,x ; 57 12
cli ; 58 cli ; 58
eor $1234,y ; 59 34 12 eor $1234,y ; 59 34 12
noop ; 5a nop ; 5a
sre $1234,y ; 5b 34 12 sre $1234,y ; 5b 34 12
noop $1234,x ; 5c 34 12 nop $1234,x ; 5c 34 12
eor $1234,x ; 5d 34 12 eor $1234,x ; 5d 34 12
lsr $1234,x ; 5e 34 12 lsr $1234,x ; 5e 34 12
sre $1234,x ; 5f 34 12 sre $1234,x ; 5f 34 12
@@ -100,7 +103,7 @@
adc ($12,x) ; 61 12 adc ($12,x) ; 61 12
jam ; 62 jam ; 62
rra ($12,x) ; 63 12 rra ($12,x) ; 63 12
noop $12 ; 64 12 nop $12 ; 64 12
adc $12 ; 65 12 adc $12 ; 65 12
ror $12 ; 66 12 ror $12 ; 66 12
rra $12 ; 67 12 rra $12 ; 67 12
@@ -112,39 +115,39 @@
adc $1234 ; 6d 34 12 adc $1234 ; 6d 34 12
ror $1234 ; 6e 34 12 ror $1234 ; 6e 34 12
rra $1234 ; 6f 34 12 rra $1234 ; 6f 34 12
bvs $113c ; 70 12 bvs *+$14 ; 70 12
adc ($12),y ; 71 12 adc ($12),y ; 71 12
jam ; 72 jam ; 72
rra ($12),y ; 73 12 rra ($12),y ; 73 12
noop $12,x ; 74 12 nop $12,x ; 74 12
adc $12,x ; 75 12 adc $12,x ; 75 12
ror $12,x ; 76 12 ror $12,x ; 76 12
rra $12,x ; 77 12 rra $12,x ; 77 12
sei ; 78 sei ; 78
adc $1234,y ; 79 34 12 adc $1234,y ; 79 34 12
noop ; 7a nop ; 7a
rra $1234,y ; 7b 34 12 rra $1234,y ; 7b 34 12
noop $1234,x ; 7c 34 12 nop $1234,x ; 7c 34 12
adc $1234,x ; 7d 34 12 adc $1234,x ; 7d 34 12
ror $1234,x ; 7e 34 12 ror $1234,x ; 7e 34 12
rra $1234,x ; 7f 34 12 rra $1234,x ; 7f 34 12
noop #$12 ; 80 12 nop #$12 ; 80 12
sta ($12,x) ; 81 12 sta ($12,x) ; 81 12
noop #$12 ; 82 12 nop #$12 ; 82 12
sax ($12,x) ; 83 12 sax ($12,x) ; 83 12
sty $12 ; 84 12 sty $12 ; 84 12
sta $12 ; 85 12 sta $12 ; 85 12
stx $12 ; 86 12 stx $12 ; 86 12
sax $12 ; 87 12 sax $12 ; 87 12
dey ; 88 dey ; 88
noop #$12 ; 89 12 nop #$12 ; 89 12
txa ; 8a txa ; 8a
ane #$12 ; 8b 12 ane #$12 ; 8b 12
sty $1234 ; 8c 34 12 sty $1234 ; 8c 34 12
sta $1234 ; 8d 34 12 sta $1234 ; 8d 34 12
stx $1234 ; 8e 34 12 stx $1234 ; 8e 34 12
sax $1234 ; 8f 34 12 sax $1234 ; 8f 34 12
bcc $119c ; 90 12 bcc *+$14 ; 90 12
sta ($12),y ; 91 12 sta ($12),y ; 91 12
jam ; 92 jam ; 92
sha ($12),y ; 93 12 sha ($12),y ; 93 12
@@ -171,12 +174,12 @@
tay ; a8 tay ; a8
lda #$12 ; a9 12 lda #$12 ; a9 12
tax ; aa tax ; aa
lxa #$12 ; ab 12 lax #$12 ; ab 12
ldy $1234 ; ac 34 12 ldy $1234 ; ac 34 12
lda $1234 ; ad 34 12 lda $1234 ; ad 34 12
ldx $1234 ; ae 34 12 ldx $1234 ; ae 34 12
lax $1234 ; af 34 12 lax $1234 ; af 34 12
bcs $11fc ; b0 12 bcs *+$14 ; b0 12
lda ($12),y ; b1 12 lda ($12),y ; b1 12
jam ; b2 jam ; b2
lax ($12),y ; b3 12 lax ($12),y ; b3 12
@@ -194,7 +197,7 @@
lax $1234,y ; bf 34 12 lax $1234,y ; bf 34 12
cpy #$12 ; c0 12 cpy #$12 ; c0 12
cmp ($12,x) ; c1 12 cmp ($12,x) ; c1 12
noop #$12 ; c2 12 nop #$12 ; c2 12
dcp ($12,x) ; c3 12 dcp ($12,x) ; c3 12
cpy $12 ; c4 12 cpy $12 ; c4 12
cmp $12 ; c5 12 cmp $12 ; c5 12
@@ -203,55 +206,55 @@
iny ; c8 iny ; c8
cmp #$12 ; c9 12 cmp #$12 ; c9 12
dex ; ca dex ; ca
sbx #$12 ; cb 12 axs #$12 ; cb 12
cpy $1234 ; cc 34 12 cpy $1234 ; cc 34 12
cmp $1234 ; cd 34 12 cmp $1234 ; cd 34 12
dec $1234 ; ce 34 12 dec $1234 ; ce 34 12
dcp $1234 ; cf 34 12 dcp $1234 ; cf 34 12
bne $125c ; d0 12 bne *+$14 ; d0 12
cmp ($12),y ; d1 12 cmp ($12),y ; d1 12
jam ; d2 jam ; d2
dcp ($12),y ; d3 12 dcp ($12),y ; d3 12
noop $12,x ; d4 12 nop $12,x ; d4 12
cmp $12,x ; d5 12 cmp $12,x ; d5 12
dec $12,x ; d6 12 dec $12,x ; d6 12
dcp $12,x ; d7 12 dcp $12,x ; d7 12
cld ; d8 cld ; d8
cmp $1234,y ; d9 34 12 cmp $1234,y ; d9 34 12
noop ; da nop ; da
dcp $1234,y ; db 34 12 dcp $1234,y ; db 34 12
noop $1234,x ; dc 34 12 nop $1234,x ; dc 34 12
cmp $1234,x ; dd 34 12 cmp $1234,x ; dd 34 12
dec $1234,x ; de 34 12 dec $1234,x ; de 34 12
dcp $1234,x ; df 34 12 dcp $1234,x ; df 34 12
cpx #$12 ; e0 12 cpx #$12 ; e0 12
sbc ($12,x) ; e1 12 sbc ($12,x) ; e1 12
noop #$12 ; e2 12 nop #$12 ; e2 12
isb ($12,x) ; e3 12 isc ($12,x) ; e3 12
cpx $12 ; e4 12 cpx $12 ; e4 12
sbc $12 ; e5 12 sbc $12 ; e5 12
inc $12 ; e6 12 inc $12 ; e6 12
isb $12 ; e7 12 isc $12 ; e7 12
inx ; e8 inx ; e8
sbc #$12 ; e9 12 sbc #$12 ; e9 12
nop ; ea nop ; ea
usbc #$12 ; eb 12 sbc #$12 ; eb 12
cpx $1234 ; ec 34 12 cpx $1234 ; ec 34 12
sbc $1234 ; ed 34 12 sbc $1234 ; ed 34 12
inc $1234 ; ee 34 12 inc $1234 ; ee 34 12
isb $1234 ; ef 34 12 isc $1234 ; ef 34 12
beq $12bc ; f0 12 beq *+$14 ; f0 12
sbc ($12),y ; f1 12 sbc ($12),y ; f1 12
jam ; f2 jam ; f2
isb ($12),y ; f3 12 isc ($12),y ; f3 12
noop $12,x ; f4 12 nop $12,x ; f4 12
sbc $12,x ; f5 12 sbc $12,x ; f5 12
inc $12,x ; f6 12 inc $12,x ; f6 12
isb $12,x ; f7 12 isc $12,x ; f7 12
sed ; f8 sed ; f8
sbc $1234,y ; f9 34 12 sbc $1234,y ; f9 34 12
isb $1234,y ; fb 34 12 isc $1234,y ; fb 34 12
noop $1234,x ; fc 34 12 nop $1234,x ; fc 34 12
sbc $1234,x ; fd 34 12 sbc $1234,x ; fd 34 12
inc $1234,x ; fe 34 12 inc $1234,x ; fe 34 12
isb $1234,x ; ff 34 12 isc $1234,x ; ff 34 12

1
testcode/assembler/illegal.ref Normal file
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@@ -0,0 +1 @@
444'/4?4;4#73O4_4[4GCWSo44{4gcws<12>4<12>4<12>4<12><12><12><12><12>4<12>4<12>4<12><12><12><12><12>4<12><12><12><12>4<12>4<12><12><12><12> kK<12> 44<12><02><12>4<12>4<12>4<12>4<12>4<12><12>

5
testcode/assembler/illegal.s
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@@ -1,6 +1,9 @@
.setcpu "6502X" .setcpu "6502X"
; all so called "illegal" opcodes. duplicated (functionally identical) ones
; are commented out
; first all totally stable undocs: ; first all totally stable undocs:
slo $12 ; 07 12 slo $12 ; 07 12
@@ -127,6 +130,6 @@
; the two so-called "highly unstable" ones: ; the two so-called "highly unstable" ones:
; lax #$12 ; ab 12 lax #$12 ; ab 12
ane #$12 ; 8b 12 ane #$12 ; 8b 12

BIN
testcode/assembler/legal.ref
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Binary file not shown.

18
testcode/assembler/legal.s
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@@ -25,22 +25,20 @@
asl $12,x ; 16 12 asl $12,x ; 16 12
asl a ; 0a asl a ; 0a
bcc *+$12 ; 90 12 bcc *+$14 ; 90 12
bcs *+$12 ; b0 12 bcs *+$14 ; b0 12
beq *+$12 ; f0 12 beq *+$14 ; f0 12
bmi *+$14 ; 30 12
bne *+$14 ; d0 12
bpl *+$14 ; 10 12
bvc *+$14 ; 50 12
bvs *+$14 ; 70 12
bit $12 ; 24 12 bit $12 ; 24 12
bit $1234 ; 2c 34 12 bit $1234 ; 2c 34 12
bmi *+$12 ; 30 12
bne *+$12 ; d0 12
bpl *+$12 ; 10 12
brk ; 00 brk ; 00
bvc *+$12 ; 50 12
bvs *+$12 ; 70 12
clc ; 18 clc ; 18
cld ; d8 cld ; d8
cli ; 58 cli ; 58