Comment adjustments; removed surperfluous keycodes
Cleaned up comments in Atari 8-bit headers. Internal keycodes (POKEY's KBCODE) were already #defined in atari.h, so didn't need a whole new set in _pokey.h.
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@@ -7,11 +7,11 @@
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/* The Peripheral Interface Adapter (PIA) chip provides parallel I/O */
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/* interfacing; it was used in Atari 400/800 and Commodore PET family of */
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/* computers, for joystick and interrupts. */
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/* - Sources; various + Wikpedia article on "Peripheral Interface Adapter" */
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/* Sources; various + Wikpedia article on "Peripheral Interface Adapter". */
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/* */
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/* */
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/* (C) 2000 Freddy Offenga <taf_offenga@yahoo.com> */
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/* 2019-01-14: Bill Kendrick <nbs@sonic.net>: Defines for registers */
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/* 2019-01-16: Bill Kendrick <nbs@sonic.net>: Defines for registers */
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/* */
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/* */
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/* This software is provided 'as-is', without any expressed or implied */
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@@ -48,7 +48,9 @@ struct __pia {
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};
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/* PORTA and PORTB register bits */
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/*****************************************************************************/
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/* PORTA and PORTB register bits */
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/*****************************************************************************/
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/* See also: "JOY_xxx_MASK" in "atari.h" */
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@@ -72,23 +74,23 @@ struct __pia {
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** LED control (1200XL model only) register (read/write):
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*/
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#define PORTB_OSROM 0x01
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/* If set, the built-in OS is enabled, and occupies the address range $C000-$FFFF
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** (except that the area $D000-$D7FF will only access the hardware registers.)
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** If clear, RAM is enabled in this area (again, save for the hole.)
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*/
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#define PORTB_OSROM 0x01
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#define PORTB_BASICROM 0x02
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/* If set, RAM is enabled for the address range $A000-$BFFF.
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** If clear, the built-in BASIC ROM is enabled at this address.
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** And if there is a cartridge installed in the computer, it makes no difference.
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*/
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#define PORTB_BASICROM 0x02
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#define PORTB_LED1 0x04
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#define PORTB_LED2 0x08
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/* If set, the corresponding LED is turned off. If clear, the LED will be on.
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** (1200XL only)
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*/
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#define PORTB_LED1 0x04
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#define PORTB_LED2 0x08
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/* On the XE series of computers, PORTB is a bank-selected memory control register (read/write): */
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@@ -101,49 +103,59 @@ struct __pia {
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#define PORTB_BANKSELECT3 0x08
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#define PORTB_BANKSELECT4 0x0C
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#define PORTB_BANKSWITCH_CPU 0x10
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#define PORTB_BANKSWITCH_ANTIC 0x20
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/* If set, the CPU and/or ANTIC chip will access bank-switched memory mapped to the
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** address range $4000-$7FFF.
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** If clear, the CPU and/or ANTIC will see normal memory in this region.
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*/
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#define PORTB_BANKSWITCH_CPU 0x10
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#define PORTB_BANKSWITCH_ANTIC 0x20
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#define PORTB_SELFTEST 0x80
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/* If set, RAM is enabled for the address range $5000-$57FF.
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** If clear, the self-test ROM (physically located at $D000-$D7FF, under the hardware registers)
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** is remapped to this memory area.
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*/
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#define PORTB_SELFTEST 0x80
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/* PACTL and PBCTL register bits */
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/*****************************************************************************/
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/* PACTL and PBCTL register bits */
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/*****************************************************************************/
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#define PxCTL_IRQ_ENABLE 0x01 /* (W) Peripheral A interrupt (IRQ) enable. */
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/* One equals enable. Set by the OS but available to the user; reset on powerup. */
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/* (W) Peripheral A interrupt (IRQ) enable.
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** One equals enable. Set by the OS but available to the user; reset on powerup.
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*/
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#define PxCTL_IRQ_ENABLE 0x01
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#define PxCTL_BIT1 0x02 /* "Set to zero" */
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/* "Set to zero" */
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#define PxCTL_BIT1 0x02
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#define PxCTL_ADDRESSING 0x04 /* (W) Controls PORTA addressing */
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/* One equals PORTA register; zero equals direction control register */
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/* (W) Controls PORTA addressing
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** One equals PORTA register; zero equals direction control register
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*/
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#define PxCTL_ADDRESSING 0x04
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#define PxCTL_BIT4 0x10 /* "Set to one" */
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#define PxCTL_BIT5 0x20 /* "Set to one" */
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#define PxCTL_BIT6 0x40 /* "Set to zero" */
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#define PxCTL_IRQ_STATUS 0x80 /* Peripheral interrupt (IRQ) status bit. */
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/* Set by Peripherals (PORTA / PORTB). Reset by reading PORTA / PORTB. */
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/* Peripheral interrupt (IRQ) status bit.
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** Set by Peripherals (PORTA / PORTB). Reset by reading PORTA / PORTB.
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*/
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#define PxCTL_IRQ_STATUS 0x80
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/* PACTL-specific register bit */
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#define PACTL_MOTOR_CONTROL 0x08 /* (W) Peripheral motor control line */
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/* Turn the cassette on or off; zero equals on) */
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/* (W) Peripheral motor control line
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** Turn the cassette on or off; zero equals on)
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*/
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#define PACTL_MOTOR_CONTROL 0x08
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/* PBCTL-specific register bit */
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#define PBCTL_PERIPH_CMD_IDENT 0x08 /* Peripheral command identification (serial bus command) */
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/* Peripheral command identification (serial bus command) */
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#define PBCTL_PERIPH_CMD_IDENT 0x08
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/* End of _pia.h */
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