Fixed and improved some pce comments.
This commit is contained in:
committed by
Oliver Schmidt
parent
2cc822b44e
commit
959eff34a3
@@ -13,8 +13,8 @@ CH_VLINE = 2
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VDC_MAWR = 0 ; Memory Address Write Register
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VDC_MARR = 1 ; Memory Address Read Register
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VDC_VWR = 2 ; VRAM Write Register (write only)
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VDC_VRR = 2 ; VRAM Read Register (read only)
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VDC_VWR = 2 ; VRAM Write Register
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VDC_VRR = 2 ; VRAM Read Register
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VDC_UNK03 = 3 ; (unknown)
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VDC_UNK04 = 4 ; (unknown)
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VDC_CR = 5 ; Control Register
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@@ -35,8 +35,7 @@ VDC_SATB = 19 ; Sprite Attribute Table
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; VDC port
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; Note: The zero-page addressing mode is redirected to page $20.
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; Therefore, absolute addressing mode must be used when writing to this port.
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; We force it by using mirror locations that are outside of zero page.
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; We avoid it by using mirror locations that are outside of the zero page.
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VDC_CTRL := $0200
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VDC_DATA_LO := $0202
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@@ -45,7 +44,7 @@ VDC_DATA_HI := $0203
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; HuC6260 -- Video Color Encoder (VCE)
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; The DAC has a palette of 512 colours.
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; The bitmap of the palette data is this: 0000000gggrrrbbb.
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; The bitmap of that data is 0000000gggrrrbbb (Green, Red, Blue).
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; You can read and write the DAC registers.
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VCE := $0400 ; base
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@@ -86,8 +85,8 @@ IRQ_STATUS := $1403
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CDR_MEM_DISABLE := $1803
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CDR_MEM_ENABLE := $1807
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; Write VDC register
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.macro VREG arg1,arg2
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; Write to a VDC register.
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.macro VREG arg1, arg2
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st0 #arg1
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st1 #<(arg2)
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st2 #>(arg2)
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