Merge branch 'master' into macexpand

2025-07-03 23:16:28 +02:00
parent fc6ed60029 29f7ab3809
commit 96cc66868c
582 changed files with 19953 additions and 3048 deletions
--- a/doc/Makefile
+++ b/doc/Makefile
@@ -1,3 +1,9 @@
+# ---- Display info during parsing phase ----
+SILENT:=$(findstring s,$(word 1, $(MAKEFLAGS)))
+ifneq ($(SILENT),s)
+    $(info Using Makefile: $(realpath $(firstword $(MAKEFILE_LIST))) $(MAKECMDGOALS))
+endif
+
 ifneq ($(shell echo),)
  CMD_EXE = 1
 endif
--- a/doc/agat.sgml
+++ b/doc/agat.sgml
@@ -0,0 +1,79 @@
+<!doctype linuxdoc system>
+
+<article>
+<title>Agat-7/9 - specific information for cc65
+
+<author><url url="https://sourceforge.net/u/olegodintsov/profile/" name="Oleg A. Odintsov">,<newline>
+<url url="mailto:sintechs@gmail.com" name="Konstantin Fedorov">
+
+<abstract>
+An overview over the Agat-7 and Agat-9 and theirs interfaces to the cc65 C
+compiler.
+</abstract>
+
+<!-- Table of contents -->
+<toc>
+
+<!-- Begin the document -->
+
+<sect>Overview
+
+<p>The Agat was a series of 8-bit computers produced in the Soviet Union from 1983 to 1993.
+It was based on Apple II architecture with all electronic components made in the Soviet Union except for 6502 microprocessors supplied by UMC (UM6502A).
+<p>If compared to Apple II, Agat had many improvements such as color text mode, additional graphic modes and flexible memory controller.
+Agat-7 had an Apple II compatibility card called "Module 121", while Agat-9 had a built-in Apple II+ mode activated by soft-switch.
+<p>All mass-produced Agat models were disk-based systems, 2K ROM contained only basic machine language monitor and disassembler.
+Agat-7 had 140K floppy-drive based on Apple DISK II, while Agat-9 was supplied with 840K drive having its own sector format and controller.
+
+<sect>Binary format<p>
+
+The standard binary file format generated by the linker for the Agat target is
+an AppleSingle file to be compatible with AppleCommander <url url="https://applecommander.github.io/">.
+The default load address is &dollar;1903.
+
+
+
+<sect>Platform-specific header files<p>
+
+Programs containing Agat-specific code may use the <tt/agat.h/ or
+<tt/agat.inc/ include files.
+
+<sect>Usefull info<p>
+
+<sect1>Emulation<p>
+
+<enum>
+<item>  Oleg Odintsov's Agat Emulator - <url url="https://agatemulator.sourceforge.net/english.html">
+<item>  MAME - <url url="https://www.mamedev.org/">
+</enum>
+
+<sect1>Links<p>
+<enum>
+<item>  Most informative source on Agat (in russian) - <url url="https://agatcomp.ru">
+<item>  Wikipedia - <url url="https://en.wikipedia.org/wiki/Agat_(computer)">
+<item>  Controversial article on Agat from <url name="BYTE Magazine November 1984 Vol. 9, No. 12" url="https://archive.org/details/byte-magazine-1984-11/page/n135/mode/2up?view=theater">.
+The author reviewed custom-build mockup Agat bearing little relation to even the early Agat systems.
+</enum>
+
+
+<sect>License<p>
+
+This software is provided "as-is", without any expressed or implied
+warranty.  In no event will the authors be held liable for any damages
+arising from the use of this software.
+
+Permission is granted to anyone to use this software for any purpose,
+including commercial applications, and to alter it and redistribute it
+freely, subject to the following restrictions:
+<enum>
+<item>  The origin of this software must not be misrepresented; you must not
+        claim that you wrote the original software. If you use this software
+        in a product, an acknowledgment in the product documentation would be
+        appreciated, but is not required.
+<item>  Altered source versions must be plainly marked as such, and must not
+        be misrepresented as being the original software.
+<item>  This notice may not be removed or altered from any source
+        distribution.
+</enum>
+
+</article>
--- a/doc/apple2.sgml
+++ b/doc/apple2.sgml
@@ -87,7 +87,7 @@ several useful settings:
  exit then a plain vanilla ProDOS 8 doesn't make use of the Language Card bank
  2 at all.

-  <tag>LC address: &dollar;D000, LC size: &dollar;3000</tag>
+  <tag>LC address: &dollar;D000, LC size: &dollar;2FFC</tag>
  For plain vanilla DOS 3.3 which doesn't make use of the Language Card at all.

 </descrip><p>
--- a/doc/apple2enh.sgml
+++ b/doc/apple2enh.sgml
@@ -88,7 +88,7 @@ several useful settings:
  exit then a plain vanilla ProDOS 8 doesn't make use of the Language Card bank
  2 at all.

-  <tag>LC address: &dollar;D000, LC size: &dollar;3000</tag>
+  <tag>LC address: &dollar;D000, LC size: &dollar;2FFC</tag>
  For plain vanilla DOS 3.3 which doesn't make use of the Language Card at all.

 </descrip><p>
--- a/doc/atari.sgml
+++ b/doc/atari.sgml
@@ -1121,7 +1121,7 @@ If BSS and/or the stack shouldn't stay at the end of the program,
 some parts of the cc65 runtime lib need to be replaced/modified.

 common/_heap.s defines the location of the heap and atari/crt0.s
-defines the location of the stack by initializing sp.
+defines the location of the stack by initializing c_sp.


 <sect1>Upgrading from an older cc65 version<p>
--- a/doc/ca65.sgml
+++ b/doc/ca65.sgml
@@ -155,8 +155,21 @@ Here is a description of all the command line options:

  Set the default for the CPU type. The option takes a parameter, which
  may be one of
-
-        6502, 6502X, 6502DTV, 65SC02, 65C02, 65816, sweet16, HuC6280, 4510
+  <itemize>
+  <item>6502 - NMOS 6502 (all legal instructions)
+  <item>6502X - NMOS 6502 with all undocumented instructions
+  <item>6502DTV - the emulated CPU of the C64DTV device
+  <item>65SC02 - first CMOS instruction set (no bit manipulation, no wai/stp)
+  <item>65C02 - CMOS with Rockwell extensions
+  <item>W65C02 - full CMOS instruction set (has bit manipulation and wai/stp)
+  <item>65CE02 - CMOS with CSG extensions
+  <item>4510 - the CPU of the Commodore C65
+  <item>45GS02 - the CPU of the Commodore MEGA65
+  <item>HuC6280 - the CPU of the PC engine
+  <item>M740 - a Microcontroller by Mitsubishi
+  <item>65816 - the CPU of the SNES, and the SCPU
+  <item>sweet16 - an interpreter for a pseudo 16 bit CPU
+  </itemize>


  <label id="option-create-dep">
@@ -306,7 +319,7 @@ Here is a description of all the command line options:
  character constants into the character set of the target platform. The
  default for the target system is "none", which means that no translation
  will take place. The assembler supports the same target systems as the
-  compiler, see there for a list.
+  compiler, see <htmlurl url="ca65.html#option-t" name="there for a list">.

  Depending on the target, the default CPU type is also set. This can be
  overridden by using the <tt/<ref id="option--cpu" name="--cpu">/ option.
@@ -403,7 +416,7 @@ name="--bin-include-dir">/ option on the command line.



-<sect>Input format<p>
+<sect>Input format<p><label id="input-format">

 <sect1>Assembler syntax<p>

@@ -430,22 +443,36 @@ Here are some examples for valid input lines:
 The assembler accepts

 <itemize>
-<item>all valid 6502 mnemonics when in 6502 mode (the default or after the
+<item>all valid 6502 mnemonics when in <ref id="6502-mode" name="6502 mode">
+      (the default or after the
      <tt><ref id=".P02" name=".P02"></tt> command was given).
-<item>all valid 6502 mnemonics plus a set of illegal instructions when in
-      <ref id="6502X-mode" name="6502X mode">.
-<item>all valid 6502DTV mnemonics when in 6502DTV mode (after the
+<item>all valid 6502 mnemonics, plus a set of illegal instructions, when in
+      <ref id="6502X-mode" name="6502X mode"> (after the
+      <tt><ref id=".P02X" name=".P02X"></tt> command was given).
+<item>all valid 6502DTV mnemonics when in <ref id="DTV-mode" name="DTV mode"> (after the
      <tt><ref id=".PDTV" name=".PDTV"></tt> command was given).
-<item>all valid 65SC02 mnemonics when in 65SC02 mode (after the
+<item>all valid 65SC02 mnemonics when in <ref id="65SC02-mode" name="65SC02 mode"> (after the
      <tt><ref id=".PSC02" name=".PSC02"></tt> command was given).
-<item>all valid 65C02 mnemonics when in 65C02 mode (after the
+<item>all valid 65C02 mnemonics when in <ref id="65C02-mode" name="65C02 mode"> (after the
      <tt><ref id=".PC02" name=".PC02"></tt> command was given).
-<item>all valid 65816 mnemonics when in 65816 mode (after the
-      <tt><ref id=".P816" name=".P816"></tt> command was given).
-<item>all valid 4510 mnemonics when in 4510 mode (after the
+<item>all valid W65C02 mnemonics when in <ref id="W65C02-mode" name="W65C02 mode"> (after the
+      <tt><ref id=".PWC02" name=".PWC02"></tt> command was given).
+<item>all valid 65CE02 mnemonics when in <ref id="65CE02-mode" name="65CE02 mode"> (after the
+      <tt><ref id=".PCE02" name=".PCE02"></tt> command was given).
+<item>all valid 4510 mnemonics when in <ref id="4510-mode" name="4510 mode"> (after the
      <tt><ref id=".P4510" name=".P4510"></tt> command was given).
+<item>all valid 45GS02 mnemonics when in <ref id="45GS02-mode" name="45GS02 mode"> (after the
+      <tt><ref id=".P45GS02" name=".P45GS02"></tt> command was given).
+<item>all valid HuC6280 mnemonics when in <ref id="HUC6280-mode" name="HuC6280 mode"> (after the
+      <tt><ref id=".P6280" name=".P6280"></tt> command was given).
+<item>all valid M740 mnemonics when in <ref id="M740-mode" name="M740 mode"> (after the
+      <tt><ref id=".PM740" name=".PM740"></tt> command was given).
+<item>all valid 65816 mnemonics when in <ref id="65816-mode" name="65816 mode"> (after the
+      <tt><ref id=".P816" name=".P816"></tt> command was given).
 </itemize>

+for more details on the various CPUs, see <tt><htmlurl url="cpus.html" name="here"></tt>.
+
 On 6502-derived platforms the <tt/BRK/ instruction has an optional signature
 byte. If omitted, the assembler will only produce only 1 byte.

@@ -455,8 +482,138 @@ byte. If omitted, the assembler will only produce only 1 byte.
                brk     #$34            ; 2-bytes: $00 $34
 </verb></tscreen>

+<sect2>6502 mode<label id="6502-mode"><p>

-<sect1>65816 mode<p>
+In 6502 mode (which is the default) the assembler accepts all regular "legal"
+6502 mnemonics and addressing modes.
+
+<sect2>6502X mode<label id="6502X-mode"><p>
+
+6502X mode is an extension to the normal 6502 mode. In this mode, several
+mnemonics for undocumented instructions of the NMOS 6502 CPUs are accepted.
+
+Note: Since these instructions are undocumented, there are no official mnemonics
+for them.
+
+<itemize>
+<item><tt>ALR: A:=(A and #{imm})/2;</tt>
+<item><tt>ANC: A:= A and #{imm};</tt> Generates opcode &dollar;0B.
+<item><tt>ANE: A:= (A or CONST) and X and #{imm};</tt>
+<item><tt>ARR: A:=(A and #{imm})/2;</tt>
+<item><tt>AXS: X:=A and X-#{imm};</tt>
+<item><tt>DCP: {addr}:={addr}-1; A-{addr};</tt>
+<item><tt>ISC: {addr}:={addr}+1; A:=A-{addr};</tt>
+<item><tt>JAM:</tt>
+<item><tt>LAS: A,X,S:={addr} and S;</tt>
+<item><tt>LAX: A,X:={addr};</tt>
+<item><tt>NOP: #{imm}; zp; zp,x; abs; abs,x</tt>
+<item><tt>RLA: {addr}:={addr}rol; A:=A and {addr};</tt>
+<item><tt>RRA: {addr}:={addr}ror; A:=A adc {addr};</tt>
+<item><tt>SAX: {addr}:=A and X;</tt>
+<item><tt>SHA: {addr}:=A and X and {addr hi +1};</tt>
+<item><tt>SHX: {addr}:=X and {addr hi +1};</tt>
+<item><tt>SHY: {addr}:=Y and {addr hi +1};</tt>
+<item><tt>SLO: {addr}:={addr}*2; A:=A or {addr};</tt>
+<item><tt>SRE: {addr}:={addr}/2; A:=A xor {addr};</tt>
+<item><tt>TAS: {addr}:=A and X and {addr hi +1}; SP:=A and X;</tt>
+</itemize>
+
+
+<sect2>DTV mode<label id="DTV-mode"><p>
+
+The C64DTV CPU is based on the 6510, but adds some instructions, and does not
+support all undocumented instructions.
+
+<itemize>
+<item><tt>bra {rel}</tt> Generates opcode &dollar;12.
+<item><tt>sac #{imm}</tt> Generates opcode &dollar;32.
+<item><tt>sir #{imm}</tt> Generates opcode &dollar;42.
+</itemize>
+
+Supported undocumented instructions:
+
+<itemize>
+<item><tt>ALR: A:=(A and #{imm})/2;</tt>
+<item><tt>ANC: A:=A and #{imm};</tt> Generates opcode &dollar;0B.
+<item><tt>ARR: A:=(A and #{imm})/2;</tt>
+<item><tt>AXS: X:=A and X-#{imm};</tt>
+<item><tt>LAS: A,X,S:={addr} and S;</tt>
+<item><tt>LAX: A,X:={addr};</tt>
+<item><tt>NOP: #{imm}; zp; zp,x; abs; abs,x</tt>
+<item><tt>RLA: {addr}:={addr}rol; A:=A and {addr};</tt>
+<item><tt>RRA: {addr}:={addr}ror; A:=A adc {addr};</tt>
+<item><tt>SHX: {addr}:=X and {addr hi +1};</tt>
+<item><tt>SHY: {addr}:=y and {addr hi +1};</tt>
+</itemize>
+
+
+<sect2>65SC02 mode<label id="65SC02-mode"><p>
+
+65SC02 mode supports all regular 6502 instructions, plus the original CMOS
+instructions.
+
+
+<sect2>65C02 mode (CMOS with Rockwell extensions)<label id="65C02-mode"><p>
+
+65C02 mode supports all original CMOS instructions, plus the Rockwell (bit
+manipulation instructions) extensions.
+
+
+<sect2>W65C02 mode (CMOS with WDC extensions)<label id="W65C02-mode"><p>
+
+W65C02 mode supports the Rockwell extensions, plus wai and stp.
+
+
+<sect2>65CE02 mode<label id="65CE02-mode"><p>
+
+All 65CE02 instructions are accepted, plus the Rockwell extensions.
+
+
+<sect2>4510 mode<label id="4510-mode"><p>
+
+The 4510 is a microcontroller that is the core of the Commodore C65 aka C64DX.
+It contains among other functions a slightly modified 65CE02/4502 CPU, to allow
+address mapping for 20 bits of address space (1 megabyte addressable area).
+
+As compared to the description of the CPU in the
+<url url="http://www.zimmers.net/anonftp/pub/cbm/c65/c65manualupdated.txt.gz"
+name="C65 System Specification">
+<url url="https://raw.githubusercontent.com/MEGA65/c65-specifications/master/c65manualupdated.txt"
+name="(updated version)"> uses these changes:
+<itemize>
+<item><tt>LDA (d,SP),Y</tt> may also be written as <tt>LDA (d,S),Y</tt>
+(matching the 65816 notation).
+<item>All branch instruction allow now 16 bit offsets. To use a 16 bit
+branch you have to prefix these with an "L" (e.g. "<tt>LBNE</tt>" instead of
+"<tt>BNE</tt>"). This might change at a later implementation of the assembler.
+</itemize>
+
+For more information about the Commodore C65/C64DX and the 4510 CPU, see
+<url url="http://www.zimmers.net/anonftp/pub/cbm/c65/"> and
+<url url="https://en.wikipedia.org/wiki/Commodore_65" name="Wikipedia">.
+
+<sect2>45GS02 mode<label id="45GS02-mode"><p>
+
+The 45GS02 is a microcontroller that is the core of the MEGA65.
+It is an extension of the 4510 CPU and adds 32-bit addressing and a 32-bit
+pseudo register Q that is comprised of the four registers A, X, Y, and Z.
+
+<sect2>HUC6280 mode (CMOS with Hudson extensions)<label id="HUC6280-mode"><p>
+
+The HUC6280 is a superset of 65C02, used in the PC Engine.
+
+
+<sect2>M740 mode<label id="M740-mode"><p>
+
+The M740 is a microcontroller by Mitsubishi, which was marketed for embedded
+devices in the mid 80s. It is a superset of 6502, and a subset of 65SC02, plus
+some new instructions.
+
+For more information about the M740 Controllers, see
+<url url="https://en.wikipedia.org/wiki/Mitsubishi_740" name="Wikipedia">.
+
+
+<sect2>65816 mode<label id="65816-mode"><p><p>

 In 65816 mode, several aliases are accepted, in addition to the official
 mnemonics:
@@ -483,57 +640,15 @@ or two far addresses whose high byte will be used.
                mvp     $123456, $789ABC   ; bank $12 to $78
 </verb></tscreen>

-
-<sect1>6502X mode<label id="6502X-mode"><p>
-
-6502X mode is an extension to the normal 6502 mode. In this mode, several
-mnemonics for illegal instructions of the NMOS 6502 CPUs are accepted. Since
-these instructions are illegal, there are no official mnemonics for them. The
-unofficial ones are taken from <url
-url="http://www.oxyron.de/html/opcodes02.html">. Please note that only the
-ones marked as "stable" are supported. The following table uses information
-from the mentioned web page, for more information, see there.
-
-<itemize>
-<item><tt>ALR: A:=(A and #{imm})/2;</tt>
-<item><tt>ANC: A:=A and #{imm};</tt> Generates opcode &dollar;0B.
-<item><tt>ARR: A:=(A and #{imm})/2;</tt>
-<item><tt>AXS: X:=A and X-#{imm};</tt>
-<item><tt>DCP: {adr}:={adr}-1; A-{adr};</tt>
-<item><tt>ISC: {adr}:={adr}+1; A:=A-{adr};</tt>
-<item><tt>LAS: A,X,S:={adr} and S;</tt>
-<item><tt>LAX: A,X:={adr};</tt>
-<item><tt>RLA: {adr}:={adr}rol; A:=A and {adr};</tt>
-<item><tt>RRA: {adr}:={adr}ror; A:=A adc {adr};</tt>
-<item><tt>SAX: {adr}:=A and X;</tt>
-<item><tt>SLO: {adr}:={adr}*2; A:=A or {adr};</tt>
-<item><tt>SRE: {adr}:={adr}/2; A:=A xor {adr};</tt>
-</itemize>
+also see <ref id="long_jsr_jmp_rts" name="long_jsr_jmp_rts">
+ <ref id=".SMART" name=".SMART">
+ <ref id=".A8" name=".A8">
+ <ref id=".A16" name=".A16">
+ <ref id=".I8" name=".I8">
+ <ref id=".I16" name=".I16">


-<sect1>4510 mode<p>
-
-The 4510 is a microcontroller that is the core of the Commodore C65 aka C64DX.
-It contains among other functions a slightly modified 65CE02/4502 CPU, to allow
-address mapping for 20 bits of address space (1 megabyte addressable area).
-As compared to the description of the CPU in the
-<url url="http://www.zimmers.net/anonftp/pub/cbm/c65/c65manualupdated.txt.gz"
-name="C65 System Specification">
-<url url="https://raw.githubusercontent.com/MEGA65/c65-specifications/master/c65manualupdated.txt"
-name="(updated version)"> uses these changes:
-<itemize>
-<item><tt>LDA (d,SP),Y</tt> may also be written as <tt>LDA (d,S),Y</tt>
-(matching the 65816 notataion).
-<item>All branch instruction allow now 16 bit offsets. To use a 16 bit
-branch you have to prefix these with an "L" (e.g. "<tt>LBNE</tt>" instead of
-"<tt>BNE</tt>"). This might change at a later implementation of the assembler.
-</itemize>
-For more information about the Commodore C65/C64DX and the 4510 CPU, see
-<url url="http://www.zimmers.net/anonftp/pub/cbm/c65/"> and
-<url url="https://en.wikipedia.org/wiki/Commodore_65" name="Wikipedia">.
-
-
-<sect1>sweet16 mode<label id="sweet16-mode"><p>
+<sect2>sweet16 mode<label id="sweet16-mode"><p>

 SWEET 16 is an interpreter for a pseudo 16 bit CPU written by Steve Wozniak
 for the Apple ][ machines. It is available in the Apple ][ ROM. ca65 can
@@ -1290,16 +1405,76 @@ writable.
  Reading this pseudo variable will give a constant integer value that
  tells which CPU is currently enabled. It can also tell which instruction
  set the CPU is able to translate. The value read from the pseudo variable
-  should be further examined by using one of the constants defined by the
-  "cpu" macro package (see <tt/<ref id=".MACPACK" name=".MACPACK">/).
+  should be further examined by using one of the following constants:

-  It may be used to replace the .IFPxx pseudo instructions or to construct
-  even more complex expressions.
+<tscreen><verb>
+    CPU_6502
+    CPU_65SC02
+    CPU_65C02
+    CPU_65816
+    CPU_SWEET16
+    CPU_HUC6280
+    CPU_4510
+    CPU_45GS02
+    CPU_6502DTV
+    CPU_M740
+</verb></tscreen>
+
+Above constants may be used to determine the exact type of the currently
+enabled CPU. In addition to that, for each CPU instruction set, another
+constant is defined:
+
+<tscreen><verb>
+    CPU_ISET_6502
+    CPU_ISET_65SC02
+    CPU_ISET_65C02
+    CPU_ISET_65816
+    CPU_ISET_SWEET16
+    CPU_ISET_HUC6280
+    CPU_ISET_4510
+    CPU_ISET_45GS02
+    CPU_ISET_6502DTV
+    CPU_ISET_M740
+</verb></tscreen>
+
+<!-- Sorry but explaining these with the changes from #2751 is too cringy for
+     me - must be done by someone else. The remainder is from the old
+     ".macpack cpu" section"
+
+The value read from the <tt/<ref id=".CPU" name=".CPU">/ pseudo variable may
+be checked with <tt/<ref id="operators" name=".BITAND">/ to determine if the
+currently enabled CPU supports a specific instruction set. For example the
+65C02 supports all instructions of the 65SC02 CPU, so it has the
+<tt/CPU_ISET_65SC02/ bit set in addition to its native <tt/CPU_ISET_65C02/
+bit. Using
+
+<tscreen><verb>
+        .if (.cpu .bitand CPU_ISET_65SC02)
+                lda     (c_sp)
+        .else
+                ldy     #$00
+                lda     (c_sp),y
+        .endif
+</verb></tscreen>
+
+it is possible to determine if the
+
+<tscreen><verb>
+                lda     (c_sp)
+</verb></tscreen>
+
+instruction is supported, which is the case for the 65SC02, 65C02 and 65816
+CPUs (the latter two are upwards compatible to the 65SC02).
+
+see section <ref id="6502-mode" name="6502 format"> and following.
+-->
+
+  <tt/.CPU/ may be used to replace the .IFPxx pseudo instructions or to
+  construct even more complex expressions.

  Example:

  <tscreen><verb>
-        .macpack        cpu
        .if     (.cpu .bitand CPU_ISET_65816)
                phx
                phy
@@ -1311,6 +1486,9 @@ writable.
        .endif
  </verb></tscreen>

+  See also: <tt><ref id=".CAP" name=".CAP"></tt>
+
+

 <sect1><tt>.ISIZE</tt><label id=".ISIZE"><p>

@@ -1483,6 +1661,61 @@ either a string or an expression value.



+<sect1><tt>.CAP, .CAPABILITY</tt><label id=".CAP"><p>
+
+  Builtin function. The function allows to check for capabilities of the
+  currently selected CPU or target system. It must be called with a comma
+  separated list of identifiers and returns non zero if all of the given
+  capabilities are available. Otherwise it returns zero.
+
+  Existing capabilities are:
+
+<descrip>
+
+  <tag><tt>CPU_HAS_BITIMM</tt></tag>
+  Checks for the availability of the "bit #imm" instruction.
+
+  <tag><tt>CPU_HAS_BRA8</tt></tag>
+  Checks for the availability of a short (8 bit) branch.
+
+  <tag><tt>CPU_HAS_INA</tt></tag>
+  Checks for the availability of accu inc/dec instructions.
+
+  <tag><tt>CPU_HAS_PUSHXY</tt></tag>
+  Checks for the capability to push and pop the X and Y registers.
+
+  <tag><tt>CPU_HAS_ZPIND</tt></tag>
+  Checks for the availability of the "zeropage indirect" addressing mode as it
+  is implemented in the 65SC02 CPU.
+
+  <tag><tt>CPU_HAS_STZ</tt></tag>
+  Checks for the availability of the "store zero" instruction as it is
+  implemented in the 65SC02 CPU.
+
+</descrip>
+
+  Case is ignored when checking the identifiers. The <tt/.cap/ function is
+  easier to use than checking <tt/.cpu/ and requires no intimate knowledge
+  of all instruction sets. For more detailed checking <tt/.cpu/ is still
+  available.
+
+  Example:
+
+  <tscreen><verb>
+        .if     .cap(CPU_HAS_BRA, CPU_HAS_PUSHXY)
+                phx
+                bra     L1
+        .else
+                txa
+                pha
+                jmp     L1
+        .endif
+  </verb></tscreen>
+
+  See also: <tt><ref id=".CPU" name=".CPU"></tt>
+
+
+
 <sect1><tt>.CONCAT</tt><label id=".CONCAT"><p>

  Builtin string function. The function allows to concatenate a list of string
@@ -3238,12 +3471,30 @@ See: <tt><ref id=".ASCIIZ" name=".ASCIIZ"></tt>,<tt><ref id=".CHARMAP" name=".CH
  (see <tt><ref id=".P02" name=".P02"></tt> command).


+<sect1><tt>.IFP02X</tt><label id=".IFP02X"><p>
+
+  Conditional assembly: Check if the assembler is currently in 6502X mode
+  (see <tt><ref id=".P02X" name=".P02X"></tt> command).
+
+
 <sect1><tt>.IFP4510</tt><label id=".IFP4510"><p>

  Conditional assembly: Check if the assembler is currently in 4510 mode
  (see <tt><ref id=".P4510" name=".P4510"></tt> command).


+<sect1><tt>.IFP45GS02</tt><label id=".IFP45GS02"><p>
+
+  Conditional assembly: Check if the assembler is currently in 45GS02 mode
+  (see <tt><ref id=".P45GS02" name=".P45GS02"></tt> command).
+
+
+<sect1><tt>.IFP6280</tt><label id=".IFP816"><p>
+
+  Conditional assembly: Check if the assembler is currently in HuC6280 mode
+  (see <tt><ref id=".P6280" name=".P6280"></tt> command).
+
+
 <sect1><tt>.IFP816</tt><label id=".IFP816"><p>

  Conditional assembly: Check if the assembler is currently in 65816 mode
@@ -3256,18 +3507,36 @@ See: <tt><ref id=".ASCIIZ" name=".ASCIIZ"></tt>,<tt><ref id=".CHARMAP" name=".CH
  (see <tt><ref id=".PC02" name=".PC02"></tt> command).


+<sect1><tt>.IFPCE02</tt><label id=".IFPCE02"><p>
+
+  Conditional assembly: Check if the assembler is currently in 65CE02 mode
+  (see <tt><ref id=".PCE02" name=".PCE02"></tt> command).
+
+
 <sect1><tt>.IFPDTV</tt><label id=".IFPDTV"><p>

  Conditional assembly: Check if the assembler is currently in 6502DTV mode
  (see <tt><ref id=".PDTV" name=".PDTV"></tt> command).


+<sect1><tt>.IFPM740</tt><label id=".IFPM740"><p>
+
+  Conditional assembly: Check if the assembler is currently in M740 mode
+  (see <tt><ref id=".PM740" name=".PM740"></tt> command).
+
+
 <sect1><tt>.IFPSC02</tt><label id=".IFPSC02"><p>

  Conditional assembly: Check if the assembler is currently in 65SC02 mode
  (see <tt><ref id=".PSC02" name=".PSC02"></tt> command).


+<sect1><tt>.IFPSWEET16</tt><label id=".IFPSWEET16"><p>
+
+  Conditional assembly: Check if the assembler is currently in Sweet16 mode
+  (see <tt><ref id=".PSWEET16" name=".PSWEET16"></tt> command).
+
+
 <sect1><tt>.IFREF</tt><label id=".IFREF"><p>

  Conditional assembly: Check if a symbol is referenced. Must be followed
@@ -3291,6 +3560,12 @@ See: <tt><ref id=".ASCIIZ" name=".ASCIIZ"></tt>,<tt><ref id=".CHARMAP" name=".CH
  <tt><ref id=".REFERTO" name=".REFERTO"></tt>


+<sect1><tt>.IFPWC02</tt><label id=".IFPWC02"><p>
+
+  Conditional assembly: Check if the assembler is currently in 65WC02 mode
+  (see <tt><ref id=".PWC02" name=".PWC02"></tt> command).
+
+
 <sect1><tt>.IMPORT</tt><label id=".IMPORT"><p>

  Import a symbol from another module. The command is followed by a comma
@@ -3620,6 +3895,17 @@ See: <tt><ref id=".ASCIIZ" name=".ASCIIZ"></tt>,<tt><ref id=".BYTE" name=".BYTE"
  instructions. This is the default if not overridden by the
  <tt><ref id="option--cpu" name="--cpu"></tt> command line option.

+  See: <tt><ref id=".PC02" name=".PC02"></tt>, <tt><ref id=".PSC02"
+  name=".PSC02"></tt>, <tt><ref id=".P816" name=".P816"></tt>,
+  <tt><ref id=".P4510" name=".P4510"></tt>, and
+  <tt><ref id=".P45GS02" name=".P45GS02"></tt>
+
+
+<sect1><tt>.P02X</tt><label id=".P02X"><p>
+
+  Enable the 6502X instruction set, disable 65SC02, 65C02 and 65816
+  instructions.
+
  See: <tt><ref id=".PC02" name=".PC02"></tt>, <tt><ref id=".PSC02"
  name=".PSC02"></tt>, <tt><ref id=".P816" name=".P816"></tt> and
  <tt><ref id=".P4510" name=".P4510"></tt>
@@ -3631,8 +3917,31 @@ See: <tt><ref id=".ASCIIZ" name=".ASCIIZ"></tt>,<tt><ref id=".BYTE" name=".BYTE"
  6502 instruction sets.

  See: <tt><ref id=".P02" name=".P02"></tt>, <tt><ref id=".PSC02"
-  name=".PSC02"></tt>, <tt><ref id=".PC02" name=".PC02"></tt> and
-  <tt><ref id=".P816" name=".P816"></tt>
+  name=".PSC02"></tt>, <tt><ref id=".PC02" name=".PC02"></tt>,
+  <tt><ref id=".P816" name=".P816"></tt>, and
+  <tt><ref id=".P45GS02" name=".P45GS02"></tt>
+
+
+<sect1><tt>.P45GS02</tt><label id=".P45GS02"><p>
+
+  Enable the 45GS02 instruction set. This is a superset of the 4510, 65C02, and
+  6502 instruction sets.
+
+  See: <tt><ref id=".P02" name=".P02"></tt>, <tt><ref id=".PSC02"
+  name=".PSC02"></tt>, <tt><ref id=".PC02" name=".PC02"></tt>,
+  <tt><ref id=".P816" name=".P816"></tt>, and
+  <tt><ref id=".P4510" name=".P4510"></tt>
+
+
+<sect1><tt>.P6280</tt><label id=".P6280"><p>
+
+  Enable the HuC6280 instruction set. This is a superset of the 65C02 and
+  6502 instruction sets.
+
+  See: <tt><ref id=".P02" name=".P02"></tt>, <tt><ref id=".PSC02"
+  name=".PSC02"></tt>, <tt><ref id=".PC02" name=".PC02"></tt>,
+  <tt><ref id=".P4510" name=".P4510"></tt>, and
+  <tt><ref id=".P45GS02" name=".P45GS02"></tt>


 <sect1><tt>.P816</tt><label id=".P816"><p>
@@ -3641,8 +3950,9 @@ See: <tt><ref id=".ASCIIZ" name=".ASCIIZ"></tt>,<tt><ref id=".BYTE" name=".BYTE"
  6502 instruction sets.

  See: <tt><ref id=".P02" name=".P02"></tt>, <tt><ref id=".PSC02"
-  name=".PSC02"></tt>, <tt><ref id=".PC02" name=".PC02"></tt> and
-  <tt><ref id=".P4510" name=".P4510"></tt>
+  name=".PSC02"></tt>, <tt><ref id=".PC02" name=".PC02"></tt>,
+  <tt><ref id=".P4510" name=".P4510"></tt>, and
+  <tt><ref id=".P45GS02" name=".P45GS02"></tt>


 <sect1><tt>.PAGELEN, .PAGELENGTH</tt><label id=".PAGELENGTH"><p>
@@ -3670,8 +3980,19 @@ See: <tt><ref id=".ASCIIZ" name=".ASCIIZ"></tt>,<tt><ref id=".BYTE" name=".BYTE"
  6502 and 65SC02 instructions.

  See: <tt><ref id=".P02" name=".P02"></tt>, <tt><ref id=".PSC02"
-  name=".PSC02"></tt>, <tt><ref id=".P816" name=".P816"></tt> and
-  <tt><ref id=".P4510" name=".P4510"></tt>
+  name=".PSC02"></tt>, <tt><ref id=".P816" name=".P816"></tt>,
+  <tt><ref id=".P4510" name=".P4510"></tt>, and
+  <tt><ref id=".P45GS02" name=".P45GS02"></tt>
+
+<sect1><tt>.PCE02</tt><label id=".PCE02"><p>
+
+  Enable the 65CE02 instructions set. This instruction set includes all
+  6502 and extended 65CE02 instructions.
+
+  See: <tt><ref id=".P02" name=".P02"></tt>, <tt><ref id=".PSC02"
+  name=".PSC02"></tt>, <tt><ref id=".P816" name=".P816"></tt>,
+  <tt><ref id=".P4510" name=".P4510"></tt>, and
+  <tt><ref id=".P45GS02" name=".P45GS02"></tt>


 <sect1><tt>.PDTV</tt><label id=".PDTV"><p>
@@ -3682,6 +4003,14 @@ See: <tt><ref id=".ASCIIZ" name=".ASCIIZ"></tt>,<tt><ref id=".BYTE" name=".BYTE"
  See: <tt><ref id=".P02" name=".P02"></tt>


+<sect1><tt>.PM740</tt><label id=".PM740"><p>
+
+  Enable the M740 instruction set. This is a superset of the 6502
+  instruction set.
+
+  See: <tt><ref id=".P02" name=".P02"></tt>
+
+
 <sect1><tt>.POPCHARMAP</tt><label id=".POPCHARMAP"><p>

  Pop the last character mapping from the stack, and activate it.
@@ -3767,8 +4096,19 @@ See: <tt><ref id=".ASCIIZ" name=".ASCIIZ"></tt>,<tt><ref id=".BYTE" name=".BYTE"
  6502 instructions.

  See: <tt><ref id=".P02" name=".P02"></tt>, <tt><ref id=".PC02"
-  name=".PC02"></tt>, <tt><ref id=".P816" name=".P816"></tt> and
-  <tt><ref id=".P4510" name=".P4510"></tt>
+  name=".PC02"></tt>, <tt><ref id=".P816" name=".P816"></tt>,
+  <tt><ref id=".P4510" name=".P4510"></tt>, and
+  <tt><ref id=".P45GS02" name=".P45GS02"></tt>
+
+
+<sect1><tt>.PSWEET16</tt><label id=".PSWEET16"><p>
+
+  Enable the Sweet16 instructions set.
+
+  See: <tt><ref id=".P02" name=".P02"></tt>, <tt><ref id=".PC02"
+  name=".PC02"></tt>, <tt><ref id=".P816" name=".P816"></tt>,
+  <tt><ref id=".P4510" name=".P4510"></tt>, and
+  <tt><ref id=".P45GS02" name=".P45GS02"></tt>


 <sect1><tt>.PUSHCHARMAP</tt><label id=".PUSHCHARMAP"><p>
@@ -3819,6 +4159,17 @@ See: <tt><ref id=".ASCIIZ" name=".ASCIIZ"></tt>,<tt><ref id=".BYTE" name=".BYTE"
  See: <tt><ref id=".POPSEG" name=".POPSEG"></tt>


+<sect1><tt>.PWC02</tt><label id=".PWC02"><p>
+
+  Enable the W65C02 instructions set. This instruction set includes all
+  6502, 65SC02, 65C02 and two extra instructions (wai and stp)
+
+  See: <tt><ref id=".P02" name=".P02"></tt>, <tt><ref id=".PSC02"
+  name=".PSC02"></tt>, <tt><ref id=".P816" name=".P816"></tt>,
+  <tt><ref id=".P4510" name=".P4510"></tt>, and
+  <tt><ref id=".P45GS02" name=".P45GS02"></tt>
+
+
 <sect1><tt>.REFERTO, .REFTO</tt><label id=".REFERTO"><p>

  Mark a symbol as referenced.
@@ -4016,18 +4367,23 @@ See: <tt><ref id=".ASCIIZ" name=".ASCIIZ"></tt>,<tt><ref id=".BYTE" name=".BYTE"
  Switch the CPU instruction set. The command is followed by a string that
  specifies the CPU. Possible values are those that can also be supplied to
  the <tt><ref id="option--cpu" name="--cpu"></tt> command line option,
-  namely: 6502, 6502X, 6502DTV, 65SC02, 65C02, 65816, 4510 and HuC6280.
+  namely: 6502, 6502X, 6502DTV, 65SC02, 65C02, 65816, 4510, 45GS02, HuC6280 and m740.

  See: <tt><ref id=".CPU" name=".CPU"></tt>,
       <tt><ref id=".IFP02" name=".IFP02"></tt>,
+       <tt><ref id=".IFP02X" name=".IFP02X"></tt>,
       <tt><ref id=".IFPDTV" name=".IFPDTV"></tt>,
       <tt><ref id=".IFP816" name=".IFP816"></tt>,
       <tt><ref id=".IFPC02" name=".IFPC02"></tt>,
+       <tt><ref id=".IFPM740" name=".IFPM740"></tt>,
       <tt><ref id=".IFPSC02" name=".IFPSC02"></tt>,
       <tt><ref id=".P02" name=".P02"></tt>,
+       <tt><ref id=".P02X" name=".P02X"></tt>,
       <tt><ref id=".P816" name=".P816"></tt>,
       <tt><ref id=".P4510" name=".P4510"></tt>,
+       <tt><ref id=".P45GS02" name=".P45GS02"></tt>,
       <tt><ref id=".PC02" name=".PC02"></tt>,
+       <tt><ref id=".PM740" name=".PM740"></tt>,
       <tt><ref id=".PSC02" name=".PSC02"></tt>


@@ -4751,64 +5107,6 @@ This macro package defines a macro named <tt/scrcode/. It takes a string
 as argument and places this string into memory translated into screen codes.


-<sect1><tt>.MACPACK cpu</tt><p>
-
-This macro package does not define any macros but constants used to examine
-the value read from the <tt/<ref id=".CPU" name=".CPU">/ pseudo variable. For
-each supported CPU a constant similar to
-
-<tscreen><verb>
-    CPU_6502
-    CPU_65SC02
-    CPU_65C02
-    CPU_65816
-    CPU_SWEET16
-    CPU_HUC6280
-    CPU_4510
-    CPU_6502DTV
-</verb></tscreen>
-
-is defined. These constants may be used to determine the exact type of the
-currently enabled CPU. In addition to that, for each CPU instruction set,
-another constant is defined:
-
-<tscreen><verb>
-    CPU_ISET_6502
-    CPU_ISET_65SC02
-    CPU_ISET_65C02
-    CPU_ISET_65816
-    CPU_ISET_SWEET16
-    CPU_ISET_HUC6280
-    CPU_ISET_4510
-    CPU_ISET_6502DTV
-</verb></tscreen>
-
-The value read from the <tt/<ref id=".CPU" name=".CPU">/ pseudo variable may
-be checked with <tt/<ref id="operators" name=".BITAND">/ to determine if the
-currently enabled CPU supports a specific instruction set. For example the
-65C02 supports all instructions of the 65SC02 CPU, so it has the
-<tt/CPU_ISET_65SC02/ bit set in addition to its native <tt/CPU_ISET_65C02/
-bit. Using
-
-<tscreen><verb>
-        .if (.cpu .bitand CPU_ISET_65SC02)
-                lda     (sp)
-        .else
-                ldy     #$00
-                lda     (sp),y
-        .endif
-</verb></tscreen>
-
-it is possible to determine if the
-
-<tscreen><verb>
-                lda     (sp)
-</verb></tscreen>
-
-instruction is supported, which is the case for the 65SC02, 65C02 and 65816
-CPUs (the latter two are upwards compatible to the 65SC02).
-
-
 <sect1><tt>.MACPACK module</tt><p>

 This macro package defines a macro named <tt/module_header/. It takes an
--- a/doc/cc65-intern.sgml
+++ b/doc/cc65-intern.sgml
@@ -131,7 +131,7 @@ All other parameters will be pushed to the C-stack from left to right.
 The rightmost parameter will have the lowest address on the stack,
 and multi-byte parameters will have their least significant byte at the lower address.

-The <tt/sp/ pseudo-register is a zeropage pointer to the base of the C-stack.
+The <tt/c_sp/ pseudo-register is a zeropage pointer to the base of the C-stack.
 If the function is variadic, the <tt/Y/ register will contain the number of
 bytes pushed to the stack for this function.

@@ -153,10 +153,10 @@ void cdecl foo(unsigned bar, unsigned char baz);
 ; Example code for accessing bar. The variable is in A/X after this code snippet:
 ;
    ldy     #2      ; Offset of high byte of bar
-    lda     (sp),y  ; High byte now in A
+    lda     (c_sp),y  ; High byte now in A
    tax             ; High byte now in X
    dey             ; Offset of low byte of bar
-    lda     (sp),y  ; Low byte now in A
+    lda     (c_sp),y  ; Low byte now in A
 </verb></tscreen>

 <sect1>Epilogue, after the function call<p>
@@ -175,12 +175,12 @@ used if the return type is 32-bit.
 If the function has a void return type, the compiler will not depend on the result
 of <tt>A/X/sreg</tt>, so these may be clobbered by the function.

-The C-stack pointer <tt/sp/ must be restored by the function to its value before the
+The C-stack pointer <tt/c_sp/ must be restored by the function to its value before the
 function call prologue. It may pop all of its parameters from the C-stack
 (e.g. using the <tt/runtime/ function <tt/popa/),
-or it could adjust <tt/sp/ directly.
+or it could adjust <tt/c_sp/ directly.
 If the function is variadic, the <tt/Y/ register contains the number of bytes
-pushed to the stack on entry, which may be added to <tt/sp/ to restore its
+pushed to the stack on entry, which may be added to <tt/c_sp/ to restore its
 original state.

 The internal pseudo-register <tt/regbank/ must not be changed by the function.
--- a/doc/cc65.sgml
+++ b/doc/cc65.sgml
@@ -63,6 +63,8 @@ Short options:
  -V                            Print the compiler version number
  -W [-+]warning[,...]          Control warnings ('-' disables, '+' enables)
  -d                            Debug mode
+  -dM                           Output all user macros (needs -E)
+  -dP                           Output all predefined macros (needs -E)
  -g                            Add debug info to object file
  -h                            Help (this text)
  -j                            Default characters are signed
@@ -199,6 +201,28 @@ Here is a description of all the command line options:
  Enables debug mode, for debugging the behavior of cc65.


+
+  <label id="option-dM">
+  <tag><tt>-dM</tt></tag>
+
+  When used with -E, will output <tt>#define</tt> directives for all the user
+  macros defined during execution of the preprocessor. This does not include
+  macros defined by the compiler.
+
+  Note: Can be combined with <tt/<ref id="option-dP" name="-dP">/ by using
+  <tt/-dMP/.
+
+
+  <label id="option-dP">
+  <tag><tt>-dP</tt></tag>
+
+  When used with -E, will output <tt>#define</tt> directives for all the macros
+  defined by the compiler itself. This does not include any user defined macros.
+
+  Note: Can be combined with <tt/<ref id="option-dM" name="-dM">/ by using
+  <tt/-dMP/.
+
+
  <tag><tt>--debug-tables name</tt></tag>

  Writes symbol table information to a file, which includes details on structs, unions
@@ -586,27 +610,42 @@ Here is a description of all the command line options:

  <itemize>
  <item>none
+  <item>agat (a russian apple2 like computer)
  <item>apple2
  <item>apple2enh
  <item>atari
+  <item>atari2600
+  <item>atari5200
+  <item>atari7800
  <item>atarixl
  <item>atmos
+  <item>bbc
  <item>c16 (works also for the c116 with memory up to 32K)
  <item>c64
+  <item>c65
  <item>c128
  <item>cbm510 (CBM-II series with 40 column video)
  <item>cbm610 (all CBM-II II computers with 80 column video)
+  <item>creativision
+  <item>cx16
+  <item>gamate
  <item>geos-apple
  <item>geos-cbm
+  <item>geos (alias for geos-cbm)
+  <item>kim1
  <item>lunix
  <item>lynx
+  <item>mega65
  <item>nes
  <item>osic1p
+  <item>pce (PC engine)
  <item>pet (all CBM PET systems except the 2001)
  <item>plus4
+  <item>p6502
  <item>sim6502
  <item>sim65c02
  <item>supervision
+  <item>sym1
  <item>telestrat
  <item>vic20
  </itemize>
@@ -1173,6 +1212,14 @@ The compiler defines several macros at startup:
  given, but can be changed using the <tt/<ref id="option--cpu" name="--cpu">/
  command line option.

+  <tag><tt>__CPU_4510__</tt></tag>
+
+  This macro is defined if the code is compiled for a 4510 CPU.
+
+  <tag><tt>__CPU_45GS02__</tt></tag>
+
+  This macro is defined if the code is compiled for a 45GS02 CPU.
+
  <tag><tt>__CPU_6502__</tt></tag>

  This macro is defined if the code is compiled for a 6502 CPU.
@@ -1194,6 +1241,10 @@ The compiler defines several macros at startup:

  This macro is defined if the code is compiled for a 65C02 CPU.

+  <tag><tt>__CPU_65CE02__</tt></tag>
+
+  This macro is defined if the code is compiled for a 65CE02 CPU.
+
  <tag><tt>__CPU_65816__</tt></tag>

  This macro is defined if the code is compiled for a 65816 CPU.
@@ -1202,6 +1253,14 @@ The compiler defines several macros at startup:

  This macro is defined if the code is compiled for a HUC6280 CPU.

+  <tag><tt>__CPU_M740__</tt></tag>
+
+  This macro is defined if the code is compiled for a M740 CPU.
+
+  <tag><tt>__CPU_W65C02__</tt></tag>
+
+  This macro is defined if the code is compiled for a W65C02 CPU.
+
  <tag><tt>__CPU_ISET_6502__</tt></tag>

  This macro expands to a numeric constant that can be used to check the
@@ -1232,6 +1291,12 @@ The compiler defines several macros at startup:
  <tt/<ref id="macro-CPU" name="__CPU__">/ macro for the instruction set
  of the 65C02 CPU.

+  <tag><tt>__CPU_ISET_65CE02__</tt></tag>
+
+  This macro expands to a numeric constant that can be used to check the
+  <tt/<ref id="macro-CPU" name="__CPU__">/ macro for the instruction set
+  of the 65CE02 CPU.
+
  <tag><tt>__CPU_ISET_65816__</tt></tag>

  This macro expands to a numeric constant that can be used to check the
@@ -1244,6 +1309,18 @@ The compiler defines several macros at startup:
  <tt/<ref id="macro-CPU" name="__CPU__">/ macro for the instruction set
  of the HUC6280 CPU.

+  <tag><tt>__CPU_ISET_M740__</tt></tag>
+
+  This macro expands to a numeric constant that can be used to check the
+  <tt/<ref id="macro-CPU" name="__CPU__">/ macro for the instruction set
+  of the M740 CPU.
+
+  <tag><tt>__CPU_ISET_W65C02__</tt></tag>
+
+  This macro expands to a numeric constant that can be used to check the
+  <tt/<ref id="macro-CPU" name="__CPU__">/ macro for the instruction set
+  of the W65C02 CPU.
+
  <tag><tt>__CX16__</tt></tag>

  This macro is defined if the target is the Commander X16 (-t cx16).
--- a/doc/cpus.sgml
+++ b/doc/cpus.sgml
--- a/doc/customizing.sgml
+++ b/doc/customizing.sgml
@@ -193,9 +193,9 @@ _init:    LDX     #$FF                 ; Initialize stack pointer to $01FF
 ; Set cc65 argument stack pointer

          LDA     #&lt;(__RAM_START__ + __RAM_SIZE__)
-          STA     sp
+          STA     c_sp
          LDA     #&gt;(__RAM_START__ + __RAM_SIZE__)
-          STA     sp+1
+          STA     c_sp+1

 ; ---------------------------------------------------------------------------
 ; Initialize memory storage
--- a/doc/da65.sgml
+++ b/doc/da65.sgml
@@ -46,14 +46,16 @@ The assembler accepts the following options:
 ---------------------------------------------------------------------------
 Usage: da65 [options] [inputfile]
 Short options:
+  -d                    Debug mode
  -g                    Add debug info to object file
  -h                    Help (this text)
  -i name               Specify an info file
+  -m                    Run multiple passes to resolve labels
  -o name               Name the output file
  -v                    Increase verbosity
  -F                    Add formfeeds to the output
-  -s                    Accept line markers in the info file
  -S addr               Set the start/load address
+  -s                    Accept line markers in the info file
  -V                    Print the disassembler version

 Long options:
@@ -61,6 +63,7 @@ Long options:
  --comment-column n    Specify comment start column
  --comments n          Set the comment level for the output
  --cpu type            Set cpu type
+  --debug               Debug mode
  --debug-info          Add debug info to object file
  --formfeeds           Add formfeeds to the output
  --help                Help (this text)
@@ -68,6 +71,7 @@ Long options:
  --info name           Specify an info file
  --label-break n       Add newline if label exceeds length n
  --mnemonic-column n   Specify mnemonic start column
+  --multi-pass          Run multiple passes to resolve labels
  --pagelength n        Set the page length for the listing
  --start-addr addr     Set the start/load address
  --sync-lines          Accept line markers in the info file
@@ -110,19 +114,23 @@ Here is a description of all the command line options:

  Set the CPU type. The option takes a parameter, which may be one of
  <itemize>
-  <item>6502
-  <item>6502x
-  <item>6502dtv
-  <item>65sc02
-  <item>65c02
-  <item>65816
-  <item>huc6280
-  <item>4510
+  <item>6502 - NMOS 6502 (all legal instructions)
+  <item>6502X - NMOS 6502 with all undocumented instructions
+  <item>6502DTV - the emulated CPU of the C64DTV device
+  <item>65SC02 - first CMOS instruction set (no bit manipulation, no wai/stp)
+  <item>65C02 - full CMOS instruction set (has bit manipulation and wai/stp)
+  <item>65816 - the CPU of the SNES, and the SCPU
+  <item>HuC6280 - the CPU of the PC engine
+  <item>4510 - the CPU of the Commodore C65
+  <item>45GS02 - the CPU of the Commodore MEGA65
+  <item>M740 - a Microcontroller by Mitsubishi
  </itemize>

-  6502x is for the NMOS 6502 with unofficial opcodes. 6502dtv is for the
-  emulated CPU of the C64DTV device. huc6280 is the CPU of the PC engine.
-  4510 is the CPU of the Commodore C65. 65816 is the CPU of the SNES.
+
+  <tag><tt>-d, --debug</tt></tag>
+
+  Enables debug mode, something that should not be needed for mere
+  mortals:-)


  <label id="option--formfeeds">
@@ -181,6 +189,15 @@ Here is a description of all the command line options:
  <tt><ref id="LABELBREAK" name="LABELBREAK"></tt>.


+  <tag><tt>-m, --multi-pass</tt></tag>
+
+  This option causes the disassembler to run multiple passes over the input
+  binary to find and create all necessary labels. Without this option the
+  disassembler may detect the necessity for a label in the final pass, when
+  output was already partially generated. It will output numerical addresses
+  or program counter relative expressions in this case.
+
+
  <label id="option--mnemonic-column">
  <tag><tt>--mnemonic-column n</tt></tag>

@@ -246,23 +263,85 @@ Here is a description of all the command line options:

 <sect1>Supported CPUs<p>

+With the command line option <tt><ref id="option--cpu" name="--cpu"></tt>, the
+disassembler may be told which CPU to support:
+
+  <itemize>
+  <item>6502 - NMOS 6502 (all legal instructions)
+  <item>6502X - NMOS 6502 with all undocumented instructions
+  <item>6502DTV - the emulated CPU of the C64DTV device
+  <item>65SC02 - first CMOS instruction set (no bit manipulation, no wai/stp)
+  <item>65C02 - CMOS with Rockwell extensions
+  <item>W65C02 - full CMOS instruction set (has bit manipulation and wai/stp)
+  <item>65CE02 - CMOS with CSG extensions
+  <item>4510 - the CPU of the Commodore C65
+  <item>45GS02 - the CPU of the Commodore MEGA65
+  <item>HuC6280 - the CPU of the PC engine
+  <item>M740 - a Microcontroller by Mitsubishi
+  <item>65816 - the CPU of the SNES, and the SCPU
+  </itemize>
+
+for more details on the various CPUs, see <tt><htmlurl url="cpus.html" name="here"></tt>.
+
+
+<sect2>6502 mode<label id="6502-mode"><p>
+
 The default (no CPU given on the command line or in the <tt/GLOBAL/ section of
 the info file) is the 6502 CPU. The disassembler knows all "official" opcodes
 for this CPU. Invalid opcodes are translated into <tt/.byte/ commands.

-With the command line option <tt><ref id="option--cpu" name="--cpu"></tt>, the
-disassembler may be told to recognize either the 65SC02 or 65C02 CPUs. The
-latter understands the same opcodes as the former, plus 16 additional bit
-manipulation and bit test-and-branch commands. Using 6502x as CPU the illegal
-opcodes of 6502 CPU are detected and displayed. 6502dtv setting recognizes the
-emulated CPU instructions of the C64DTV device.
+<sect2>6502X mode<label id="6502X-mode"><p>

+Using 6502X as CPU the illegal opcodes of 6502 CPU are detected and displayed.
+
+
+<sect2>DTV mode<label id="DTV-mode"><p>
+
+6502DTV setting recognizes the emulated CPU instructions of the C64DTV device.
+
+
+<sect2>65SC02 mode<label id="65SC02-mode"><p>
+
+The first CMOS instruction set, without bit manipulation or wai/stp.
+
+
+<sect2>65C02 mode<label id="65C02-mode"><p>
+
+The 65C02 understands the same opcodes as the 65SC02, plus 16 additional bit
+manipulation and bit test-and-branch commands.
+
+<sect2>W65C02 mode<label id="W65C02-mode"><p>
+
+This mode also supports wai/stp.
+
+<sect2>65CE02 mode<label id="65CE02-mode"><p>
+
+
+<sect2>4510 mode<label id="4510-mode"><p>

 When disassembling 4510 code, due to handling of 16-bit wide branches, da65
 can produce output that can not be re-assembled, when one or more of those
 branches point outside of the disassembled memory. This can happen when text
 or binary data is processed.

+
+<sect2>45GS02 mode<label id="45GS02-mode"><p>
+
+All compound instructions are supported.
+
+
+<sect2>HUC6280 mode<label id="HUC6280-mode"><p>
+
+All special opcodes are supported.
+
+
+<sect2>M740 mode<label id="M740-mode"><p>
+
+All special opcodes are supported.
+
+
+<sect2>65816 mode<label id="65816-mode"><p><p>
+
 The 65816 support requires annotating ranges with the M and X flag states.
 This can be recorded with an emulator that supports Code and Data Logging,
 for example. Disassemble one bank at a time.
--- a/doc/funcref.sgml
+++ b/doc/funcref.sgml
@@ -289,6 +289,7 @@ function.
 <item><ref id="cclear" name="cclear">
 <item><ref id="cclearxy" name="cclearxy">
 <item><ref id="cgetc" name="cgetc">
+<item><ref id="cgets" name="cgets">
 <item><ref id="chline" name="chline">
 <item><ref id="chlinexy" name="chlinexy">
 <item><ref id="clrscr" name="clrscr">
@@ -301,6 +302,7 @@ function.
 <item><ref id="cputcxy" name="cputcxy">
 <item><ref id="cputs" name="cputs">
 <item><ref id="cputsxy" name="cputsxy">
+<item><ref id="cscanf" name="cscanf">
 <item><ref id="cursor" name="cursor">
 <item><ref id="cvline" name="cvline">
 <item><ref id="cvlinexy" name="cvlinexy">
@@ -2715,6 +2717,45 @@ see anything that you type.  (See the description of <tt/cbm_k_scnkey()/.)
 </quote>


+<sect1>cgets<label id="cgets"><p>
+
+<quote>
+<descrip>
+<tag/Function/Input a string directly from the console.
+<tag/Header/<tt/<ref id="conio.h" name="conio.h">/
+<tag/Declaration/<tt/char* __fastcall__ cgets (const char* buffer, int size);/
+<tag/Description/The function inputs a string of at most <tt/size - 1/
+characters from the console into <tt/buffer/. It returns when <tt/size - 1/
+characters or either <tt/CR/ or <tt/LF/ are entered. It also handles both
+multi-line input and backspacing.
+<tag/Notes/<itemize>
+<item>The function echoes <tt/CRLF/ when either <tt/CR/ or <tt/LF/ are read
+but does NOT append either in <tt/buffer/.
+<item>The function is only available as fastcall function, so it may only
+be used in the presence of a prototype.
+</itemize>
+<tag/Availability/cc65
+<tag/See also/
+<ref id="cgetc" name="cgetc">,
+<ref id="cscanf" name="cscanf">
+<tag/Example/<verb>
+#include &lt;conio.h&gt;
+
+int main (void)
+{
+    char buffer[200], *p;
+
+    cputs ("Type a lot and backspace a lot: ");
+    if (p = cgets (buffer, sizeof(buffer)))
+        cputs (p);
+
+    return 0;
+}
+</verb>
+</descrip>
+</quote>
+
+
 <sect1>chline<label id="chline"><p>

 <quote>
@@ -3314,6 +3355,47 @@ be used in presence of a prototype.
 </quote>


+<sect1>cscanf<label id="cscanf"><p>
+
+<quote>
+<descrip>
+<tag/Function/Read formatted input from the console
+<tag/Header/<tt/<ref id="conio.h" name="conio.h">/
+<tag/Declaration/<tt/int cscanf (const char* format, ...);/
+<tag/Description/The <tt/cscanf()/ function scans input from the console under
+control of the argument <tt/format/. Following the format string is a list of
+addresses to receive values. The format string is identical to that of the
+<tt/scanf()/ function.
+<tag/Notes/<itemize>
+<item>A direct call to <tt/cursor()/ may be required to show the cursor.
+<item>Some control characters like backspaces are not recognized.
+<item>A better user experience can sometimes be provided by using <tt/cgets()/
+to retrieve the input, and then using <tt/sscanf()/ to parse it.
+</itemize>
+<tag/Availability/cc65
+<tag/See also/
+<ref id="cgets" name="cgets">,
+<ref id="cursor" name="cursor">
+<tag/Example/<verb>
+#include &lt;conio.h&gt;
+
+int main (void)
+{
+    int a, b, c;
+
+    cputs ("Type three integers that add to 100: ");
+    if (cscanf ("%d %d %d", &amp;a, &amp;b, &amp;c) == 3 && a + b + c == 100)
+        cputs ("\r\nYou passed!\r\n");
+    else
+        cputs ("\r\nYou failed!\r\n");
+
+    return 0;
+}
+</verb>
+</descrip>
+</quote>
+
+
 <sect1>cursor<label id="cursor"><p>

 <quote>
--- a/doc/index.sgml
+++ b/doc/index.sgml
@@ -109,6 +109,9 @@

 <descrip>

+  <tag><htmlurl url="agat.html" name="agat.html"></tag>
+  Topics specific to the Agat machines.
+
  <tag><htmlurl url="apple2.html" name="apple2.html"></tag>
  Topics specific to the Apple&nbsp;&rsqb;&lsqb;.

--- a/doc/plus4.sgml
+++ b/doc/plus4.sgml
@@ -165,8 +165,26 @@ The names in the parentheses denote the symbols to be used for static linking of

 <sect1>Graphics drivers<p>

-No graphics drivers are currently available for the Plus/4.
+<descrip>
+  <tag><tt/ted-hi.tgi (ted_hi_tgi)/</tag>
+  This driver features a resolution of 320*200 with two colors and an
+  adjustable palette (that means that the two colors can be chosen out of a
+  palette of the 121 TED colors).

+  Note that the text-mode character matrix and color data are destroyed by this
+  driver. The driver calls the Kernal <tt/CLRSCR/ routine to return the text
+  screen to a usable (if empty) state on <tt/tgi_done()/.
+
+  This driver places the bitmap at &dollar;C000-&dollar;E000. Programs using
+  this driver must either be linked with the option <tt/-D
+  __HIMEM__=&dollar;C000/, or use the <tt/plus4-hires.cfg/ linker configuration.
+
+  The <tt/plus4-hires.cfg/ is preferable, as it allows the stack to remain at
+  &dollar;FCFF, and exposes the remaining high memory from the end of the bitmap
+  to the stack top as a <tt/HIBSS/ segment that can be used by the programmer,
+  or given to <tt/_heapadd()/ (using the symbols <tt/_HIBSS_START__/ and
+  <tt/_HIBSS_SIZE__/).
+</descrip><p>

 <sect1>Extended memory drivers<p>

--- a/doc/sim65.sgml
+++ b/doc/sim65.sgml
@@ -209,7 +209,7 @@ Internally, the binary program file has a 12 byte header provided by the library

 <item>1 byte <bf/CPU type/: <tt/0/ = 6502, <tt/1/ = 65C02

-<item>1 byte <bf/sp address/: the zero page address of the C parameter stack pointer <tt/sp/ used by the paravirtualization functions
+<item>1 byte <bf/c_sp address/: the zero page address of the C parameter stack pointer <tt/c_sp/ used by the paravirtualization functions

 <item>1 word <bf/load address/: where to load the data from the file into memory (default: <tt/$0200/)

--- a/doc/tgi.sgml
+++ b/doc/tgi.sgml
@@ -43,7 +43,7 @@ of range.
 <ref id="tgi_setcolor" name="tgi_setcolor">
 <tag/Example/<tscreen><verb>
 /* Draw the upper half of an ellipse */
-tgi_setcolor(TGI_COLOR_BLUE);
+tgi_setcolor(1);
 tgi_arc (50, 50, 40, 20, 0, 180);
 </verb></tscreen>
 </descrip>
@@ -67,7 +67,7 @@ be used in presence of a prototype.
 <tag/Availability/cc65
 <tag/See also/Other tgi function
 <tag/Example/<tscreen><verb>
-tgi_setcolor(TGI_COLOR_GREEN);
+tgi_setcolor(1);
 tgi_bar(10, 10, 100, 60);
 </verb></tscreen>
 </descrip>
@@ -94,7 +94,7 @@ be used in presence of a prototype.
 <ref id="tgi_pieslice" name="tgi_pieslice">,
 <ref id="tgi_setcolor" name="tgi_setcolor">
 <tag/Example/<tscreen><verb>
-tgi_setcolor(TGI_COLOR_BLACK);
+tgi_setcolor(1);
 tgi_circle(50, 40, 40);
 </verb></tscreen>
 </descrip>
@@ -154,7 +154,7 @@ be used in presence of a prototype.
 <ref id="tgi_pieslice" name="tgi_pieslice">,
 <ref id="tgi_setcolor" name="tgi_setcolor">
 <tag/Example/<tscreen><verb>
-tgi_setcolor(TGI_COLOR_RED);
+tgi_setcolor(1);
 tgi_ellipse (50, 40, 40, 20);
 </verb></tscreen>
 </descrip>
@@ -216,17 +216,19 @@ original aspect ratio.

 <quote>
 <descrip>
-<tag/Function/Return the current drawing color.
+<tag/Function/Return the current drawing color (palette index).
 <tag/Header/<tt/<ref id="tgi.h" name="tgi.h">/
 <tag/Declaration/<tt/unsigned char tgi_getcolor (void);/
 <tag/Description/The actual color is an index to a palette. During tgi_init
-you will get a default palette. The number of colors depend on the platform.
-All platforms recognize at least TGI_COLOR_BLACK and TGI_COLOR_WHITE. But some
-platforms have many more predefined colors. If you paint using TGI_COLOR_GREEN
-and then you change the green of the palette to blue using tgi_setpalette then
-after this painting in TGI_COLOR_GREEN will actually be blue.
+you will get a default palette.
+A default palette has always two entries with values equal to TGI_COLOR_BLACK
+and TGI_COLOR_WHITE. However, which default palette entries have those two
+values is target specific.
+Note that both the number of colors, and also the available colors, depend on
+the target and/or driver.
 <tag/Availability/cc65
-<tag/See also/Other tgi functions
+<tag/See also/<ref id="tgi_setcolor" name="tgi_setcolor">,
+<ref id="tgi_setpalette" name="tgi_setpalette">
 <tag/Example/<tscreen><verb>
 color = tgi_getcolor();
 </verb></tscreen>
@@ -238,7 +240,8 @@ color = tgi_getcolor();

 <quote>
 <descrip>
-<tag/Function/Get the number of available colors.
+<tag/Function/Get the number of available colors in the palette for the current
+driver.
 <tag/Header/<tt/<ref id="tgi.h" name="tgi.h">/
 <tag/Declaration/<tt/unsigned char tgi_getcolorcount (void);/
 <tag/Description/TGI platforms use indexed color palettes. This function
@@ -287,8 +290,6 @@ if (num_colors == 0) {
 <tag/Header/<tt/<ref id="tgi.h" name="tgi.h">/
 <tag/Declaration/<tt/const unsigned char* tgi_getdefpalette (void);/
 <tag/Description/The tgi driver has a default palette that is active at startup.
-The named colors TGI_COLOR_BLACK, TGI_COLOR_WHITE, TGI_COLOR_RED... need this
-palette to work correctly.
 <tag/Availability/cc65
 <tag/See also/Other tgi functions
 <tag/Example/None.
@@ -418,10 +419,10 @@ be used in presence of a prototype.

 <quote>
 <descrip>
-<tag/Function/Get the color of a pixel from the viewpage.
+<tag/Function/Get the color (palette index) of a pixel from the viewpage.
 <tag/Header/<tt/<ref id="tgi.h" name="tgi.h">/
 <tag/Declaration/<tt/unsigned char __fastcall__ tgi_getpixel (int x, int y);/
-<tag/Description/Get the color of a pixel from the viewpage.
+<tag/Description/Get the color (palette index) of a pixel from the viewpage.
 <tag/Notes/<itemize>
 <item>The function is only available as fastcall function, so it may only
 be used in presence of a prototype.
@@ -626,7 +627,7 @@ be used in presence of a prototype.
 #define tgi_updatedisplay() tgi_ioctl(4, (void*)1)
 if (!tgi_busy()) {
  tgi_sprite(&amp;background);
-  tgi_setcolor(TGI_COLOR_BLUE);
+  tgi_setcolor(1);
  tgi_outttextxy(20,40,"Hello World");
  tgi_updatedisplay();
 }
@@ -791,7 +792,7 @@ of range.
 <ref id="tgi_setcolor" name="tgi_setcolor">
 <tag/Example/<tscreen><verb>
 /* Draw the closed upper half of an ellipse */
-tgi_setcolor(TGI_COLOR_BLUE);
+tgi_setcolor(1);
 tgi_pieslice (50, 50, 40, 20, 0, 180);
 </verb></tscreen>
 </descrip>
@@ -834,20 +835,21 @@ only in the presence of a prototype.

 <quote>
 <descrip>
-<tag/Function/Set color to be used in future draw operations.
+<tag/Function/Set color (palette index) to be used in future draw operations.
 <tag/Header/<tt/<ref id="tgi.h" name="tgi.h">/
-<tag/Declaration/<tt/void __fastcall__ tgi_setcolor (unsigned char color);/
-<tag/Description/Set color to be used in future draw operations.
+<tag/Declaration/<tt/void __fastcall__ tgi_setcolor (unsigned char color_index);/
+<tag/Description/Set color (palette index) to be used in future draw operations.
 <tag/Notes/<itemize>
 <item>The function is only available as fastcall function, so it may only
 be used in presence of a prototype.
 </itemize>
 <tag/Availability/cc65
-<tag/See also/Other tgi functions.
+<tag/See also/<ref id="tgi_getcolor" name="tgi_getcolor">,
+<ref id="tgi_setpalette" name="tgi_setpalette">
 <tag/Example/<tscreen><verb>
-tgi_setcolor(TGI_COLOR_BLACK);
+tgi_setcolor(1);
 tgi_bar(0,0,30,30);
-tgi_setcolor(TGI_COLOR_WHITE);
+tgi_setcolor(2);
 tgi_bar(10,10,20,20);
 </verb></tscreen>
 </descrip>
@@ -893,13 +895,21 @@ Palette is a pointer to as many entries as there are colors.
 <tag/Header/<tt/<ref id="tgi.h" name="tgi.h">/
 <tag/Declaration/<tt/void __fastcall__ tgi_setpalette (const unsigned char* palette);/
 <tag/Description/Set the palette (not available with all drivers/hardware).
-Palette is a pointer to as many entries as there are colors.
+Palette is a pointer to as many entries as there are colors. The values in the
+palette are target specific, some (hopefully, more or less) portable values are
+defined in the TGI_COLOR_XY defines. Note that different platforms provide
+different colors, only TGI_COLOR_BLACK and TGI_COLOR_WHITE are guaranteed to
+exist (needed for the default palette).
 <tag/Notes/<itemize>
 <item>The function is only available as fastcall function, so it may only
 be used in presence of a prototype.
+<item>The palette is the (only) place where to use the TGI_COLOR_XY values. This
+has been an ongoing and reoccurring misunderstanding in the past: At every other
+place, the "color" values are indices into the current palette.
 </itemize>
 <tag/Availability/cc65
-<tag/See also/Other tgi functions.
+<tag/See also/<ref id="tgi_setcolor" name="tgi_setcolor">,
+<ref id="tgi_getpalette" name="tgi_getpalette">
 <tag/Example/None.
 </descrip>
 </quote>