Adjusted to recent driver interface change.
Please note that this change is absolutely untested! Apart from the recent driver interface change: - vic20-stdjoy.s was "slightly broken" because it didn't clear x on return from joy_read. - vic20-ptvjoy.s was "heavily broken" because it returned a totally different set of bits of the first joystick.
This commit is contained in:
@@ -102,10 +102,21 @@ joy1: lda #$7F ; mask for VIA2 JOYBIT: sw3
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sty VIA1_DDRA ; restore the state of DDRA
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sty VIA1_DDRA ; restore the state of DDRA
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cli ; necessary?
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cli ; necessary?
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ror ; Shift sw3 into bit 7
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php ; Save sw3 in carry
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and #$9E ; Mask relevant bits
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lsr ; Shift sw0,sw1,sw2,sw4 into bits 1-4
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eor #$9E ; Active states are inverted
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tax ; Save sw0,sw1,sw2
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and #$10 ; Extract sw4 in bit 4
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sta tmp1 ; Save sw4 in bit 4
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txa ; Restore sw0,sw1,sw2
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lsr ; Shift sw0,sw1,sw2 into bits 0-2
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and #$07 ; Mask bits 0-2
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plp ; Restore sw3 in carry
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bcc @L0 ; Is sw3 set?
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ora #$08 ; Yes: Add sw3 in bit 3
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@L0: ora tmp1 ; Add sw4 in bit 4
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eor #$1F ; Active states are inverted
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ldx #0
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rts
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rts
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; Read joystick 2
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; Read joystick 2
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@@ -120,8 +131,8 @@ joy2: lda #%10000000 ; via port B Data-Direction
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sta VIA1_PRB ; (output one at PB7)
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sta VIA1_PRB ; (output one at PB7)
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lda VIA1_PRB ; via port B read/write
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lda VIA1_PRB ; via port B read/write
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and #$1f ; get bit 4-0 (PB4-PB0)
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and #$1F ; get bit 4-0 (PB4-PB0)
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eor #$1f
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eor #$1F
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rts
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rts
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; Read joystick 3
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; Read joystick 3
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@@ -130,14 +141,14 @@ joy3: lda #$00 ; via port B read/write
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sta VIA1_PRB ; (output zero at PB7)
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sta VIA1_PRB ; (output zero at PB7)
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lda VIA1_PRB ; via port B read/write
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lda VIA1_PRB ; via port B read/write
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and #$0f ; get bit 3-0 (PB3-PB0)
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and #$0F ; get bit 3-0 (PB3-PB0)
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sta tmp1 ; joy 4 directions
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sta tmp1 ; joy 4 directions
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lda VIA1_PRB ; via port B read/write
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lda VIA1_PRB ; via port B read/write
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and #%00100000 ; get bit 5 (PB5)
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and #%00100000 ; get bit 5 (PB5)
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lsr
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lsr
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ora tmp1
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ora tmp1
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eor #$1f
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eor #$1F
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ldx #0
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ldx #0
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rts
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rts
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@@ -112,10 +112,21 @@ READ: lda #$7F ; mask for VIA2 JOYBIT: sw3
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sty VIA1_DDRA ; restore the state of DDRA
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sty VIA1_DDRA ; restore the state of DDRA
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cli ; necessary?
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cli ; necessary?
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ror ; Shift sw3 into bit 7
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php ; Save sw3 in carry
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and #$9E ; Mask relevant bits
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lsr ; Shift sw0,sw1,sw2,sw4 into bits 1-4
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eor #$9E ; Active states are inverted
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tax ; Save sw0,sw1,sw2
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and #$10 ; Extract sw4 in bit 4
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sta tmp1 ; Save sw4 in bit 4
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txa ; Restore sw0,sw1,sw2
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lsr ; Shift sw0,sw1,sw2 into bits 0-2
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and #$07 ; Mask bits 0-2
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plp ; Restore sw3 in carry
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bcc @L0 ; Is sw3 set?
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ora #$08 ; Yes: Add sw3 in bit 3
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@L0: ora tmp1 ; Add sw4 in bit 4
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eor #$1F ; Active states are inverted
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ldx #0
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rts
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rts
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