fix space/column

2021-03-11 22:52:41 +01:00
parent c0d638a26d
commit b9fd318985
2 changed files with 12 additions and 14 deletions
--- a/libsrc/telestrat/clock.s
+++ b/libsrc/telestrat/clock.s
@@ -20,11 +20,9 @@
 ; Read the timer

        sei                     ; Disable interrupts
-        lda     TIMEUD           ; TIMED contains 1/10 of a second from clock. Telestrat main cardridge simulate a clock from VIA6522 timer
+        lda     TIMEUD          ; TIMED contains 1/10 of a second from clock. Telestrat main cardridge simulate a clock from VIA6522 timer
        ldx     TIMEUD+1
        cli                     ; Reenable interrupts

        rts
 .endproc
-
-