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fixed issues found by gregg

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This commit is contained in:
mrdudz
2015-07-15 13:18:12 +02:00
parent ac27ed301a
commit c3d45e4c47
8 changed files with 76 additions and 99 deletions
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21
asminc/pce.inc
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@@ -42,6 +42,9 @@ VDC_DESR =16 ; (DMA) Destination Register
VDC_LENR =17 ; (DMA) Length Register VDC_LENR =17 ; (DMA) Length Register
VDC_SATB =18 ; Sprite Attribute Table VDC_SATB =18 ; Sprite Attribute Table
; VDC port
; Note: absolute addressing mode must be used when writing to this port
VDC_CTRL = $0000 VDC_CTRL = $0000
VDC_DATA_LO = $0002 VDC_DATA_LO = $0002
VDC_DATA_HI = $0003 VDC_DATA_HI = $0003
@@ -79,24 +82,6 @@ IRQ_STATUS = $1403
CDR_MEM_DISABLE = $1803 CDR_MEM_DISABLE = $1803
CDR_MEM_ENABLE = $1807 CDR_MEM_ENABLE = $1807
;; lda abs
.macro ldaio arg1
.byte $ad
.word arg1
.endmacro
;; sta abs
.macro staio arg1
.byte $8d
.word arg1
.endmacro
;; stz abs
.macro stzio arg1
.byte $9c
.word arg1
.endmacro
; Write VDC register ; Write VDC register
.macro VREG arg1,arg2 .macro VREG arg1,arg2
st0 #arg1 st0 #arg1

3
include/pce.h
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@@ -65,9 +65,6 @@
#define COLOR_LIGHTBLUE 0x0E #define COLOR_LIGHTBLUE 0x0E
#define COLOR_GRAY3 0x0F #define COLOR_GRAY3 0x0F
#define CLOCKS_PER_SEC 50 // FIXME: is this correct?
#define CLK_TCK 50 // FIXME: is this correct?
#define TV_NTSC 0 #define TV_NTSC 0
#define TV_PAL 1 #define TV_PAL 1
#define TV_OTHER 2 #define TV_OTHER 2

4
include/time.h
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@@ -99,6 +99,10 @@ unsigned _clocks_per_sec (void);
#elif defined(__NES__) #elif defined(__NES__)
# define CLK_TCK 50 /* POSIX */ # define CLK_TCK 50 /* POSIX */
# define CLOCKS_PER_SEC 50 /* ANSI */ # define CLOCKS_PER_SEC 50 /* ANSI */
#elif defined(__PCE__)
/* FIXME: we likely need to read it at runtime */
# define CLK_TCK 50 /* POSIX */
# define CLOCKS_PER_SEC 50 /* ANSI */
#elif defined(__GEOS__) #elif defined(__GEOS__)
# define CLK_TCK 1 /* POSIX */ # define CLK_TCK 1 /* POSIX */
# define CLOCKS_PER_SEC 1 /* ANSI */ # define CLOCKS_PER_SEC 1 /* ANSI */

8
libsrc/pce/clrscr.s
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@@ -11,10 +11,10 @@ _clrscr:
st0 #VDC_VWR st0 #VDC_VWR
ldy #$40 ldy #$40
rowloop: ldx #$80 rowloop: ldx #$80
colloop: lda #' ' colloop: lda #' '
staio VDC_DATA_LO sta a:VDC_DATA_LO
lda #$02 lda #$02
staio VDC_DATA_HI sta a:VDC_DATA_HI
dex dex
bne colloop bne colloop

24
libsrc/pce/conio.s
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@@ -4,8 +4,6 @@
.import psg_init .import psg_init
.import vdc_init .import vdc_init
.export initconio
.constructor initconio, 24 .constructor initconio, 24
.macpack longbranch .macpack longbranch
@@ -28,17 +26,19 @@ set_palette:
ldx #0 ldx #0
@lp: @lp:
.repeat 16 ldy #16
lda colors,x @lp1:
lda colors,x
sta VCE_DATA_LO sta VCE_DATA_LO
lda colors+1,x lda colors+1,x
sta VCE_DATA_HI sta VCE_DATA_HI
.endrepeat dey
bne @lp1
inx inx
inx inx
cpx #16*2 cpx #16*2
jne @lp jne @lp
stz VCE_ADDR_LO stz VCE_ADDR_LO
stz VCE_ADDR_HI stz VCE_ADDR_HI
@@ -68,9 +68,9 @@ conio_init:
ldy #$80 ; 128 chars ldy #$80 ; 128 chars
charloop: ldx #$08 ; 8 bytes/char charloop: ldx #$08 ; 8 bytes/char
lineloop: lineloop:
lda (ptr1) lda (ptr1)
staio VDC_DATA_LO ; bitplane 0 sta a:VDC_DATA_LO ; bitplane 0
stzio VDC_DATA_HI ; bitplane 1 stz a:VDC_DATA_HI ; bitplane 1
clc ; increment font pointer clc ; increment font pointer
lda ptr1 lda ptr1
@@ -89,7 +89,7 @@ fillloop: st1 #$00
dey dey
bne charloop ; next character bne charloop ; next character
ldx #0 ldx #0
stx BGCOLOR stx BGCOLOR
inx inx
stx CHARCOLOR stx CHARCOLOR

21
libsrc/pce/cputc.s
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@@ -69,26 +69,25 @@ putchar:
st0 #VDC_MAWR ; Memory Adress Write st0 #VDC_MAWR ; Memory Adress Write
lda SCREEN_PTR lda SCREEN_PTR
staio VDC_DATA_LO sta a:VDC_DATA_LO
lda SCREEN_PTR+1 lda SCREEN_PTR+1
staio VDC_DATA_HI sta a:VDC_DATA_HI
st0 #VDC_VWR ; VWR st0 #VDC_VWR ; VWR
txa txa
staio VDC_DATA_LO ; character sta a:VDC_DATA_LO ; character
lda CHARCOLOR lda CHARCOLOR
asl a asl a
asl a asl a
asl a asl a
asl a asl a
and #$f0 ora #$02
ora #$02 sta a:VDC_DATA_HI
staio VDC_DATA_HI
rts rts

84
libsrc/pce/crt0.s
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@@ -30,11 +30,6 @@
.importzp sp .importzp sp
.importzp ptr1,ptr2 .importzp ptr1,ptr2
; ------------------------------------------------------------------------
; Create an empty LOWCODE segment to avoid linker warnings
.segment "LOWCODE"
; ------------------------------------------------------------------------ ; ------------------------------------------------------------------------
; Place the startup code in a special segment. ; Place the startup code in a special segment.
@@ -42,7 +37,7 @@
start: start:
; setup the CPU and System-IRQ ; setup the CPU and System-IRQ
; Initialize CPU ; Initialize CPU
@@ -96,58 +91,55 @@ start:
cli cli
; Clear the BSS data ; Clear the BSS data
jsr zerobss jsr zerobss
; Copy the .data segment to RAM ; Copy the .data segment to RAM
lda #<(__DATA_LOAD__) lda #<(__DATA_LOAD__)
sta ptr1 sta ptr1
lda #>(__DATA_LOAD__) lda #>(__DATA_LOAD__)
sta ptr1+1 sta ptr1+1
lda #<(__DATA_RUN__) lda #<(__DATA_RUN__)
sta ptr2 sta ptr2
lda #>(__DATA_RUN__) lda #>(__DATA_RUN__)
sta ptr2+1 sta ptr2+1
ldx #>(__DATA_SIZE__) ldx #>(__DATA_SIZE__)
@l2: @l2:
beq @s1 ; no more full pages beq @s1 ; no more full pages
; copy one page ; copy one page
ldy #0 ldy #0
@l1: @l1:
lda (ptr1),y lda (ptr1),y
sta (ptr2),y sta (ptr2),y
iny iny
bne @l1 bne @l1
inc ptr1+1 inc ptr1+1
inc ptr2+1 inc ptr2+1
dex dex
bne @l2 bne @l2
; copy remaining bytes ; copy remaining bytes
@s1: @s1:
; copy one page ; copy one page
ldy #0 ldy #0
@l3: @l3:
lda (ptr1),y lda (ptr1),y
sta (ptr2),y sta (ptr2),y
iny iny
cpy #<(__DATA_SIZE__) cpy #<(__DATA_SIZE__)
bne @l3 bne @l3
; setup the stack ; setup the stack
lda #<(__RAM_START__+__RAM_SIZE__) lda #<(__RAM_START__+__RAM_SIZE__)
sta sp sta sp
lda #>(__RAM_START__+__RAM_SIZE__) lda #>(__RAM_START__+__RAM_SIZE__)
sta sp+1 sta sp+1
; Init the Heap
jsr initheap
; Call module constructors ; Call module constructors
jsr initlib jsr initlib
; Pass an empty command line ; Pass an empty command line
jsr push0 ; argc jsr push0 ; argc
@@ -158,7 +150,7 @@ start:
; Call module destructors. This is also the _exit entry. ; Call module destructors. This is also the _exit entry.
_exit: _exit:
jsr donelib ; Run module destructors jsr donelib ; Run module destructors
; reset the PCEngine (start over) ; reset the PCEngine (start over)
jmp start jmp start
@@ -174,16 +166,16 @@ _irq1:
phy phy
inc tickcount inc tickcount
bne @s1 bne @s1
inc tickcount+1 inc tickcount+1
bne @s1 bne @s1
inc tickcount+2 inc tickcount+2
bne @s1 bne @s1
inc tickcount+3 inc tickcount+3
@s1: @s1:
; Acknowlege interrupt ; Acknowlege interrupt
ldaio VDC_CTRL lda a:VDC_CTRL
ply ply
plx plx

10
libsrc/pce/vdc.s
View File

@@ -6,7 +6,7 @@ HIRES = 1
.export vdc_init .export vdc_init
vdc_init: vdc_init:
ldaio VDC_CTRL lda a:VDC_CTRL
VREG $00, $0000 ; MAWR VREG $00, $0000 ; MAWR
VREG $01, $0000 ; MARR VREG $01, $0000 ; MARR
@@ -20,21 +20,21 @@ vdc_init:
VREG $0E, $000C ; CRTC - VDE VREG $0E, $000C ; CRTC - VDE
VREG $0F, $0000 ; DCR VREG $0F, $0000 ; DCR
.if HIRES .if HIRES
VREG $0A, $0C02 ; CRTC - HSR VREG $0A, $0C02 ; CRTC - HSR
VREG $0B, $043C ; CRTC - HDS VREG $0B, $043C ; CRTC - HDS
lda #$06 lda #$06
sta VCE_CTRL sta VCE_CTRL
.else .else
VREG $0A, $0202 ; CRTC - HSR VREG $0A, $0202 ; CRTC - HSR
VREG $0B, $041F ; CRTC - HDS VREG $0B, $041F ; CRTC - HDS
lda #$04 lda #$04
sta VCE_CTRL sta VCE_CTRL
.endif .endif
ldaio VDC_CTRL lda a:VDC_CTRL
rts rts