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fixed issues found by gregg

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This commit is contained in:
mrdudz
2015-07-15 13:18:12 +02:00
parent ac27ed301a
commit c3d45e4c47
8 changed files with 76 additions and 99 deletions
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21
asminc/pce.inc
View File

@@ -42,6 +42,9 @@ VDC_DESR =16 ; (DMA) Destination Register
VDC_LENR =17 ; (DMA) Length Register
VDC_SATB =18 ; Sprite Attribute Table
; VDC port
; Note: absolute addressing mode must be used when writing to this port
VDC_CTRL = $0000
VDC_DATA_LO = $0002
VDC_DATA_HI = $0003
@@ -79,24 +82,6 @@ IRQ_STATUS = $1403
CDR_MEM_DISABLE = $1803
CDR_MEM_ENABLE = $1807
;; lda abs
.macro ldaio arg1
.byte $ad
.word arg1
.endmacro
;; sta abs
.macro staio arg1
.byte $8d
.word arg1
.endmacro
;; stz abs
.macro stzio arg1
.byte $9c
.word arg1
.endmacro
; Write VDC register
.macro VREG arg1,arg2
st0 #arg1

3
include/pce.h
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@@ -65,9 +65,6 @@
#define COLOR_LIGHTBLUE 0x0E
#define COLOR_GRAY3 0x0F
#define CLOCKS_PER_SEC 50 // FIXME: is this correct?
#define CLK_TCK 50 // FIXME: is this correct?
#define TV_NTSC 0
#define TV_PAL 1
#define TV_OTHER 2

4
include/time.h
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@@ -99,6 +99,10 @@ unsigned _clocks_per_sec (void);
#elif defined(__NES__)
# define CLK_TCK 50 /* POSIX */
# define CLOCKS_PER_SEC 50 /* ANSI */
#elif defined(__PCE__)
/* FIXME: we likely need to read it at runtime */
# define CLK_TCK 50 /* POSIX */
# define CLOCKS_PER_SEC 50 /* ANSI */
#elif defined(__GEOS__)
# define CLK_TCK 1 /* POSIX */
# define CLOCKS_PER_SEC 1 /* ANSI */

4
libsrc/pce/clrscr.s
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@@ -12,9 +12,9 @@ _clrscr:
ldy #$40
rowloop: ldx #$80
colloop: lda #' '
staio VDC_DATA_LO
sta a:VDC_DATA_LO
lda #$02
staio VDC_DATA_HI
sta a:VDC_DATA_HI
dex
bne colloop

12
libsrc/pce/conio.s
View File

@@ -4,8 +4,6 @@
.import psg_init
.import vdc_init
.export initconio
.constructor initconio, 24
.macpack longbranch
@@ -28,12 +26,14 @@ set_palette:
ldx #0
@lp:
.repeat 16
ldy #16
@lp1:
lda colors,x
sta VCE_DATA_LO
lda colors+1,x
sta VCE_DATA_HI
.endrepeat
dey
bne @lp1
inx
inx
@@ -69,8 +69,8 @@ conio_init:
charloop: ldx #$08 ; 8 bytes/char
lineloop:
lda (ptr1)
staio VDC_DATA_LO ; bitplane 0
stzio VDC_DATA_HI ; bitplane 1
sta a:VDC_DATA_LO ; bitplane 0
stz a:VDC_DATA_HI ; bitplane 1
clc ; increment font pointer
lda ptr1

9
libsrc/pce/cputc.s
View File

@@ -69,15 +69,15 @@ putchar:
st0 #VDC_MAWR ; Memory Adress Write
lda SCREEN_PTR
staio VDC_DATA_LO
sta a:VDC_DATA_LO
lda SCREEN_PTR+1
staio VDC_DATA_HI
sta a:VDC_DATA_HI
st0 #VDC_VWR ; VWR
txa
staio VDC_DATA_LO ; character
sta a:VDC_DATA_LO ; character
lda CHARCOLOR
@@ -86,9 +86,8 @@ putchar:
asl a
asl a
and #$f0
ora #$02
staio VDC_DATA_HI
sta a:VDC_DATA_HI
rts

10
libsrc/pce/crt0.s
View File

@@ -30,11 +30,6 @@
.importzp sp
.importzp ptr1,ptr2
; ------------------------------------------------------------------------
; Create an empty LOWCODE segment to avoid linker warnings
.segment "LOWCODE"
; ------------------------------------------------------------------------
; Place the startup code in a special segment.
@@ -143,9 +138,6 @@ start:
lda #>(__RAM_START__+__RAM_SIZE__)
sta sp+1
; Init the Heap
jsr initheap
; Call module constructors
jsr initlib
@@ -183,7 +175,7 @@ _irq1:
inc tickcount+3
@s1:
; Acknowlege interrupt
ldaio VDC_CTRL
lda a:VDC_CTRL
ply
plx

4
libsrc/pce/vdc.s
View File

@@ -6,7 +6,7 @@ HIRES = 1
.export vdc_init
vdc_init:
ldaio VDC_CTRL
lda a:VDC_CTRL
VREG $00, $0000 ; MAWR
VREG $01, $0000 ; MARR
@@ -36,5 +36,5 @@ vdc_init:
.endif
ldaio VDC_CTRL
lda a:VDC_CTRL
rts