attempt to explain the ISET* dilemma
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@@ -1433,38 +1433,6 @@ constant is defined:
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CPU_ISET_M740
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</verb></tscreen>
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<!-- Sorry but explaining these with the changes from #2751 is too cringy for
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me - must be done by someone else. The remainder is from the old
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".macpack cpu" section"
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The value read from the <tt/<ref id=".CPU" name=".CPU">/ pseudo variable may
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be checked with <tt/<ref id="operators" name=".BITAND">/ to determine if the
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currently enabled CPU supports a specific instruction set. For example the
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65C02 supports all instructions of the 65SC02 CPU, so it has the
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<tt/CPU_ISET_65SC02/ bit set in addition to its native <tt/CPU_ISET_65C02/
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bit. Using
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<tscreen><verb>
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.if (.cpu .bitand CPU_ISET_65SC02)
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lda (c_sp)
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.else
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ldy #$00
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lda (c_sp),y
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.endif
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</verb></tscreen>
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it is possible to determine if the
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<tscreen><verb>
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lda (c_sp)
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</verb></tscreen>
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instruction is supported, which is the case for the 65SC02, 65C02 and 65816
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CPUs (the latter two are upwards compatible to the 65SC02).
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see section <ref id="6502-mode" name="6502 format"> and following.
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-->
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<tt/.CPU/ may be used to replace the .IFPxx pseudo instructions or to
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construct even more complex expressions.
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@@ -1482,8 +1450,43 @@ see section <ref id="6502-mode" name="6502 format"> and following.
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.endif
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</verb></tscreen>
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See also: <tt><ref id=".CAP" name=".CAP"></tt>
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<bf>The dilemma:</bf>
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The original design of this feature was made under the assumption, that any
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"higher" CPU will support the entire instruction set of the "lower" CPU. For
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example: the WDC W65C02 supports all instructions of the 65C02, which again
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support all instructions of the 65SC02. Unfortunately this is not true for all
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CMOS CPUs - when the 65CE02 was made, some instructions were changed, and a new
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addressingmode was added. As a result all CPUS after (and including) 65CE02
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are no more (source code) compatible with all instructions originally introduced
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by the 65SC02.
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Because of this, the .CPU function and the ISET* macros were repurposed to
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indicate <em>groups of instructions</em> only, ie only the set of instructions
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that was added by that particular CPU. In the value returned by .CPU only the
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bits will be set, that refer to the groups of instructions that are completely
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supported by that CPU.
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The advantage of this is, that the mechanism keeps working for all new CPUs
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added. The inevitable disadvantage is that you now have to know exactly which
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CPU added which instructions (look <htmlurl url="cpus.html" name="here"> for reference).
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<tscreen><verb>
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.if (.cpu .bitand CPU_ISET_65SC02)
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; This will be assembled for the W65C02, 65C02, 65SC02, 65816, HUC6820
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lda (c_sp)
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.elseif (.cpu .bitand CPU_ISET_65CE02)
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; This will be assembled for the 65CE02, 4510, 45GS02
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ldz #$00
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lda (c_sp),z
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.else
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ldy #$00
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lda (c_sp),y
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.endif
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</verb></tscreen>
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See also: <tt><ref id=".CAP" name=".CAP"></tt>, which is a similar mechanism,
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but without the problem outlined above.
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<sect1><tt>.ISIZE</tt><label id=".ISIZE"><p>
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@@ -1212,10 +1212,8 @@ The compiler defines several macros at startup:
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<label id="macro-CPU">
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<tag><tt>__CPU__</tt></tag>
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This macro contains a bitset that allows to check if a specific instruction
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set is supported. For example, the 65C02 CPU supports all instructions of the
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65SC02. So testing for the instruction set of the 65SC02 using the following
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check will succeed for both CPUs (and also for the 65816 and HUC6280).
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This macro contains a bitset that allows to check if a specific group of
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instructions is supported.
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<tscreen><verb>
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#if (__CPU__ & __CPU_ISET_65SC02__)
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@@ -1228,6 +1226,13 @@ The compiler defines several macros at startup:
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given, but can be changed using the <tt/<ref id="option--cpu" name="--cpu">/
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command line option.
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Note that, since the different CMOS instruction sets are not orthogonal, the
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following test macros only test for the group of instructions <bf>added</bf>
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by this particular CPU.
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see <htmlurl url="ca65.html#.CPU" name=".CPU"> for details on the ISET*
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dilemma.
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<tag><tt>__CPU_4510__</tt></tag>
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This macro is defined if the code is compiled for a 4510 CPU.
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