add ZEROPAGE segment to apple2-asm.cfg and c64-asm.cfg
This commit is contained in:
@@ -8,10 +8,12 @@ SYMBOLS {
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__LOADSIZE__: type = weak, value = __BSS_RUN__ - __CODE_RUN__;
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__LOADSIZE__: type = weak, value = __BSS_RUN__ - __CODE_RUN__;
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}
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}
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MEMORY {
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MEMORY {
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ZP: start = $0080, size = $001A, define = yes;
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HEADER: file = %O, start = $0000, size = $0004;
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HEADER: file = %O, start = $0000, size = $0004;
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RAM: file = %O, start = %S, size = $C000 - %S;
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RAM: file = %O, start = %S, size = $C000 - %S;
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}
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}
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SEGMENTS {
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SEGMENTS {
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ZEROPAGE: load = ZP, type = zp, optional = yes;
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EXEHDR: load = HEADER, type = ro, optional = yes;
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EXEHDR: load = HEADER, type = ro, optional = yes;
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CODE: load = RAM, type = rw, optional = yes, define = yes;
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CODE: load = RAM, type = rw, optional = yes, define = yes;
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RODATA: load = RAM, type = ro, optional = yes;
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RODATA: load = RAM, type = ro, optional = yes;
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@@ -5,6 +5,7 @@ SYMBOLS {
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__LOADADDR__: type = import;
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__LOADADDR__: type = import;
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}
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}
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MEMORY {
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MEMORY {
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ZP: file = "", start = $0002, size = $001A, define = yes;
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LOADADDR: file = %O, start = %S - 2, size = $0002;
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LOADADDR: file = %O, start = %S - 2, size = $0002;
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RAM: file = %O, start = %S, size = $D000 - %S;
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RAM: file = %O, start = %S, size = $D000 - %S;
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}
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}
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@@ -15,4 +16,5 @@ SEGMENTS {
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RODATA: load = RAM, type = ro, optional = yes;
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RODATA: load = RAM, type = ro, optional = yes;
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DATA: load = RAM, type = rw, optional = yes;
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DATA: load = RAM, type = rw, optional = yes;
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BSS: load = RAM, type = bss, optional = yes;
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BSS: load = RAM, type = bss, optional = yes;
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ZEROPAGE: load = ZP, type = zp, optional = yes;
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}
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}
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