11 Commits

Author SHA1 Message Date
sidney
988260c699 sim65: add C/assembly support, docs, and samples for the new peripheral functionality.
This PR is the second of two PRs that replaces earlier PRs #2589 and #2590. Due to a git branching mishap it was decided to re-partition the new functionality in two sequential PRs that offer self-contained, new functionality to sim65.

The functionality in this second and last PR provides the following things in relation to the new "peripheral" support:

* C support: there is now an include/sim65.h that can be included from C. It provides access to the memory-mapped peripheral addresses.

* Asm support: there is now an asminc/sim65.inc that can be included from assembly. It provides symbolic labels for the memory-mapped peripheral addresses.

Note: the two items above are implemented by adding a "_peripherals" symbol to cfg/sim6502.cfg and cfg/sim65c02.cfg, with the fixed base address of the peripherals memory aperture (0xffc0).

* Updated the sim65 documentation to describe the peripherals in some detail, with examples that show to use the new features from within C.

* Some examples in the new samples/sim5/ directory. These are currently not integrated in the build system (in other words, there's no Makefile there), because I don't know how to do that. I will happily implement that after #2582 is taken care of.

If that is not acceptable, the next best thing will be for somebody else (who understands how the Makefiles are set up) to take care of this.

If that's not going to happen, and we don't want examples that are not properly integrated with the build system, there's always the option of removing these samples from the PR.
2025-01-05 15:58:05 +01:00
Sidney Cadot
6f9406bbe3 This adds timer functionality to sim65.
It provides access to a handful of 64-bit counters that count different things:
- clock cycles
- instructions
- number of IRQ processed
- number of NMIs processed
- nanoseconds since 1-1-1970.

This in not ready yet to be pushed as a merge request into the upstream CC65
repository. What's lacking:

- documentation
- tests

And to be discussed:

- do we agree on this implementation direction and interface in principe?
- can I include inttypes.h for printing a 64-bit unsigned value?
- will clock_gettime() work on a Windows build?
2024-12-17 23:24:35 +01:00
Oliver Schmidt
d5c804f851 Expanded Sim65 zero page. 2019-11-26 22:18:12 +01:00
bbbradsmith
fb7d4acd5c versionable header for sim65
load and run address now configured from header
fix error codes not to conflict with test
fix test/misc/endless.c which is supposed to fail if an endless loop does not occur
2019-05-29 22:56:51 +02:00
bbbradsmith
2f3cae0d2e movable sp for sim65 2019-05-29 22:56:51 +02:00
Piotr Fusik
8e35a82c91 Fix regression of #pragma bss-name
Closes #409
2017-03-21 22:35:25 +01:00
Oliver Schmidt
d5092d2d3f Consider the segment attributes 'define' and 'optional' mutually exclusive.
In normal situations it isn't too useful to define symbols for optional segments as those symbols can't be presumed to be always present.

I in fact suspect that most currently present combinations of 'define' and 'optional' aren't useful - apart form the overlay configurations of course.
2016-03-17 21:31:43 +01:00
Oliver Schmidt
0edd05b4bf Removed symbol definition for ONCE.
Almost all targets don't need symbols for the ONCE segment. Likely their definition was a C&P error in the first place.
2016-03-15 22:55:34 +01:00
Oliver Schmidt
d8c31cf1d3 Renamed RAM to MAIN for all disk based targets.
The name RAM doesn't make much sense in general for a memeory area because i.e. the zero page is for sure RAM but is not part of the memory area named RAM.

For disk based targets it makes sense to put the disk file more into focus and here MAIN means the main part of the file - in contrast to some header.

Only for ROM based targets the name RAM is kept as it makes sense to focus on the difference between RAM and ROM.
2016-03-07 01:28:55 +01:00
Oliver Schmidt
419eb700b5 Renamed INITBSS to INIT and INIT to ONCE.
The way we want to use the INITBSS segment - and especially the fact that it won't have the type bss on all ROM based targets - means that the name INITBSS is misleading. After all INIT is the best name from my perspective as it serves several purposes and therefore needs a rather generic name.

Unfortunately this means that the current INIT segment needs to be renamed too. Looking for a short (ideally 4 letter) name I came up with ONCE as it contains all code (and data) accessed only once during initialization.
2016-03-06 21:27:19 +01:00
Oliver Schmidt
55f9e6ac25 Added 'sim6502' and 'sim65C02' targets.
The targets allow to run cc65 programs in the sim65 exection
einvironment. As there are no "real" i/o facilities there's no
need for header files. Paravirtualized entry points are mapped
to $FFF0 ff. There's a large cc65 progam area from $0200-$FFEF.

The binary format includes a one-byte header indicating the required
execution environment: The value 0 means 6502 and the value 1
means 65C02. The load adress for the binary is fixed to $0200.

Note: Running sim65C02 programs currently doesn't work bcause
sim65 doesn't actually implement 65C02 opcodes.
2013-05-20 20:35:42 +02:00