3edb959298
In order to avoid undefined behaviour of programs not aware of 80 column mode, the 80 column firmware deliberately doesn't use CH but OURCH. So in order to be fully interoperable, CONIO needs to do the same. This changes introduces that behavior. So far so good. But the 80 column firmware can also be active in 40 column mode. This scenario is not detectable with reasonable effort. Therefore the behaviour of CONIO in this scenario is _not_ improved. However, this scenario is supposed to be very uncommon - and a recent update to videomode() makes sure to not activate it anymore ourselves. Notes: * If a program wants to be 100% sure to not run in 40 column mode with 80 column firmware active it can call videomode(VIDEOMODE_40COL) to explicitly deactivate a potentially active 80 column firmware. However, this always implicitly clears the screen. * In 40 column mode (contrast to 80 column mode) the 80 column firmware updates CH to reflect OURCH. So as long as CONIO only reads CH, but doesn't update it, everything works as expected. Interestingly this makes a rather useful scenario of STDIO/CONIO interoperation work: Using STDIO for screen output and CONIO for keyboard input. When cgetc() is called after cursor(1), it has to write to the screen as there's no hardware cursor on the Apple II. Those writes work as expected even in 40 column mode with active 80 column firmware as CH is only read but not written.
34 lines
894 B
ArmAsm
34 lines
894 B
ArmAsm
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; 2020-07-12, Oliver Schmidt
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;
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; char cpeekc (void);
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;
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.export _cpeekc
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.include "apple2.inc"
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_cpeekc:
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ldy CH
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.ifdef __APPLE2ENH__
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sec ; Assume main memory
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bit RD80VID ; In 80 column mode?
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bpl peek ; No, just go ahead
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lda OURCH
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lsr ; Div by 2
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tay
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bcs peek ; Odd cols are in main memory
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php
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sei ; No valid MSLOT et al. in aux memory
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bit HISCR ; Assume SET80COL
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.endif
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peek: lda (BASL),Y ; Get character
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.ifdef __APPLE2ENH__
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bcs :+ ; In main memory
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bit LOWSCR
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plp
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: .endif
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eor #$80 ; Invert high bit
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ldx #>$0000
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rts
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