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Add a better description for CPU_HAS_ZPIND and CPU_HAS_STZ.

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Kugel Fuhr
2025-07-01 20:19:19 +02:00
parent 60ec9045fc
commit 070276a1a3
1 changed files with 4 additions and 2 deletions
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doc/ca65.sgml
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@@ -1681,10 +1681,12 @@ either a string or an expression value.
Checks for the capability to push and pop the X and Y registers. Checks for the capability to push and pop the X and Y registers.
<tag><tt>CPU_HAS_ZPIND</tt></tag> <tag><tt>CPU_HAS_ZPIND</tt></tag>
Checks for the availability of the "zeropage indirect" addressing mode. Checks for the availability of the "zeropage indirect" addressing mode as it
is implemented in the 65SC02 CPU.
<tag><tt>CPU_HAS_STZ</tt></tag> <tag><tt>CPU_HAS_STZ</tt></tag>
Checks for the availability of the "store zero" instruction. Checks for the availability of the "store zero" instruction as it is
implemented in the 65SC02 CPU.
</descrip> </descrip>