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doc/ca65.sgml

@@ -156,12 +156,14 @@ Here is a description of all the command line options:
   <item>6502X - NMOS 6502 with all undocumented instructions
   <item>6502DTV - the emulated CPU of the C64DTV device
   <item>65SC02 - first CMOS instruction set (no bit manipulation, no wai/stp)
-  <item>65C02 - full CMOS instruction set (has bit manipulation and wai/stp)
+  <item>65C02 - CMOS with Rockwell extensions
-  <item>65816 - the CPU of the SNES, and the SCPU
+  <item>W65C02 - full CMOS instruction set (has bit manipulation and wai/stp)
-  <item>HuC6280 - the CPU of the PC engine
+  <item>65CE02 - CMOS with CSG extensions
   <item>4510 - the CPU of the Commodore C65
   <item>45GS02 - the CPU of the Commodore MEGA65
+  <item>HuC6280 - the CPU of the PC engine
   <item>M740 - a Microcontroller by Mitsubishi
+  <item>65816 - the CPU of the SNES, and the SCPU
   <item>sweet16 - an interpreter for a pseudo 16 bit CPU
   </itemize>
 
@@ -449,14 +451,20 @@ The assembler accepts
       <tt><ref id=".PSC02" name=".PSC02"></tt> command was given).
 <item>all valid 65C02 mnemonics when in <ref id="65C02-mode" name="65C02 mode"> (after the
       <tt><ref id=".PC02" name=".PC02"></tt> command was given).
-<item>all valid 65816 mnemonics when in <ref id="65816-mode" name="65816 mode"> (after the
+<item>all valid W65C02 mnemonics when in <ref id="W65C02-mode" name="W65C02 mode"> (after the
-      <tt><ref id=".P816" name=".P816"></tt> command was given).
+      <tt><ref id=".PWC02" name=".PWC02"></tt> command was given).
+<item>all valid 65CE02 mnemonics when in <ref id="65CE02-mode" name="65CE02 mode"> (after the
+      <tt><ref id=".PCE02" name=".PCE02"></tt> command was given).
 <item>all valid 4510 mnemonics when in <ref id="4510-mode" name="4510 mode"> (after the
       <tt><ref id=".P4510" name=".P4510"></tt> command was given).
 <item>all valid 45GS02 mnemonics when in <ref id="45GS02-mode" name="45GS02 mode"> (after the
       <tt><ref id=".P45GS02" name=".P45GS02"></tt> command was given).
+<item>all valid HuC6280 mnemonics when in <ref id="HUC6280-mode" name="HuC6280 mode"> (after the
+      <tt><ref id=".P6280" name=".P6280"></tt> command was given).
 <item>all valid M740 mnemonics when in <ref id="M740-mode" name="M740 mode"> (after the
       <tt><ref id=".PM740" name=".PM740"></tt> command was given).
+<item>all valid 65816 mnemonics when in <ref id="65816-mode" name="65816 mode"> (after the
+      <tt><ref id=".P816" name=".P816"></tt> command was given).
 </itemize>
 
 for more details on the various CPUs, see <tt><htmlurl url="cpus.html" name="here"></tt>.
@@ -554,6 +562,8 @@ W65C02 mode supports the Rockwell extensions, plus wai and stp.
 
 <sect2>65CE02 mode<label id="65CE02-mode"><p>
 
+All 65CE02 instructions are accepted, plus the Rockwell extensions.
+
 
 <sect2>4510 mode<label id="4510-mode"><p>
 
@@ -3350,6 +3360,12 @@ See: <tt><ref id=".ASCIIZ" name=".ASCIIZ"></tt>,<tt><ref id=".CHARMAP" name=".CH
   (see <tt><ref id=".P45GS02" name=".P45GS02"></tt> command).
 
 
+<sect1><tt>.IFP6280</tt><label id=".IFP816"><p>
+
+  Conditional assembly: Check if the assembler is currently in HuC6280 mode
+  (see <tt><ref id=".P6280" name=".P6280"></tt> command).
+
+
 <sect1><tt>.IFP816</tt><label id=".IFP816"><p>
 
   Conditional assembly: Check if the assembler is currently in 65816 mode
@@ -3362,6 +3378,12 @@ See: <tt><ref id=".ASCIIZ" name=".ASCIIZ"></tt>,<tt><ref id=".CHARMAP" name=".CH
   (see <tt><ref id=".PC02" name=".PC02"></tt> command).
 
 
+<sect1><tt>.IFPCE02</tt><label id=".IFPCE02"><p>
+
+  Conditional assembly: Check if the assembler is currently in 65CE02 mode
+  (see <tt><ref id=".PCE02" name=".PCE02"></tt> command).
+
+
 <sect1><tt>.IFPDTV</tt><label id=".IFPDTV"><p>
 
   Conditional assembly: Check if the assembler is currently in 6502DTV mode
@@ -3403,6 +3425,12 @@ See: <tt><ref id=".ASCIIZ" name=".ASCIIZ"></tt>,<tt><ref id=".CHARMAP" name=".CH
   <tt><ref id=".REFERTO" name=".REFERTO"></tt>
 
 
+<sect1><tt>.IFPWC02</tt><label id=".IFPWC02"><p>
+
+  Conditional assembly: Check if the assembler is currently in 65WC02 mode
+  (see <tt><ref id=".PWC02" name=".PWC02"></tt> command).
+
+
 <sect1><tt>.IMPORT</tt><label id=".IMPORT"><p>
 
   Import a symbol from another module. The command is followed by a comma
@@ -3769,6 +3797,18 @@ See: <tt><ref id=".ASCIIZ" name=".ASCIIZ"></tt>,<tt><ref id=".BYTE" name=".BYTE"
   <tt><ref id=".P816" name=".P816"></tt>, and
   <tt><ref id=".P4510" name=".P4510"></tt>
 
+
+<sect1><tt>.P6280</tt><label id=".P6280"><p>
+
+  Enable the HuC6280 instruction set. This is a superset of the 65C02 and
+  6502 instruction sets.
+
+  See: <tt><ref id=".P02" name=".P02"></tt>, <tt><ref id=".PSC02"
+  name=".PSC02"></tt>, <tt><ref id=".PC02" name=".PC02"></tt>,
+  <tt><ref id=".P4510" name=".P4510"></tt>, and
+  <tt><ref id=".P45GS02" name=".P45GS02"></tt>
+
+
 <sect1><tt>.P816</tt><label id=".P816"><p>
 
   Enable the 65816 instruction set. This is a superset of the 65SC02 and
@@ -3779,6 +3819,7 @@ See: <tt><ref id=".ASCIIZ" name=".ASCIIZ"></tt>,<tt><ref id=".BYTE" name=".BYTE"
   <tt><ref id=".P4510" name=".P4510"></tt>, and
   <tt><ref id=".P45GS02" name=".P45GS02"></tt>
 
+
 <sect1><tt>.PAGELEN, .PAGELENGTH</tt><label id=".PAGELENGTH"><p>
 
   Set the page length for the listing. Must be followed by an integer
@@ -3808,6 +3849,17 @@ See: <tt><ref id=".ASCIIZ" name=".ASCIIZ"></tt>,<tt><ref id=".BYTE" name=".BYTE"
   <tt><ref id=".P4510" name=".P4510"></tt>, and
   <tt><ref id=".P45GS02" name=".P45GS02"></tt>
 
+<sect1><tt>.PCE02</tt><label id=".PCE02"><p>
+
+  Enable the 65CE02 instructions set. This instruction set includes all
+  6502 and extended 65CE02 instructions.
+
+  See: <tt><ref id=".P02" name=".P02"></tt>, <tt><ref id=".PSC02"
+  name=".PSC02"></tt>, <tt><ref id=".P816" name=".P816"></tt>,
+  <tt><ref id=".P4510" name=".P4510"></tt>, and
+  <tt><ref id=".P45GS02" name=".P45GS02"></tt>
+
+
 <sect1><tt>.PDTV</tt><label id=".PDTV"><p>
 
   Enable the 6502DTV instruction set. This is a superset of the 6502
@@ -3961,6 +4013,17 @@ See: <tt><ref id=".ASCIIZ" name=".ASCIIZ"></tt>,<tt><ref id=".BYTE" name=".BYTE"
   See: <tt><ref id=".POPSEG" name=".POPSEG"></tt>
 
 
+<sect1><tt>.PWC02</tt><label id=".PWC02"><p>
+
+  Enable the W65C02 instructions set. This instruction set includes all
+  6502, 65SC02, 65C02 and two extra instructions (wai and stp)
+
+  See: <tt><ref id=".P02" name=".P02"></tt>, <tt><ref id=".PSC02"
+  name=".PSC02"></tt>, <tt><ref id=".P816" name=".P816"></tt>,
+  <tt><ref id=".P4510" name=".P4510"></tt>, and
+  <tt><ref id=".P45GS02" name=".P45GS02"></tt>
+
+
 <sect1><tt>.REFERTO, .REFTO</tt><label id=".REFERTO"><p>
 
   Mark a symbol as referenced.

doc/cc65.sgml

@@ -1212,6 +1212,14 @@ The compiler defines several macros at startup:
   given, but can be changed using the <tt/<ref id="option--cpu" name="--cpu">/
   command line option.
 
+  <tag><tt>__CPU_4510__</tt></tag>
+
+  This macro is defined if the code is compiled for a 4510 CPU.
+
+  <tag><tt>__CPU_45GS02__</tt></tag>
+
+  This macro is defined if the code is compiled for a 45GS02 CPU.
+
   <tag><tt>__CPU_6502__</tt></tag>
 
   This macro is defined if the code is compiled for a 6502 CPU.
@@ -1233,6 +1241,10 @@ The compiler defines several macros at startup:
 
   This macro is defined if the code is compiled for a 65C02 CPU.
 
+  <tag><tt>__CPU_65CE02__</tt></tag>
+
+  This macro is defined if the code is compiled for a 65CE02 CPU.
+
   <tag><tt>__CPU_65816__</tt></tag>
 
   This macro is defined if the code is compiled for a 65816 CPU.
@@ -1241,6 +1253,14 @@ The compiler defines several macros at startup:
 
   This macro is defined if the code is compiled for a HUC6280 CPU.
 
+  <tag><tt>__CPU_M740__</tt></tag>
+
+  This macro is defined if the code is compiled for a M740 CPU.
+
+  <tag><tt>__CPU_W65C02__</tt></tag>
+
+  This macro is defined if the code is compiled for a W65C02 CPU.
+
   <tag><tt>__CPU_ISET_6502__</tt></tag>
 
   This macro expands to a numeric constant that can be used to check the
@@ -1271,6 +1291,12 @@ The compiler defines several macros at startup:
   <tt/<ref id="macro-CPU" name="__CPU__">/ macro for the instruction set
   of the 65C02 CPU.
 
+  <tag><tt>__CPU_ISET_65CE02__</tt></tag>
+
+  This macro expands to a numeric constant that can be used to check the
+  <tt/<ref id="macro-CPU" name="__CPU__">/ macro for the instruction set
+  of the 65CE02 CPU.
+
   <tag><tt>__CPU_ISET_65816__</tt></tag>
 
   This macro expands to a numeric constant that can be used to check the
@@ -1283,6 +1309,18 @@ The compiler defines several macros at startup:
   <tt/<ref id="macro-CPU" name="__CPU__">/ macro for the instruction set
   of the HUC6280 CPU.
 
+  <tag><tt>__CPU_ISET_M740__</tt></tag>
+
+  This macro expands to a numeric constant that can be used to check the
+  <tt/<ref id="macro-CPU" name="__CPU__">/ macro for the instruction set
+  of the M740 CPU.
+
+  <tag><tt>__CPU_ISET_W65C02__</tt></tag>
+
+  This macro expands to a numeric constant that can be used to check the
+  <tt/<ref id="macro-CPU" name="__CPU__">/ macro for the instruction set
+  of the W65C02 CPU.
+
   <tag><tt>__CX16__</tt></tag>
 
   This macro is defined if the target is the Commander X16 (-t cx16).

doc/da65.sgml

@@ -267,18 +267,18 @@ With the command line option <tt><ref id="option--cpu" name="--cpu"></tt>, the
 disassembler may be told which CPU to support:
 
   <itemize>
-  <item><ref id="6502-mode" name="6502"> - NMOS 6502 (all legal instructions)
+  <item>6502 - NMOS 6502 (all legal instructions)
-  <item><ref id="6502X-mode" name="6502X"> - NMOS 6502 with all undocumented instructions
+  <item>6502X - NMOS 6502 with all undocumented instructions
-  <item><ref id="DTV-mode" name="6502DTV"> - the emulated CPU of the C64DTV device
+  <item>6502DTV - the emulated CPU of the C64DTV device
-  <item><ref id="65SC02-mode" name="65SC02"> - first CMOS instruction set (no bit manipulation)
+  <item>65SC02 - first CMOS instruction set (no bit manipulation, no wai/stp)
-  <item><ref id="65C02-mode" name="65C02"> - full CMOS instruction set (has bit manipulation)
+  <item>65C02 - CMOS with Rockwell extensions
-  <item><ref id="W65C02-mode" name="W65C02"> - CMOS with WDC extensions
+  <item>W65C02 - full CMOS instruction set (has bit manipulation and wai/stp)
-  <item><ref id="65CE02-mode" name="65CE02"> - CMOS with GTE extensions
+  <item>65CE02 - CMOS with CSG extensions
-  <item><ref id="65816-mode" name="65816"> - the CPU of the SNES, and the SCPU
+  <item>4510 - the CPU of the Commodore C65
-  <item><ref id="HUC6280-mode" name="HuC6280"> - the CPU of the PC engine
+  <item>45GS02 - the CPU of the Commodore MEGA65
-  <item><ref id="4510-mode" name="4510"> - the CPU of the Commodore C65
+  <item>HuC6280 - the CPU of the PC engine
-  <item><ref id="45GS02-mode" name="45GS02"> - the CPU of the Commodore MEGA65
+  <item>M740 - a Microcontroller by Mitsubishi
-  <item><ref id="M740-mode" name="M740"> - a Microcontroller by Mitsubishi
+  <item>65816 - the CPU of the SNES, and the SCPU
   </itemize>
 
 for more details on the various CPUs, see <tt><htmlurl url="cpus.html" name="here"></tt>.