Merge branch 'master' into quietagain

test/asm/opcodes/65ce02-opcodes.s

@@ -0,0 +1,278 @@
+.setcpu "65CE02"
+
+   brk
+   ora ($05,x)
+   cle
+   see
+   tsb $02
+   ora $02
+   asl $02
+   rmb0 $02
+   php
+   ora #$01
+   asl
+   tsy
+   tsb $1234
+   ora $1234
+   asl $1234
+   bbr0 $02,*+$34
+
+   bpl *+$32
+   ora ($06),y
+   ora ($07),z
+   lbpl *+$3133 ; bpl *+$3133
+   trb $02
+   ora $03,x
+   asl $03,x
+   rmb1 $02
+   clc
+   ora $1456,y
+   inc
+   inz
+   trb $1234
+   ora $1345,x
+   asl $1345,x
+   bbr1 $02,*+$34
+
+   jsr $1234
+   and ($05,x)
+   jsr ($2345)
+   jsr ($2456,x)
+   bit $02
+   and $02
+   rol $02
+   rmb2 $02
+   plp
+   and #$01
+   rol
+   tys
+   bit $1234
+   and $1234
+   rol $1234
+   bbr2 $02,*+$34
+
+   bmi *+$32
+   and ($06),y
+   and ($07),z
+   lbmi *+$3133 ; bmi *+$3133
+   bit $03,x
+   and $03,x
+   rol $03,x
+   rmb3 $02
+   sec
+   and $1456,y
+   dec
+   dez
+   bit $1345,x
+   and $1345,x
+   rol $1345,x
+   bbr3 $02,*+$34
+
+   rti
+   eor ($05,x)
+   neg
+   asr
+   asr $02
+   eor $02
+   lsr $02
+   rmb4 $02
+   pha
+   eor #$01
+   lsr
+   taz
+   jmp $1234
+   eor $1234
+   lsr $1234
+   bbr4 $02,*+$34
+
+   bvc *+$32
+   eor ($06),y
+   eor ($07),z
+   lbvc *+$3133 ; bvc *+$3133
+   asr $03,x
+   eor $03,x
+   lsr $03,x
+   rmb5 $02
+   cli
+   eor $1456,y
+   phy
+   tab
+   aug
+   eor $1345,x
+   lsr $1345,x
+   bbr5 $02,*+$34
+
+   rts
+   adc ($05,x)
+   rtn #$09
+   bsr *+$3133
+   stz $02
+   adc $02
+   ror $02
+   rmb6 $02
+   pla
+   adc #$01
+   ror
+   tza
+   jmp ($2345)
+   adc $1234
+   ror $1234
+   bbr6 $02,*+$34
+
+   bvs *+$32
+   adc ($06),y
+   adc ($07),z
+   lbvs *+$3133 ; bvs *+$3133
+   stz $03,x
+   adc $03,x
+   ror $03,x
+   rmb7 $02
+   sei
+   adc $1456,y
+   ply
+   tba
+   jmp ($2456,x)
+   adc $1345,x
+   ror $1345,x
+   bbr7 $02,*+$34
+
+   bra *+$32
+   sta ($05,x)
+   sta ($0f,s),y
+   sta ($0f,sp),y
+   lbra *+$3133 ; bra *+$3133
+   sty $02
+   sta $02
+   stx $02
+   smb0 $02
+   dey
+   bit #$01
+   txa
+   sty $1345,x
+   sty $1234
+   sta $1234
+   stx $1234
+   bbs0 $02,*+$34
+
+   bcc *+$32
+   sta ($06),y
+   sta ($07),z
+   lbcc *+$3133 ; bcc *+$3133
+   sty $03,x
+   sta $03,x
+   stx $04,y
+   smb1 $02
+   tya
+   sta $1456,y
+   txs
+   stx $1456,y
+   stz $1234
+   sta $1345,x
+   stz $1345,x
+   bbs1 $02,*+$34
+
+   ldy #$01
+   lda ($05,x)
+   ldx #$01
+   ldz #$01
+   ldy $02
+   lda $02
+   ldx $02
+   smb2 $02
+   tay
+   lda #$01
+   tax
+   ldz $1234
+   ldy $1234
+   lda $1234
+   ldx $1234
+   bbs2 $02,*+$34
+
+   bcs *+$32
+   lda ($06),y
+   lda ($07),z
+   lbcs *+$3133 ; bcs *+$3133
+   ldy $03,x
+   lda $03,x
+   ldx $04,y
+   smb3 $02
+   clv
+   lda $1456,y
+   tsx
+   ldz $1345,x
+   ldy $1345,x
+   lda $1345,x
+   ldx $1456,y
+   bbs3 $02,*+$34
+
+   cpy #$01
+   cmp ($05,x)
+   cpz #$01
+   dew $02
+   cpy $02
+   cmp $02
+   dec $02
+   smb4 $02
+   iny
+   cmp #$01
+   dex
+   asw $1234
+   cpy $1234
+   cmp $1234
+   dec $1234
+   bbs4 $02,*+$34
+
+   bne *+$32
+   cmp ($06),y
+   cmp ($07),z
+   lbne *+$3133 ; bne *+$3133
+   cpz $02
+   cmp $03,x
+   dec $03,x
+   smb5 $02
+   cld
+   cmp $1456,y
+   phx
+   phz
+   cpz $1234
+   cmp $1345,x
+   dec $1345,x
+   bbs5 $02,*+$34
+
+   cpx #$01
+   sbc ($05,x)
+   lda ($0f,s),y
+   lda ($0f,sp),y
+   inw $02
+   cpx $02
+   sbc $02
+   inc $02
+   smb6 $02
+   inx
+   sbc #$01
+   eom
+   nop
+   row $1234
+   cpx $1234
+   sbc $1234
+   inc $1234
+   bbs6 $02,*+$34
+
+   beq *+$32
+   sbc ($06),y
+   sbc ($07),z
+   lbeq *+$3133 ; beq *+$3133
+   phd #$089a
+   phw #$089a
+   sbc $03,x
+   inc $03,x
+   smb7 $02
+   sed
+   sbc $1456,y
+   plx
+   plz
+   phd $1234
+   phw $1234
+   sbc $1345,x
+   inc $1345,x
+   bbs7 $02,*+$34

test/asm/opcodes/sweet16-opcodes.s

@@ -0,0 +1,34 @@
+.setcpu "SWEET16"
+
+    RTN                 ; $00      Return to 6502 code.
+    BR   LABEL          ; $01 ea   Unconditional Branch.
+    BNC  LABEL          ; $02 ea   Branch if Carry=0.
+    BC   LABEL          ; $03 ea   Branch if Carry=1.
+    BP   LABEL          ; $04 ea   Branch if last result positive.
+    BM   LABEL          ; $0S ea   Branch if last result negative.
+    BZ   LABEL          ; $06 ea   Branch if last result zero.
+    BNZ  LABEL          ; $07 ea   Branch if last result non-zero.
+    BM1  LABEL          ; $08 ea   Branch if last result = -1.
+    BNM1 LABEL          ; $09 ea   Branch if last result not -1.
+    BK                  ; $0A      Execute 6502 BRK instruction.
+    RS                  ; $0B      Return from SWEET-16 subroutine.
+    BS   LABEL          ; $0C ea   Call SWEET-16 subroutine.
+LABEL:
+
+.repeat 16, count
+    SET  count,$1234    ; $1n lo hi  Rn <-- value.
+    LD   count          ; $2n        R0 <-- (Rn).
+    ST   count          ; $3n        Rn <-- (R0).
+    LD   @count         ; $4n        MA = (Rn), ROL <-- (MA), Rn <-- MA+1, R0H <-- 0.
+    ST   @count         ; $5n        MA = (Rn), MA <-- (R0L), Rn <-- MA+1.
+    LDD  @count         ; $6n        MA = (Rn), R0 <-- (MA, MA+1), Rn <-- MA+2.
+    STD  @count         ; $7n        MA = (Rn), MA,MA+l <-- (R0), Rn <-- MA+2.
+    POP  @count         ; $8n        MA = (Rn)-1, R0L <-- (MA), R0H <-- 0, Rn <-- MA.
+    STP  @count         ; $9n        MA <-- (Rn)-1, (MA) <-- R0L, Rn <-- MA.
+    ADD  count          ; $An        R0 <-- (R0) + (Rn).
+    SUB  count          ; $Bn        R0 <-- (R0) - (Rn).
+    POPD @count         ; $Cn        MA = (Rn)-2, MA,MA+l <-- R0, Rn <-- MA.
+    CPR  count          ; $Dn        R13 <-- (R0) - (Rn), R14 <-- status flags.
+    INR  count          ; $En        Rn <-- (Rn) + 1.
+    DCR  count          ; $Fn        Rn <-- (Rn) - 1.
+.endrepeat

test/asm/opcodes/w65c02-opcodes.s

@@ -0,0 +1,258 @@
+.setcpu "W65C02"
+
+   brk
+   ora     ($12,x)
+   .byte   $02
+   .byte   $03
+   tsb     $12
+   ora     $12
+   asl     $12
+   rmb0    $12
+   php
+   ora     #$12
+   asl     a
+   .byte   $0B
+   tsb     $3456
+   ora     $3456
+   asl     $3456
+   bbr0    $12,*+122
+   bpl     *+122
+   ora     ($12),y
+   ora     ($12)
+   .byte   $13
+   trb     $12
+   ora     $12,x
+   asl     $12,x
+   rmb1    $12
+   clc
+   ora     $3456,y
+   inc     a
+   .byte   $1B
+   trb     $3456
+   ora     $3456,x
+   asl     $3456,x
+   bbr1    $12,*+122
+   jsr     $3456
+   and     ($12,x)
+   .byte   $22
+   .byte   $23
+   bit     $12
+   and     $12
+   rol     $12
+   rmb2    $12
+   plp
+   and     #$12
+   rol     a
+   .byte   $2B
+   bit     $3456
+   and     $3456
+   rol     $3456
+   bbr2    $12,*+122
+   bmi     *+122
+   and     ($12),y
+   and     ($12)
+   .byte   $33
+   bit     $12,x
+   and     $12,x
+   rol     $12,x
+   rmb3    $12
+   sec
+   and     $3456,y
+   dec     a
+   .byte   $3B
+   bit     $3456,x
+   and     $3456,x
+   rol     $3456,x
+   bbr3    $12,*+122
+   rti
+   eor     ($12,x)
+   .byte   $42
+   .byte   $43
+   .byte   $44
+   eor     $12
+   lsr     $12
+   rmb4    $12
+   pha
+   eor     #$12
+   lsr     a
+   .byte   $4B
+   jmp     $3456
+   eor     $3456
+   lsr     $3456
+   bbr4    $12,*+122
+   bvc     *+122
+   eor     ($12),y
+   eor     ($12)
+   .byte   $53
+   .byte   $54
+   eor     $12,x
+   lsr     $12,x
+   rmb5    $12
+   cli
+   eor     $3456,y
+   phy
+   .byte   $5B
+   .byte   $5C
+   eor     $3456,x
+   lsr     $3456,x
+   bbr5    $12,*+122
+   rts
+   adc     ($12,x)
+   .byte   $62
+   .byte   $63
+   stz     $12
+   adc     $12
+   ror     $12
+   rmb6    $12
+   pla
+   adc     #$12
+   ror     a
+   .byte   $6B
+   jmp     ($3456)
+   adc     $3456
+   ror     $3456
+   bbr6    $12,*+122
+   bvs     *+122
+   adc     ($12),y
+   adc     ($12)
+   .byte   $73
+   stz     $12,x
+   adc     $12,x
+   ror     $12,x
+   rmb7    $12
+   sei
+   adc     $3456,y
+   ply
+   .byte   $7B
+   jmp     ($3456,x)
+   adc     $3456,x
+   ror     $3456,x
+   bbr7    $12,*+122
+   bra     *+122
+   sta     ($12,x)
+   .byte   $82
+   .byte   $83
+   sty     $12
+   sta     $12
+   stx     $12
+   smb0    $12
+   dey
+   bit     #$12
+   txa
+   .byte   $8B
+   sty     $3456
+   sta     $3456
+   stx     $3456
+   bbs0    $12,*+122
+   bcc     *+122
+   sta     ($12),y
+   sta     ($12)
+   .byte   $93
+   sty     $12,x
+   sta     $12,x
+   stx     $12,y
+   smb1    $12
+   tya
+   sta     $3456,y
+   txs
+   .byte   $9B
+   stz     $3456
+   sta     $3456,x
+   stz     $3456,x
+   bbs1    $12,*+122
+   ldy     #$12
+   lda     ($12,x)
+   ldx     #$12
+   .byte   $A3
+   ldy     $12
+   lda     $12
+   ldx     $12
+   smb2    $12
+   tay
+   lda     #$12
+   tax
+   .byte   $AB
+   ldy     $3456
+   lda     $3456
+   ldx     $3456
+   bbs2    $12,*+122
+   bcs     *+122
+   lda     ($12),y
+   lda     ($12)
+   .byte   $B3
+   ldy     $12,x
+   lda     $12,x
+   ldx     $12,y
+   smb3    $12
+   clv
+   lda     $3456,y
+   tsx
+   .byte   $BB
+   ldy     $3456,x
+   lda     $3456,x
+   ldx     $3456,y
+   bbs3    $12,*+122
+   cpy     #$12
+   cmp     ($12,x)
+   .byte   $C2
+   .byte   $C3
+   cpy     $12
+   cmp     $12
+   dec     $12
+   smb4    $12
+   iny
+   cmp     #$12
+   dex
+   wai
+   cpy     $3456
+   cmp     $3456
+   dec     $3456
+   bbs4    $12,*+122
+   bne     *+122
+   cmp     ($12),y
+   cmp     ($12)
+   .byte   $D3
+   .byte   $D4
+   cmp     $12,x
+   dec     $12,x
+   smb5    $12
+   cld
+   cmp     $3456,y
+   phx
+   stp
+   .byte   $DC
+   cmp     $3456,x
+   dec     $3456,x
+   bbs5    $12,*+122
+   cpx     #$12
+   sbc     ($12,x)
+   .byte   $E2
+   .byte   $E3
+   cpx     $12
+   sbc     $12
+   inc     $12
+   smb6    $12
+   inx
+   sbc     #$12
+   nop
+   .byte   $EB
+   cpx     $3456
+   sbc     $3456
+   inc     $3456
+   bbs6    $12,*+122
+   beq     *+122
+   sbc     ($12),y
+   sbc     ($12)
+   .byte   $F3
+   .byte   $F4
+   sbc     $12,x
+   inc     $12,x
+   smb7    $12
+   sed
+   sbc     $3456,y
+   plx
+   .byte   $FB
+   .byte   $FC
+   sbc     $3456,x
+   inc     $3456,x
+   bbs7    $12,*+122