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Added the CPU_HAS_BITIMM capability.

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This commit is contained in:
Kugel Fuhr
2025-07-01 07:16:33 +02:00
parent d4e57278c6
commit f333b300f1
4 changed files with 48 additions and 38 deletions
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3
doc/ca65.sgml
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@@ -1609,6 +1609,9 @@ either a string or an expression value.
<descrip> <descrip>
<tag><tt>CPU_HAS_BITIMM</tt></tag>
Checks for the availability of the "bit #imm" instruction.
<tag><tt>CPU_HAS_BRA8</tt></tag> <tag><tt>CPU_HAS_BRA8</tt></tag>
Checks for the availability of a short (8 bit) branch. Checks for the availability of a short (8 bit) branch.

1
src/common/capability.c
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@@ -50,6 +50,7 @@ struct Capability {
capability_t Cap; capability_t Cap;
} Capabilities [] = { } Capabilities [] = {
/* BEGIN SORTED.SH */ /* BEGIN SORTED.SH */
{ "CPU_HAS_BITIMM", CAP_CPU_HAS_BITIMM },
{ "CPU_HAS_BRA8", CAP_CPU_HAS_BRA8 }, { "CPU_HAS_BRA8", CAP_CPU_HAS_BRA8 },
{ "CPU_HAS_INA", CAP_CPU_HAS_INA }, { "CPU_HAS_INA", CAP_CPU_HAS_INA },
{ "CPU_HAS_PUSHXY", CAP_CPU_HAS_PUSHXY }, { "CPU_HAS_PUSHXY", CAP_CPU_HAS_PUSHXY },

1
src/common/capability.h
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@@ -54,6 +54,7 @@ enum capability_t {
CAP_CPU_HAS_PUSHXY = 2, /* CPU has PHX/PHY/PLX/PLY */ CAP_CPU_HAS_PUSHXY = 2, /* CPU has PHX/PHY/PLX/PLY */
CAP_CPU_HAS_ZPIND = 3, /* CPU has "(zp)" mode (no offset) */ CAP_CPU_HAS_ZPIND = 3, /* CPU has "(zp)" mode (no offset) */
CAP_CPU_HAS_STZ = 4, /* CPU has "store zero" (!) instruction */ CAP_CPU_HAS_STZ = 4, /* CPU has "store zero" (!) instruction */
CAP_CPU_HAS_BITIMM = 5, /* CPU has "bit #imm" instruction */
}; };
typedef enum capability_t capability_t; typedef enum capability_t capability_t;

81
src/common/cpu.c
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@@ -96,54 +96,59 @@ const unsigned CPUIsets[CPU_COUNT] = {
** is deliberately hidden from the outside so it can be extended to 64 bit or ** is deliberately hidden from the outside so it can be extended to 64 bit or
** even more. ** even more.
*/ */
#define CAP_BIT(Cap) (UINT32_C (1) << (Cap))
#define CAP_NONE UINT32_C (0) #define CAP_NONE UINT32_C (0)
#define CAP_6502 UINT32_C (0) #define CAP_6502 CAP_NONE
#define CAP_6502X UINT32_C (0) #define CAP_6502X CAP_NONE
#define CAP_6502DTV UINT32_C (0) #define CAP_6502DTV CAP_NONE
#define CAP_65SC02 \ #define CAP_65SC02 \
((UINT32_C (1) << CAP_CPU_HAS_BRA8) | \ (CAP_BIT (CAP_CPU_HAS_BITIMM) | \
(UINT32_C (1) << CAP_CPU_HAS_INA) | \ CAP_BIT (CAP_CPU_HAS_BRA8) | \
(UINT32_C (1) << CAP_CPU_HAS_PUSHXY) | \ CAP_BIT (CAP_CPU_HAS_INA) | \
(UINT32_C (1) << CAP_CPU_HAS_ZPIND) | \ CAP_BIT (CAP_CPU_HAS_PUSHXY) | \
(UINT32_C (1) << CAP_CPU_HAS_STZ)) CAP_BIT (CAP_CPU_HAS_ZPIND) | \
CAP_BIT (CAP_CPU_HAS_STZ))
#define CAP_65C02 \ #define CAP_65C02 \
((UINT32_C (1) << CAP_CPU_HAS_BRA8) | \ (CAP_BIT (CAP_CPU_HAS_BITIMM) | \
(UINT32_C (1) << CAP_CPU_HAS_INA) | \ CAP_BIT (CAP_CPU_HAS_BRA8) | \
(UINT32_C (1) << CAP_CPU_HAS_PUSHXY) | \ CAP_BIT (CAP_CPU_HAS_INA) | \
(UINT32_C (1) << CAP_CPU_HAS_ZPIND) | \ CAP_BIT (CAP_CPU_HAS_PUSHXY) | \
(UINT32_C (1) << CAP_CPU_HAS_STZ)) CAP_BIT (CAP_CPU_HAS_ZPIND) | \
CAP_BIT (CAP_CPU_HAS_STZ))
#define CAP_65816 \ #define CAP_65816 \
((UINT32_C (1) << CAP_CPU_HAS_BRA8) | \ (CAP_BIT (CAP_CPU_HAS_BITIMM) | \
(UINT32_C (1) << CAP_CPU_HAS_INA) | \ CAP_BIT (CAP_CPU_HAS_BRA8) | \
(UINT32_C (1) << CAP_CPU_HAS_PUSHXY) | \ CAP_BIT (CAP_CPU_HAS_INA) | \
(UINT32_C (1) << CAP_CPU_HAS_ZPIND) | \ CAP_BIT (CAP_CPU_HAS_PUSHXY) | \
(UINT32_C (1) << CAP_CPU_HAS_STZ)) CAP_BIT (CAP_CPU_HAS_ZPIND) | \
#define CAP_SWEET16 UINT32_C (0) CAP_BIT (CAP_CPU_HAS_STZ))
#define CAP_SWEET16 CAP_NONE
#define CAP_HUC6280 \ #define CAP_HUC6280 \
((UINT32_C (1) << CAP_CPU_HAS_BRA8) | \ (CAP_BIT (CAP_CPU_HAS_BITIMM) | \
(UINT32_C (1) << CAP_CPU_HAS_INA) | \ CAP_BIT (CAP_CPU_HAS_BRA8) | \
(UINT32_C (1) << CAP_CPU_HAS_PUSHXY) | \ CAP_BIT (CAP_CPU_HAS_INA) | \
(UINT32_C (1) << CAP_CPU_HAS_ZPIND) | \ CAP_BIT (CAP_CPU_HAS_PUSHXY) | \
(UINT32_C (1) << CAP_CPU_HAS_STZ)) CAP_BIT (CAP_CPU_HAS_ZPIND) | \
CAP_BIT (CAP_CPU_HAS_STZ))
#define CAP_M740 \ #define CAP_M740 \
((UINT32_C (1) << CAP_CPU_HAS_BRA8) | \ (CAP_BIT (CAP_CPU_HAS_BRA8) | \
(UINT32_C (1) << CAP_CPU_HAS_INA)) CAP_BIT (CAP_CPU_HAS_INA))
#define CAP_4510 \ #define CAP_4510 \
((UINT32_C (1) << CAP_CPU_HAS_BRA8) | \ (CAP_BIT (CAP_CPU_HAS_BRA8) | \
(UINT32_C (1) << CAP_CPU_HAS_INA) | \ CAP_BIT (CAP_CPU_HAS_INA) | \
(UINT32_C (1) << CAP_CPU_HAS_PUSHXY)) CAP_BIT (CAP_CPU_HAS_PUSHXY))
#define CAP_45GS02 \ #define CAP_45GS02 \
((UINT32_C (1) << CAP_CPU_HAS_BRA8) | \ (CAP_BIT (CAP_CPU_HAS_BRA8) | \
(UINT32_C (1) << CAP_CPU_HAS_INA) | \ CAP_BIT (CAP_CPU_HAS_INA) | \
(UINT32_C (1) << CAP_CPU_HAS_PUSHXY)) CAP_BIT (CAP_CPU_HAS_PUSHXY))
#define CAP_W65C02 \ #define CAP_W65C02 \
((UINT32_C (1) << CAP_CPU_HAS_BRA8) | \ (CAP_BIT (CAP_CPU_HAS_BRA8) | \
(UINT32_C (1) << CAP_CPU_HAS_INA) | \ CAP_BIT (CAP_CPU_HAS_INA) | \
(UINT32_C (1) << CAP_CPU_HAS_PUSHXY)) CAP_BIT (CAP_CPU_HAS_PUSHXY))
#define CAP_65CE02 \ #define CAP_65CE02 \
((UINT32_C (1) << CAP_CPU_HAS_BRA8) | \ (CAP_BIT (CAP_CPU_HAS_BRA8) | \
(UINT32_C (1) << CAP_CPU_HAS_INA) | \ CAP_BIT (CAP_CPU_HAS_INA) | \
(UINT32_C (1) << CAP_CPU_HAS_PUSHXY)) CAP_BIT (CAP_CPU_HAS_PUSHXY))
/* Table containing one capability entry per CPU */ /* Table containing one capability entry per CPU */
static const uint64_t CPUCaps[CPU_COUNT] = { static const uint64_t CPUCaps[CPU_COUNT] = {