The size of the load chunk was calculated incorrectly in exehdr.s
since the INIT segment is no longer being part of the file anymore.
While at it, change atari-cassette.cfg so that order of BSS and INIT
is the same as in the other configs. See 692f96409d why it was
in different order.
This PR is the second of two PRs that replaces earlier PRs #2589 and #2590. Due to a git branching mishap it was decided to re-partition the new functionality in two sequential PRs that offer self-contained, new functionality to sim65.
The functionality in this second and last PR provides the following things in relation to the new "peripheral" support:
* C support: there is now an include/sim65.h that can be included from C. It provides access to the memory-mapped peripheral addresses.
* Asm support: there is now an asminc/sim65.inc that can be included from assembly. It provides symbolic labels for the memory-mapped peripheral addresses.
Note: the two items above are implemented by adding a "_peripherals" symbol to cfg/sim6502.cfg and cfg/sim65c02.cfg, with the fixed base address of the peripherals memory aperture (0xffc0).
* Updated the sim65 documentation to describe the peripherals in some detail, with examples that show to use the new features from within C.
* Some examples in the new samples/sim5/ directory. These are currently not integrated in the build system (in other words, there's no Makefile there), because I don't know how to do that. I will happily implement that after #2582 is taken care of.
If that is not acceptable, the next best thing will be for somebody else (who understands how the Makefiles are set up) to take care of this.
If that's not going to happen, and we don't want examples that are not properly integrated with the build system, there's always the option of removing these samples from the PR.
This PR is the first of two PRs that replaces earlier PRs #2589 and #2590.
Due to a git branching mishap it was decided to re-partition the new
functionality in two sequential PRs that offer self-contained, new
functionality to sim65.
The functionality in this first PR extends the sim65 simulator in the following ways:
(1) It provides tracing functionality, i.e., the possibility of printing one line of simulator state information per instruction executed.
(2) It provides a memory mapped "sim65 control" peripheral that allows control of (a) the tracing functionality, and (b) the cpu mode.
(3) It provides command-line options to sim65 to enable the tracing, and to override the CPU mode as specified in the program file header.
More detailed information and some discussion can be found in the discussions with the (now retracted) PRs #2589 and #2590.
This PR provides the technical infrastructure inside the sim65 simulator program itself. Once this PR is accepted, a follow-up PR will be posted that adds C and assembly-language support for the new tracing and peripheral features so they can be easily accessed from the CC65 compiler and the CA65 assembler; some examples; and the documentation for these features. The lack of the latter, in this pull request, will be addressed then.
