Commit Graph

102 Commits

Author SHA1 Message Date
Kugel Fuhr
bcd29de443 Much improved error messages for ca65. For most errors it will now say what
was expected and what was found instead. Also improved error recovery in a few
places.
2025-07-06 08:40:05 +02:00
mrdudz
629252c562 its CSG extensions, not GTE 2025-06-29 01:51:10 +02:00
mrdudz
0b49d66f05 sort table 2025-06-28 01:06:37 +02:00
mrdudz
b38422ef9f 65CE02 has phz and asw 2025-06-28 00:58:19 +02:00
mrdudz
e93356e3bb add 65CE02 table 2025-06-28 00:38:16 +02:00
mrdudz
c3b75f0ac1 comment 2025-06-22 01:15:10 +02:00
mrdudz
4a11fa791a more codestyle 2025-06-21 22:33:43 +02:00
mrdudz
12e40f4aff fix some codestyle 2025-06-21 22:05:30 +02:00
mrdudz
37144ed014 fix akkumulator addressing for some compound instructions 2025-06-21 20:35:25 +02:00
mrdudz
9344d87b05 part of #1792 - 48GS02 assembler support 2025-06-21 00:56:34 +02:00
mrdudz
05506ede2a comments 2025-06-18 02:41:22 +02:00
mrdudz
499fcbdb5f we dont use the table in the custom jsr 2025-06-18 02:38:34 +02:00
mrdudz
80b4ea304b fix table for added address modes 2025-06-18 02:24:59 +02:00
mrdudz
9eecd794b1 less hacky way to get the addr mode 2025-06-18 02:03:52 +02:00
mrdudz
20e7c54fa3 more m740 fixes, makes the regression test work 2025-06-16 20:32:54 +02:00
mrdudz
7b12962eec fix m740, survives disasm/asm roundtrip now, still needs some work though 2025-06-16 01:17:36 +02:00
mrdudz
5be4c4697c original patch 2025-06-15 18:25:01 +02:00
mrdudz
aaa1058d32 use explicit markers (comments) for the bsearch table checking, simplifies the scripts and makes them more robust too :) 2025-06-09 21:48:20 +02:00
mrdudz
ba80de5efc fix bsearch tables that must be sorted, add comment to all tables that must be sorted 2025-06-09 17:58:58 +02:00
bbbradsmith
28ffe2f59b add jmp page crossing to --relax-checks, document it, fix --relax-checks documentation (segment branch error is not suppressed) 2023-08-19 15:39:51 -04:00
Brad Smith
5ed7153841 Merge branch 'master' into ca65_jmp_abs_wrap_error 2023-05-03 21:12:37 -04:00
bbbradsmith
65f773f5ee Explicit z: should suppress "Suspicious address expression" warning #194 2023-05-03 01:01:21 -04:00
Bob Andrews
08223360d5 Update instr.c 2023-05-02 12:43:50 +02:00
bbbradsmith
016b03e356 ca65 jmp (abs) wrap warning only applies to 6502, later CPUs do not have this bug 2023-03-07 17:00:38 -05:00
bbbradsmith
3d41a5b516 allow immedite style syntax variation for BRK signature byte 2023-02-25 08:23:47 -05:00
bbbradsmith
cd8fa39066 optional BRK signature on all 6502 CPUs, not just 65816 (also COP) 2023-02-24 22:40:29 -05:00
bbbradsmith
ba038e921f jmp (abs) page wrapping should be an error, not a warning, also only applies to 6502 CPU 2023-02-21 17:06:21 -05:00
bbbradsmith
ccf3994e3b ca65 jsr/jmp/rts will not promote to jsl/jml/rtl by default, but can still be enabled with new feature long_jsr_jmp_rts 2023-02-21 04:00:34 -05:00
mrdudz
253af1ed07 Force 16bit address for absolute-indirect-x-indexed in 65816 mode.
should fix issue #1846 (and hopefully not break anything :))
2022-09-03 18:36:40 +02:00
mrdudz
3c1bb85b8e remove dangling spaces 2022-04-17 16:07:09 +02:00
Zsolt Branyiczky
63543dee07 Revert transient modification of EATab Table 0 comment 2020-11-19 22:02:07 +01:00
Zsolt Branyiczky
0e98818db5 assembled SAC and SIR opcodes of 6502DTV cpu were wrong 2020-11-19 22:02:07 +01:00
Zsolt Branyiczky
0f7cf87bfa Synchronizin InsTab6502DTV instructions table for DTV with the illegal opcodes verified by VICE-emu tests 2020-11-15 16:35:55 +01:00
Zsolt Branyiczky
92c013944e Mistyped comment, missing comma 2020-11-15 16:35:55 +01:00
Zsolt Branyiczky
b33b053307 add c64dtv support 2020-11-15 16:35:55 +01:00
Greg King
c05a750f47 Fixed some copy-&-paste typo mistakes about HuC6280's TMA mnemonic. 2020-10-01 07:25:08 -04:00
bbbradsmith
ac2ecb0b2c 65816 now generate EXPR_NEARADDR instead of EXPR_WORD0 for default assumed address mode, which will be validated by the linker's range check rather than blindly truncated. Assuming the assembler correctly validated this, the linker is allowed to truncate. 2019-05-11 12:32:44 +02:00
Stefan
b93b88211c WDM support (#721)
WDM support
2018-08-19 10:29:25 -04:00
Greg King
d13d068e71 Fixed the generation of the opcode byte when BRK is given an operand, in 65816 CPU mode.
The bug was created by commit 7e8bb7b700.
2018-08-16 23:51:04 -04:00
Greg King
ad6c2dbe7b Added code to make the 65816's MVN and MVP instructions handle both immediate (bank) and far-address operands. 2018-07-29 03:50:02 -04:00
Greg King
eeb1b927ce Fixed the order in which the 65816's block-move instructions' operands are written and assembled.
The source bank number is written first; but, assembled second.
The destination bank is written second; but, assembled first.
2018-07-05 10:58:59 -04:00
Michael Kohn
5ecd902fbf The opcode for BS should be 0x0C. 2018-05-13 06:31:05 -05:00
Greg King
7e8bb7b700 Fixed ca65's BRK instruction encoding for the 65816.
BRK is two bytes on all 6502 variants; but, the 65816's maker declared officially that assemblers should support an optional operand.
2017-02-12 14:54:57 -05:00
Sven Oliver Moll
48f64de720 4510 support: yet another round up little updates 2016-08-31 20:18:54 +02:00
Sven Oliver Moll
4384603eeb 4510 support: added some other small improvements:
- fixed typo in doc/ca65.sgml
- Greg found a way to get rid of one extra opcode handling in total
2016-08-30 22:58:40 +02:00
Sven Oliver Moll
91f8e09bcc 4510 support: fixed some cosmetical stuff and documentation 2016-08-29 23:29:31 +02:00
Sven Oliver Moll
0538184699 Add 4510 support for C65/C64DX 2016-08-29 10:45:18 +02:00
David M. Lloyd
8f0146f14a Add missing WDC instructions 2016-07-28 11:55:25 -05:00
Wayne LaBelle
d3b2b3df6b Move SBC to correct location in 6280 instruction table 2015-01-11 16:10:34 -05:00
mrdudz
6273d1cdc0 actually make TAS work :) 2014-11-20 02:47:33 +01:00