Bob Andrews
GitHub
814
test/asm/cpudetect/allinst.inc
Normal file
814
test/asm/cpudetect/allinst.inc
Normal file
@@ -0,0 +1,814 @@
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; just emit to bss for now, this way the output wont get checked, which is
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; fine - we only want to see if the assembler accepts all the opcodes it
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; should accept for the current CPU mode
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.bss
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.if (.cpu .bitand CPU_ISET_6502)
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.scope
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; regular basic 6502 (legal) instruction set
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LABEL0:
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brk ; $00
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ora ($12,x) ; $01
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ora $12 ; $05
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asl $12 ; $06
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php ; $08
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ora #$12 ; $09
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asl a ; $0a
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ora $1234 ; $0d
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asl $1234 ; $0e
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bpl LABEL0 ; $10
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ora ($12),y ; $11
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ora $12,x ; $15
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asl $12,x ; $16
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clc ; $18
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ora $1234,y ; $19
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ora $1234,x ; $1d
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asl $1234,x ; $1e
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jsr $1234 ; $20
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and ($12,x) ; $21
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bit $12 ; $24
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and $12 ; $25
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rol $12 ; $26
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plp ; $28
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and #$12 ; $29
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rol a ; $2a
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bit $1234 ; $2c
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and $1234 ; $2d
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rol $1234 ; $2e
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bmi LABEL ; $30
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and ($12),y ; $31
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and $12,x ; $35
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rol $12,x ; $36
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sec ; $38
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and $1234,y ; $39
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and $1234,x ; $3d
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rol $1234,x ; $3e
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rti ; $40
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eor ($12,x) ; $41
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eor $12 ; $45
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lsr $12 ; $46
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pha ; $48
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eor #$12 ; $49
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lsr a ; $4a
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jmp $1234 ; $4c
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eor $1234 ; $4d
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lsr $1234 ; $4e
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bvc LABEL ; $50
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eor ($12),y ; $51
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eor $12,x ; $55
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lsr $12,x ; $56
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cli ; $58
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eor $1234,y ; $59
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eor $1234,x ; $5d
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lsr $1234,x ; $5e
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rts ; $60
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adc ($12,x) ; $61
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adc $12 ; $65
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ror $12 ; $66
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pla ; $68
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adc #$12 ; $69
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ror a ; $6a
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jmp ($1234) ; $6c
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adc $1234 ; $6d
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ror $1234 ; $6e
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bvs LABEL ; $70
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adc ($12),y ; $71
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adc $12,x ; $75
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ror $12,x ; $76
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sei ; $78
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adc $1234,y ; $79
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adc $1234,x ; $7d
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ror $1234,x ; $7e
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LABEL:
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sta ($12,x) ; $81
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sty $12 ; $84
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sta $12 ; $85
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stx $12 ; $86
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dey ; $88
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txa ; $8a
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sty $1234 ; $8c
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sta $1234 ; $8d
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stx $1234 ; $8e
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bcc LABEL ; $90
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sta ($12),y ; $91
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sty $12,x ; $94
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sta $12,x ; $95
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stx $12,y ; $96
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tya ; $98
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sta $1234,y ; $99
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txs ; $9a
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sta $1234,x ; $9d
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ldy #$12 ; $a0
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lda ($12,x) ; $a1
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ldx #$12 ; $a2
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ldy $12 ; $a4
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lda $12 ; $a5
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ldx $12 ; $a6
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tay ; $a8
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lda #$12 ; $a9
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tax ; $aa
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ldy $1234 ; $ac
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lda $1234 ; $ad
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ldx $1234 ; $ae
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bcs LABEL ; $b0
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lda ($12),y ; $b1
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ldy $12,x ; $b4
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lda $12,x ; $b5
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ldx $12,y ; $b6
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clv ; $b8
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lda $1234,y ; $b9
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tsx ; $ba
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ldy $1234,x ; $bc
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lda $1234,x ; $bd
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ldx $1234,y ; $be
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cpy #$12 ; $c0
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cmp ($12,x) ; $c1
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cpy $12 ; $c4
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cmp $12 ; $c5
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dec $12 ; $c6
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iny ; $c8
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cmp #$12 ; $c9
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dex ; $ca
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cpy $1234 ; $cc
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cmp $1234 ; $cd
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dec $1234 ; $ce
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bne LABEL ; $d0
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cmp ($12),y ; $d1
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cmp $12,x ; $d5
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dec $12,x ; $d6
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cld ; $d8
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cmp $1234,y ; $d9
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cmp $1234,x ; $dd
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dec $1234,x ; $de
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cpx #$12 ; $e0
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sbc ($12,x) ; $e1
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cpx $12 ; $e4
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sbc $12 ; $e5
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inc $12 ; $e6
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inx ; $e8
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sbc #$12 ; $e9
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nop ; $ea
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cpx $1234 ; $ec
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sbc $1234 ; $ed
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inc $1234 ; $ee
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beq LABEL1 ; $f0
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sbc ($12),y ; $f1
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sbc $12,x ; $f5
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inc $12,x ; $f6
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sed ; $f8
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sbc $1234,y ; $f9
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sbc $1234,x ; $fd
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inc $1234,x ; $fe
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LABEL1:
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.endscope
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.endif
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.if (.cpu .bitand CPU_ISET_6502X)
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.scope
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; all "undocumented" 6502 instructions (aka "unintended opcodes")
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jam ; $02
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slo ($12,x) ; $03
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nop $12 ; $04
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slo $12 ; $07
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anc #$12 ; $0b
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nop $1234 ; $0c
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slo $1234 ; $0f
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jam ; $12
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slo ($12),y ; $13
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nop $12,x ; $14
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slo $12,y ; $17
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nop ; $1a
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slo $1234,y ; $1b
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nop $1234,x ; $1c
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slo $1234,x ; $1f
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jam ; $22
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rla ($12,x) ; $23
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rla $12 ; $27
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anc #$12 ; $2b
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rla $1234 ; $2f
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jam ; $32
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rla ($12),y ; $33
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nop $12,x ; $34
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rla $12,y ; $37
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nop ; $3a
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rla $1234,y ; $3b
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nop $1234,x ; $3c
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rla $1234,x ; $3f
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jam ; $42
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sre ($12,x) ; $43
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nop $12 ; $44
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sre $12 ; $47
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alr #$12 ; $4b
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sre $1234 ; $4f
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jam ; $52
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sre ($12),y ; $53
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nop $12,x ; $54
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sre $12,y ; $57
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nop ; $5a
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sre $1234,y ; $5b
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nop $1234,x ; $5c
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sre $1234,x ; $5f
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jam ; $62
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rra ($12,x) ; $63
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nop $12 ; $64
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rra $12 ; $67
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arr #$12 ; $6b
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rra $1234 ; $6f
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jam ; $72
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rra ($12),y ; $73
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nop $12,x ; $74
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rra $12,y ; $77
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nop ; $7a
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rra $1234,y ; $7b
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nop $1234,x ; $7c
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rra $1234,x ; $7f
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nop #$12 ; $80
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nop #$12 ; $82
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sax ($12,x) ; $83
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sax $12 ; $87
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nop #$12 ; $89
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ane #$12 ; $8b
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sax $1234 ; $8f
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jam ; $92
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sha ($12),y ; $93
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sax $12,y ; $97
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tas $1234,y ; $9b
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shy $1234,x ; $9c
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shx $1234,y ; $9e
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sha $1234,y ; $9f
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lax ($12,x) ; $a3
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lax $12 ; $a7
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lax #$12 ; $ab
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lax $1234 ; $af
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jam ; $b2
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lax ($12),y ; $b3
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lax $12,y ; $b7
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las $1234,y ; $bb
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lax $1234,y ; $bf
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nop #$12 ; $c2
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dcp ($12,x) ; $c3
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dcp $12 ; $c7
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axs #$12 ; $cb
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dcp $1234 ; $cf
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jam ; $d2
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dcp ($12),y ; $d3
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nop $12,x ; $d4
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dcp $12,y ; $d7
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nop ; $da
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dcp $1234,y ; $db
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nop $1234,x ; $dc
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dcp $1234,x ; $df
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nop #$12 ; $e2
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isc ($12,x) ; $e3
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isc $12 ; $e7
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sbc #$12 ; $eb
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isc $1234 ; $ef
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jam ; $f2
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isc ($12),y ; $f3
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nop $12,x ; $f4
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isc $12,y ; $f7
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nop ; $fa
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isc $1234,y ; $fb
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nop $1234,x ; $fc
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isc $1234,x ; $ff
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.endscope
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.endif
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.if (.cpu .bitand CPU_ISET_6502DTV)
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.scope
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LABEL:
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; opcodes added over 6502 (these are JAM on 6502)
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bra LABEL ; $12
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sac #$12 ; $32
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sir #$12 ; $42
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; opcodes added over 6502, which work the same as the "illegal" opcodes on 6502
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nop $12 ; $04
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nop $1234 ; $0c
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nop $12,x ; $14
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nop ; $1a
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nop $1234,x ; $1c
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nop $12,x ; $34
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nop ; $3a
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nop $1234,x ; $3c
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nop $12 ; $44
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nop $12,x ; $54
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nop ; $5a
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nop $1234,x ; $5c
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nop $12 ; $64
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nop $12,x ; $74
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nop ; $7a
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nop $1234,x ; $7c
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nop #$12 ; $80
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nop #$12 ; $82
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nop #$12 ; $89
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nop #$12 ; $c2
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nop $12,x ; $d4
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nop ; $da
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nop $1234,x ; $dc
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nop #$12 ; $e2
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nop $12,x ; $f4
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nop ; $fa
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nop $1234,x ; $fc
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anc #$12 ; $0b
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anc #$12 ; $2b
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rla ($12,x) ; $23
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rla $12 ; $27
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rla $1234 ; $2f
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rla ($12),y ; $33
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rla $12,y ; $37
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rla $1234,y ; $3b
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rla $1234,x ; $3f
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lax ($12,x) ; $a3
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lax $12 ; $a7
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lax #$12 ; $ab
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lax $1234 ; $af
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lax ($12),y ; $b3
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lax $12,y ; $b7
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lax $1234,y ; $bf
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las $1234,y ; $bb
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alr #$12 ; $4b
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arr #$12 ; $6b
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rra ($12,x) ; $63
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rra $12 ; $67
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rra $1234 ; $6f
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rra ($12),y ; $73
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rra $12,y ; $77
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rra $1234,y ; $7b
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rra $1234,x ; $7f
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shy $1234,x ; $9c
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shx $1234,y ; $9e
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axs #$12 ; $cb
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sbc #$12 ; $eb
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.endscope
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.endif
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;------------------------------------------------------------------------------
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; The 65c02 is the CMOS re-design of the 6502. It has a few improvements:
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;
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; 65C02 65ce02
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;
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; $04 tsb zp
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; $0c tsb abs16
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; $12 ora (zp) (-> ora (zp), z)
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; $14 trb zp
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; $1a inc
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; $1c trb abs16
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; $32 and (zp) (-> and (zp), z)
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; $34 bit zp, x
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; $3a dec
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; $3c bit abs16, x
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; $52 eor (zp) (-> eor (zp), z)
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; $5a phy
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; $64 stz zp (store z, not 0)
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; $72 adc (zp) (-> adc (zp), z)
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; $74 stz zp, x (store z, not 0)
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; $7a ply
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; $7c jmp (abs16, x)
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; $80 bra rel8
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; $89 bit #imm8
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; $92 sta (zp) (-> sta (zp), z)
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; $9c stz abs16 (store z, not 0)
|
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; $9e stz abs16, x (store z, not 0)
|
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; $b2 lda (zp) (-> lda (zp), z)
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; $d2 cmp (zp) (-> cmp (zp), z)
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; $da phx
|
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; $f2 sbc (zp) (-> sbc (zp), z)
|
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; $fa plx
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|
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; FIXME: currently CPU_ISET_65SC02 and CPU_65SC02 really means "65C02"
|
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|
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; FIXME: should really check for 65C02
|
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.if (.cpu .bitand CPU_ISET_65SC02)
|
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.scope
|
||||
; 65c02 instruction set adds some extra legal instructions to 6502
|
||||
tsb $12 ; $04
|
||||
tsb $1234 ; $0c
|
||||
;ora ($12) ; $12 FIXME: not working with 4510:ora (zp), z
|
||||
trb $12 ; $14
|
||||
inc a ; $1a
|
||||
trb $1234 ; $1c
|
||||
;and ($12) ; $32 FIXME: not working with 4510:and (zp), z
|
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bit $12,x ; $34
|
||||
dec a ; $3a
|
||||
bit $1234,x ; $3c
|
||||
;eor ($12) ; $52 FIXME: not working with 4510:eor (zp), z
|
||||
phy ; $5a
|
||||
stz $12 ; $64
|
||||
;adc ($12) ; $72 FIXME: not working with 4510:adc (zp), z
|
||||
stz $12,x ; $74
|
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ply ; $7a
|
||||
jmp ($1234) ; $7c
|
||||
LABEL:
|
||||
bra LABEL ; $80
|
||||
bit #$12 ; $89
|
||||
;sta ($12) ; $92 FIXME: not working with 4510:sta (zp), z
|
||||
stz $1234 ; $9c
|
||||
stz $1234,x ; $9e
|
||||
;lda ($12) ; $b2 FIXME: not working with 4510:lda (zp), z
|
||||
;cmp ($12) ; $d2 FIXME: not working with 4510:cmp (zp), z
|
||||
phx ; $da
|
||||
;sbc ($12) ; $f2 FIXME: not working with 4510:sbc (zp), z
|
||||
plx ; $fa
|
||||
.endscope
|
||||
.endif
|
||||
|
||||
; FIXME: hack so these opcodes get tested anyway, while 4510 is still quirky
|
||||
.if (.cpu .bitand CPU_ISET_65SC02)
|
||||
.if (.not .cpu = CPU_4510)
|
||||
ora ($12) ; $12
|
||||
and ($12) ; $32
|
||||
eor ($12) ; $52
|
||||
adc ($12) ; $72
|
||||
sta ($12) ; $92
|
||||
lda ($12) ; $b2
|
||||
cmp ($12) ; $d2
|
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sbc ($12) ; $f2
|
||||
.endif
|
||||
.endif
|
||||
|
||||
; TODO: R65C02
|
||||
; The R65C02 is a superset of the 65C02. It adds bit manipulation instructions:
|
||||
; smbB zp set bit in zp location
|
||||
; rmbB zp reset bit in zp location
|
||||
; bbsB zp, rel8 branch if bit is set in zp location
|
||||
; bbrB zp, rel8 branch if bit is reset in zp location
|
||||
|
||||
; FIXME: currently CPU_ISET_65C02 and CPU_65C02 really means "W65C02"
|
||||
|
||||
; FIXME: should really check for R65C02
|
||||
|
||||
.if (.cpu .bitand CPU_ISET_65C02)
|
||||
|
||||
; R65C02 instruction set adds some extra legal instructions to 65C02
|
||||
rmb0 $12 ; $07
|
||||
bbr0 $12, LABEL3 ; $0f
|
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rmb1 $12 ; $17
|
||||
bbr1 $12, LABEL3 ; $1f
|
||||
rmb2 $12 ; $27
|
||||
bbr2 $12, LABEL3 ; $2f
|
||||
rmb3 $12 ; $37
|
||||
bbr3 $12, LABEL3 ; $3f
|
||||
rmb4 $12 ; $47
|
||||
bbr4 $12, LABEL3 ; $4f
|
||||
rmb5 $12 ; $57
|
||||
bbr5 $12, LABEL3 ; $5f
|
||||
rmb6 $12 ; $67
|
||||
bbr6 $12, LABEL3 ; $6f
|
||||
rmb7 $12 ; $77
|
||||
bbr7 $12, LABEL3 ; $7f
|
||||
LABEL3:
|
||||
smb0 $12 ; $87
|
||||
bbs0 $12, LABEL3 ; $8f
|
||||
smb1 $12 ; $97
|
||||
bbs1 $12, LABEL3 ; $9f
|
||||
smb2 $12 ; $a7
|
||||
bbs2 $12, LABEL3 ; $af
|
||||
smb3 $12 ; $b7
|
||||
bbs3 $12, LABEL3 ; $bf
|
||||
smb4 $12 ; $c7
|
||||
bbs4 $12, LABEL3 ; $cf
|
||||
smb5 $12 ; $d7
|
||||
bbs5 $12, LABEL3 ; $df
|
||||
smb6 $12 ; $e7
|
||||
bbs6 $12, LABEL3 ; $ef
|
||||
smb7 $12 ; $f7
|
||||
bbs7 $12, LABEL3 ; $ff
|
||||
|
||||
.endif
|
||||
|
||||
|
||||
; TODO: W65C02
|
||||
; The W65C02 is a superset of the R65C02. It only adds two instructions:
|
||||
;
|
||||
; $cb wai wait for interrupt
|
||||
; $db stp wait for reset
|
||||
|
||||
; FIXME: currently CPU_ISET_65C02 and CPU_65C02 really means "W65C02"
|
||||
|
||||
; FIXME: should really check for W65C02
|
||||
|
||||
.if (.cpu = CPU_65C02)
|
||||
wai ; $cb
|
||||
stp ; $db
|
||||
.endif
|
||||
|
||||
|
||||
; TODO: 65CE02
|
||||
; The 65CE02 is another superset of the R65C02. It has several improvements:
|
||||
;
|
||||
; $02 cle clear stack extend disable
|
||||
; $03 see set stack extend disable
|
||||
; $0b tsy transfer stack_ptr_high to Y
|
||||
; $12 ora (zp), z
|
||||
; $13 lbpl rel16
|
||||
; $1b inz increment Z
|
||||
; $22 jsr (abs16)
|
||||
; $23 jsr (abs16, x)
|
||||
; $2b tys transfer Y to stack_ptr_high
|
||||
; $32 and (zp), z
|
||||
; $33 lbmi rel16
|
||||
; $3b dez decrement Z
|
||||
; $42 neg negate A
|
||||
; $43 asr
|
||||
; $44 asr zp
|
||||
; $4b taz transfer A to Z
|
||||
; $52 eor (zp), z
|
||||
; $53 lbvc rel16
|
||||
; $54 asr zp, x
|
||||
; $5b tab
|
||||
; $5c aug "4-byte NOP reserved for future expansion"
|
||||
; $62 rtn #imm8
|
||||
; $63 lbsr rel16 relative jsr, "branch to subroutine"
|
||||
; $64 stz zp store Z
|
||||
; $6b tza transfer Z to A
|
||||
; $72 adc (zp), z
|
||||
; $73 lbvs rel16
|
||||
; $74 stz zp, x store Z
|
||||
; $7b tba
|
||||
; $82 sta (off8, s), y
|
||||
; $83 lbra rel16 relative jmp
|
||||
; $8b sty abs16, x
|
||||
; $92 sta (zp), z
|
||||
; $93 lbcc rel16
|
||||
; $9b stx abs16, y
|
||||
; $9c stz abs16 store Z
|
||||
; $9e stz abs16, x store Z
|
||||
; $a3 ldz #imm8
|
||||
; $ab ldz abs16
|
||||
; $b2 lda (zp), z
|
||||
; $b3 lbcs rel16
|
||||
; $bb ldz abs16, x
|
||||
; $c2 cpz #imm8
|
||||
; $c3 dew zp
|
||||
; $cb asw abs16
|
||||
; $d2 cmp (zp), z
|
||||
; $d3 lbne rel16
|
||||
; $d4 cpz zp
|
||||
; $db phz push Z
|
||||
; $dc cpz abs16
|
||||
; $e2 lda (off8, s), y
|
||||
; $e3 inw zp
|
||||
; $eb row abs16
|
||||
; $f2 sbc (zp), z
|
||||
; $f3 lbeq rel16
|
||||
; $f4 phw #imm16
|
||||
; $fb plz pull Z
|
||||
; $fc phw abs16
|
||||
|
||||
; FIXME: should really check for 65CE02
|
||||
|
||||
.if (.cpu .bitand CPU_ISET_4510)
|
||||
.scope
|
||||
; 65CE02 adds the following:
|
||||
cle ; $02
|
||||
see ; $03
|
||||
tsy ; $0b
|
||||
ora ($12), z ; $12 (ora (zp) on 65C02)
|
||||
lbpl $1234 ; $13
|
||||
inz ; $1b
|
||||
jsr ($1234) ; $22
|
||||
jsr ($1234,x) ; $23
|
||||
tys ; $2b
|
||||
and ($12), z ; $32 (and (zp) on 65C02)
|
||||
lbmi $1234 ; $33
|
||||
dez ; $3b
|
||||
neg ; $42
|
||||
asr a ; $43
|
||||
asr $12 ; $44
|
||||
taz ; $4b
|
||||
lbvc $1234 ; $53
|
||||
asr $12,x ; $54
|
||||
tab ; $5b
|
||||
;aug ; $5c FIXME: implement in assembler
|
||||
rtn #$12 ; $62
|
||||
bsr $1234 ; $63
|
||||
stz $12 ; $64 (stores 0 on 65C02)
|
||||
tza ; $6b
|
||||
adc ($12), z ; $72 (adc (zp) on 65C02)
|
||||
lbvs $1234 ; $73
|
||||
stz $12, x ; $74 (stores 0 on 65C02)
|
||||
tba ; $7b
|
||||
sta ($12,s),y ; $82
|
||||
lbra $1234 ; $83
|
||||
sty $1234,x ; $8b
|
||||
lbcc $1234 ; $93
|
||||
sta ($12), z ; $92 (sta (zp) on 65C02)
|
||||
stx $1234,y ; $9b
|
||||
stz $1234 ; $9c (stores 0 on 65C02)
|
||||
ldz #$12 ; $a3
|
||||
ldz $1234 ; $ab
|
||||
lda ($12), z ; $b2 (lda (zp) on 65C02)
|
||||
lbcs $1234 ; $b3
|
||||
ldz $1234,x ; $bb
|
||||
cpz #$12 ; $c2
|
||||
dew $12 ; $c3
|
||||
cmp ($12), z ; $d2 (cmp ($12) on 65C02)
|
||||
lbne $1234 ; $d3
|
||||
cpz $12 ; $d4
|
||||
cpz $1234 ; $dc
|
||||
lda ($12,s),y ; $e2
|
||||
inw $12 ; $e3
|
||||
row $1234 ; $eb
|
||||
sbc ($12), z ; $f2 (sbc (zp) on 65C02)
|
||||
lbeq $1234 ; $f3
|
||||
phw #$1234 ; $f4
|
||||
plz ; $fb
|
||||
phw $1234 ; $fc
|
||||
|
||||
.endscope
|
||||
.endif
|
||||
|
||||
|
||||
; The 4502 is a superset of the 65CE02. Opcode 5c (originally a "4-byte NOP
|
||||
; reserved for future expansion") has been changed to the "map" instruction,
|
||||
; now using implied addressing.
|
||||
;
|
||||
; $5c map
|
||||
; $cb asw abs
|
||||
; $db phz
|
||||
|
||||
.if (.cpu .bitand CPU_ISET_4510)
|
||||
.scope
|
||||
|
||||
; added to 65CE02
|
||||
map ; $5c ("4-byte NOP reserved for future expansion" on 65CE02)
|
||||
asw $1234 ; $cb (wai on W65C02)
|
||||
phz ; $db (stp on W65C02)
|
||||
|
||||
.endscope
|
||||
.endif
|
||||
|
||||
|
||||
; TODO: MEGA65
|
||||
; The m65 instruction set extends the 4502 instruction set using prefix bytes.
|
||||
; Therefore, the "normal" opcode table is the same as for the 4502 cpu
|
||||
|
||||
|
||||
; The HUC6280 is a superset of the R65C02. It adds some other instructions:
|
||||
|
||||
.if (.cpu .bitand CPU_ISET_HUC6280)
|
||||
.scope
|
||||
|
||||
; added to R65C02
|
||||
sxy ; $02
|
||||
st0 #$12 ; $03
|
||||
st1 #$12 ; $13
|
||||
sax ; $22
|
||||
st2 #$12 ; $23
|
||||
say ; $42
|
||||
tma #$10 ; $43
|
||||
bsr LABEL ; $44
|
||||
tam #$12 ; $53
|
||||
csl ; $54
|
||||
cla ; $62
|
||||
tii $1234, $5678, $9abc ; $73
|
||||
LABEL:
|
||||
clx ; $82
|
||||
tst #$12, $34 ; $83
|
||||
clx ; $82
|
||||
tst #$12, $34 ; $83
|
||||
tst #$12, $3456 ; $93
|
||||
tst #$12, $34, x ; $a3
|
||||
tst #$12, $3456, x ; $b3
|
||||
cly ; $c2
|
||||
tdd $1234, $5678, $9abc ; $c3
|
||||
tin $1234, $5678, $9abc ; $d3
|
||||
csh ; $d4
|
||||
tia $1234, $5678, $9abc ; $e3
|
||||
tai $1234, $5678, $9abc ; $f3
|
||||
set ; $f4
|
||||
|
||||
.endscope
|
||||
.endif
|
||||
|
||||
|
||||
.if (.cpu .bitand CPU_ISET_M740)
|
||||
.scope
|
||||
; Mitsubishi M740 - adds new instructions to 65SC02 (but also removes some)
|
||||
|
||||
jsr ($12) ; $02
|
||||
bbs0 a, LABEL ; $03
|
||||
bbs0 $12, LABEL ; $07
|
||||
seb0 a ; $0b
|
||||
seb0 $12 ; $0f
|
||||
bbc0 a, LABEL ; $13
|
||||
bbc0 $12, LABEL ; $17
|
||||
clb0 a ; $1b
|
||||
clb0 $12 ; $1f
|
||||
jsr $ff12 ; $22
|
||||
bbs1 a, LABEL ; $23
|
||||
bbs1 $12, LABEL ; $27
|
||||
seb1 a ; $2b
|
||||
seb1 $12 ; $2f
|
||||
bbc1 a, LABEL ; $33
|
||||
bbc1 $12, LABEL ; $37
|
||||
clb1 a ; $3b
|
||||
clb1 $12 ; $3f
|
||||
stp ; $42
|
||||
bbs2 a, LABEL ; $43
|
||||
com $12 ; $44
|
||||
bbs2 $12, LABEL ; $47
|
||||
seb2 a ; $4b
|
||||
seb2 $12 ; $4f
|
||||
bbc2 a, LABEL ; $53
|
||||
bbc2 $12, LABEL ; $57
|
||||
clb2 a ; $5b
|
||||
clb2 $12 ; $5f
|
||||
bbs3 a, LABEL ; $63
|
||||
bbs3 $12, LABEL ; $67
|
||||
seb3 a ; $6b
|
||||
seb3 $12 ; $6f
|
||||
bbc3 a, LABEL ; $73
|
||||
bbc3 $12, LABEL ; $77
|
||||
clb3 a ; $7b
|
||||
clb3 $12 ; $7f
|
||||
LABEL:
|
||||
rrf $12 ; $82
|
||||
bbs4 a, LABEL ; $83
|
||||
bbs4 $12, LABEL ; $87
|
||||
seb4 a ; $8b
|
||||
seb4 $12 ; $8f
|
||||
bbc4 a, LABEL ; $93
|
||||
bbc4 $12, LABEL ; $97
|
||||
clb4 a ; $9b
|
||||
clb4 $12 ; $9f
|
||||
bbs5 a, LABEL ; $a3
|
||||
bbs5 $12, LABEL ; $a7
|
||||
seb5 a ; $ab
|
||||
seb5 $12 ; $af
|
||||
bbc5 a, LABEL ; $b3
|
||||
bbc5 $12, LABEL ; $b7
|
||||
clb5 a ; $bb
|
||||
clb5 $12 ; $bf
|
||||
slw ; $c2
|
||||
bbs6 a, LABEL ; $c3
|
||||
bbs6 $12, LABEL ; $c7
|
||||
seb6 a ; $cb
|
||||
seb6 $12 ; $cf
|
||||
bbc6 a, LABEL ; $d3
|
||||
bbc6 $12, LABEL ; $d7
|
||||
clb6 a ; $db
|
||||
clb6 $12 ; $df
|
||||
fst ; $e2
|
||||
bbs7 a, LABEL ; $e3
|
||||
bbs7 $12, LABEL ; $e7
|
||||
seb7 a ; $eb
|
||||
seb7 $12 ; $ef
|
||||
bbc7 a, LABEL ; $f3
|
||||
bbc7 $12, LABEL ; $f7
|
||||
clb7 a ; $fb
|
||||
clb7 $12 ; $ff
|
||||
|
||||
; replaced from 65SC02
|
||||
clt ; $12
|
||||
set ; $32
|
||||
ldm $12, #$34 ; $3c
|
||||
tst $12 ; $64
|
||||
|
||||
; removed from 65SC02 (replaced by new)
|
||||
; ora ($12) ; $12
|
||||
; and ($12) ; $32
|
||||
; bit $1234,x ; $3c
|
||||
; stz $12 ; $64
|
||||
|
||||
; removed from 65SC02
|
||||
; tsb $12 ; $04
|
||||
; tsb $1234 ; $0c
|
||||
; trb $12 ; $14
|
||||
; trb $1234 ; $1c
|
||||
; bit $12,y ; $34
|
||||
; eor ($12) ; $52
|
||||
; phy ; $5a
|
||||
; adc ($12) ; $72
|
||||
; stz $12,y ; $74
|
||||
; ply ; $7a
|
||||
; jmp ($1234) ; $7c
|
||||
; bit #$12 ; $89
|
||||
; sta ($12) ; $92
|
||||
; stz $1234 ; $9c
|
||||
; stz $1234,x ; $9e
|
||||
; cmp ($12) ; $d2
|
||||
; phx ; $da
|
||||
; sbc ($12) ; $f2
|
||||
; plx ; $fa
|
||||
|
||||
.endscope
|
||||
.endif
|
||||
|
||||
@@ -32,6 +32,10 @@
|
||||
sac #$00
|
||||
.endif
|
||||
|
||||
.ifpm740
|
||||
jsr $ff12
|
||||
.endif
|
||||
|
||||
|
||||
; step 2: check for bitwise compatibility of instructions sets
|
||||
; (made verbose for better reading with hexdump/hd(1))
|
||||
@@ -76,6 +80,15 @@
|
||||
.byte 0,"CPU_ISET_6502DTV"
|
||||
.endif
|
||||
|
||||
.if (.cpu .bitand CPU_ISET_M740)
|
||||
.byte 0,"CPU_ISET_M740"
|
||||
.endif
|
||||
|
||||
; FIXME: something with 65816 is quirky
|
||||
.if (.not .cpu .bitand CPU_ISET_65816)
|
||||
.include "allinst.inc"
|
||||
.endif
|
||||
|
||||
|
||||
; step 3: switch through all supported cpus to verify the pseudo-op is there
|
||||
|
||||
@@ -86,3 +99,4 @@
|
||||
.p816
|
||||
.p4510
|
||||
.pdtv
|
||||
.pm740
|
||||
|
||||
BIN
test/asm/cpudetect/m740-cpudetect.ref
Normal file
BIN
test/asm/cpudetect/m740-cpudetect.ref
Normal file
Binary file not shown.
BIN
test/asm/opcodes/m740-opcodes.ref
Normal file
BIN
test/asm/opcodes/m740-opcodes.ref
Normal file
Binary file not shown.
@@ -1,260 +1,565 @@
|
||||
.setcpu "65C02"
|
||||
; copy of 65c02, comments note changes to the m740 according to
|
||||
; http://documentation.renesas.com/doc/products/mpumcu/rej09b0322_740sm.pdf
|
||||
; da65 V2.19 - Git 89651fd8b
|
||||
; Created: 2025-06-16 20:10:42
|
||||
; Input file: testfile
|
||||
; Page: 1
|
||||
|
||||
brk
|
||||
ora ($12,x)
|
||||
.byte $02,$00,$00 ; jsr zp,ind
|
||||
.byte $03,$00,$00 ; bbs 0,a
|
||||
tsb $12 ; .byte $04
|
||||
ora $12
|
||||
asl $12
|
||||
rmb0 $12 ; bbs 0,zp
|
||||
php
|
||||
ora #$12
|
||||
asl a
|
||||
.byte $0B,$00,$00 ; seb 0,a
|
||||
tsb $3456 ; .byte $0c
|
||||
ora $3456
|
||||
asl $3456
|
||||
bbr0 $12,*+122 ; seb 0,zp
|
||||
bpl *+122
|
||||
ora ($12),y
|
||||
ora ($12) ; clt
|
||||
.byte $13,$00,$00 ; bbc 0,a
|
||||
trb $12 ; .byte $14
|
||||
ora $12,x
|
||||
asl $12,x
|
||||
rmb1 $12 ; bbc 0,zp
|
||||
clc
|
||||
ora $3456,y
|
||||
inc a
|
||||
.byte $1B,$00,$00 ; clb 0,a
|
||||
trb $3456 ; .byte $1c
|
||||
ora $3456,x
|
||||
asl $3456,x
|
||||
bbr1 $12,*+122 ; clb 0,zp
|
||||
jsr $3456
|
||||
and ($12,x)
|
||||
.byte $22,$00,$00 ; jsr sp
|
||||
.byte $23,$00,$00 ; bbs 1,a
|
||||
bit $12
|
||||
and $12
|
||||
rol $12
|
||||
rmb2 $12 ; bbs 1,zp
|
||||
plp
|
||||
and #$12
|
||||
rol a
|
||||
.byte $2B,$00,$00 ; seb 1,a
|
||||
bit $3456
|
||||
and $3456
|
||||
rol $3456
|
||||
bbr2 $12,*+122 ; seb 1,zp
|
||||
bmi *+122
|
||||
and ($12),y
|
||||
and ($12) ; set
|
||||
.byte $33,$00,$00 ; bbc 1,a
|
||||
bit $12,x ; .byte $34
|
||||
and $12,x
|
||||
rol $12,x
|
||||
rmb3 $12 ; bbc 1,zp
|
||||
sec
|
||||
and $3456,y
|
||||
dec a
|
||||
.byte $3B,$00,$00 ; clb 1,a
|
||||
bit $3456,x ; ldm zp
|
||||
and $3456,x
|
||||
rol $3456,x
|
||||
bbr3 $12,*+122 ; clb 1,zp
|
||||
rti
|
||||
eor ($12,x)
|
||||
.byte $42,$00,$00 ; stp
|
||||
.byte $43,$00,$00 ; bbs 2,a
|
||||
.byte $44,$00,$00 ; com zp
|
||||
eor $12
|
||||
lsr $12
|
||||
rmb4 $12 ; bbs 2,zp
|
||||
pha
|
||||
eor #$12
|
||||
lsr a
|
||||
.byte $4B,$00,$00 ; seb 2,a
|
||||
jmp $3456
|
||||
eor $3456
|
||||
lsr $3456
|
||||
bbr4 $12,*+122 ; seb 2,zp
|
||||
bvc *+122
|
||||
eor ($12),y
|
||||
eor ($12) ; .byte $52
|
||||
.byte $53,$00,$00 ; bbc 2,a
|
||||
.byte $54,$00,$00
|
||||
eor $12,x
|
||||
lsr $12,x
|
||||
rmb5 $12 ; bbc 2,zp
|
||||
cli
|
||||
eor $3456,y
|
||||
phy
|
||||
.byte $5B,$00,$00 ; clb 2,a
|
||||
.byte $5C,$00,$00
|
||||
eor $3456,x
|
||||
lsr $3456,x
|
||||
bbr5 $12,*+122 ; clb 2,zp
|
||||
rts
|
||||
adc ($12,x)
|
||||
.byte $62,$00,$00 ; mul zp,x
|
||||
.byte $63,$00,$00 ; bbs 3,a
|
||||
stz $12 ; tst zp
|
||||
adc $12
|
||||
ror $12
|
||||
rmb6 $12 ; bbs 3,zp
|
||||
pla
|
||||
adc #$12
|
||||
ror a
|
||||
.byte $6B,$00,$00 ; seb 3,a
|
||||
jmp ($3456)
|
||||
adc $3456
|
||||
ror $3456
|
||||
bbr6 $12,*+122 ; seb 3,zp
|
||||
bvs *+122
|
||||
adc ($12),y
|
||||
adc ($12) ; .byte $72
|
||||
.byte $73,$00,$00 ; bbc 3,a
|
||||
stz $12,x ; .byte $74
|
||||
adc $12,x
|
||||
ror $12,x
|
||||
rmb7 $12 ; bbc 3,zp
|
||||
sei
|
||||
adc $3456,y
|
||||
ply
|
||||
.byte $7B,$00,$00 ; clb 3,a
|
||||
jmp ($3456,x) ; .byte $7c
|
||||
adc $3456,x
|
||||
ror $3456,x
|
||||
bbr7 $12,*+122 ; clb 3,zp
|
||||
bra *+122
|
||||
sta ($12,x)
|
||||
.byte $82,$00,$00 ; rrf zp
|
||||
.byte $83,$00,$00 ; bbs 4,a
|
||||
sty $12
|
||||
sta $12
|
||||
stx $12
|
||||
smb0 $12 ; bbs 4,zp
|
||||
dey
|
||||
bit #$12
|
||||
txa
|
||||
.byte $8B,$00,$00 ; seb 4,a
|
||||
sty $3456
|
||||
sta $3456
|
||||
stx $3456
|
||||
bbs0 $12,*+122 ; seb 4,zp
|
||||
bcc *+122
|
||||
sta ($12),y
|
||||
sta ($12) ; .byte $92
|
||||
.byte $93,$00,$00 ; bbc 4,a
|
||||
sty $12,x
|
||||
sta $12,x
|
||||
stx $12,y
|
||||
smb1 $12 ; bbc 4,zp
|
||||
tya
|
||||
sta $3456,y
|
||||
txs
|
||||
.byte $9B,$00,$00 ; clb 4,a
|
||||
stz $3456 ; .byte $9c
|
||||
sta $3456,x
|
||||
stz $3456,x ; .byte $9e
|
||||
bbs1 $12,*+122 ; clb 4,zp
|
||||
ldy #$12
|
||||
lda ($12,x)
|
||||
ldx #$12
|
||||
.byte $A3,$00,$00 ; bbs 5,a
|
||||
ldy $12
|
||||
lda $12
|
||||
ldx $12
|
||||
smb2 $12 ; bbs 5,zp
|
||||
tay
|
||||
lda #$12
|
||||
tax
|
||||
.byte $AB,$00,$00 ; seb 5,a
|
||||
ldy $3456
|
||||
lda $3456
|
||||
ldx $3456
|
||||
bbs2 $12,*+122 ; seb 5,zp
|
||||
bcs *+122
|
||||
lda ($12),y
|
||||
lda ($12) ; .byte $b2
|
||||
.byte $B3,$00,$00 ; bbc 5,a
|
||||
ldy $12,x
|
||||
lda $12,x
|
||||
ldx $12,y
|
||||
smb3 $12 ; bbc 5,zp
|
||||
clv
|
||||
lda $3456,y
|
||||
tsx
|
||||
.byte $BB,$00,$00 ; clb 5,a
|
||||
ldy $3456,x
|
||||
lda $3456,x
|
||||
ldx $3456,y
|
||||
bbs3 $12,*+122 ; clb 5,zp
|
||||
cpy #$12
|
||||
cmp ($12,x)
|
||||
.byte $C2,$00,$00 ; wit
|
||||
.byte $C3,$00,$00 ; bbs 6,a
|
||||
cpy $12
|
||||
cmp $12
|
||||
dec $12
|
||||
smb4 $12 ; bbs 6,zp
|
||||
iny
|
||||
cmp #$12
|
||||
dex
|
||||
.byte $CB,$00,$00 ; seb 6,a
|
||||
cpy $3456
|
||||
cmp $3456
|
||||
dec $3456
|
||||
bbs4 $12,*+122 ; seb 6,zp
|
||||
bne *+122
|
||||
cmp ($12),y
|
||||
cmp ($12) ; .byte $d2
|
||||
.byte $D3,$00,$00 ; bbc 6,a
|
||||
.byte $D4,$00,$00
|
||||
cmp $12,x
|
||||
dec $12,x
|
||||
smb5 $12 ; bbc 6,zp
|
||||
cld
|
||||
cmp $3456,y
|
||||
phx
|
||||
.byte $DB,$00,$00 ; clb 6,a
|
||||
.byte $DC,$00,$00
|
||||
cmp $3456,x
|
||||
dec $3456,x
|
||||
bbs5 $12,*+122 ; clb 6,zp
|
||||
cpx #$12
|
||||
sbc ($12,x)
|
||||
.byte $E2,$00,$00 ; div zp,x
|
||||
.byte $E3,$00,$00 ; bbs 7,a
|
||||
cpx $12
|
||||
sbc $12
|
||||
inc $12
|
||||
smb6 $12 ; bbs 7,zp
|
||||
inx
|
||||
sbc #$12
|
||||
nop
|
||||
.byte $EB,$00,$00 ; seb 7,a
|
||||
cpx $3456
|
||||
sbc $3456
|
||||
inc $3456
|
||||
bbs6 $12,*+122 ; seb 7,zp
|
||||
beq *+122
|
||||
sbc ($12),y
|
||||
sbc ($12) ; .byte $f2
|
||||
.byte $F3,$00,$00 ; bbc 7,a
|
||||
.byte $F4,$00,$00
|
||||
sbc $12,x
|
||||
inc $12,x
|
||||
smb7 $12 ; bbc 7,zp
|
||||
sed
|
||||
sbc $3456,y
|
||||
plx
|
||||
.byte $FB,$00,$00 ; clb 7,a
|
||||
.byte $FC,$00,$00
|
||||
sbc $3456,x
|
||||
inc $3456,x
|
||||
bbs7 $12,*+122 ; clb 7,zp
|
||||
|
||||
.setcpu "m740"
|
||||
|
||||
L000C := $000C
|
||||
L040C := $040C
|
||||
LFF0C := $FF0C
|
||||
brk
|
||||
.byte $0C
|
||||
.byte $04
|
||||
ora (L000C,x)
|
||||
.byte $04
|
||||
jsr (L000C)
|
||||
|
||||
.byte $04
|
||||
bbs0 a, L8018
|
||||
.byte $04
|
||||
.byte $04
|
||||
.byte $0C
|
||||
.byte $04
|
||||
ora L000C
|
||||
.byte $04
|
||||
asl L000C
|
||||
.byte $04
|
||||
bbs0 L000C, L801C
|
||||
L8018: php
|
||||
.byte $0C
|
||||
.byte $04
|
||||
.byte $09
|
||||
L801C: .byte $0C
|
||||
.byte $04
|
||||
asl a
|
||||
.byte $0C
|
||||
.byte $04
|
||||
seb0 a
|
||||
.byte $0C
|
||||
.byte $04
|
||||
.byte $0C
|
||||
.byte $0C
|
||||
.byte $04
|
||||
ora L040C
|
||||
asl L040C
|
||||
seb0 L000C
|
||||
.byte $04
|
||||
bpl L803E
|
||||
.byte $04
|
||||
ora (L000C),y
|
||||
.byte $04
|
||||
clt
|
||||
.byte $0C
|
||||
.byte $04
|
||||
bbc0 a, L8048
|
||||
.byte $04
|
||||
.byte $14
|
||||
.byte $0C
|
||||
L803E: .byte $04
|
||||
ora L000C,x
|
||||
.byte $04
|
||||
asl L000C,x
|
||||
.byte $04
|
||||
bbc0 L000C, L804C
|
||||
L8048: clc
|
||||
.byte $0C
|
||||
.byte $04
|
||||
.byte $19
|
||||
L804C: .byte $0C
|
||||
.byte $04
|
||||
inc a
|
||||
.byte $0C
|
||||
.byte $04
|
||||
clb0 a
|
||||
.byte $0C
|
||||
.byte $04
|
||||
.byte $1C
|
||||
.byte $0C
|
||||
.byte $04
|
||||
ora L040C,x
|
||||
asl L040C,x
|
||||
clb0 L000C
|
||||
.byte $04
|
||||
jsr L040C
|
||||
and (L000C,x)
|
||||
.byte $04
|
||||
jsr LFF0C
|
||||
.byte $04
|
||||
bbs1 a, L8078
|
||||
.byte $04
|
||||
bit L000C
|
||||
.byte $04
|
||||
and L000C
|
||||
.byte $04
|
||||
rol L000C
|
||||
.byte $04
|
||||
bbs1 L000C, L807C
|
||||
L8078: plp
|
||||
.byte $0C
|
||||
.byte $04
|
||||
.byte $29
|
||||
L807C: .byte $0C
|
||||
.byte $04
|
||||
rol a
|
||||
.byte $0C
|
||||
.byte $04
|
||||
seb1 a
|
||||
.byte $0C
|
||||
.byte $04
|
||||
bit L040C
|
||||
and L040C
|
||||
rol L040C
|
||||
seb1 L000C
|
||||
.byte $04
|
||||
bmi L809E
|
||||
.byte $04
|
||||
and (L000C),y
|
||||
.byte $04
|
||||
set
|
||||
.byte $0C
|
||||
.byte $04
|
||||
bbc1 a, L80A8
|
||||
.byte $04
|
||||
.byte $34
|
||||
.byte $0C
|
||||
L809E: .byte $04
|
||||
and L000C,x
|
||||
.byte $04
|
||||
rol L000C,x
|
||||
.byte $04
|
||||
bbc1 L000C, L80AC
|
||||
L80A8: sec
|
||||
.byte $0C
|
||||
.byte $04
|
||||
.byte $39
|
||||
L80AC: .byte $0C
|
||||
.byte $04
|
||||
dec a
|
||||
.byte $0C
|
||||
.byte $04
|
||||
clb1 a
|
||||
.byte $0C
|
||||
.byte $04
|
||||
ldm L000C, #$04
|
||||
and L040C,x
|
||||
rol L040C,x
|
||||
clb1 L000C
|
||||
.byte $04
|
||||
rti
|
||||
|
||||
.byte $0C
|
||||
.byte $04
|
||||
eor (L000C,x)
|
||||
.byte $04
|
||||
stp
|
||||
.byte $0C
|
||||
.byte $04
|
||||
bbs2 a, L80D8
|
||||
.byte $04
|
||||
com L000C
|
||||
.byte $04
|
||||
eor L000C
|
||||
.byte $04
|
||||
lsr L000C
|
||||
.byte $04
|
||||
bbs2 L000C, L80DC
|
||||
L80D8: pha
|
||||
.byte $0C
|
||||
.byte $04
|
||||
.byte $49
|
||||
L80DC: .byte $0C
|
||||
.byte $04
|
||||
lsr a
|
||||
.byte $0C
|
||||
.byte $04
|
||||
seb2 a
|
||||
.byte $0C
|
||||
.byte $04
|
||||
jmp L040C
|
||||
|
||||
eor L040C
|
||||
lsr L040C
|
||||
seb2 L000C
|
||||
.byte $04
|
||||
bvc L80FE
|
||||
.byte $04
|
||||
eor (L000C),y
|
||||
.byte $04
|
||||
.byte $52
|
||||
.byte $0C
|
||||
.byte $04
|
||||
bbc2 a, L8108
|
||||
.byte $04
|
||||
.byte $54
|
||||
.byte $0C
|
||||
L80FE: .byte $04
|
||||
eor L000C,x
|
||||
.byte $04
|
||||
lsr L000C,x
|
||||
.byte $04
|
||||
bbc2 L000C, L810C
|
||||
L8108: cli
|
||||
.byte $0C
|
||||
.byte $04
|
||||
.byte $59
|
||||
L810C: .byte $0C
|
||||
.byte $04
|
||||
.byte $5A
|
||||
.byte $0C
|
||||
.byte $04
|
||||
clb2 a
|
||||
.byte $0C
|
||||
.byte $04
|
||||
.byte $5C
|
||||
.byte $0C
|
||||
.byte $04
|
||||
eor L040C,x
|
||||
lsr L040C,x
|
||||
clb2 L000C
|
||||
.byte $04
|
||||
rts
|
||||
|
||||
.byte $0C
|
||||
.byte $04
|
||||
adc (L000C,x)
|
||||
.byte $04
|
||||
.byte $62
|
||||
.byte $0C
|
||||
.byte $04
|
||||
bbs3 a, L8138
|
||||
.byte $04
|
||||
tst L000C
|
||||
.byte $04
|
||||
adc L000C
|
||||
.byte $04
|
||||
ror L000C
|
||||
.byte $04
|
||||
bbs3 L000C, L813C
|
||||
L8138: pla
|
||||
.byte $0C
|
||||
.byte $04
|
||||
.byte $69
|
||||
L813C: .byte $0C
|
||||
.byte $04
|
||||
ror a
|
||||
.byte $0C
|
||||
.byte $04
|
||||
seb3 a
|
||||
.byte $0C
|
||||
.byte $04
|
||||
jmp (L040C)
|
||||
|
||||
adc L040C
|
||||
ror L040C
|
||||
seb3 L000C
|
||||
.byte $04
|
||||
bvs L815E
|
||||
.byte $04
|
||||
adc (L000C),y
|
||||
.byte $04
|
||||
.byte $72
|
||||
.byte $0C
|
||||
.byte $04
|
||||
bbc3 a, L8168
|
||||
.byte $04
|
||||
.byte $74
|
||||
.byte $0C
|
||||
L815E: .byte $04
|
||||
adc L000C,x
|
||||
.byte $04
|
||||
ror L000C,x
|
||||
.byte $04
|
||||
bbc3 L000C, L816C
|
||||
L8168: sei
|
||||
.byte $0C
|
||||
.byte $04
|
||||
.byte $79
|
||||
L816C: .byte $0C
|
||||
.byte $04
|
||||
.byte $7A
|
||||
.byte $0C
|
||||
.byte $04
|
||||
clb3 a
|
||||
.byte $0C
|
||||
.byte $04
|
||||
.byte $7C
|
||||
.byte $0C
|
||||
.byte $04
|
||||
adc L040C,x
|
||||
ror L040C,x
|
||||
clb3 L000C
|
||||
.byte $04
|
||||
bra L818E
|
||||
.byte $04
|
||||
sta (L000C,x)
|
||||
.byte $04
|
||||
rrf L000C
|
||||
.byte $04
|
||||
bbs4 a, L8198
|
||||
.byte $04
|
||||
sty L000C
|
||||
L818E: .byte $04
|
||||
sta L000C
|
||||
.byte $04
|
||||
stx L000C
|
||||
.byte $04
|
||||
bbs4 L000C, L819C
|
||||
L8198: dey
|
||||
.byte $0C
|
||||
.byte $04
|
||||
.byte $89
|
||||
L819C: .byte $0C
|
||||
.byte $04
|
||||
txa
|
||||
.byte $0C
|
||||
.byte $04
|
||||
seb4 a
|
||||
.byte $0C
|
||||
.byte $04
|
||||
sty L040C
|
||||
sta L040C
|
||||
stx L040C
|
||||
seb4 L000C
|
||||
.byte $04
|
||||
bcc L81BE
|
||||
.byte $04
|
||||
sta (L000C),y
|
||||
.byte $04
|
||||
.byte $92
|
||||
.byte $0C
|
||||
.byte $04
|
||||
bbc4 a, L81C8
|
||||
.byte $04
|
||||
sty L000C,x
|
||||
L81BE: .byte $04
|
||||
sta L000C,x
|
||||
.byte $04
|
||||
stx L000C,y
|
||||
.byte $04
|
||||
bbc4 L000C, L81CC
|
||||
L81C8: tya
|
||||
.byte $0C
|
||||
.byte $04
|
||||
.byte $99
|
||||
L81CC: .byte $0C
|
||||
.byte $04
|
||||
txs
|
||||
.byte $0C
|
||||
.byte $04
|
||||
clb4 a
|
||||
.byte $0C
|
||||
.byte $04
|
||||
.byte $9C
|
||||
.byte $0C
|
||||
.byte $04
|
||||
sta L040C,x
|
||||
.byte $9E
|
||||
.byte $0C
|
||||
.byte $04
|
||||
clb4 L000C
|
||||
.byte $04
|
||||
ldy #$0C
|
||||
.byte $04
|
||||
lda (L000C,x)
|
||||
.byte $04
|
||||
ldx #$0C
|
||||
.byte $04
|
||||
bbs5 a, L81F8
|
||||
.byte $04
|
||||
ldy L000C
|
||||
.byte $04
|
||||
lda L000C
|
||||
.byte $04
|
||||
ldx L000C
|
||||
.byte $04
|
||||
bbs5 L000C, L81FC
|
||||
L81F8: tay
|
||||
.byte $0C
|
||||
.byte $04
|
||||
.byte $A9
|
||||
L81FC: .byte $0C
|
||||
.byte $04
|
||||
tax
|
||||
.byte $0C
|
||||
.byte $04
|
||||
seb5 a
|
||||
.byte $0C
|
||||
.byte $04
|
||||
ldy L040C
|
||||
lda L040C
|
||||
ldx L040C
|
||||
seb5 L000C
|
||||
.byte $04
|
||||
bcs L821E
|
||||
.byte $04
|
||||
lda (L000C),y
|
||||
.byte $04
|
||||
jmp (L000C)
|
||||
|
||||
.byte $04
|
||||
bbc5 a, L8228
|
||||
.byte $04
|
||||
ldy L000C,x
|
||||
L821E: .byte $04
|
||||
lda L000C,x
|
||||
.byte $04
|
||||
ldx L000C,y
|
||||
.byte $04
|
||||
bbc5 L000C, L822C
|
||||
L8228: clv
|
||||
.byte $0C
|
||||
.byte $04
|
||||
.byte $B9
|
||||
L822C: .byte $0C
|
||||
.byte $04
|
||||
tsx
|
||||
.byte $0C
|
||||
.byte $04
|
||||
clb5 a
|
||||
.byte $0C
|
||||
.byte $04
|
||||
ldy L040C,x
|
||||
lda L040C,x
|
||||
ldx L040C,y
|
||||
clb5 L000C
|
||||
.byte $04
|
||||
cpy #$0C
|
||||
.byte $04
|
||||
cmp (L000C,x)
|
||||
.byte $04
|
||||
slw
|
||||
.byte $0C
|
||||
.byte $04
|
||||
bbs6 a, L8258
|
||||
.byte $04
|
||||
cpy L000C
|
||||
.byte $04
|
||||
cmp L000C
|
||||
.byte $04
|
||||
dec L000C
|
||||
.byte $04
|
||||
bbs6 L000C, L825C
|
||||
L8258: iny
|
||||
.byte $0C
|
||||
.byte $04
|
||||
.byte $C9
|
||||
L825C: .byte $0C
|
||||
.byte $04
|
||||
dex
|
||||
.byte $0C
|
||||
.byte $04
|
||||
seb6 a
|
||||
.byte $0C
|
||||
.byte $04
|
||||
cpy L040C
|
||||
cmp L040C
|
||||
dec L040C
|
||||
seb6 L000C
|
||||
.byte $04
|
||||
bne L827E
|
||||
.byte $04
|
||||
cmp (L000C),y
|
||||
.byte $04
|
||||
.byte $D2
|
||||
.byte $0C
|
||||
.byte $04
|
||||
bbc6 a, L8288
|
||||
.byte $04
|
||||
.byte $D4
|
||||
.byte $0C
|
||||
L827E: .byte $04
|
||||
cmp L000C,x
|
||||
.byte $04
|
||||
dec L000C,x
|
||||
.byte $04
|
||||
bbc6 L000C, L828C
|
||||
L8288: cld
|
||||
.byte $0C
|
||||
.byte $04
|
||||
.byte $D9
|
||||
L828C: .byte $0C
|
||||
.byte $04
|
||||
.byte $DA
|
||||
.byte $0C
|
||||
.byte $04
|
||||
clb6 a
|
||||
.byte $0C
|
||||
.byte $04
|
||||
.byte $DC
|
||||
.byte $0C
|
||||
.byte $04
|
||||
cmp L040C,x
|
||||
dec L040C,x
|
||||
clb6 L000C
|
||||
.byte $04
|
||||
cpx #$0C
|
||||
.byte $04
|
||||
sbc (L000C,x)
|
||||
.byte $04
|
||||
fst
|
||||
.byte $0C
|
||||
.byte $04
|
||||
bbs7 a, L82B8
|
||||
.byte $04
|
||||
cpx L000C
|
||||
.byte $04
|
||||
sbc L000C
|
||||
.byte $04
|
||||
inc L000C
|
||||
.byte $04
|
||||
bbs7 L000C, L82BC
|
||||
L82B8: inx
|
||||
.byte $0C
|
||||
.byte $04
|
||||
.byte $E9
|
||||
L82BC: .byte $0C
|
||||
.byte $04
|
||||
nop
|
||||
.byte $0C
|
||||
.byte $04
|
||||
seb7 a
|
||||
.byte $0C
|
||||
.byte $04
|
||||
cpx L040C
|
||||
sbc L040C
|
||||
inc L040C
|
||||
seb7 L000C
|
||||
.byte $04
|
||||
beq L82DE
|
||||
.byte $04
|
||||
sbc (L000C),y
|
||||
.byte $04
|
||||
.byte $F2
|
||||
.byte $0C
|
||||
.byte $04
|
||||
bbc7 a, L82E8
|
||||
.byte $04
|
||||
.byte $F4
|
||||
.byte $0C
|
||||
L82DE: .byte $04
|
||||
sbc L000C,x
|
||||
.byte $04
|
||||
inc L000C,x
|
||||
.byte $04
|
||||
bbc7 L000C, L82EC
|
||||
L82E8: sed
|
||||
.byte $0C
|
||||
.byte $04
|
||||
.byte $F9
|
||||
L82EC: .byte $0C
|
||||
.byte $04
|
||||
.byte $FA
|
||||
.byte $0C
|
||||
.byte $04
|
||||
clb7 a
|
||||
.byte $0C
|
||||
.byte $04
|
||||
.byte $FC
|
||||
.byte $0C
|
||||
.byte $04
|
||||
sbc L040C,x
|
||||
inc L040C,x
|
||||
clb7 L000C
|
||||
.byte $04
|
||||
|
||||
Reference in New Issue
Block a user