Minor refactors and bug fixes

- Bit instruction now sets Z flag correctly
- DMA is no longer handled by cpu.rs

src/ppu.rs

@@ -81,6 +81,7 @@ pub enum PPUMMRegisters {
 pub struct OAM {
     mem: Vec<u8>,
     addr: u8,
+    edit_ver: usize,
 }
 
 #[derive(Debug, Clone, Copy, PartialEq, Eq)]
@@ -565,6 +566,7 @@ impl PPU {
             oam: OAM {
                 mem: vec![0u8; 256],
                 addr: 0,
+                edit_ver: 0,
             },
         }
     }
@@ -603,7 +605,7 @@ impl PPU {
             _ => panic!("No register at {:02X}", offset),
         }
     }
-    pub fn write_reg(&mut self, mem: &mut PpuMem, offset: u16, val: u8) {
+    pub fn write_reg(&mut self, mem: &mut PpuMem, offset: u16, mut val: u8) {
         match offset {
             0x00 => {
                 self.nmi_enabled = val & 0b1000_0000 != 0;
@@ -631,8 +633,12 @@ impl PPU {
             }
             0x03 => self.oam.addr = val,
             0x04 => {
+                if self.oam.addr % 4 == 2 {
+                    val &= 0b11100011;
+                }
                 self.oam.mem[self.oam.addr as usize] = val;
                 self.oam.addr = self.oam.addr.wrapping_add(1);
+                self.oam.edit_ver += 1;
             }
             0x05 => {
                 if self.background.w {
@@ -865,6 +871,12 @@ impl PPU {
     pub fn irq_waiting(&mut self) -> bool {
         false
     }
+    pub fn peek_oam(&self, addr: u8) -> u8 {
+        self.oam.mem[addr as usize]
+    }
+    pub fn oam_edit_ver(&self) -> usize {
+        self.oam.edit_ver
+    }
 
     pub fn render_name_table<R: Renderer>(&self, mem: &Mapped, frame: &mut Frame<R>) {
         for y in 0..60 {