Finally find (& fix) bug in BIT instructions

- BIT not longer ANDs the A register
- I now a pretty good debug view for debugging the CPU
- I wrote a number_input element for iced
- I upgraded to iced 0.14
- I added images for play and pause
- The debug log now displays in the debug view

Cargo.toml

@@ -5,9 +5,10 @@ edition = "2024"
 
 [dependencies]
 bitfield = "0.19.3"
-iced = { version = "0.13.1", features = ["debug", "canvas", "tokio", "lazy"] }
-iced_graphics = { version = "0.13.0", features = ["geometry", "image"] }
-iced_widget = { version = "0.13.4", features = ["canvas", "image"] }
+# iced = { version = "0.14.0", features = ["debug", "canvas", "tokio", "lazy", "image", "advanced"] }
+iced = { path = "../iced", features = ["debug", "canvas", "tokio", "lazy", "image", "advanced"] }
+# iced_graphics = { version = "0.14.0", features = ["geometry", "image"] }
+# iced_widget = { version = "0.13.4", features = ["canvas", "image"] }
 thiserror = "2.0.17"
 tracing = "0.1.41"
 tracing-subscriber = { version = "0.3.20", features = ["ansi", "chrono", "env-filter", "json", "serde"] }