Finally find (& fix) bug in BIT instructions

- BIT not longer ANDs the A register
- I now a pretty good debug view for debugging the CPU
- I wrote a number_input element for iced
- I upgraded to iced 0.14
- I added images for play and pause
- The debug log now displays in the debug view

src/apu.rs

@@ -105,9 +105,15 @@ impl APU {
     pub fn run_one_clock_cycle(&mut self) -> bool {
         false
     }
+    pub fn peek_nmi(&self) -> bool {
+        false
+    }
     pub fn nmi_waiting(&mut self) -> bool {
         false
     }
+    pub fn peek_irq(&self) -> bool {
+        false
+    }
     pub fn irq_waiting(&mut self) -> bool {
         // TODO: implement logic
         false