Finally find (& fix) bug in BIT instructions

- BIT not longer ANDs the A register
- I now a pretty good debug view for debugging the CPU
- I wrote a number_input element for iced
- I upgraded to iced 0.14
- I added images for play and pause
- The debug log now displays in the debug view

src/ppu.rs

@@ -1,5 +1,4 @@
-use iced::{Point, Size, widget::canvas::Frame};
-use iced_graphics::geometry::{Fill, Renderer};
+use iced::{advanced::graphics::geometry::Renderer, widget::canvas::{Fill, Frame}, Point, Size};
 
 use crate::{hex_view::Memory, mem::{MemoryMap, Segment}};
 
@@ -81,7 +80,7 @@ pub struct Background {
     cur_shift_low: u8,
 }
 
-struct Mask {
+pub struct Mask {
     grayscale: bool,
     background_on_left_edge: bool,
     sprites_on_left_edge: bool,
@@ -97,12 +96,12 @@ pub struct PPU {
     frame_count: usize,
     nmi_enabled: bool,
     nmi_waiting: bool,
-    even: bool,
-    scanline: usize,
-    pixel: usize,
+    pub even: bool,
+    pub scanline: usize,
+    pub pixel: usize,
 
-    mask: Mask,
-    vblank: bool,
+    pub mask: Mask,
+    pub vblank: bool,
 
     pub(crate) memory: MemoryMap<PPUMMRegisters>,
     background: Background,
@@ -191,6 +190,7 @@ impl PPU {
                 let tmp = if self.vblank { 0b1000_0000 } else { 0 };
                 self.vblank = false;
                 self.background.w = false;
+                println!("Reading status: {:02X}", tmp);
                 tmp
             }
             3 => panic!("oamaddr is write-only"),
@@ -357,6 +357,9 @@ impl PPU {
         return false;
     }
 
+    pub fn peek_nmi(&self) -> bool {
+        self.nmi_waiting
+    }
     pub fn nmi_waiting(&mut self) -> bool {
         if self.nmi_waiting {
             self.nmi_waiting = false;
@@ -365,6 +368,9 @@ impl PPU {
             return false;
         }
     }
+    pub fn peek_irq(&self) -> bool {
+        self.nmi_waiting
+    }
     pub fn irq_waiting(&mut self) -> bool {
         false
     }